Linux 3.4-rc7
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / process.c
CommitLineData
14cf11af 1/*
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2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
4 *
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
7 *
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
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17#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
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22#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/slab.h>
26#include <linux/user.h>
27#include <linux/elf.h>
28#include <linux/init.h>
29#include <linux/prctl.h>
30#include <linux/init_task.h>
4b16f8e2 31#include <linux/export.h>
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32#include <linux/kallsyms.h>
33#include <linux/mqueue.h>
34#include <linux/hardirq.h>
06d67d54 35#include <linux/utsname.h>
6794c782 36#include <linux/ftrace.h>
79741dd3 37#include <linux/kernel_stat.h>
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38#include <linux/personality.h>
39#include <linux/random.h>
5aae8a53 40#include <linux/hw_breakpoint.h>
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41
42#include <asm/pgtable.h>
43#include <asm/uaccess.h>
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44#include <asm/io.h>
45#include <asm/processor.h>
46#include <asm/mmu.h>
47#include <asm/prom.h>
76032de8 48#include <asm/machdep.h>
c6622f63 49#include <asm/time.h>
ae3a197e 50#include <asm/runlatch.h>
a7f31841 51#include <asm/syscalls.h>
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52#include <asm/switch_to.h>
53#include <asm/debug.h>
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54#ifdef CONFIG_PPC64
55#include <asm/firmware.h>
06d67d54 56#endif
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57#include <linux/kprobes.h>
58#include <linux/kdebug.h>
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59
60extern unsigned long _get_SP(void);
61
62#ifndef CONFIG_SMP
63struct task_struct *last_task_used_math = NULL;
64struct task_struct *last_task_used_altivec = NULL;
ce48b210 65struct task_struct *last_task_used_vsx = NULL;
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66struct task_struct *last_task_used_spe = NULL;
67#endif
68
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69/*
70 * Make sure the floating-point register state in the
71 * the thread_struct is up to date for task tsk.
72 */
73void flush_fp_to_thread(struct task_struct *tsk)
74{
75 if (tsk->thread.regs) {
76 /*
77 * We need to disable preemption here because if we didn't,
78 * another process could get scheduled after the regs->msr
79 * test but before we have finished saving the FP registers
80 * to the thread_struct. That process could take over the
81 * FPU, and then when we get scheduled again we would store
82 * bogus values for the remaining FP registers.
83 */
84 preempt_disable();
85 if (tsk->thread.regs->msr & MSR_FP) {
86#ifdef CONFIG_SMP
87 /*
88 * This should only ever be called for current or
89 * for a stopped child process. Since we save away
90 * the FP register state on context switch on SMP,
91 * there is something wrong if a stopped child appears
92 * to still have its FP state in the CPU registers.
93 */
94 BUG_ON(tsk != current);
95#endif
0ee6c15e 96 giveup_fpu(tsk);
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97 }
98 preempt_enable();
99 }
100}
de56a948 101EXPORT_SYMBOL_GPL(flush_fp_to_thread);
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102
103void enable_kernel_fp(void)
104{
105 WARN_ON(preemptible());
106
107#ifdef CONFIG_SMP
108 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
109 giveup_fpu(current);
110 else
111 giveup_fpu(NULL); /* just enables FP for kernel */
112#else
113 giveup_fpu(last_task_used_math);
114#endif /* CONFIG_SMP */
115}
116EXPORT_SYMBOL(enable_kernel_fp);
117
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118#ifdef CONFIG_ALTIVEC
119void enable_kernel_altivec(void)
120{
121 WARN_ON(preemptible());
122
123#ifdef CONFIG_SMP
124 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
125 giveup_altivec(current);
126 else
127 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
128#else
129 giveup_altivec(last_task_used_altivec);
130#endif /* CONFIG_SMP */
131}
132EXPORT_SYMBOL(enable_kernel_altivec);
133
134/*
135 * Make sure the VMX/Altivec register state in the
136 * the thread_struct is up to date for task tsk.
137 */
138void flush_altivec_to_thread(struct task_struct *tsk)
139{
140 if (tsk->thread.regs) {
141 preempt_disable();
142 if (tsk->thread.regs->msr & MSR_VEC) {
143#ifdef CONFIG_SMP
144 BUG_ON(tsk != current);
145#endif
0ee6c15e 146 giveup_altivec(tsk);
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147 }
148 preempt_enable();
149 }
150}
de56a948 151EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
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152#endif /* CONFIG_ALTIVEC */
153
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154#ifdef CONFIG_VSX
155#if 0
156/* not currently used, but some crazy RAID module might want to later */
157void enable_kernel_vsx(void)
158{
159 WARN_ON(preemptible());
160
161#ifdef CONFIG_SMP
162 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
163 giveup_vsx(current);
164 else
165 giveup_vsx(NULL); /* just enable vsx for kernel - force */
166#else
167 giveup_vsx(last_task_used_vsx);
168#endif /* CONFIG_SMP */
169}
170EXPORT_SYMBOL(enable_kernel_vsx);
171#endif
172
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173void giveup_vsx(struct task_struct *tsk)
174{
175 giveup_fpu(tsk);
176 giveup_altivec(tsk);
177 __giveup_vsx(tsk);
178}
179
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180void flush_vsx_to_thread(struct task_struct *tsk)
181{
182 if (tsk->thread.regs) {
183 preempt_disable();
184 if (tsk->thread.regs->msr & MSR_VSX) {
185#ifdef CONFIG_SMP
186 BUG_ON(tsk != current);
187#endif
188 giveup_vsx(tsk);
189 }
190 preempt_enable();
191 }
192}
de56a948 193EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
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194#endif /* CONFIG_VSX */
195
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196#ifdef CONFIG_SPE
197
198void enable_kernel_spe(void)
199{
200 WARN_ON(preemptible());
201
202#ifdef CONFIG_SMP
203 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
204 giveup_spe(current);
205 else
206 giveup_spe(NULL); /* just enable SPE for kernel - force */
207#else
208 giveup_spe(last_task_used_spe);
209#endif /* __SMP __ */
210}
211EXPORT_SYMBOL(enable_kernel_spe);
212
213void flush_spe_to_thread(struct task_struct *tsk)
214{
215 if (tsk->thread.regs) {
216 preempt_disable();
217 if (tsk->thread.regs->msr & MSR_SPE) {
218#ifdef CONFIG_SMP
219 BUG_ON(tsk != current);
220#endif
685659ee 221 tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
0ee6c15e 222 giveup_spe(tsk);
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223 }
224 preempt_enable();
225 }
226}
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227#endif /* CONFIG_SPE */
228
5388fb10 229#ifndef CONFIG_SMP
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230/*
231 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
232 * and the current task has some state, discard it.
233 */
5388fb10 234void discard_lazy_cpu_state(void)
48abec07 235{
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236 preempt_disable();
237 if (last_task_used_math == current)
238 last_task_used_math = NULL;
239#ifdef CONFIG_ALTIVEC
240 if (last_task_used_altivec == current)
241 last_task_used_altivec = NULL;
242#endif /* CONFIG_ALTIVEC */
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243#ifdef CONFIG_VSX
244 if (last_task_used_vsx == current)
245 last_task_used_vsx = NULL;
246#endif /* CONFIG_VSX */
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247#ifdef CONFIG_SPE
248 if (last_task_used_spe == current)
249 last_task_used_spe = NULL;
250#endif
251 preempt_enable();
48abec07 252}
5388fb10 253#endif /* CONFIG_SMP */
48abec07 254
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255#ifdef CONFIG_PPC_ADV_DEBUG_REGS
256void do_send_trap(struct pt_regs *regs, unsigned long address,
257 unsigned long error_code, int signal_code, int breakpt)
258{
259 siginfo_t info;
260
261 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
262 11, SIGSEGV) == NOTIFY_STOP)
263 return;
264
265 /* Deliver the signal to userspace */
266 info.si_signo = SIGTRAP;
267 info.si_errno = breakpt; /* breakpoint or watchpoint id */
268 info.si_code = signal_code;
269 info.si_addr = (void __user *)address;
270 force_sig_info(SIGTRAP, &info, current);
271}
272#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
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273void do_dabr(struct pt_regs *regs, unsigned long address,
274 unsigned long error_code)
275{
276 siginfo_t info;
277
278 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
279 11, SIGSEGV) == NOTIFY_STOP)
280 return;
281
282 if (debugger_dabr_match(regs))
283 return;
284
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285 /* Clear the DABR */
286 set_dabr(0);
287
288 /* Deliver the signal to userspace */
289 info.si_signo = SIGTRAP;
290 info.si_errno = 0;
291 info.si_code = TRAP_HWBKPT;
292 info.si_addr = (void __user *)address;
293 force_sig_info(SIGTRAP, &info, current);
294}
3bffb652 295#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
d6a61bfc 296
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297static DEFINE_PER_CPU(unsigned long, current_dabr);
298
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299#ifdef CONFIG_PPC_ADV_DEBUG_REGS
300/*
301 * Set the debug registers back to their default "safe" values.
302 */
303static void set_debug_reg_defaults(struct thread_struct *thread)
304{
305 thread->iac1 = thread->iac2 = 0;
306#if CONFIG_PPC_ADV_DEBUG_IACS > 2
307 thread->iac3 = thread->iac4 = 0;
308#endif
309 thread->dac1 = thread->dac2 = 0;
310#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
311 thread->dvc1 = thread->dvc2 = 0;
312#endif
313 thread->dbcr0 = 0;
314#ifdef CONFIG_BOOKE
315 /*
316 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
317 */
318 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
319 DBCR1_IAC3US | DBCR1_IAC4US;
320 /*
321 * Force Data Address Compare User/Supervisor bits to be User-only
322 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
323 */
324 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
325#else
326 thread->dbcr1 = 0;
327#endif
328}
329
330static void prime_debug_regs(struct thread_struct *thread)
331{
332 mtspr(SPRN_IAC1, thread->iac1);
333 mtspr(SPRN_IAC2, thread->iac2);
334#if CONFIG_PPC_ADV_DEBUG_IACS > 2
335 mtspr(SPRN_IAC3, thread->iac3);
336 mtspr(SPRN_IAC4, thread->iac4);
337#endif
338 mtspr(SPRN_DAC1, thread->dac1);
339 mtspr(SPRN_DAC2, thread->dac2);
340#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
341 mtspr(SPRN_DVC1, thread->dvc1);
342 mtspr(SPRN_DVC2, thread->dvc2);
343#endif
344 mtspr(SPRN_DBCR0, thread->dbcr0);
345 mtspr(SPRN_DBCR1, thread->dbcr1);
346#ifdef CONFIG_BOOKE
347 mtspr(SPRN_DBCR2, thread->dbcr2);
348#endif
349}
350/*
351 * Unless neither the old or new thread are making use of the
352 * debug registers, set the debug registers from the values
353 * stored in the new thread.
354 */
355static void switch_booke_debug_regs(struct thread_struct *new_thread)
356{
357 if ((current->thread.dbcr0 & DBCR0_IDM)
358 || (new_thread->dbcr0 & DBCR0_IDM))
359 prime_debug_regs(new_thread);
360}
361#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
e0780b72 362#ifndef CONFIG_HAVE_HW_BREAKPOINT
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363static void set_debug_reg_defaults(struct thread_struct *thread)
364{
365 if (thread->dabr) {
366 thread->dabr = 0;
367 set_dabr(0);
368 }
369}
e0780b72 370#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
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371#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
372
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373int set_dabr(unsigned long dabr)
374{
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375 __get_cpu_var(current_dabr) = dabr;
376
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377 if (ppc_md.set_dabr)
378 return ppc_md.set_dabr(dabr);
14cf11af 379
791cc501 380 /* XXX should we have a CPU_FTR_HAS_DABR ? */
172ae2e7 381#ifdef CONFIG_PPC_ADV_DEBUG_REGS
d6a61bfc 382 mtspr(SPRN_DAC1, dabr);
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383#ifdef CONFIG_PPC_47x
384 isync();
385#endif
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386#elif defined(CONFIG_PPC_BOOK3S)
387 mtspr(SPRN_DABR, dabr);
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388#endif
389
c6c9eace 390
cab0af98 391 return 0;
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392}
393
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394#ifdef CONFIG_PPC64
395DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
06d67d54 396#endif
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397
398struct task_struct *__switch_to(struct task_struct *prev,
399 struct task_struct *new)
400{
401 struct thread_struct *new_thread, *old_thread;
402 unsigned long flags;
403 struct task_struct *last;
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404#ifdef CONFIG_PPC_BOOK3S_64
405 struct ppc64_tlb_batch *batch;
406#endif
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407
408#ifdef CONFIG_SMP
409 /* avoid complexity of lazy save/restore of fpu
410 * by just saving it every time we switch out if
411 * this task used the fpu during the last quantum.
412 *
413 * If it tries to use the fpu again, it'll trap and
414 * reload its fp regs. So we don't have to do a restore
415 * every switch, just a save.
416 * -- Cort
417 */
418 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
419 giveup_fpu(prev);
420#ifdef CONFIG_ALTIVEC
421 /*
422 * If the previous thread used altivec in the last quantum
423 * (thus changing altivec regs) then save them.
424 * We used to check the VRSAVE register but not all apps
425 * set it, so we don't rely on it now (and in fact we need
426 * to save & restore VSCR even if VRSAVE == 0). -- paulus
427 *
428 * On SMP we always save/restore altivec regs just to avoid the
429 * complexity of changing processors.
430 * -- Cort
431 */
432 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
433 giveup_altivec(prev);
14cf11af 434#endif /* CONFIG_ALTIVEC */
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435#ifdef CONFIG_VSX
436 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
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437 /* VMX and FPU registers are already save here */
438 __giveup_vsx(prev);
ce48b210 439#endif /* CONFIG_VSX */
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440#ifdef CONFIG_SPE
441 /*
442 * If the previous thread used spe in the last quantum
443 * (thus changing spe regs) then save them.
444 *
445 * On SMP we always save/restore spe regs just to avoid the
446 * complexity of changing processors.
447 */
448 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
449 giveup_spe(prev);
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450#endif /* CONFIG_SPE */
451
452#else /* CONFIG_SMP */
453#ifdef CONFIG_ALTIVEC
454 /* Avoid the trap. On smp this this never happens since
455 * we don't set last_task_used_altivec -- Cort
456 */
457 if (new->thread.regs && last_task_used_altivec == new)
458 new->thread.regs->msr |= MSR_VEC;
459#endif /* CONFIG_ALTIVEC */
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460#ifdef CONFIG_VSX
461 if (new->thread.regs && last_task_used_vsx == new)
462 new->thread.regs->msr |= MSR_VSX;
463#endif /* CONFIG_VSX */
c0c0d996 464#ifdef CONFIG_SPE
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465 /* Avoid the trap. On smp this this never happens since
466 * we don't set last_task_used_spe
467 */
468 if (new->thread.regs && last_task_used_spe == new)
469 new->thread.regs->msr |= MSR_SPE;
470#endif /* CONFIG_SPE */
c0c0d996 471
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472#endif /* CONFIG_SMP */
473
172ae2e7 474#ifdef CONFIG_PPC_ADV_DEBUG_REGS
3bffb652 475 switch_booke_debug_regs(&new->thread);
c6c9eace 476#else
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477/*
478 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
479 * schedule DABR
480 */
481#ifndef CONFIG_HAVE_HW_BREAKPOINT
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482 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
483 set_dabr(new->thread.dabr);
5aae8a53 484#endif /* CONFIG_HAVE_HW_BREAKPOINT */
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485#endif
486
c6c9eace 487
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488 new_thread = &new->thread;
489 old_thread = &current->thread;
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490
491#ifdef CONFIG_PPC64
492 /*
493 * Collect processor utilization data per process
494 */
495 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
496 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
497 long unsigned start_tb, current_tb;
498 start_tb = old_thread->start_tb;
499 cu->current_tb = current_tb = mfspr(SPRN_PURR);
500 old_thread->accum_tb += (current_tb - start_tb);
501 new_thread->start_tb = current_tb;
502 }
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503#endif /* CONFIG_PPC64 */
504
505#ifdef CONFIG_PPC_BOOK3S_64
506 batch = &__get_cpu_var(ppc64_tlb_batch);
507 if (batch->active) {
508 current_thread_info()->local_flags |= _TLF_LAZY_MMU;
509 if (batch->index)
510 __flush_tlb_pending(batch);
511 batch->active = 0;
512 }
513#endif /* CONFIG_PPC_BOOK3S_64 */
06d67d54 514
14cf11af 515 local_irq_save(flags);
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516
517 account_system_vtime(current);
81a3843f 518 account_process_vtime(current);
c6622f63 519
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520 /*
521 * We can't take a PMU exception inside _switch() since there is a
522 * window where the kernel stack SLB and the kernel stack are out
523 * of sync. Hard disable here.
524 */
525 hard_irq_disable();
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526 last = _switch(old_thread, new_thread);
527
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528#ifdef CONFIG_PPC_BOOK3S_64
529 if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
530 current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
531 batch = &__get_cpu_var(ppc64_tlb_batch);
532 batch->active = 1;
533 }
534#endif /* CONFIG_PPC_BOOK3S_64 */
535
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536 local_irq_restore(flags);
537
538 return last;
539}
540
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541static int instructions_to_print = 16;
542
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543static void show_instructions(struct pt_regs *regs)
544{
545 int i;
546 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
547 sizeof(int));
548
549 printk("Instruction dump:");
550
551 for (i = 0; i < instructions_to_print; i++) {
552 int instr;
553
554 if (!(i % 8))
555 printk("\n");
556
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557#if !defined(CONFIG_BOOKE)
558 /* If executing with the IMMU off, adjust pc rather
559 * than print XXXXXXXX.
560 */
561 if (!(regs->msr & MSR_IR))
562 pc = (unsigned long)phys_to_virt(pc);
563#endif
564
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565 /* We use __get_user here *only* to avoid an OOPS on a
566 * bad address because the pc *should* only be a
567 * kernel address.
568 */
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569 if (!__kernel_text_address(pc) ||
570 __get_user(instr, (unsigned int __user *)pc)) {
40c8cefa 571 printk(KERN_CONT "XXXXXXXX ");
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572 } else {
573 if (regs->nip == pc)
40c8cefa 574 printk(KERN_CONT "<%08x> ", instr);
06d67d54 575 else
40c8cefa 576 printk(KERN_CONT "%08x ", instr);
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577 }
578
579 pc += sizeof(int);
580 }
581
582 printk("\n");
583}
584
585static struct regbit {
586 unsigned long bit;
587 const char *name;
588} msr_bits[] = {
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589#if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
590 {MSR_SF, "SF"},
591 {MSR_HV, "HV"},
592#endif
593 {MSR_VEC, "VEC"},
594 {MSR_VSX, "VSX"},
595#ifdef CONFIG_BOOKE
596 {MSR_CE, "CE"},
597#endif
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598 {MSR_EE, "EE"},
599 {MSR_PR, "PR"},
600 {MSR_FP, "FP"},
601 {MSR_ME, "ME"},
3bfd0c9c 602#ifdef CONFIG_BOOKE
1b98326b 603 {MSR_DE, "DE"},
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604#else
605 {MSR_SE, "SE"},
606 {MSR_BE, "BE"},
607#endif
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608 {MSR_IR, "IR"},
609 {MSR_DR, "DR"},
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610 {MSR_PMM, "PMM"},
611#ifndef CONFIG_BOOKE
612 {MSR_RI, "RI"},
613 {MSR_LE, "LE"},
614#endif
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615 {0, NULL}
616};
617
618static void printbits(unsigned long val, struct regbit *bits)
619{
620 const char *sep = "";
621
622 printk("<");
623 for (; bits->bit; ++bits)
624 if (val & bits->bit) {
625 printk("%s%s", sep, bits->name);
626 sep = ",";
627 }
628 printk(">");
629}
630
631#ifdef CONFIG_PPC64
f6f7dde3 632#define REG "%016lx"
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633#define REGS_PER_LINE 4
634#define LAST_VOLATILE 13
635#else
f6f7dde3 636#define REG "%08lx"
06d67d54
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637#define REGS_PER_LINE 8
638#define LAST_VOLATILE 12
639#endif
640
14cf11af
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641void show_regs(struct pt_regs * regs)
642{
643 int i, trap;
644
06d67d54
PM
645 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
646 regs->nip, regs->link, regs->ctr);
647 printk("REGS: %p TRAP: %04lx %s (%s)\n",
96b644bd 648 regs, regs->trap, print_tainted(), init_utsname()->release);
06d67d54
PM
649 printk("MSR: "REG" ", regs->msr);
650 printbits(regs->msr, msr_bits);
f6f7dde3 651 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
7230c564
BH
652#ifdef CONFIG_PPC64
653 printk("SOFTE: %ld\n", regs->softe);
654#endif
14cf11af 655 trap = TRAP(regs);
5115a026
MN
656 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
657 printk("CFAR: "REG"\n", regs->orig_gpr3);
14cf11af 658 if (trap == 0x300 || trap == 0x600)
ba28c9aa 659#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
14170789
KG
660 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
661#else
7071854b 662 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
14170789 663#endif
06d67d54 664 printk("TASK = %p[%d] '%s' THREAD: %p",
19c5870c 665 current, task_pid_nr(current), current->comm, task_thread_info(current));
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666
667#ifdef CONFIG_SMP
79ccd1be 668 printk(" CPU: %d", raw_smp_processor_id());
14cf11af
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669#endif /* CONFIG_SMP */
670
671 for (i = 0; i < 32; i++) {
06d67d54 672 if ((i % REGS_PER_LINE) == 0)
a2367194 673 printk("\nGPR%02d: ", i);
06d67d54
PM
674 printk(REG " ", regs->gpr[i]);
675 if (i == LAST_VOLATILE && !FULL_REGS(regs))
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676 break;
677 }
678 printk("\n");
679#ifdef CONFIG_KALLSYMS
680 /*
681 * Lookup NIP late so we have the best change of getting the
682 * above info out without failing
683 */
058c78f4
BH
684 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
685 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
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686#endif
687 show_stack(current, (unsigned long *) regs->gpr[1]);
06d67d54
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688 if (!user_mode(regs))
689 show_instructions(regs);
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690}
691
692void exit_thread(void)
693{
48abec07 694 discard_lazy_cpu_state();
14cf11af
PM
695}
696
697void flush_thread(void)
698{
48abec07 699 discard_lazy_cpu_state();
14cf11af 700
e0780b72 701#ifdef CONFIG_HAVE_HW_BREAKPOINT
5aae8a53 702 flush_ptrace_hw_breakpoint(current);
e0780b72 703#else /* CONFIG_HAVE_HW_BREAKPOINT */
3bffb652 704 set_debug_reg_defaults(&current->thread);
e0780b72 705#endif /* CONFIG_HAVE_HW_BREAKPOINT */
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706}
707
708void
709release_thread(struct task_struct *t)
710{
711}
712
713/*
714 * This gets called before we allocate a new thread and copy
715 * the current task into it.
716 */
717void prepare_to_copy(struct task_struct *tsk)
718{
719 flush_fp_to_thread(current);
720 flush_altivec_to_thread(current);
ce48b210 721 flush_vsx_to_thread(current);
14cf11af 722 flush_spe_to_thread(current);
5aae8a53
P
723#ifdef CONFIG_HAVE_HW_BREAKPOINT
724 flush_ptrace_hw_breakpoint(tsk);
725#endif /* CONFIG_HAVE_HW_BREAKPOINT */
14cf11af
PM
726}
727
728/*
729 * Copy a thread..
730 */
efcac658
AK
731extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
732
6f2c55b8 733int copy_thread(unsigned long clone_flags, unsigned long usp,
06d67d54
PM
734 unsigned long unused, struct task_struct *p,
735 struct pt_regs *regs)
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PM
736{
737 struct pt_regs *childregs, *kregs;
738 extern void ret_from_fork(void);
0cec6fd1 739 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
14cf11af
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740
741 CHECK_FULL_REGS(regs);
742 /* Copy registers */
743 sp -= sizeof(struct pt_regs);
744 childregs = (struct pt_regs *) sp;
745 *childregs = *regs;
746 if ((childregs->msr & MSR_PR) == 0) {
747 /* for kernel thread, set `current' and stackptr in new task */
748 childregs->gpr[1] = sp + sizeof(struct pt_regs);
06d67d54 749#ifdef CONFIG_PPC32
14cf11af 750 childregs->gpr[2] = (unsigned long) p;
06d67d54 751#else
b5e2fc1c 752 clear_tsk_thread_flag(p, TIF_32BIT);
06d67d54 753#endif
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754 p->thread.regs = NULL; /* no user register state */
755 } else {
756 childregs->gpr[1] = usp;
757 p->thread.regs = childregs;
06d67d54
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758 if (clone_flags & CLONE_SETTLS) {
759#ifdef CONFIG_PPC64
9904b005 760 if (!is_32bit_task())
06d67d54
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761 childregs->gpr[13] = childregs->gpr[6];
762 else
763#endif
764 childregs->gpr[2] = childregs->gpr[6];
765 }
14cf11af
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766 }
767 childregs->gpr[3] = 0; /* Result from fork() */
768 sp -= STACK_FRAME_OVERHEAD;
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769
770 /*
771 * The way this works is that at some point in the future
772 * some task will call _switch to switch to the new task.
773 * That will pop off the stack frame created below and start
774 * the new task running at ret_from_fork. The new task will
775 * do some house keeping and then return from the fork or clone
776 * system call, using the stack frame created above.
777 */
778 sp -= sizeof(struct pt_regs);
779 kregs = (struct pt_regs *) sp;
780 sp -= STACK_FRAME_OVERHEAD;
781 p->thread.ksp = sp;
85218827
KG
782 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
783 _ALIGN_UP(sizeof(struct thread_info), 16);
14cf11af 784
94491685 785#ifdef CONFIG_PPC_STD_MMU_64
44ae3ab3 786 if (mmu_has_feature(MMU_FTR_SLB)) {
1189be65 787 unsigned long sp_vsid;
3c726f8d 788 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
06d67d54 789
44ae3ab3 790 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
1189be65
PM
791 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
792 << SLB_VSID_SHIFT_1T;
793 else
794 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
795 << SLB_VSID_SHIFT;
3c726f8d 796 sp_vsid |= SLB_VSID_KERNEL | llp;
06d67d54
PM
797 p->thread.ksp_vsid = sp_vsid;
798 }
747bea91 799#endif /* CONFIG_PPC_STD_MMU_64 */
efcac658
AK
800#ifdef CONFIG_PPC64
801 if (cpu_has_feature(CPU_FTR_DSCR)) {
802 if (current->thread.dscr_inherit) {
803 p->thread.dscr_inherit = 1;
804 p->thread.dscr = current->thread.dscr;
805 } else if (0 != dscr_default) {
806 p->thread.dscr_inherit = 1;
807 p->thread.dscr = dscr_default;
808 } else {
809 p->thread.dscr_inherit = 0;
810 p->thread.dscr = 0;
811 }
812 }
813#endif
06d67d54
PM
814
815 /*
816 * The PPC64 ABI makes use of a TOC to contain function
817 * pointers. The function (ret_from_except) is actually a pointer
818 * to the TOC entry. The first entry is a pointer to the actual
819 * function.
820 */
747bea91 821#ifdef CONFIG_PPC64
06d67d54
PM
822 kregs->nip = *((unsigned long *)ret_from_fork);
823#else
824 kregs->nip = (unsigned long)ret_from_fork;
06d67d54 825#endif
14cf11af
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826
827 return 0;
828}
829
830/*
831 * Set up a thread for executing a new program
832 */
06d67d54 833void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
14cf11af 834{
90eac727
ME
835#ifdef CONFIG_PPC64
836 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
837#endif
838
06d67d54
PM
839 /*
840 * If we exec out of a kernel thread then thread.regs will not be
841 * set. Do it now.
842 */
843 if (!current->thread.regs) {
0cec6fd1
AV
844 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
845 current->thread.regs = regs - 1;
06d67d54
PM
846 }
847
14cf11af
PM
848 memset(regs->gpr, 0, sizeof(regs->gpr));
849 regs->ctr = 0;
850 regs->link = 0;
851 regs->xer = 0;
852 regs->ccr = 0;
14cf11af 853 regs->gpr[1] = sp;
06d67d54 854
474f8196
RM
855 /*
856 * We have just cleared all the nonvolatile GPRs, so make
857 * FULL_REGS(regs) return true. This is necessary to allow
858 * ptrace to examine the thread immediately after exec.
859 */
860 regs->trap &= ~1UL;
861
06d67d54
PM
862#ifdef CONFIG_PPC32
863 regs->mq = 0;
864 regs->nip = start;
14cf11af 865 regs->msr = MSR_USER;
06d67d54 866#else
9904b005 867 if (!is_32bit_task()) {
90eac727 868 unsigned long entry, toc;
06d67d54
PM
869
870 /* start is a relocated pointer to the function descriptor for
871 * the elf _start routine. The first entry in the function
872 * descriptor is the entry address of _start and the second
873 * entry is the TOC value we need to use.
874 */
875 __get_user(entry, (unsigned long __user *)start);
876 __get_user(toc, (unsigned long __user *)start+1);
877
878 /* Check whether the e_entry function descriptor entries
879 * need to be relocated before we can use them.
880 */
881 if (load_addr != 0) {
882 entry += load_addr;
883 toc += load_addr;
884 }
885 regs->nip = entry;
886 regs->gpr[2] = toc;
887 regs->msr = MSR_USER64;
d4bf9a78
SR
888 } else {
889 regs->nip = start;
890 regs->gpr[2] = 0;
891 regs->msr = MSR_USER32;
06d67d54
PM
892 }
893#endif
894
48abec07 895 discard_lazy_cpu_state();
ce48b210
MN
896#ifdef CONFIG_VSX
897 current->thread.used_vsr = 0;
898#endif
14cf11af 899 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
25c8a78b 900 current->thread.fpscr.val = 0;
14cf11af
PM
901#ifdef CONFIG_ALTIVEC
902 memset(current->thread.vr, 0, sizeof(current->thread.vr));
903 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
06d67d54 904 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
14cf11af
PM
905 current->thread.vrsave = 0;
906 current->thread.used_vr = 0;
907#endif /* CONFIG_ALTIVEC */
908#ifdef CONFIG_SPE
909 memset(current->thread.evr, 0, sizeof(current->thread.evr));
910 current->thread.acc = 0;
911 current->thread.spefscr = 0;
912 current->thread.used_spe = 0;
913#endif /* CONFIG_SPE */
914}
915
916#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
917 | PR_FP_EXC_RES | PR_FP_EXC_INV)
918
919int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
920{
921 struct pt_regs *regs = tsk->thread.regs;
922
923 /* This is a bit hairy. If we are an SPE enabled processor
924 * (have embedded fp) we store the IEEE exception enable flags in
925 * fpexc_mode. fpexc_mode is also used for setting FP exception
926 * mode (asyn, precise, disabled) for 'Classic' FP. */
927 if (val & PR_FP_EXC_SW_ENABLE) {
928#ifdef CONFIG_SPE
5e14d21e
KG
929 if (cpu_has_feature(CPU_FTR_SPE)) {
930 tsk->thread.fpexc_mode = val &
931 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
932 return 0;
933 } else {
934 return -EINVAL;
935 }
14cf11af
PM
936#else
937 return -EINVAL;
938#endif
14cf11af 939 }
06d67d54
PM
940
941 /* on a CONFIG_SPE this does not hurt us. The bits that
942 * __pack_fe01 use do not overlap with bits used for
943 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
944 * on CONFIG_SPE implementations are reserved so writing to
945 * them does not change anything */
946 if (val > PR_FP_EXC_PRECISE)
947 return -EINVAL;
948 tsk->thread.fpexc_mode = __pack_fe01(val);
949 if (regs != NULL && (regs->msr & MSR_FP) != 0)
950 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
951 | tsk->thread.fpexc_mode;
14cf11af
PM
952 return 0;
953}
954
955int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
956{
957 unsigned int val;
958
959 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
960#ifdef CONFIG_SPE
5e14d21e
KG
961 if (cpu_has_feature(CPU_FTR_SPE))
962 val = tsk->thread.fpexc_mode;
963 else
964 return -EINVAL;
14cf11af
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965#else
966 return -EINVAL;
967#endif
968 else
969 val = __unpack_fe01(tsk->thread.fpexc_mode);
970 return put_user(val, (unsigned int __user *) adr);
971}
972
fab5db97
PM
973int set_endian(struct task_struct *tsk, unsigned int val)
974{
975 struct pt_regs *regs = tsk->thread.regs;
976
977 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
978 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
979 return -EINVAL;
980
981 if (regs == NULL)
982 return -EINVAL;
983
984 if (val == PR_ENDIAN_BIG)
985 regs->msr &= ~MSR_LE;
986 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
987 regs->msr |= MSR_LE;
988 else
989 return -EINVAL;
990
991 return 0;
992}
993
994int get_endian(struct task_struct *tsk, unsigned long adr)
995{
996 struct pt_regs *regs = tsk->thread.regs;
997 unsigned int val;
998
999 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
1000 !cpu_has_feature(CPU_FTR_REAL_LE))
1001 return -EINVAL;
1002
1003 if (regs == NULL)
1004 return -EINVAL;
1005
1006 if (regs->msr & MSR_LE) {
1007 if (cpu_has_feature(CPU_FTR_REAL_LE))
1008 val = PR_ENDIAN_LITTLE;
1009 else
1010 val = PR_ENDIAN_PPC_LITTLE;
1011 } else
1012 val = PR_ENDIAN_BIG;
1013
1014 return put_user(val, (unsigned int __user *)adr);
1015}
1016
e9370ae1
PM
1017int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
1018{
1019 tsk->thread.align_ctl = val;
1020 return 0;
1021}
1022
1023int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
1024{
1025 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
1026}
1027
06d67d54
PM
1028#define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
1029
14cf11af
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1030int sys_clone(unsigned long clone_flags, unsigned long usp,
1031 int __user *parent_tidp, void __user *child_threadptr,
1032 int __user *child_tidp, int p6,
1033 struct pt_regs *regs)
1034{
1035 CHECK_FULL_REGS(regs);
1036 if (usp == 0)
1037 usp = regs->gpr[1]; /* stack pointer for child */
06d67d54 1038#ifdef CONFIG_PPC64
9904b005 1039 if (is_32bit_task()) {
06d67d54
PM
1040 parent_tidp = TRUNC_PTR(parent_tidp);
1041 child_tidp = TRUNC_PTR(child_tidp);
1042 }
1043#endif
14cf11af
PM
1044 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
1045}
1046
1047int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
1048 unsigned long p4, unsigned long p5, unsigned long p6,
1049 struct pt_regs *regs)
1050{
1051 CHECK_FULL_REGS(regs);
1052 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
1053}
1054
1055int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
1056 unsigned long p4, unsigned long p5, unsigned long p6,
1057 struct pt_regs *regs)
1058{
1059 CHECK_FULL_REGS(regs);
1060 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
1061 regs, 0, NULL, NULL);
1062}
1063
1064int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
1065 unsigned long a3, unsigned long a4, unsigned long a5,
1066 struct pt_regs *regs)
1067{
1068 int error;
06d67d54 1069 char *filename;
14cf11af 1070
c7887325 1071 filename = getname((const char __user *) a0);
14cf11af
PM
1072 error = PTR_ERR(filename);
1073 if (IS_ERR(filename))
1074 goto out;
1075 flush_fp_to_thread(current);
1076 flush_altivec_to_thread(current);
1077 flush_spe_to_thread(current);
d7627467
DH
1078 error = do_execve(filename,
1079 (const char __user *const __user *) a1,
1080 (const char __user *const __user *) a2, regs);
14cf11af
PM
1081 putname(filename);
1082out:
1083 return error;
1084}
1085
bb72c481
PM
1086static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1087 unsigned long nbytes)
1088{
1089 unsigned long stack_page;
1090 unsigned long cpu = task_cpu(p);
1091
1092 /*
1093 * Avoid crashing if the stack has overflowed and corrupted
1094 * task_cpu(p), which is in the thread_info struct.
1095 */
1096 if (cpu < NR_CPUS && cpu_possible(cpu)) {
1097 stack_page = (unsigned long) hardirq_ctx[cpu];
1098 if (sp >= stack_page + sizeof(struct thread_struct)
1099 && sp <= stack_page + THREAD_SIZE - nbytes)
1100 return 1;
1101
1102 stack_page = (unsigned long) softirq_ctx[cpu];
1103 if (sp >= stack_page + sizeof(struct thread_struct)
1104 && sp <= stack_page + THREAD_SIZE - nbytes)
1105 return 1;
1106 }
1107 return 0;
1108}
1109
2f25194d 1110int validate_sp(unsigned long sp, struct task_struct *p,
14cf11af
PM
1111 unsigned long nbytes)
1112{
0cec6fd1 1113 unsigned long stack_page = (unsigned long)task_stack_page(p);
14cf11af
PM
1114
1115 if (sp >= stack_page + sizeof(struct thread_struct)
1116 && sp <= stack_page + THREAD_SIZE - nbytes)
1117 return 1;
1118
bb72c481 1119 return valid_irq_stack(sp, p, nbytes);
14cf11af
PM
1120}
1121
2f25194d
AB
1122EXPORT_SYMBOL(validate_sp);
1123
14cf11af
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1124unsigned long get_wchan(struct task_struct *p)
1125{
1126 unsigned long ip, sp;
1127 int count = 0;
1128
1129 if (!p || p == current || p->state == TASK_RUNNING)
1130 return 0;
1131
1132 sp = p->thread.ksp;
ec2b36b9 1133 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
14cf11af
PM
1134 return 0;
1135
1136 do {
1137 sp = *(unsigned long *)sp;
ec2b36b9 1138 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
14cf11af
PM
1139 return 0;
1140 if (count > 0) {
ec2b36b9 1141 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
14cf11af
PM
1142 if (!in_sched_functions(ip))
1143 return ip;
1144 }
1145 } while (count++ < 16);
1146 return 0;
1147}
06d67d54 1148
c4d04be1 1149static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
06d67d54
PM
1150
1151void show_stack(struct task_struct *tsk, unsigned long *stack)
1152{
1153 unsigned long sp, ip, lr, newsp;
1154 int count = 0;
1155 int firstframe = 1;
6794c782
SR
1156#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1157 int curr_frame = current->curr_ret_stack;
1158 extern void return_to_handler(void);
9135c3cc
SR
1159 unsigned long rth = (unsigned long)return_to_handler;
1160 unsigned long mrth = -1;
6794c782 1161#ifdef CONFIG_PPC64
9135c3cc
SR
1162 extern void mod_return_to_handler(void);
1163 rth = *(unsigned long *)rth;
1164 mrth = (unsigned long)mod_return_to_handler;
1165 mrth = *(unsigned long *)mrth;
6794c782
SR
1166#endif
1167#endif
06d67d54
PM
1168
1169 sp = (unsigned long) stack;
1170 if (tsk == NULL)
1171 tsk = current;
1172 if (sp == 0) {
1173 if (tsk == current)
1174 asm("mr %0,1" : "=r" (sp));
1175 else
1176 sp = tsk->thread.ksp;
1177 }
1178
1179 lr = 0;
1180 printk("Call Trace:\n");
1181 do {
ec2b36b9 1182 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
06d67d54
PM
1183 return;
1184
1185 stack = (unsigned long *) sp;
1186 newsp = stack[0];
ec2b36b9 1187 ip = stack[STACK_FRAME_LR_SAVE];
06d67d54 1188 if (!firstframe || ip != lr) {
058c78f4 1189 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
6794c782 1190#ifdef CONFIG_FUNCTION_GRAPH_TRACER
9135c3cc 1191 if ((ip == rth || ip == mrth) && curr_frame >= 0) {
6794c782
SR
1192 printk(" (%pS)",
1193 (void *)current->ret_stack[curr_frame].ret);
1194 curr_frame--;
1195 }
1196#endif
06d67d54
PM
1197 if (firstframe)
1198 printk(" (unreliable)");
1199 printk("\n");
1200 }
1201 firstframe = 0;
1202
1203 /*
1204 * See if this is an exception frame.
1205 * We look for the "regshere" marker in the current frame.
1206 */
ec2b36b9
BH
1207 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1208 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
06d67d54
PM
1209 struct pt_regs *regs = (struct pt_regs *)
1210 (sp + STACK_FRAME_OVERHEAD);
06d67d54 1211 lr = regs->link;
058c78f4
BH
1212 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1213 regs->trap, (void *)regs->nip, (void *)lr);
06d67d54
PM
1214 firstframe = 1;
1215 }
1216
1217 sp = newsp;
1218 } while (count++ < kstack_depth_to_print);
1219}
1220
1221void dump_stack(void)
1222{
1223 show_stack(current, NULL);
1224}
1225EXPORT_SYMBOL(dump_stack);
cb2c9b27
AB
1226
1227#ifdef CONFIG_PPC64
fe1952fc
BH
1228/* Called with hard IRQs off */
1229void __ppc64_runlatch_on(void)
cb2c9b27 1230{
fe1952fc 1231 struct thread_info *ti = current_thread_info();
cb2c9b27
AB
1232 unsigned long ctrl;
1233
fe1952fc
BH
1234 ctrl = mfspr(SPRN_CTRLF);
1235 ctrl |= CTRL_RUNLATCH;
1236 mtspr(SPRN_CTRLT, ctrl);
cb2c9b27 1237
fae2e0fb 1238 ti->local_flags |= _TLF_RUNLATCH;
cb2c9b27
AB
1239}
1240
fe1952fc 1241/* Called with hard IRQs off */
4138d653 1242void __ppc64_runlatch_off(void)
cb2c9b27 1243{
fe1952fc 1244 struct thread_info *ti = current_thread_info();
cb2c9b27
AB
1245 unsigned long ctrl;
1246
fae2e0fb 1247 ti->local_flags &= ~_TLF_RUNLATCH;
cb2c9b27 1248
4138d653
AB
1249 ctrl = mfspr(SPRN_CTRLF);
1250 ctrl &= ~CTRL_RUNLATCH;
1251 mtspr(SPRN_CTRLT, ctrl);
cb2c9b27 1252}
fe1952fc 1253#endif /* CONFIG_PPC64 */
f6a61680
BH
1254
1255#if THREAD_SHIFT < PAGE_SHIFT
1256
1257static struct kmem_cache *thread_info_cache;
1258
b6a84016 1259struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
f6a61680
BH
1260{
1261 struct thread_info *ti;
1262
b6a84016 1263 ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);
f6a61680
BH
1264 if (unlikely(ti == NULL))
1265 return NULL;
1266#ifdef CONFIG_DEBUG_STACK_USAGE
1267 memset(ti, 0, THREAD_SIZE);
1268#endif
1269 return ti;
1270}
1271
1272void free_thread_info(struct thread_info *ti)
1273{
1274 kmem_cache_free(thread_info_cache, ti);
1275}
1276
1277void thread_info_cache_init(void)
1278{
1279 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
1280 THREAD_SIZE, 0, NULL);
1281 BUG_ON(thread_info_cache == NULL);
1282}
1283
1284#endif /* THREAD_SHIFT < PAGE_SHIFT */
d839088c
AB
1285
1286unsigned long arch_align_stack(unsigned long sp)
1287{
1288 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1289 sp -= get_random_int() & ~PAGE_MASK;
1290 return sp & ~0xf;
1291}
912f9ee2
AB
1292
1293static inline unsigned long brk_rnd(void)
1294{
1295 unsigned long rnd = 0;
1296
1297 /* 8MB for 32bit, 1GB for 64bit */
1298 if (is_32bit_task())
1299 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1300 else
1301 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1302
1303 return rnd << PAGE_SHIFT;
1304}
1305
1306unsigned long arch_randomize_brk(struct mm_struct *mm)
1307{
8bbde7a7
AB
1308 unsigned long base = mm->brk;
1309 unsigned long ret;
1310
ce7a35c7 1311#ifdef CONFIG_PPC_STD_MMU_64
8bbde7a7
AB
1312 /*
1313 * If we are using 1TB segments and we are allowed to randomise
1314 * the heap, we can put it above 1TB so it is backed by a 1TB
1315 * segment. Otherwise the heap will be in the bottom 1TB
1316 * which always uses 256MB segments and this may result in a
1317 * performance penalty.
1318 */
1319 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1320 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1321#endif
1322
1323 ret = PAGE_ALIGN(base + brk_rnd());
912f9ee2
AB
1324
1325 if (ret < mm->brk)
1326 return mm->brk;
1327
1328 return ret;
1329}
501cb16d
AB
1330
1331unsigned long randomize_et_dyn(unsigned long base)
1332{
1333 unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1334
1335 if (ret < base)
1336 return base;
1337
1338 return ret;
1339}