hw_breakpoints: Allow arch-specific cleanup before breakpoint unregistration
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / process.c
CommitLineData
14cf11af 1/*
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2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
4 *
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
7 *
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
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17#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
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22#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/slab.h>
26#include <linux/user.h>
27#include <linux/elf.h>
28#include <linux/init.h>
29#include <linux/prctl.h>
30#include <linux/init_task.h>
31#include <linux/module.h>
32#include <linux/kallsyms.h>
33#include <linux/mqueue.h>
34#include <linux/hardirq.h>
06d67d54 35#include <linux/utsname.h>
6794c782 36#include <linux/ftrace.h>
79741dd3 37#include <linux/kernel_stat.h>
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38#include <linux/personality.h>
39#include <linux/random.h>
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40
41#include <asm/pgtable.h>
42#include <asm/uaccess.h>
43#include <asm/system.h>
44#include <asm/io.h>
45#include <asm/processor.h>
46#include <asm/mmu.h>
47#include <asm/prom.h>
76032de8 48#include <asm/machdep.h>
c6622f63 49#include <asm/time.h>
a7f31841 50#include <asm/syscalls.h>
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51#ifdef CONFIG_PPC64
52#include <asm/firmware.h>
06d67d54 53#endif
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54#include <linux/kprobes.h>
55#include <linux/kdebug.h>
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56
57extern unsigned long _get_SP(void);
58
59#ifndef CONFIG_SMP
60struct task_struct *last_task_used_math = NULL;
61struct task_struct *last_task_used_altivec = NULL;
ce48b210 62struct task_struct *last_task_used_vsx = NULL;
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63struct task_struct *last_task_used_spe = NULL;
64#endif
65
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66/*
67 * Make sure the floating-point register state in the
68 * the thread_struct is up to date for task tsk.
69 */
70void flush_fp_to_thread(struct task_struct *tsk)
71{
72 if (tsk->thread.regs) {
73 /*
74 * We need to disable preemption here because if we didn't,
75 * another process could get scheduled after the regs->msr
76 * test but before we have finished saving the FP registers
77 * to the thread_struct. That process could take over the
78 * FPU, and then when we get scheduled again we would store
79 * bogus values for the remaining FP registers.
80 */
81 preempt_disable();
82 if (tsk->thread.regs->msr & MSR_FP) {
83#ifdef CONFIG_SMP
84 /*
85 * This should only ever be called for current or
86 * for a stopped child process. Since we save away
87 * the FP register state on context switch on SMP,
88 * there is something wrong if a stopped child appears
89 * to still have its FP state in the CPU registers.
90 */
91 BUG_ON(tsk != current);
92#endif
0ee6c15e 93 giveup_fpu(tsk);
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94 }
95 preempt_enable();
96 }
97}
98
99void enable_kernel_fp(void)
100{
101 WARN_ON(preemptible());
102
103#ifdef CONFIG_SMP
104 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
105 giveup_fpu(current);
106 else
107 giveup_fpu(NULL); /* just enables FP for kernel */
108#else
109 giveup_fpu(last_task_used_math);
110#endif /* CONFIG_SMP */
111}
112EXPORT_SYMBOL(enable_kernel_fp);
113
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114#ifdef CONFIG_ALTIVEC
115void enable_kernel_altivec(void)
116{
117 WARN_ON(preemptible());
118
119#ifdef CONFIG_SMP
120 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
121 giveup_altivec(current);
122 else
123 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
124#else
125 giveup_altivec(last_task_used_altivec);
126#endif /* CONFIG_SMP */
127}
128EXPORT_SYMBOL(enable_kernel_altivec);
129
130/*
131 * Make sure the VMX/Altivec register state in the
132 * the thread_struct is up to date for task tsk.
133 */
134void flush_altivec_to_thread(struct task_struct *tsk)
135{
136 if (tsk->thread.regs) {
137 preempt_disable();
138 if (tsk->thread.regs->msr & MSR_VEC) {
139#ifdef CONFIG_SMP
140 BUG_ON(tsk != current);
141#endif
0ee6c15e 142 giveup_altivec(tsk);
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143 }
144 preempt_enable();
145 }
146}
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147#endif /* CONFIG_ALTIVEC */
148
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149#ifdef CONFIG_VSX
150#if 0
151/* not currently used, but some crazy RAID module might want to later */
152void enable_kernel_vsx(void)
153{
154 WARN_ON(preemptible());
155
156#ifdef CONFIG_SMP
157 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
158 giveup_vsx(current);
159 else
160 giveup_vsx(NULL); /* just enable vsx for kernel - force */
161#else
162 giveup_vsx(last_task_used_vsx);
163#endif /* CONFIG_SMP */
164}
165EXPORT_SYMBOL(enable_kernel_vsx);
166#endif
167
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168void giveup_vsx(struct task_struct *tsk)
169{
170 giveup_fpu(tsk);
171 giveup_altivec(tsk);
172 __giveup_vsx(tsk);
173}
174
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175void flush_vsx_to_thread(struct task_struct *tsk)
176{
177 if (tsk->thread.regs) {
178 preempt_disable();
179 if (tsk->thread.regs->msr & MSR_VSX) {
180#ifdef CONFIG_SMP
181 BUG_ON(tsk != current);
182#endif
183 giveup_vsx(tsk);
184 }
185 preempt_enable();
186 }
187}
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188#endif /* CONFIG_VSX */
189
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190#ifdef CONFIG_SPE
191
192void enable_kernel_spe(void)
193{
194 WARN_ON(preemptible());
195
196#ifdef CONFIG_SMP
197 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
198 giveup_spe(current);
199 else
200 giveup_spe(NULL); /* just enable SPE for kernel - force */
201#else
202 giveup_spe(last_task_used_spe);
203#endif /* __SMP __ */
204}
205EXPORT_SYMBOL(enable_kernel_spe);
206
207void flush_spe_to_thread(struct task_struct *tsk)
208{
209 if (tsk->thread.regs) {
210 preempt_disable();
211 if (tsk->thread.regs->msr & MSR_SPE) {
212#ifdef CONFIG_SMP
213 BUG_ON(tsk != current);
214#endif
0ee6c15e 215 giveup_spe(tsk);
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216 }
217 preempt_enable();
218 }
219}
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220#endif /* CONFIG_SPE */
221
5388fb10 222#ifndef CONFIG_SMP
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223/*
224 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
225 * and the current task has some state, discard it.
226 */
5388fb10 227void discard_lazy_cpu_state(void)
48abec07 228{
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229 preempt_disable();
230 if (last_task_used_math == current)
231 last_task_used_math = NULL;
232#ifdef CONFIG_ALTIVEC
233 if (last_task_used_altivec == current)
234 last_task_used_altivec = NULL;
235#endif /* CONFIG_ALTIVEC */
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236#ifdef CONFIG_VSX
237 if (last_task_used_vsx == current)
238 last_task_used_vsx = NULL;
239#endif /* CONFIG_VSX */
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240#ifdef CONFIG_SPE
241 if (last_task_used_spe == current)
242 last_task_used_spe = NULL;
243#endif
244 preempt_enable();
48abec07 245}
5388fb10 246#endif /* CONFIG_SMP */
48abec07 247
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248#ifdef CONFIG_PPC_ADV_DEBUG_REGS
249void do_send_trap(struct pt_regs *regs, unsigned long address,
250 unsigned long error_code, int signal_code, int breakpt)
251{
252 siginfo_t info;
253
254 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
255 11, SIGSEGV) == NOTIFY_STOP)
256 return;
257
258 /* Deliver the signal to userspace */
259 info.si_signo = SIGTRAP;
260 info.si_errno = breakpt; /* breakpoint or watchpoint id */
261 info.si_code = signal_code;
262 info.si_addr = (void __user *)address;
263 force_sig_info(SIGTRAP, &info, current);
264}
265#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
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266void do_dabr(struct pt_regs *regs, unsigned long address,
267 unsigned long error_code)
268{
269 siginfo_t info;
270
271 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
272 11, SIGSEGV) == NOTIFY_STOP)
273 return;
274
275 if (debugger_dabr_match(regs))
276 return;
277
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278 /* Clear the DABR */
279 set_dabr(0);
280
281 /* Deliver the signal to userspace */
282 info.si_signo = SIGTRAP;
283 info.si_errno = 0;
284 info.si_code = TRAP_HWBKPT;
285 info.si_addr = (void __user *)address;
286 force_sig_info(SIGTRAP, &info, current);
287}
3bffb652 288#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
d6a61bfc 289
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290static DEFINE_PER_CPU(unsigned long, current_dabr);
291
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292#ifdef CONFIG_PPC_ADV_DEBUG_REGS
293/*
294 * Set the debug registers back to their default "safe" values.
295 */
296static void set_debug_reg_defaults(struct thread_struct *thread)
297{
298 thread->iac1 = thread->iac2 = 0;
299#if CONFIG_PPC_ADV_DEBUG_IACS > 2
300 thread->iac3 = thread->iac4 = 0;
301#endif
302 thread->dac1 = thread->dac2 = 0;
303#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
304 thread->dvc1 = thread->dvc2 = 0;
305#endif
306 thread->dbcr0 = 0;
307#ifdef CONFIG_BOOKE
308 /*
309 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
310 */
311 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
312 DBCR1_IAC3US | DBCR1_IAC4US;
313 /*
314 * Force Data Address Compare User/Supervisor bits to be User-only
315 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
316 */
317 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
318#else
319 thread->dbcr1 = 0;
320#endif
321}
322
323static void prime_debug_regs(struct thread_struct *thread)
324{
325 mtspr(SPRN_IAC1, thread->iac1);
326 mtspr(SPRN_IAC2, thread->iac2);
327#if CONFIG_PPC_ADV_DEBUG_IACS > 2
328 mtspr(SPRN_IAC3, thread->iac3);
329 mtspr(SPRN_IAC4, thread->iac4);
330#endif
331 mtspr(SPRN_DAC1, thread->dac1);
332 mtspr(SPRN_DAC2, thread->dac2);
333#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
334 mtspr(SPRN_DVC1, thread->dvc1);
335 mtspr(SPRN_DVC2, thread->dvc2);
336#endif
337 mtspr(SPRN_DBCR0, thread->dbcr0);
338 mtspr(SPRN_DBCR1, thread->dbcr1);
339#ifdef CONFIG_BOOKE
340 mtspr(SPRN_DBCR2, thread->dbcr2);
341#endif
342}
343/*
344 * Unless neither the old or new thread are making use of the
345 * debug registers, set the debug registers from the values
346 * stored in the new thread.
347 */
348static void switch_booke_debug_regs(struct thread_struct *new_thread)
349{
350 if ((current->thread.dbcr0 & DBCR0_IDM)
351 || (new_thread->dbcr0 & DBCR0_IDM))
352 prime_debug_regs(new_thread);
353}
354#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
355static void set_debug_reg_defaults(struct thread_struct *thread)
356{
357 if (thread->dabr) {
358 thread->dabr = 0;
359 set_dabr(0);
360 }
361}
362#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
363
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364int set_dabr(unsigned long dabr)
365{
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366 __get_cpu_var(current_dabr) = dabr;
367
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368 if (ppc_md.set_dabr)
369 return ppc_md.set_dabr(dabr);
14cf11af 370
791cc501 371 /* XXX should we have a CPU_FTR_HAS_DABR ? */
172ae2e7 372#ifdef CONFIG_PPC_ADV_DEBUG_REGS
d6a61bfc 373 mtspr(SPRN_DAC1, dabr);
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374#ifdef CONFIG_PPC_47x
375 isync();
376#endif
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377#elif defined(CONFIG_PPC_BOOK3S)
378 mtspr(SPRN_DABR, dabr);
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379#endif
380
c6c9eace 381
cab0af98 382 return 0;
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383}
384
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385#ifdef CONFIG_PPC64
386DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
06d67d54 387#endif
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388
389struct task_struct *__switch_to(struct task_struct *prev,
390 struct task_struct *new)
391{
392 struct thread_struct *new_thread, *old_thread;
393 unsigned long flags;
394 struct task_struct *last;
395
396#ifdef CONFIG_SMP
397 /* avoid complexity of lazy save/restore of fpu
398 * by just saving it every time we switch out if
399 * this task used the fpu during the last quantum.
400 *
401 * If it tries to use the fpu again, it'll trap and
402 * reload its fp regs. So we don't have to do a restore
403 * every switch, just a save.
404 * -- Cort
405 */
406 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
407 giveup_fpu(prev);
408#ifdef CONFIG_ALTIVEC
409 /*
410 * If the previous thread used altivec in the last quantum
411 * (thus changing altivec regs) then save them.
412 * We used to check the VRSAVE register but not all apps
413 * set it, so we don't rely on it now (and in fact we need
414 * to save & restore VSCR even if VRSAVE == 0). -- paulus
415 *
416 * On SMP we always save/restore altivec regs just to avoid the
417 * complexity of changing processors.
418 * -- Cort
419 */
420 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
421 giveup_altivec(prev);
14cf11af 422#endif /* CONFIG_ALTIVEC */
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423#ifdef CONFIG_VSX
424 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
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425 /* VMX and FPU registers are already save here */
426 __giveup_vsx(prev);
ce48b210 427#endif /* CONFIG_VSX */
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428#ifdef CONFIG_SPE
429 /*
430 * If the previous thread used spe in the last quantum
431 * (thus changing spe regs) then save them.
432 *
433 * On SMP we always save/restore spe regs just to avoid the
434 * complexity of changing processors.
435 */
436 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
437 giveup_spe(prev);
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438#endif /* CONFIG_SPE */
439
440#else /* CONFIG_SMP */
441#ifdef CONFIG_ALTIVEC
442 /* Avoid the trap. On smp this this never happens since
443 * we don't set last_task_used_altivec -- Cort
444 */
445 if (new->thread.regs && last_task_used_altivec == new)
446 new->thread.regs->msr |= MSR_VEC;
447#endif /* CONFIG_ALTIVEC */
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448#ifdef CONFIG_VSX
449 if (new->thread.regs && last_task_used_vsx == new)
450 new->thread.regs->msr |= MSR_VSX;
451#endif /* CONFIG_VSX */
c0c0d996 452#ifdef CONFIG_SPE
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453 /* Avoid the trap. On smp this this never happens since
454 * we don't set last_task_used_spe
455 */
456 if (new->thread.regs && last_task_used_spe == new)
457 new->thread.regs->msr |= MSR_SPE;
458#endif /* CONFIG_SPE */
c0c0d996 459
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460#endif /* CONFIG_SMP */
461
172ae2e7 462#ifdef CONFIG_PPC_ADV_DEBUG_REGS
3bffb652 463 switch_booke_debug_regs(&new->thread);
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464#else
465 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
466 set_dabr(new->thread.dabr);
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467#endif
468
c6c9eace 469
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470 new_thread = &new->thread;
471 old_thread = &current->thread;
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472
473#ifdef CONFIG_PPC64
474 /*
475 * Collect processor utilization data per process
476 */
477 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
478 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
479 long unsigned start_tb, current_tb;
480 start_tb = old_thread->start_tb;
481 cu->current_tb = current_tb = mfspr(SPRN_PURR);
482 old_thread->accum_tb += (current_tb - start_tb);
483 new_thread->start_tb = current_tb;
484 }
485#endif
486
14cf11af 487 local_irq_save(flags);
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488
489 account_system_vtime(current);
81a3843f 490 account_process_vtime(current);
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491 calculate_steal_time();
492
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493 /*
494 * We can't take a PMU exception inside _switch() since there is a
495 * window where the kernel stack SLB and the kernel stack are out
496 * of sync. Hard disable here.
497 */
498 hard_irq_disable();
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499 last = _switch(old_thread, new_thread);
500
501 local_irq_restore(flags);
502
503 return last;
504}
505
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506static int instructions_to_print = 16;
507
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508static void show_instructions(struct pt_regs *regs)
509{
510 int i;
511 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
512 sizeof(int));
513
514 printk("Instruction dump:");
515
516 for (i = 0; i < instructions_to_print; i++) {
517 int instr;
518
519 if (!(i % 8))
520 printk("\n");
521
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522#if !defined(CONFIG_BOOKE)
523 /* If executing with the IMMU off, adjust pc rather
524 * than print XXXXXXXX.
525 */
526 if (!(regs->msr & MSR_IR))
527 pc = (unsigned long)phys_to_virt(pc);
528#endif
529
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530 /* We use __get_user here *only* to avoid an OOPS on a
531 * bad address because the pc *should* only be a
532 * kernel address.
533 */
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534 if (!__kernel_text_address(pc) ||
535 __get_user(instr, (unsigned int __user *)pc)) {
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536 printk("XXXXXXXX ");
537 } else {
538 if (regs->nip == pc)
539 printk("<%08x> ", instr);
540 else
541 printk("%08x ", instr);
542 }
543
544 pc += sizeof(int);
545 }
546
547 printk("\n");
548}
549
550static struct regbit {
551 unsigned long bit;
552 const char *name;
553} msr_bits[] = {
554 {MSR_EE, "EE"},
555 {MSR_PR, "PR"},
556 {MSR_FP, "FP"},
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557 {MSR_VEC, "VEC"},
558 {MSR_VSX, "VSX"},
06d67d54 559 {MSR_ME, "ME"},
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560 {MSR_CE, "CE"},
561 {MSR_DE, "DE"},
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562 {MSR_IR, "IR"},
563 {MSR_DR, "DR"},
564 {0, NULL}
565};
566
567static void printbits(unsigned long val, struct regbit *bits)
568{
569 const char *sep = "";
570
571 printk("<");
572 for (; bits->bit; ++bits)
573 if (val & bits->bit) {
574 printk("%s%s", sep, bits->name);
575 sep = ",";
576 }
577 printk(">");
578}
579
580#ifdef CONFIG_PPC64
f6f7dde3 581#define REG "%016lx"
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582#define REGS_PER_LINE 4
583#define LAST_VOLATILE 13
584#else
f6f7dde3 585#define REG "%08lx"
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586#define REGS_PER_LINE 8
587#define LAST_VOLATILE 12
588#endif
589
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590void show_regs(struct pt_regs * regs)
591{
592 int i, trap;
593
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594 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
595 regs->nip, regs->link, regs->ctr);
596 printk("REGS: %p TRAP: %04lx %s (%s)\n",
96b644bd 597 regs, regs->trap, print_tainted(), init_utsname()->release);
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598 printk("MSR: "REG" ", regs->msr);
599 printbits(regs->msr, msr_bits);
f6f7dde3 600 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
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601 trap = TRAP(regs);
602 if (trap == 0x300 || trap == 0x600)
172ae2e7 603#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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604 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
605#else
06d67d54 606 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
14170789 607#endif
06d67d54 608 printk("TASK = %p[%d] '%s' THREAD: %p",
19c5870c 609 current, task_pid_nr(current), current->comm, task_thread_info(current));
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610
611#ifdef CONFIG_SMP
79ccd1be 612 printk(" CPU: %d", raw_smp_processor_id());
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613#endif /* CONFIG_SMP */
614
615 for (i = 0; i < 32; i++) {
06d67d54 616 if ((i % REGS_PER_LINE) == 0)
a2367194 617 printk("\nGPR%02d: ", i);
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618 printk(REG " ", regs->gpr[i]);
619 if (i == LAST_VOLATILE && !FULL_REGS(regs))
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620 break;
621 }
622 printk("\n");
623#ifdef CONFIG_KALLSYMS
624 /*
625 * Lookup NIP late so we have the best change of getting the
626 * above info out without failing
627 */
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628 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
629 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
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630#endif
631 show_stack(current, (unsigned long *) regs->gpr[1]);
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632 if (!user_mode(regs))
633 show_instructions(regs);
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634}
635
636void exit_thread(void)
637{
48abec07 638 discard_lazy_cpu_state();
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639}
640
641void flush_thread(void)
642{
48abec07 643 discard_lazy_cpu_state();
14cf11af 644
3bffb652 645 set_debug_reg_defaults(&current->thread);
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646}
647
648void
649release_thread(struct task_struct *t)
650{
651}
652
653/*
654 * This gets called before we allocate a new thread and copy
655 * the current task into it.
656 */
657void prepare_to_copy(struct task_struct *tsk)
658{
659 flush_fp_to_thread(current);
660 flush_altivec_to_thread(current);
ce48b210 661 flush_vsx_to_thread(current);
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662 flush_spe_to_thread(current);
663}
664
665/*
666 * Copy a thread..
667 */
6f2c55b8 668int copy_thread(unsigned long clone_flags, unsigned long usp,
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669 unsigned long unused, struct task_struct *p,
670 struct pt_regs *regs)
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671{
672 struct pt_regs *childregs, *kregs;
673 extern void ret_from_fork(void);
0cec6fd1 674 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
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675
676 CHECK_FULL_REGS(regs);
677 /* Copy registers */
678 sp -= sizeof(struct pt_regs);
679 childregs = (struct pt_regs *) sp;
680 *childregs = *regs;
681 if ((childregs->msr & MSR_PR) == 0) {
682 /* for kernel thread, set `current' and stackptr in new task */
683 childregs->gpr[1] = sp + sizeof(struct pt_regs);
06d67d54 684#ifdef CONFIG_PPC32
14cf11af 685 childregs->gpr[2] = (unsigned long) p;
06d67d54 686#else
b5e2fc1c 687 clear_tsk_thread_flag(p, TIF_32BIT);
06d67d54 688#endif
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689 p->thread.regs = NULL; /* no user register state */
690 } else {
691 childregs->gpr[1] = usp;
692 p->thread.regs = childregs;
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693 if (clone_flags & CLONE_SETTLS) {
694#ifdef CONFIG_PPC64
695 if (!test_thread_flag(TIF_32BIT))
696 childregs->gpr[13] = childregs->gpr[6];
697 else
698#endif
699 childregs->gpr[2] = childregs->gpr[6];
700 }
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701 }
702 childregs->gpr[3] = 0; /* Result from fork() */
703 sp -= STACK_FRAME_OVERHEAD;
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704
705 /*
706 * The way this works is that at some point in the future
707 * some task will call _switch to switch to the new task.
708 * That will pop off the stack frame created below and start
709 * the new task running at ret_from_fork. The new task will
710 * do some house keeping and then return from the fork or clone
711 * system call, using the stack frame created above.
712 */
713 sp -= sizeof(struct pt_regs);
714 kregs = (struct pt_regs *) sp;
715 sp -= STACK_FRAME_OVERHEAD;
716 p->thread.ksp = sp;
85218827
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717 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
718 _ALIGN_UP(sizeof(struct thread_info), 16);
14cf11af 719
94491685 720#ifdef CONFIG_PPC_STD_MMU_64
06d67d54 721 if (cpu_has_feature(CPU_FTR_SLB)) {
1189be65 722 unsigned long sp_vsid;
3c726f8d 723 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
06d67d54 724
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725 if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
726 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
727 << SLB_VSID_SHIFT_1T;
728 else
729 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
730 << SLB_VSID_SHIFT;
3c726f8d 731 sp_vsid |= SLB_VSID_KERNEL | llp;
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732 p->thread.ksp_vsid = sp_vsid;
733 }
747bea91 734#endif /* CONFIG_PPC_STD_MMU_64 */
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735
736 /*
737 * The PPC64 ABI makes use of a TOC to contain function
738 * pointers. The function (ret_from_except) is actually a pointer
739 * to the TOC entry. The first entry is a pointer to the actual
740 * function.
741 */
747bea91 742#ifdef CONFIG_PPC64
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743 kregs->nip = *((unsigned long *)ret_from_fork);
744#else
745 kregs->nip = (unsigned long)ret_from_fork;
06d67d54 746#endif
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747
748 return 0;
749}
750
751/*
752 * Set up a thread for executing a new program
753 */
06d67d54 754void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
14cf11af 755{
90eac727
ME
756#ifdef CONFIG_PPC64
757 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
758#endif
759
14cf11af 760 set_fs(USER_DS);
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761
762 /*
763 * If we exec out of a kernel thread then thread.regs will not be
764 * set. Do it now.
765 */
766 if (!current->thread.regs) {
0cec6fd1
AV
767 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
768 current->thread.regs = regs - 1;
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769 }
770
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771 memset(regs->gpr, 0, sizeof(regs->gpr));
772 regs->ctr = 0;
773 regs->link = 0;
774 regs->xer = 0;
775 regs->ccr = 0;
14cf11af 776 regs->gpr[1] = sp;
06d67d54 777
474f8196
RM
778 /*
779 * We have just cleared all the nonvolatile GPRs, so make
780 * FULL_REGS(regs) return true. This is necessary to allow
781 * ptrace to examine the thread immediately after exec.
782 */
783 regs->trap &= ~1UL;
784
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785#ifdef CONFIG_PPC32
786 regs->mq = 0;
787 regs->nip = start;
14cf11af 788 regs->msr = MSR_USER;
06d67d54 789#else
d4bf9a78 790 if (!test_thread_flag(TIF_32BIT)) {
90eac727 791 unsigned long entry, toc;
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792
793 /* start is a relocated pointer to the function descriptor for
794 * the elf _start routine. The first entry in the function
795 * descriptor is the entry address of _start and the second
796 * entry is the TOC value we need to use.
797 */
798 __get_user(entry, (unsigned long __user *)start);
799 __get_user(toc, (unsigned long __user *)start+1);
800
801 /* Check whether the e_entry function descriptor entries
802 * need to be relocated before we can use them.
803 */
804 if (load_addr != 0) {
805 entry += load_addr;
806 toc += load_addr;
807 }
808 regs->nip = entry;
809 regs->gpr[2] = toc;
810 regs->msr = MSR_USER64;
d4bf9a78
SR
811 } else {
812 regs->nip = start;
813 regs->gpr[2] = 0;
814 regs->msr = MSR_USER32;
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815 }
816#endif
817
48abec07 818 discard_lazy_cpu_state();
ce48b210
MN
819#ifdef CONFIG_VSX
820 current->thread.used_vsr = 0;
821#endif
14cf11af 822 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
25c8a78b 823 current->thread.fpscr.val = 0;
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824#ifdef CONFIG_ALTIVEC
825 memset(current->thread.vr, 0, sizeof(current->thread.vr));
826 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
06d67d54 827 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
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828 current->thread.vrsave = 0;
829 current->thread.used_vr = 0;
830#endif /* CONFIG_ALTIVEC */
831#ifdef CONFIG_SPE
832 memset(current->thread.evr, 0, sizeof(current->thread.evr));
833 current->thread.acc = 0;
834 current->thread.spefscr = 0;
835 current->thread.used_spe = 0;
836#endif /* CONFIG_SPE */
837}
838
839#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
840 | PR_FP_EXC_RES | PR_FP_EXC_INV)
841
842int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
843{
844 struct pt_regs *regs = tsk->thread.regs;
845
846 /* This is a bit hairy. If we are an SPE enabled processor
847 * (have embedded fp) we store the IEEE exception enable flags in
848 * fpexc_mode. fpexc_mode is also used for setting FP exception
849 * mode (asyn, precise, disabled) for 'Classic' FP. */
850 if (val & PR_FP_EXC_SW_ENABLE) {
851#ifdef CONFIG_SPE
5e14d21e
KG
852 if (cpu_has_feature(CPU_FTR_SPE)) {
853 tsk->thread.fpexc_mode = val &
854 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
855 return 0;
856 } else {
857 return -EINVAL;
858 }
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859#else
860 return -EINVAL;
861#endif
14cf11af 862 }
06d67d54
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863
864 /* on a CONFIG_SPE this does not hurt us. The bits that
865 * __pack_fe01 use do not overlap with bits used for
866 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
867 * on CONFIG_SPE implementations are reserved so writing to
868 * them does not change anything */
869 if (val > PR_FP_EXC_PRECISE)
870 return -EINVAL;
871 tsk->thread.fpexc_mode = __pack_fe01(val);
872 if (regs != NULL && (regs->msr & MSR_FP) != 0)
873 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
874 | tsk->thread.fpexc_mode;
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875 return 0;
876}
877
878int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
879{
880 unsigned int val;
881
882 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
883#ifdef CONFIG_SPE
5e14d21e
KG
884 if (cpu_has_feature(CPU_FTR_SPE))
885 val = tsk->thread.fpexc_mode;
886 else
887 return -EINVAL;
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888#else
889 return -EINVAL;
890#endif
891 else
892 val = __unpack_fe01(tsk->thread.fpexc_mode);
893 return put_user(val, (unsigned int __user *) adr);
894}
895
fab5db97
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896int set_endian(struct task_struct *tsk, unsigned int val)
897{
898 struct pt_regs *regs = tsk->thread.regs;
899
900 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
901 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
902 return -EINVAL;
903
904 if (regs == NULL)
905 return -EINVAL;
906
907 if (val == PR_ENDIAN_BIG)
908 regs->msr &= ~MSR_LE;
909 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
910 regs->msr |= MSR_LE;
911 else
912 return -EINVAL;
913
914 return 0;
915}
916
917int get_endian(struct task_struct *tsk, unsigned long adr)
918{
919 struct pt_regs *regs = tsk->thread.regs;
920 unsigned int val;
921
922 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
923 !cpu_has_feature(CPU_FTR_REAL_LE))
924 return -EINVAL;
925
926 if (regs == NULL)
927 return -EINVAL;
928
929 if (regs->msr & MSR_LE) {
930 if (cpu_has_feature(CPU_FTR_REAL_LE))
931 val = PR_ENDIAN_LITTLE;
932 else
933 val = PR_ENDIAN_PPC_LITTLE;
934 } else
935 val = PR_ENDIAN_BIG;
936
937 return put_user(val, (unsigned int __user *)adr);
938}
939
e9370ae1
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940int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
941{
942 tsk->thread.align_ctl = val;
943 return 0;
944}
945
946int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
947{
948 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
949}
950
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951#define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
952
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953int sys_clone(unsigned long clone_flags, unsigned long usp,
954 int __user *parent_tidp, void __user *child_threadptr,
955 int __user *child_tidp, int p6,
956 struct pt_regs *regs)
957{
958 CHECK_FULL_REGS(regs);
959 if (usp == 0)
960 usp = regs->gpr[1]; /* stack pointer for child */
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961#ifdef CONFIG_PPC64
962 if (test_thread_flag(TIF_32BIT)) {
963 parent_tidp = TRUNC_PTR(parent_tidp);
964 child_tidp = TRUNC_PTR(child_tidp);
965 }
966#endif
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967 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
968}
969
970int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
971 unsigned long p4, unsigned long p5, unsigned long p6,
972 struct pt_regs *regs)
973{
974 CHECK_FULL_REGS(regs);
975 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
976}
977
978int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
979 unsigned long p4, unsigned long p5, unsigned long p6,
980 struct pt_regs *regs)
981{
982 CHECK_FULL_REGS(regs);
983 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
984 regs, 0, NULL, NULL);
985}
986
987int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
988 unsigned long a3, unsigned long a4, unsigned long a5,
989 struct pt_regs *regs)
990{
991 int error;
06d67d54 992 char *filename;
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993
994 filename = getname((char __user *) a0);
995 error = PTR_ERR(filename);
996 if (IS_ERR(filename))
997 goto out;
998 flush_fp_to_thread(current);
999 flush_altivec_to_thread(current);
1000 flush_spe_to_thread(current);
20c8c210
PM
1001 error = do_execve(filename, (char __user * __user *) a1,
1002 (char __user * __user *) a2, regs);
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1003 putname(filename);
1004out:
1005 return error;
1006}
1007
bb72c481
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1008#ifdef CONFIG_IRQSTACKS
1009static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1010 unsigned long nbytes)
1011{
1012 unsigned long stack_page;
1013 unsigned long cpu = task_cpu(p);
1014
1015 /*
1016 * Avoid crashing if the stack has overflowed and corrupted
1017 * task_cpu(p), which is in the thread_info struct.
1018 */
1019 if (cpu < NR_CPUS && cpu_possible(cpu)) {
1020 stack_page = (unsigned long) hardirq_ctx[cpu];
1021 if (sp >= stack_page + sizeof(struct thread_struct)
1022 && sp <= stack_page + THREAD_SIZE - nbytes)
1023 return 1;
1024
1025 stack_page = (unsigned long) softirq_ctx[cpu];
1026 if (sp >= stack_page + sizeof(struct thread_struct)
1027 && sp <= stack_page + THREAD_SIZE - nbytes)
1028 return 1;
1029 }
1030 return 0;
1031}
1032
1033#else
1034#define valid_irq_stack(sp, p, nb) 0
1035#endif /* CONFIG_IRQSTACKS */
1036
2f25194d 1037int validate_sp(unsigned long sp, struct task_struct *p,
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1038 unsigned long nbytes)
1039{
0cec6fd1 1040 unsigned long stack_page = (unsigned long)task_stack_page(p);
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1041
1042 if (sp >= stack_page + sizeof(struct thread_struct)
1043 && sp <= stack_page + THREAD_SIZE - nbytes)
1044 return 1;
1045
bb72c481 1046 return valid_irq_stack(sp, p, nbytes);
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1047}
1048
2f25194d
AB
1049EXPORT_SYMBOL(validate_sp);
1050
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1051unsigned long get_wchan(struct task_struct *p)
1052{
1053 unsigned long ip, sp;
1054 int count = 0;
1055
1056 if (!p || p == current || p->state == TASK_RUNNING)
1057 return 0;
1058
1059 sp = p->thread.ksp;
ec2b36b9 1060 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
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1061 return 0;
1062
1063 do {
1064 sp = *(unsigned long *)sp;
ec2b36b9 1065 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
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1066 return 0;
1067 if (count > 0) {
ec2b36b9 1068 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
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1069 if (!in_sched_functions(ip))
1070 return ip;
1071 }
1072 } while (count++ < 16);
1073 return 0;
1074}
06d67d54 1075
c4d04be1 1076static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
06d67d54
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1077
1078void show_stack(struct task_struct *tsk, unsigned long *stack)
1079{
1080 unsigned long sp, ip, lr, newsp;
1081 int count = 0;
1082 int firstframe = 1;
6794c782
SR
1083#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1084 int curr_frame = current->curr_ret_stack;
1085 extern void return_to_handler(void);
9135c3cc
SR
1086 unsigned long rth = (unsigned long)return_to_handler;
1087 unsigned long mrth = -1;
6794c782 1088#ifdef CONFIG_PPC64
9135c3cc
SR
1089 extern void mod_return_to_handler(void);
1090 rth = *(unsigned long *)rth;
1091 mrth = (unsigned long)mod_return_to_handler;
1092 mrth = *(unsigned long *)mrth;
6794c782
SR
1093#endif
1094#endif
06d67d54
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1095
1096 sp = (unsigned long) stack;
1097 if (tsk == NULL)
1098 tsk = current;
1099 if (sp == 0) {
1100 if (tsk == current)
1101 asm("mr %0,1" : "=r" (sp));
1102 else
1103 sp = tsk->thread.ksp;
1104 }
1105
1106 lr = 0;
1107 printk("Call Trace:\n");
1108 do {
ec2b36b9 1109 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
06d67d54
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1110 return;
1111
1112 stack = (unsigned long *) sp;
1113 newsp = stack[0];
ec2b36b9 1114 ip = stack[STACK_FRAME_LR_SAVE];
06d67d54 1115 if (!firstframe || ip != lr) {
058c78f4 1116 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
6794c782 1117#ifdef CONFIG_FUNCTION_GRAPH_TRACER
9135c3cc 1118 if ((ip == rth || ip == mrth) && curr_frame >= 0) {
6794c782
SR
1119 printk(" (%pS)",
1120 (void *)current->ret_stack[curr_frame].ret);
1121 curr_frame--;
1122 }
1123#endif
06d67d54
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1124 if (firstframe)
1125 printk(" (unreliable)");
1126 printk("\n");
1127 }
1128 firstframe = 0;
1129
1130 /*
1131 * See if this is an exception frame.
1132 * We look for the "regshere" marker in the current frame.
1133 */
ec2b36b9
BH
1134 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1135 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
06d67d54
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1136 struct pt_regs *regs = (struct pt_regs *)
1137 (sp + STACK_FRAME_OVERHEAD);
06d67d54 1138 lr = regs->link;
058c78f4
BH
1139 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1140 regs->trap, (void *)regs->nip, (void *)lr);
06d67d54
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1141 firstframe = 1;
1142 }
1143
1144 sp = newsp;
1145 } while (count++ < kstack_depth_to_print);
1146}
1147
1148void dump_stack(void)
1149{
1150 show_stack(current, NULL);
1151}
1152EXPORT_SYMBOL(dump_stack);
cb2c9b27
AB
1153
1154#ifdef CONFIG_PPC64
1155void ppc64_runlatch_on(void)
1156{
1157 unsigned long ctrl;
1158
1159 if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
1160 HMT_medium();
1161
1162 ctrl = mfspr(SPRN_CTRLF);
1163 ctrl |= CTRL_RUNLATCH;
1164 mtspr(SPRN_CTRLT, ctrl);
1165
1166 set_thread_flag(TIF_RUNLATCH);
1167 }
1168}
1169
1170void ppc64_runlatch_off(void)
1171{
1172 unsigned long ctrl;
1173
1174 if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
1175 HMT_medium();
1176
1177 clear_thread_flag(TIF_RUNLATCH);
1178
1179 ctrl = mfspr(SPRN_CTRLF);
1180 ctrl &= ~CTRL_RUNLATCH;
1181 mtspr(SPRN_CTRLT, ctrl);
1182 }
1183}
1184#endif
f6a61680
BH
1185
1186#if THREAD_SHIFT < PAGE_SHIFT
1187
1188static struct kmem_cache *thread_info_cache;
1189
1190struct thread_info *alloc_thread_info(struct task_struct *tsk)
1191{
1192 struct thread_info *ti;
1193
1194 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
1195 if (unlikely(ti == NULL))
1196 return NULL;
1197#ifdef CONFIG_DEBUG_STACK_USAGE
1198 memset(ti, 0, THREAD_SIZE);
1199#endif
1200 return ti;
1201}
1202
1203void free_thread_info(struct thread_info *ti)
1204{
1205 kmem_cache_free(thread_info_cache, ti);
1206}
1207
1208void thread_info_cache_init(void)
1209{
1210 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
1211 THREAD_SIZE, 0, NULL);
1212 BUG_ON(thread_info_cache == NULL);
1213}
1214
1215#endif /* THREAD_SHIFT < PAGE_SHIFT */
d839088c
AB
1216
1217unsigned long arch_align_stack(unsigned long sp)
1218{
1219 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1220 sp -= get_random_int() & ~PAGE_MASK;
1221 return sp & ~0xf;
1222}
912f9ee2
AB
1223
1224static inline unsigned long brk_rnd(void)
1225{
1226 unsigned long rnd = 0;
1227
1228 /* 8MB for 32bit, 1GB for 64bit */
1229 if (is_32bit_task())
1230 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1231 else
1232 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1233
1234 return rnd << PAGE_SHIFT;
1235}
1236
1237unsigned long arch_randomize_brk(struct mm_struct *mm)
1238{
8bbde7a7
AB
1239 unsigned long base = mm->brk;
1240 unsigned long ret;
1241
ce7a35c7 1242#ifdef CONFIG_PPC_STD_MMU_64
8bbde7a7
AB
1243 /*
1244 * If we are using 1TB segments and we are allowed to randomise
1245 * the heap, we can put it above 1TB so it is backed by a 1TB
1246 * segment. Otherwise the heap will be in the bottom 1TB
1247 * which always uses 256MB segments and this may result in a
1248 * performance penalty.
1249 */
1250 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1251 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1252#endif
1253
1254 ret = PAGE_ALIGN(base + brk_rnd());
912f9ee2
AB
1255
1256 if (ret < mm->brk)
1257 return mm->brk;
1258
1259 return ret;
1260}
501cb16d
AB
1261
1262unsigned long randomize_et_dyn(unsigned long base)
1263{
1264 unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1265
1266 if (ret < base)
1267 return base;
1268
1269 return ret;
1270}