powerpc: Add VSX assembler code macros
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / process.c
CommitLineData
14cf11af 1/*
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2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
4 *
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
7 *
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
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17#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
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22#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/slab.h>
26#include <linux/user.h>
27#include <linux/elf.h>
28#include <linux/init.h>
29#include <linux/prctl.h>
30#include <linux/init_task.h>
31#include <linux/module.h>
32#include <linux/kallsyms.h>
33#include <linux/mqueue.h>
34#include <linux/hardirq.h>
06d67d54 35#include <linux/utsname.h>
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36
37#include <asm/pgtable.h>
38#include <asm/uaccess.h>
39#include <asm/system.h>
40#include <asm/io.h>
41#include <asm/processor.h>
42#include <asm/mmu.h>
43#include <asm/prom.h>
76032de8 44#include <asm/machdep.h>
c6622f63 45#include <asm/time.h>
a7f31841 46#include <asm/syscalls.h>
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47#ifdef CONFIG_PPC64
48#include <asm/firmware.h>
06d67d54 49#endif
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50
51extern unsigned long _get_SP(void);
52
53#ifndef CONFIG_SMP
54struct task_struct *last_task_used_math = NULL;
55struct task_struct *last_task_used_altivec = NULL;
56struct task_struct *last_task_used_spe = NULL;
57#endif
58
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59/*
60 * Make sure the floating-point register state in the
61 * the thread_struct is up to date for task tsk.
62 */
63void flush_fp_to_thread(struct task_struct *tsk)
64{
65 if (tsk->thread.regs) {
66 /*
67 * We need to disable preemption here because if we didn't,
68 * another process could get scheduled after the regs->msr
69 * test but before we have finished saving the FP registers
70 * to the thread_struct. That process could take over the
71 * FPU, and then when we get scheduled again we would store
72 * bogus values for the remaining FP registers.
73 */
74 preempt_disable();
75 if (tsk->thread.regs->msr & MSR_FP) {
76#ifdef CONFIG_SMP
77 /*
78 * This should only ever be called for current or
79 * for a stopped child process. Since we save away
80 * the FP register state on context switch on SMP,
81 * there is something wrong if a stopped child appears
82 * to still have its FP state in the CPU registers.
83 */
84 BUG_ON(tsk != current);
85#endif
0ee6c15e 86 giveup_fpu(tsk);
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87 }
88 preempt_enable();
89 }
90}
91
92void enable_kernel_fp(void)
93{
94 WARN_ON(preemptible());
95
96#ifdef CONFIG_SMP
97 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
98 giveup_fpu(current);
99 else
100 giveup_fpu(NULL); /* just enables FP for kernel */
101#else
102 giveup_fpu(last_task_used_math);
103#endif /* CONFIG_SMP */
104}
105EXPORT_SYMBOL(enable_kernel_fp);
106
107int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
108{
109 if (!tsk->thread.regs)
110 return 0;
111 flush_fp_to_thread(current);
112
9c75a31c 113 memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs));
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114
115 return 1;
116}
117
118#ifdef CONFIG_ALTIVEC
119void enable_kernel_altivec(void)
120{
121 WARN_ON(preemptible());
122
123#ifdef CONFIG_SMP
124 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
125 giveup_altivec(current);
126 else
127 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
128#else
129 giveup_altivec(last_task_used_altivec);
130#endif /* CONFIG_SMP */
131}
132EXPORT_SYMBOL(enable_kernel_altivec);
133
134/*
135 * Make sure the VMX/Altivec register state in the
136 * the thread_struct is up to date for task tsk.
137 */
138void flush_altivec_to_thread(struct task_struct *tsk)
139{
140 if (tsk->thread.regs) {
141 preempt_disable();
142 if (tsk->thread.regs->msr & MSR_VEC) {
143#ifdef CONFIG_SMP
144 BUG_ON(tsk != current);
145#endif
0ee6c15e 146 giveup_altivec(tsk);
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147 }
148 preempt_enable();
149 }
150}
151
1f7d6668 152int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
14cf11af 153{
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154 /* ELF_NVRREG includes the VSCR and VRSAVE which we need to save
155 * separately, see below */
156 const int nregs = ELF_NVRREG - 2;
157 elf_vrreg_t *reg;
158 u32 *dest;
159
160 if (tsk == current)
161 flush_altivec_to_thread(tsk);
162
163 reg = (elf_vrreg_t *)vrregs;
164
165 /* copy the 32 vr registers */
166 memcpy(reg, &tsk->thread.vr[0], nregs * sizeof(*reg));
167 reg += nregs;
168
169 /* copy the vscr */
170 memcpy(reg, &tsk->thread.vscr, sizeof(*reg));
171 reg++;
172
173 /* vrsave is stored in the high 32bit slot of the final 128bits */
174 memset(reg, 0, sizeof(*reg));
175 dest = (u32 *)reg;
176 *dest = tsk->thread.vrsave;
177
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178 return 1;
179}
180#endif /* CONFIG_ALTIVEC */
181
182#ifdef CONFIG_SPE
183
184void enable_kernel_spe(void)
185{
186 WARN_ON(preemptible());
187
188#ifdef CONFIG_SMP
189 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
190 giveup_spe(current);
191 else
192 giveup_spe(NULL); /* just enable SPE for kernel - force */
193#else
194 giveup_spe(last_task_used_spe);
195#endif /* __SMP __ */
196}
197EXPORT_SYMBOL(enable_kernel_spe);
198
199void flush_spe_to_thread(struct task_struct *tsk)
200{
201 if (tsk->thread.regs) {
202 preempt_disable();
203 if (tsk->thread.regs->msr & MSR_SPE) {
204#ifdef CONFIG_SMP
205 BUG_ON(tsk != current);
206#endif
0ee6c15e 207 giveup_spe(tsk);
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208 }
209 preempt_enable();
210 }
211}
212
213int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
214{
215 flush_spe_to_thread(current);
216 /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
217 memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35);
218 return 1;
219}
220#endif /* CONFIG_SPE */
221
5388fb10 222#ifndef CONFIG_SMP
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223/*
224 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
225 * and the current task has some state, discard it.
226 */
5388fb10 227void discard_lazy_cpu_state(void)
48abec07 228{
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229 preempt_disable();
230 if (last_task_used_math == current)
231 last_task_used_math = NULL;
232#ifdef CONFIG_ALTIVEC
233 if (last_task_used_altivec == current)
234 last_task_used_altivec = NULL;
235#endif /* CONFIG_ALTIVEC */
236#ifdef CONFIG_SPE
237 if (last_task_used_spe == current)
238 last_task_used_spe = NULL;
239#endif
240 preempt_enable();
48abec07 241}
5388fb10 242#endif /* CONFIG_SMP */
48abec07 243
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244static DEFINE_PER_CPU(unsigned long, current_dabr);
245
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246int set_dabr(unsigned long dabr)
247{
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248 __get_cpu_var(current_dabr) = dabr;
249
791cc501 250#ifdef CONFIG_PPC_MERGE /* XXX for now */
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251 if (ppc_md.set_dabr)
252 return ppc_md.set_dabr(dabr);
791cc501 253#endif
14cf11af 254
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255 /* XXX should we have a CPU_FTR_HAS_DABR ? */
256#if defined(CONFIG_PPC64) || defined(CONFIG_6xx)
cab0af98 257 mtspr(SPRN_DABR, dabr);
791cc501 258#endif
cab0af98 259 return 0;
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260}
261
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262#ifdef CONFIG_PPC64
263DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
06d67d54 264#endif
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265
266struct task_struct *__switch_to(struct task_struct *prev,
267 struct task_struct *new)
268{
269 struct thread_struct *new_thread, *old_thread;
270 unsigned long flags;
271 struct task_struct *last;
272
273#ifdef CONFIG_SMP
274 /* avoid complexity of lazy save/restore of fpu
275 * by just saving it every time we switch out if
276 * this task used the fpu during the last quantum.
277 *
278 * If it tries to use the fpu again, it'll trap and
279 * reload its fp regs. So we don't have to do a restore
280 * every switch, just a save.
281 * -- Cort
282 */
283 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
284 giveup_fpu(prev);
285#ifdef CONFIG_ALTIVEC
286 /*
287 * If the previous thread used altivec in the last quantum
288 * (thus changing altivec regs) then save them.
289 * We used to check the VRSAVE register but not all apps
290 * set it, so we don't rely on it now (and in fact we need
291 * to save & restore VSCR even if VRSAVE == 0). -- paulus
292 *
293 * On SMP we always save/restore altivec regs just to avoid the
294 * complexity of changing processors.
295 * -- Cort
296 */
297 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
298 giveup_altivec(prev);
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299#endif /* CONFIG_ALTIVEC */
300#ifdef CONFIG_SPE
301 /*
302 * If the previous thread used spe in the last quantum
303 * (thus changing spe regs) then save them.
304 *
305 * On SMP we always save/restore spe regs just to avoid the
306 * complexity of changing processors.
307 */
308 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
309 giveup_spe(prev);
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310#endif /* CONFIG_SPE */
311
312#else /* CONFIG_SMP */
313#ifdef CONFIG_ALTIVEC
314 /* Avoid the trap. On smp this this never happens since
315 * we don't set last_task_used_altivec -- Cort
316 */
317 if (new->thread.regs && last_task_used_altivec == new)
318 new->thread.regs->msr |= MSR_VEC;
319#endif /* CONFIG_ALTIVEC */
320#ifdef CONFIG_SPE
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321 /* Avoid the trap. On smp this this never happens since
322 * we don't set last_task_used_spe
323 */
324 if (new->thread.regs && last_task_used_spe == new)
325 new->thread.regs->msr |= MSR_SPE;
326#endif /* CONFIG_SPE */
c0c0d996 327
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328#endif /* CONFIG_SMP */
329
a2ceff5e 330 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
14cf11af 331 set_dabr(new->thread.dabr);
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332
333 new_thread = &new->thread;
334 old_thread = &current->thread;
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335
336#ifdef CONFIG_PPC64
337 /*
338 * Collect processor utilization data per process
339 */
340 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
341 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
342 long unsigned start_tb, current_tb;
343 start_tb = old_thread->start_tb;
344 cu->current_tb = current_tb = mfspr(SPRN_PURR);
345 old_thread->accum_tb += (current_tb - start_tb);
346 new_thread->start_tb = current_tb;
347 }
348#endif
349
14cf11af 350 local_irq_save(flags);
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351
352 account_system_vtime(current);
81a3843f 353 account_process_vtime(current);
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354 calculate_steal_time();
355
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356 /*
357 * We can't take a PMU exception inside _switch() since there is a
358 * window where the kernel stack SLB and the kernel stack are out
359 * of sync. Hard disable here.
360 */
361 hard_irq_disable();
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362 last = _switch(old_thread, new_thread);
363
364 local_irq_restore(flags);
365
366 return last;
367}
368
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369static int instructions_to_print = 16;
370
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371static void show_instructions(struct pt_regs *regs)
372{
373 int i;
374 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
375 sizeof(int));
376
377 printk("Instruction dump:");
378
379 for (i = 0; i < instructions_to_print; i++) {
380 int instr;
381
382 if (!(i % 8))
383 printk("\n");
384
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385#if !defined(CONFIG_BOOKE)
386 /* If executing with the IMMU off, adjust pc rather
387 * than print XXXXXXXX.
388 */
389 if (!(regs->msr & MSR_IR))
390 pc = (unsigned long)phys_to_virt(pc);
391#endif
392
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393 /* We use __get_user here *only* to avoid an OOPS on a
394 * bad address because the pc *should* only be a
395 * kernel address.
396 */
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397 if (!__kernel_text_address(pc) ||
398 __get_user(instr, (unsigned int __user *)pc)) {
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399 printk("XXXXXXXX ");
400 } else {
401 if (regs->nip == pc)
402 printk("<%08x> ", instr);
403 else
404 printk("%08x ", instr);
405 }
406
407 pc += sizeof(int);
408 }
409
410 printk("\n");
411}
412
413static struct regbit {
414 unsigned long bit;
415 const char *name;
416} msr_bits[] = {
417 {MSR_EE, "EE"},
418 {MSR_PR, "PR"},
419 {MSR_FP, "FP"},
420 {MSR_ME, "ME"},
421 {MSR_IR, "IR"},
422 {MSR_DR, "DR"},
423 {0, NULL}
424};
425
426static void printbits(unsigned long val, struct regbit *bits)
427{
428 const char *sep = "";
429
430 printk("<");
431 for (; bits->bit; ++bits)
432 if (val & bits->bit) {
433 printk("%s%s", sep, bits->name);
434 sep = ",";
435 }
436 printk(">");
437}
438
439#ifdef CONFIG_PPC64
f6f7dde3 440#define REG "%016lx"
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441#define REGS_PER_LINE 4
442#define LAST_VOLATILE 13
443#else
f6f7dde3 444#define REG "%08lx"
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445#define REGS_PER_LINE 8
446#define LAST_VOLATILE 12
447#endif
448
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449void show_regs(struct pt_regs * regs)
450{
451 int i, trap;
452
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453 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
454 regs->nip, regs->link, regs->ctr);
455 printk("REGS: %p TRAP: %04lx %s (%s)\n",
96b644bd 456 regs, regs->trap, print_tainted(), init_utsname()->release);
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457 printk("MSR: "REG" ", regs->msr);
458 printbits(regs->msr, msr_bits);
f6f7dde3 459 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
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460 trap = TRAP(regs);
461 if (trap == 0x300 || trap == 0x600)
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462#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
463 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
464#else
06d67d54 465 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
14170789 466#endif
06d67d54 467 printk("TASK = %p[%d] '%s' THREAD: %p",
19c5870c 468 current, task_pid_nr(current), current->comm, task_thread_info(current));
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469
470#ifdef CONFIG_SMP
79ccd1be 471 printk(" CPU: %d", raw_smp_processor_id());
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472#endif /* CONFIG_SMP */
473
474 for (i = 0; i < 32; i++) {
06d67d54 475 if ((i % REGS_PER_LINE) == 0)
14cf11af 476 printk("\n" KERN_INFO "GPR%02d: ", i);
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477 printk(REG " ", regs->gpr[i]);
478 if (i == LAST_VOLATILE && !FULL_REGS(regs))
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479 break;
480 }
481 printk("\n");
482#ifdef CONFIG_KALLSYMS
483 /*
484 * Lookup NIP late so we have the best change of getting the
485 * above info out without failing
486 */
06d67d54 487 printk("NIP ["REG"] ", regs->nip);
14cf11af 488 print_symbol("%s\n", regs->nip);
06d67d54 489 printk("LR ["REG"] ", regs->link);
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490 print_symbol("%s\n", regs->link);
491#endif
492 show_stack(current, (unsigned long *) regs->gpr[1]);
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493 if (!user_mode(regs))
494 show_instructions(regs);
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495}
496
497void exit_thread(void)
498{
48abec07 499 discard_lazy_cpu_state();
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500}
501
502void flush_thread(void)
503{
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504#ifdef CONFIG_PPC64
505 struct thread_info *t = current_thread_info();
506
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507 if (test_ti_thread_flag(t, TIF_ABI_PENDING)) {
508 clear_ti_thread_flag(t, TIF_ABI_PENDING);
509 if (test_ti_thread_flag(t, TIF_32BIT))
510 clear_ti_thread_flag(t, TIF_32BIT);
511 else
512 set_ti_thread_flag(t, TIF_32BIT);
513 }
06d67d54 514#endif
06d67d54 515
48abec07 516 discard_lazy_cpu_state();
14cf11af 517
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518 if (current->thread.dabr) {
519 current->thread.dabr = 0;
520 set_dabr(0);
521 }
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522}
523
524void
525release_thread(struct task_struct *t)
526{
527}
528
529/*
530 * This gets called before we allocate a new thread and copy
531 * the current task into it.
532 */
533void prepare_to_copy(struct task_struct *tsk)
534{
535 flush_fp_to_thread(current);
536 flush_altivec_to_thread(current);
537 flush_spe_to_thread(current);
538}
539
540/*
541 * Copy a thread..
542 */
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543int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
544 unsigned long unused, struct task_struct *p,
545 struct pt_regs *regs)
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546{
547 struct pt_regs *childregs, *kregs;
548 extern void ret_from_fork(void);
0cec6fd1 549 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
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550
551 CHECK_FULL_REGS(regs);
552 /* Copy registers */
553 sp -= sizeof(struct pt_regs);
554 childregs = (struct pt_regs *) sp;
555 *childregs = *regs;
556 if ((childregs->msr & MSR_PR) == 0) {
557 /* for kernel thread, set `current' and stackptr in new task */
558 childregs->gpr[1] = sp + sizeof(struct pt_regs);
06d67d54 559#ifdef CONFIG_PPC32
14cf11af 560 childregs->gpr[2] = (unsigned long) p;
06d67d54 561#else
b5e2fc1c 562 clear_tsk_thread_flag(p, TIF_32BIT);
06d67d54 563#endif
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564 p->thread.regs = NULL; /* no user register state */
565 } else {
566 childregs->gpr[1] = usp;
567 p->thread.regs = childregs;
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568 if (clone_flags & CLONE_SETTLS) {
569#ifdef CONFIG_PPC64
570 if (!test_thread_flag(TIF_32BIT))
571 childregs->gpr[13] = childregs->gpr[6];
572 else
573#endif
574 childregs->gpr[2] = childregs->gpr[6];
575 }
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576 }
577 childregs->gpr[3] = 0; /* Result from fork() */
578 sp -= STACK_FRAME_OVERHEAD;
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579
580 /*
581 * The way this works is that at some point in the future
582 * some task will call _switch to switch to the new task.
583 * That will pop off the stack frame created below and start
584 * the new task running at ret_from_fork. The new task will
585 * do some house keeping and then return from the fork or clone
586 * system call, using the stack frame created above.
587 */
588 sp -= sizeof(struct pt_regs);
589 kregs = (struct pt_regs *) sp;
590 sp -= STACK_FRAME_OVERHEAD;
591 p->thread.ksp = sp;
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592 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
593 _ALIGN_UP(sizeof(struct thread_info), 16);
14cf11af 594
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595#ifdef CONFIG_PPC64
596 if (cpu_has_feature(CPU_FTR_SLB)) {
1189be65 597 unsigned long sp_vsid;
3c726f8d 598 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
06d67d54 599
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600 if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
601 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
602 << SLB_VSID_SHIFT_1T;
603 else
604 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
605 << SLB_VSID_SHIFT;
3c726f8d 606 sp_vsid |= SLB_VSID_KERNEL | llp;
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607 p->thread.ksp_vsid = sp_vsid;
608 }
609
610 /*
611 * The PPC64 ABI makes use of a TOC to contain function
612 * pointers. The function (ret_from_except) is actually a pointer
613 * to the TOC entry. The first entry is a pointer to the actual
614 * function.
615 */
616 kregs->nip = *((unsigned long *)ret_from_fork);
617#else
618 kregs->nip = (unsigned long)ret_from_fork;
06d67d54 619#endif
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620
621 return 0;
622}
623
624/*
625 * Set up a thread for executing a new program
626 */
06d67d54 627void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
14cf11af 628{
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629#ifdef CONFIG_PPC64
630 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
631#endif
632
14cf11af 633 set_fs(USER_DS);
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634
635 /*
636 * If we exec out of a kernel thread then thread.regs will not be
637 * set. Do it now.
638 */
639 if (!current->thread.regs) {
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640 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
641 current->thread.regs = regs - 1;
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642 }
643
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644 memset(regs->gpr, 0, sizeof(regs->gpr));
645 regs->ctr = 0;
646 regs->link = 0;
647 regs->xer = 0;
648 regs->ccr = 0;
14cf11af 649 regs->gpr[1] = sp;
06d67d54 650
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651 /*
652 * We have just cleared all the nonvolatile GPRs, so make
653 * FULL_REGS(regs) return true. This is necessary to allow
654 * ptrace to examine the thread immediately after exec.
655 */
656 regs->trap &= ~1UL;
657
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658#ifdef CONFIG_PPC32
659 regs->mq = 0;
660 regs->nip = start;
14cf11af 661 regs->msr = MSR_USER;
06d67d54 662#else
d4bf9a78 663 if (!test_thread_flag(TIF_32BIT)) {
90eac727 664 unsigned long entry, toc;
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665
666 /* start is a relocated pointer to the function descriptor for
667 * the elf _start routine. The first entry in the function
668 * descriptor is the entry address of _start and the second
669 * entry is the TOC value we need to use.
670 */
671 __get_user(entry, (unsigned long __user *)start);
672 __get_user(toc, (unsigned long __user *)start+1);
673
674 /* Check whether the e_entry function descriptor entries
675 * need to be relocated before we can use them.
676 */
677 if (load_addr != 0) {
678 entry += load_addr;
679 toc += load_addr;
680 }
681 regs->nip = entry;
682 regs->gpr[2] = toc;
683 regs->msr = MSR_USER64;
d4bf9a78
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684 } else {
685 regs->nip = start;
686 regs->gpr[2] = 0;
687 regs->msr = MSR_USER32;
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688 }
689#endif
690
48abec07 691 discard_lazy_cpu_state();
14cf11af 692 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
25c8a78b 693 current->thread.fpscr.val = 0;
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694#ifdef CONFIG_ALTIVEC
695 memset(current->thread.vr, 0, sizeof(current->thread.vr));
696 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
06d67d54 697 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
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698 current->thread.vrsave = 0;
699 current->thread.used_vr = 0;
700#endif /* CONFIG_ALTIVEC */
701#ifdef CONFIG_SPE
702 memset(current->thread.evr, 0, sizeof(current->thread.evr));
703 current->thread.acc = 0;
704 current->thread.spefscr = 0;
705 current->thread.used_spe = 0;
706#endif /* CONFIG_SPE */
707}
708
709#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
710 | PR_FP_EXC_RES | PR_FP_EXC_INV)
711
712int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
713{
714 struct pt_regs *regs = tsk->thread.regs;
715
716 /* This is a bit hairy. If we are an SPE enabled processor
717 * (have embedded fp) we store the IEEE exception enable flags in
718 * fpexc_mode. fpexc_mode is also used for setting FP exception
719 * mode (asyn, precise, disabled) for 'Classic' FP. */
720 if (val & PR_FP_EXC_SW_ENABLE) {
721#ifdef CONFIG_SPE
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722 if (cpu_has_feature(CPU_FTR_SPE)) {
723 tsk->thread.fpexc_mode = val &
724 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
725 return 0;
726 } else {
727 return -EINVAL;
728 }
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729#else
730 return -EINVAL;
731#endif
14cf11af 732 }
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733
734 /* on a CONFIG_SPE this does not hurt us. The bits that
735 * __pack_fe01 use do not overlap with bits used for
736 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
737 * on CONFIG_SPE implementations are reserved so writing to
738 * them does not change anything */
739 if (val > PR_FP_EXC_PRECISE)
740 return -EINVAL;
741 tsk->thread.fpexc_mode = __pack_fe01(val);
742 if (regs != NULL && (regs->msr & MSR_FP) != 0)
743 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
744 | tsk->thread.fpexc_mode;
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745 return 0;
746}
747
748int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
749{
750 unsigned int val;
751
752 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
753#ifdef CONFIG_SPE
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754 if (cpu_has_feature(CPU_FTR_SPE))
755 val = tsk->thread.fpexc_mode;
756 else
757 return -EINVAL;
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758#else
759 return -EINVAL;
760#endif
761 else
762 val = __unpack_fe01(tsk->thread.fpexc_mode);
763 return put_user(val, (unsigned int __user *) adr);
764}
765
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766int set_endian(struct task_struct *tsk, unsigned int val)
767{
768 struct pt_regs *regs = tsk->thread.regs;
769
770 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
771 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
772 return -EINVAL;
773
774 if (regs == NULL)
775 return -EINVAL;
776
777 if (val == PR_ENDIAN_BIG)
778 regs->msr &= ~MSR_LE;
779 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
780 regs->msr |= MSR_LE;
781 else
782 return -EINVAL;
783
784 return 0;
785}
786
787int get_endian(struct task_struct *tsk, unsigned long adr)
788{
789 struct pt_regs *regs = tsk->thread.regs;
790 unsigned int val;
791
792 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
793 !cpu_has_feature(CPU_FTR_REAL_LE))
794 return -EINVAL;
795
796 if (regs == NULL)
797 return -EINVAL;
798
799 if (regs->msr & MSR_LE) {
800 if (cpu_has_feature(CPU_FTR_REAL_LE))
801 val = PR_ENDIAN_LITTLE;
802 else
803 val = PR_ENDIAN_PPC_LITTLE;
804 } else
805 val = PR_ENDIAN_BIG;
806
807 return put_user(val, (unsigned int __user *)adr);
808}
809
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810int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
811{
812 tsk->thread.align_ctl = val;
813 return 0;
814}
815
816int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
817{
818 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
819}
820
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821#define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
822
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823int sys_clone(unsigned long clone_flags, unsigned long usp,
824 int __user *parent_tidp, void __user *child_threadptr,
825 int __user *child_tidp, int p6,
826 struct pt_regs *regs)
827{
828 CHECK_FULL_REGS(regs);
829 if (usp == 0)
830 usp = regs->gpr[1]; /* stack pointer for child */
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831#ifdef CONFIG_PPC64
832 if (test_thread_flag(TIF_32BIT)) {
833 parent_tidp = TRUNC_PTR(parent_tidp);
834 child_tidp = TRUNC_PTR(child_tidp);
835 }
836#endif
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837 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
838}
839
840int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
841 unsigned long p4, unsigned long p5, unsigned long p6,
842 struct pt_regs *regs)
843{
844 CHECK_FULL_REGS(regs);
845 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
846}
847
848int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
849 unsigned long p4, unsigned long p5, unsigned long p6,
850 struct pt_regs *regs)
851{
852 CHECK_FULL_REGS(regs);
853 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
854 regs, 0, NULL, NULL);
855}
856
857int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
858 unsigned long a3, unsigned long a4, unsigned long a5,
859 struct pt_regs *regs)
860{
861 int error;
06d67d54 862 char *filename;
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863
864 filename = getname((char __user *) a0);
865 error = PTR_ERR(filename);
866 if (IS_ERR(filename))
867 goto out;
868 flush_fp_to_thread(current);
869 flush_altivec_to_thread(current);
870 flush_spe_to_thread(current);
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871 error = do_execve(filename, (char __user * __user *) a1,
872 (char __user * __user *) a2, regs);
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873 putname(filename);
874out:
875 return error;
876}
877
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878#ifdef CONFIG_IRQSTACKS
879static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
880 unsigned long nbytes)
881{
882 unsigned long stack_page;
883 unsigned long cpu = task_cpu(p);
884
885 /*
886 * Avoid crashing if the stack has overflowed and corrupted
887 * task_cpu(p), which is in the thread_info struct.
888 */
889 if (cpu < NR_CPUS && cpu_possible(cpu)) {
890 stack_page = (unsigned long) hardirq_ctx[cpu];
891 if (sp >= stack_page + sizeof(struct thread_struct)
892 && sp <= stack_page + THREAD_SIZE - nbytes)
893 return 1;
894
895 stack_page = (unsigned long) softirq_ctx[cpu];
896 if (sp >= stack_page + sizeof(struct thread_struct)
897 && sp <= stack_page + THREAD_SIZE - nbytes)
898 return 1;
899 }
900 return 0;
901}
902
903#else
904#define valid_irq_stack(sp, p, nb) 0
905#endif /* CONFIG_IRQSTACKS */
906
2f25194d 907int validate_sp(unsigned long sp, struct task_struct *p,
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908 unsigned long nbytes)
909{
0cec6fd1 910 unsigned long stack_page = (unsigned long)task_stack_page(p);
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911
912 if (sp >= stack_page + sizeof(struct thread_struct)
913 && sp <= stack_page + THREAD_SIZE - nbytes)
914 return 1;
915
bb72c481 916 return valid_irq_stack(sp, p, nbytes);
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917}
918
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919EXPORT_SYMBOL(validate_sp);
920
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921unsigned long get_wchan(struct task_struct *p)
922{
923 unsigned long ip, sp;
924 int count = 0;
925
926 if (!p || p == current || p->state == TASK_RUNNING)
927 return 0;
928
929 sp = p->thread.ksp;
ec2b36b9 930 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
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931 return 0;
932
933 do {
934 sp = *(unsigned long *)sp;
ec2b36b9 935 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
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936 return 0;
937 if (count > 0) {
ec2b36b9 938 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
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939 if (!in_sched_functions(ip))
940 return ip;
941 }
942 } while (count++ < 16);
943 return 0;
944}
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945
946static int kstack_depth_to_print = 64;
947
948void show_stack(struct task_struct *tsk, unsigned long *stack)
949{
950 unsigned long sp, ip, lr, newsp;
951 int count = 0;
952 int firstframe = 1;
953
954 sp = (unsigned long) stack;
955 if (tsk == NULL)
956 tsk = current;
957 if (sp == 0) {
958 if (tsk == current)
959 asm("mr %0,1" : "=r" (sp));
960 else
961 sp = tsk->thread.ksp;
962 }
963
964 lr = 0;
965 printk("Call Trace:\n");
966 do {
ec2b36b9 967 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
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968 return;
969
970 stack = (unsigned long *) sp;
971 newsp = stack[0];
ec2b36b9 972 ip = stack[STACK_FRAME_LR_SAVE];
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973 if (!firstframe || ip != lr) {
974 printk("["REG"] ["REG"] ", sp, ip);
975 print_symbol("%s", ip);
976 if (firstframe)
977 printk(" (unreliable)");
978 printk("\n");
979 }
980 firstframe = 0;
981
982 /*
983 * See if this is an exception frame.
984 * We look for the "regshere" marker in the current frame.
985 */
ec2b36b9
BH
986 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
987 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
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988 struct pt_regs *regs = (struct pt_regs *)
989 (sp + STACK_FRAME_OVERHEAD);
990 printk("--- Exception: %lx", regs->trap);
991 print_symbol(" at %s\n", regs->nip);
992 lr = regs->link;
993 print_symbol(" LR = %s\n", lr);
994 firstframe = 1;
995 }
996
997 sp = newsp;
998 } while (count++ < kstack_depth_to_print);
999}
1000
1001void dump_stack(void)
1002{
1003 show_stack(current, NULL);
1004}
1005EXPORT_SYMBOL(dump_stack);
cb2c9b27
AB
1006
1007#ifdef CONFIG_PPC64
1008void ppc64_runlatch_on(void)
1009{
1010 unsigned long ctrl;
1011
1012 if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
1013 HMT_medium();
1014
1015 ctrl = mfspr(SPRN_CTRLF);
1016 ctrl |= CTRL_RUNLATCH;
1017 mtspr(SPRN_CTRLT, ctrl);
1018
1019 set_thread_flag(TIF_RUNLATCH);
1020 }
1021}
1022
1023void ppc64_runlatch_off(void)
1024{
1025 unsigned long ctrl;
1026
1027 if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
1028 HMT_medium();
1029
1030 clear_thread_flag(TIF_RUNLATCH);
1031
1032 ctrl = mfspr(SPRN_CTRLF);
1033 ctrl &= ~CTRL_RUNLATCH;
1034 mtspr(SPRN_CTRLT, ctrl);
1035 }
1036}
1037#endif
f6a61680
BH
1038
1039#if THREAD_SHIFT < PAGE_SHIFT
1040
1041static struct kmem_cache *thread_info_cache;
1042
1043struct thread_info *alloc_thread_info(struct task_struct *tsk)
1044{
1045 struct thread_info *ti;
1046
1047 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
1048 if (unlikely(ti == NULL))
1049 return NULL;
1050#ifdef CONFIG_DEBUG_STACK_USAGE
1051 memset(ti, 0, THREAD_SIZE);
1052#endif
1053 return ti;
1054}
1055
1056void free_thread_info(struct thread_info *ti)
1057{
1058 kmem_cache_free(thread_info_cache, ti);
1059}
1060
1061void thread_info_cache_init(void)
1062{
1063 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
1064 THREAD_SIZE, 0, NULL);
1065 BUG_ON(thread_info_cache == NULL);
1066}
1067
1068#endif /* THREAD_SHIFT < PAGE_SHIFT */