powerpc: support for latencytop
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / process.c
CommitLineData
14cf11af 1/*
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2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
4 *
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
7 *
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
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17#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
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22#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/slab.h>
26#include <linux/user.h>
27#include <linux/elf.h>
28#include <linux/init.h>
29#include <linux/prctl.h>
30#include <linux/init_task.h>
31#include <linux/module.h>
32#include <linux/kallsyms.h>
33#include <linux/mqueue.h>
34#include <linux/hardirq.h>
06d67d54 35#include <linux/utsname.h>
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36
37#include <asm/pgtable.h>
38#include <asm/uaccess.h>
39#include <asm/system.h>
40#include <asm/io.h>
41#include <asm/processor.h>
42#include <asm/mmu.h>
43#include <asm/prom.h>
76032de8 44#include <asm/machdep.h>
c6622f63 45#include <asm/time.h>
a7f31841 46#include <asm/syscalls.h>
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47#ifdef CONFIG_PPC64
48#include <asm/firmware.h>
06d67d54 49#endif
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50
51extern unsigned long _get_SP(void);
52
53#ifndef CONFIG_SMP
54struct task_struct *last_task_used_math = NULL;
55struct task_struct *last_task_used_altivec = NULL;
ce48b210 56struct task_struct *last_task_used_vsx = NULL;
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57struct task_struct *last_task_used_spe = NULL;
58#endif
59
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60/*
61 * Make sure the floating-point register state in the
62 * the thread_struct is up to date for task tsk.
63 */
64void flush_fp_to_thread(struct task_struct *tsk)
65{
66 if (tsk->thread.regs) {
67 /*
68 * We need to disable preemption here because if we didn't,
69 * another process could get scheduled after the regs->msr
70 * test but before we have finished saving the FP registers
71 * to the thread_struct. That process could take over the
72 * FPU, and then when we get scheduled again we would store
73 * bogus values for the remaining FP registers.
74 */
75 preempt_disable();
76 if (tsk->thread.regs->msr & MSR_FP) {
77#ifdef CONFIG_SMP
78 /*
79 * This should only ever be called for current or
80 * for a stopped child process. Since we save away
81 * the FP register state on context switch on SMP,
82 * there is something wrong if a stopped child appears
83 * to still have its FP state in the CPU registers.
84 */
85 BUG_ON(tsk != current);
86#endif
0ee6c15e 87 giveup_fpu(tsk);
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88 }
89 preempt_enable();
90 }
91}
92
93void enable_kernel_fp(void)
94{
95 WARN_ON(preemptible());
96
97#ifdef CONFIG_SMP
98 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
99 giveup_fpu(current);
100 else
101 giveup_fpu(NULL); /* just enables FP for kernel */
102#else
103 giveup_fpu(last_task_used_math);
104#endif /* CONFIG_SMP */
105}
106EXPORT_SYMBOL(enable_kernel_fp);
107
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108#ifdef CONFIG_ALTIVEC
109void enable_kernel_altivec(void)
110{
111 WARN_ON(preemptible());
112
113#ifdef CONFIG_SMP
114 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
115 giveup_altivec(current);
116 else
117 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
118#else
119 giveup_altivec(last_task_used_altivec);
120#endif /* CONFIG_SMP */
121}
122EXPORT_SYMBOL(enable_kernel_altivec);
123
124/*
125 * Make sure the VMX/Altivec register state in the
126 * the thread_struct is up to date for task tsk.
127 */
128void flush_altivec_to_thread(struct task_struct *tsk)
129{
130 if (tsk->thread.regs) {
131 preempt_disable();
132 if (tsk->thread.regs->msr & MSR_VEC) {
133#ifdef CONFIG_SMP
134 BUG_ON(tsk != current);
135#endif
0ee6c15e 136 giveup_altivec(tsk);
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137 }
138 preempt_enable();
139 }
140}
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141#endif /* CONFIG_ALTIVEC */
142
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143#ifdef CONFIG_VSX
144#if 0
145/* not currently used, but some crazy RAID module might want to later */
146void enable_kernel_vsx(void)
147{
148 WARN_ON(preemptible());
149
150#ifdef CONFIG_SMP
151 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
152 giveup_vsx(current);
153 else
154 giveup_vsx(NULL); /* just enable vsx for kernel - force */
155#else
156 giveup_vsx(last_task_used_vsx);
157#endif /* CONFIG_SMP */
158}
159EXPORT_SYMBOL(enable_kernel_vsx);
160#endif
161
162void flush_vsx_to_thread(struct task_struct *tsk)
163{
164 if (tsk->thread.regs) {
165 preempt_disable();
166 if (tsk->thread.regs->msr & MSR_VSX) {
167#ifdef CONFIG_SMP
168 BUG_ON(tsk != current);
169#endif
170 giveup_vsx(tsk);
171 }
172 preempt_enable();
173 }
174}
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175#endif /* CONFIG_VSX */
176
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177#ifdef CONFIG_SPE
178
179void enable_kernel_spe(void)
180{
181 WARN_ON(preemptible());
182
183#ifdef CONFIG_SMP
184 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
185 giveup_spe(current);
186 else
187 giveup_spe(NULL); /* just enable SPE for kernel - force */
188#else
189 giveup_spe(last_task_used_spe);
190#endif /* __SMP __ */
191}
192EXPORT_SYMBOL(enable_kernel_spe);
193
194void flush_spe_to_thread(struct task_struct *tsk)
195{
196 if (tsk->thread.regs) {
197 preempt_disable();
198 if (tsk->thread.regs->msr & MSR_SPE) {
199#ifdef CONFIG_SMP
200 BUG_ON(tsk != current);
201#endif
0ee6c15e 202 giveup_spe(tsk);
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203 }
204 preempt_enable();
205 }
206}
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207#endif /* CONFIG_SPE */
208
5388fb10 209#ifndef CONFIG_SMP
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210/*
211 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
212 * and the current task has some state, discard it.
213 */
5388fb10 214void discard_lazy_cpu_state(void)
48abec07 215{
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216 preempt_disable();
217 if (last_task_used_math == current)
218 last_task_used_math = NULL;
219#ifdef CONFIG_ALTIVEC
220 if (last_task_used_altivec == current)
221 last_task_used_altivec = NULL;
222#endif /* CONFIG_ALTIVEC */
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223#ifdef CONFIG_VSX
224 if (last_task_used_vsx == current)
225 last_task_used_vsx = NULL;
226#endif /* CONFIG_VSX */
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227#ifdef CONFIG_SPE
228 if (last_task_used_spe == current)
229 last_task_used_spe = NULL;
230#endif
231 preempt_enable();
48abec07 232}
5388fb10 233#endif /* CONFIG_SMP */
48abec07 234
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235static DEFINE_PER_CPU(unsigned long, current_dabr);
236
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237int set_dabr(unsigned long dabr)
238{
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239 __get_cpu_var(current_dabr) = dabr;
240
791cc501 241#ifdef CONFIG_PPC_MERGE /* XXX for now */
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242 if (ppc_md.set_dabr)
243 return ppc_md.set_dabr(dabr);
791cc501 244#endif
14cf11af 245
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246 /* XXX should we have a CPU_FTR_HAS_DABR ? */
247#if defined(CONFIG_PPC64) || defined(CONFIG_6xx)
cab0af98 248 mtspr(SPRN_DABR, dabr);
791cc501 249#endif
cab0af98 250 return 0;
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251}
252
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253#ifdef CONFIG_PPC64
254DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
06d67d54 255#endif
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256
257struct task_struct *__switch_to(struct task_struct *prev,
258 struct task_struct *new)
259{
260 struct thread_struct *new_thread, *old_thread;
261 unsigned long flags;
262 struct task_struct *last;
263
264#ifdef CONFIG_SMP
265 /* avoid complexity of lazy save/restore of fpu
266 * by just saving it every time we switch out if
267 * this task used the fpu during the last quantum.
268 *
269 * If it tries to use the fpu again, it'll trap and
270 * reload its fp regs. So we don't have to do a restore
271 * every switch, just a save.
272 * -- Cort
273 */
274 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
275 giveup_fpu(prev);
276#ifdef CONFIG_ALTIVEC
277 /*
278 * If the previous thread used altivec in the last quantum
279 * (thus changing altivec regs) then save them.
280 * We used to check the VRSAVE register but not all apps
281 * set it, so we don't rely on it now (and in fact we need
282 * to save & restore VSCR even if VRSAVE == 0). -- paulus
283 *
284 * On SMP we always save/restore altivec regs just to avoid the
285 * complexity of changing processors.
286 * -- Cort
287 */
288 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
289 giveup_altivec(prev);
14cf11af 290#endif /* CONFIG_ALTIVEC */
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291#ifdef CONFIG_VSX
292 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
293 giveup_vsx(prev);
294#endif /* CONFIG_VSX */
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295#ifdef CONFIG_SPE
296 /*
297 * If the previous thread used spe in the last quantum
298 * (thus changing spe regs) then save them.
299 *
300 * On SMP we always save/restore spe regs just to avoid the
301 * complexity of changing processors.
302 */
303 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
304 giveup_spe(prev);
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305#endif /* CONFIG_SPE */
306
307#else /* CONFIG_SMP */
308#ifdef CONFIG_ALTIVEC
309 /* Avoid the trap. On smp this this never happens since
310 * we don't set last_task_used_altivec -- Cort
311 */
312 if (new->thread.regs && last_task_used_altivec == new)
313 new->thread.regs->msr |= MSR_VEC;
314#endif /* CONFIG_ALTIVEC */
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315#ifdef CONFIG_VSX
316 if (new->thread.regs && last_task_used_vsx == new)
317 new->thread.regs->msr |= MSR_VSX;
318#endif /* CONFIG_VSX */
c0c0d996 319#ifdef CONFIG_SPE
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320 /* Avoid the trap. On smp this this never happens since
321 * we don't set last_task_used_spe
322 */
323 if (new->thread.regs && last_task_used_spe == new)
324 new->thread.regs->msr |= MSR_SPE;
325#endif /* CONFIG_SPE */
c0c0d996 326
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327#endif /* CONFIG_SMP */
328
a2ceff5e 329 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
14cf11af 330 set_dabr(new->thread.dabr);
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331
332 new_thread = &new->thread;
333 old_thread = &current->thread;
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334
335#ifdef CONFIG_PPC64
336 /*
337 * Collect processor utilization data per process
338 */
339 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
340 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
341 long unsigned start_tb, current_tb;
342 start_tb = old_thread->start_tb;
343 cu->current_tb = current_tb = mfspr(SPRN_PURR);
344 old_thread->accum_tb += (current_tb - start_tb);
345 new_thread->start_tb = current_tb;
346 }
347#endif
348
14cf11af 349 local_irq_save(flags);
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350
351 account_system_vtime(current);
81a3843f 352 account_process_vtime(current);
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353 calculate_steal_time();
354
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355 /*
356 * We can't take a PMU exception inside _switch() since there is a
357 * window where the kernel stack SLB and the kernel stack are out
358 * of sync. Hard disable here.
359 */
360 hard_irq_disable();
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361 last = _switch(old_thread, new_thread);
362
363 local_irq_restore(flags);
364
365 return last;
366}
367
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368static int instructions_to_print = 16;
369
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370static void show_instructions(struct pt_regs *regs)
371{
372 int i;
373 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
374 sizeof(int));
375
376 printk("Instruction dump:");
377
378 for (i = 0; i < instructions_to_print; i++) {
379 int instr;
380
381 if (!(i % 8))
382 printk("\n");
383
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384#if !defined(CONFIG_BOOKE)
385 /* If executing with the IMMU off, adjust pc rather
386 * than print XXXXXXXX.
387 */
388 if (!(regs->msr & MSR_IR))
389 pc = (unsigned long)phys_to_virt(pc);
390#endif
391
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392 /* We use __get_user here *only* to avoid an OOPS on a
393 * bad address because the pc *should* only be a
394 * kernel address.
395 */
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396 if (!__kernel_text_address(pc) ||
397 __get_user(instr, (unsigned int __user *)pc)) {
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398 printk("XXXXXXXX ");
399 } else {
400 if (regs->nip == pc)
401 printk("<%08x> ", instr);
402 else
403 printk("%08x ", instr);
404 }
405
406 pc += sizeof(int);
407 }
408
409 printk("\n");
410}
411
412static struct regbit {
413 unsigned long bit;
414 const char *name;
415} msr_bits[] = {
416 {MSR_EE, "EE"},
417 {MSR_PR, "PR"},
418 {MSR_FP, "FP"},
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419 {MSR_VEC, "VEC"},
420 {MSR_VSX, "VSX"},
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421 {MSR_ME, "ME"},
422 {MSR_IR, "IR"},
423 {MSR_DR, "DR"},
424 {0, NULL}
425};
426
427static void printbits(unsigned long val, struct regbit *bits)
428{
429 const char *sep = "";
430
431 printk("<");
432 for (; bits->bit; ++bits)
433 if (val & bits->bit) {
434 printk("%s%s", sep, bits->name);
435 sep = ",";
436 }
437 printk(">");
438}
439
440#ifdef CONFIG_PPC64
f6f7dde3 441#define REG "%016lx"
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442#define REGS_PER_LINE 4
443#define LAST_VOLATILE 13
444#else
f6f7dde3 445#define REG "%08lx"
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446#define REGS_PER_LINE 8
447#define LAST_VOLATILE 12
448#endif
449
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450void show_regs(struct pt_regs * regs)
451{
452 int i, trap;
453
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454 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
455 regs->nip, regs->link, regs->ctr);
456 printk("REGS: %p TRAP: %04lx %s (%s)\n",
96b644bd 457 regs, regs->trap, print_tainted(), init_utsname()->release);
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458 printk("MSR: "REG" ", regs->msr);
459 printbits(regs->msr, msr_bits);
f6f7dde3 460 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
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461 trap = TRAP(regs);
462 if (trap == 0x300 || trap == 0x600)
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463#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
464 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
465#else
06d67d54 466 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
14170789 467#endif
06d67d54 468 printk("TASK = %p[%d] '%s' THREAD: %p",
19c5870c 469 current, task_pid_nr(current), current->comm, task_thread_info(current));
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470
471#ifdef CONFIG_SMP
79ccd1be 472 printk(" CPU: %d", raw_smp_processor_id());
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473#endif /* CONFIG_SMP */
474
475 for (i = 0; i < 32; i++) {
06d67d54 476 if ((i % REGS_PER_LINE) == 0)
14cf11af 477 printk("\n" KERN_INFO "GPR%02d: ", i);
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478 printk(REG " ", regs->gpr[i]);
479 if (i == LAST_VOLATILE && !FULL_REGS(regs))
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480 break;
481 }
482 printk("\n");
483#ifdef CONFIG_KALLSYMS
484 /*
485 * Lookup NIP late so we have the best change of getting the
486 * above info out without failing
487 */
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488 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
489 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
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490#endif
491 show_stack(current, (unsigned long *) regs->gpr[1]);
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492 if (!user_mode(regs))
493 show_instructions(regs);
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494}
495
496void exit_thread(void)
497{
48abec07 498 discard_lazy_cpu_state();
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499}
500
501void flush_thread(void)
502{
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503#ifdef CONFIG_PPC64
504 struct thread_info *t = current_thread_info();
505
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506 if (test_ti_thread_flag(t, TIF_ABI_PENDING)) {
507 clear_ti_thread_flag(t, TIF_ABI_PENDING);
508 if (test_ti_thread_flag(t, TIF_32BIT))
509 clear_ti_thread_flag(t, TIF_32BIT);
510 else
511 set_ti_thread_flag(t, TIF_32BIT);
512 }
06d67d54 513#endif
06d67d54 514
48abec07 515 discard_lazy_cpu_state();
14cf11af 516
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517 if (current->thread.dabr) {
518 current->thread.dabr = 0;
519 set_dabr(0);
520 }
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521}
522
523void
524release_thread(struct task_struct *t)
525{
526}
527
528/*
529 * This gets called before we allocate a new thread and copy
530 * the current task into it.
531 */
532void prepare_to_copy(struct task_struct *tsk)
533{
534 flush_fp_to_thread(current);
535 flush_altivec_to_thread(current);
ce48b210 536 flush_vsx_to_thread(current);
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537 flush_spe_to_thread(current);
538}
539
540/*
541 * Copy a thread..
542 */
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543int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
544 unsigned long unused, struct task_struct *p,
545 struct pt_regs *regs)
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546{
547 struct pt_regs *childregs, *kregs;
548 extern void ret_from_fork(void);
0cec6fd1 549 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
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550
551 CHECK_FULL_REGS(regs);
552 /* Copy registers */
553 sp -= sizeof(struct pt_regs);
554 childregs = (struct pt_regs *) sp;
555 *childregs = *regs;
556 if ((childregs->msr & MSR_PR) == 0) {
557 /* for kernel thread, set `current' and stackptr in new task */
558 childregs->gpr[1] = sp + sizeof(struct pt_regs);
06d67d54 559#ifdef CONFIG_PPC32
14cf11af 560 childregs->gpr[2] = (unsigned long) p;
06d67d54 561#else
b5e2fc1c 562 clear_tsk_thread_flag(p, TIF_32BIT);
06d67d54 563#endif
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564 p->thread.regs = NULL; /* no user register state */
565 } else {
566 childregs->gpr[1] = usp;
567 p->thread.regs = childregs;
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568 if (clone_flags & CLONE_SETTLS) {
569#ifdef CONFIG_PPC64
570 if (!test_thread_flag(TIF_32BIT))
571 childregs->gpr[13] = childregs->gpr[6];
572 else
573#endif
574 childregs->gpr[2] = childregs->gpr[6];
575 }
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576 }
577 childregs->gpr[3] = 0; /* Result from fork() */
578 sp -= STACK_FRAME_OVERHEAD;
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579
580 /*
581 * The way this works is that at some point in the future
582 * some task will call _switch to switch to the new task.
583 * That will pop off the stack frame created below and start
584 * the new task running at ret_from_fork. The new task will
585 * do some house keeping and then return from the fork or clone
586 * system call, using the stack frame created above.
587 */
588 sp -= sizeof(struct pt_regs);
589 kregs = (struct pt_regs *) sp;
590 sp -= STACK_FRAME_OVERHEAD;
591 p->thread.ksp = sp;
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592 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
593 _ALIGN_UP(sizeof(struct thread_info), 16);
14cf11af 594
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595#ifdef CONFIG_PPC64
596 if (cpu_has_feature(CPU_FTR_SLB)) {
1189be65 597 unsigned long sp_vsid;
3c726f8d 598 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
06d67d54 599
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600 if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
601 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
602 << SLB_VSID_SHIFT_1T;
603 else
604 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
605 << SLB_VSID_SHIFT;
3c726f8d 606 sp_vsid |= SLB_VSID_KERNEL | llp;
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607 p->thread.ksp_vsid = sp_vsid;
608 }
609
610 /*
611 * The PPC64 ABI makes use of a TOC to contain function
612 * pointers. The function (ret_from_except) is actually a pointer
613 * to the TOC entry. The first entry is a pointer to the actual
614 * function.
615 */
616 kregs->nip = *((unsigned long *)ret_from_fork);
617#else
618 kregs->nip = (unsigned long)ret_from_fork;
06d67d54 619#endif
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620
621 return 0;
622}
623
624/*
625 * Set up a thread for executing a new program
626 */
06d67d54 627void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
14cf11af 628{
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629#ifdef CONFIG_PPC64
630 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
631#endif
632
14cf11af 633 set_fs(USER_DS);
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634
635 /*
636 * If we exec out of a kernel thread then thread.regs will not be
637 * set. Do it now.
638 */
639 if (!current->thread.regs) {
0cec6fd1
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640 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
641 current->thread.regs = regs - 1;
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642 }
643
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644 memset(regs->gpr, 0, sizeof(regs->gpr));
645 regs->ctr = 0;
646 regs->link = 0;
647 regs->xer = 0;
648 regs->ccr = 0;
14cf11af 649 regs->gpr[1] = sp;
06d67d54 650
474f8196
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651 /*
652 * We have just cleared all the nonvolatile GPRs, so make
653 * FULL_REGS(regs) return true. This is necessary to allow
654 * ptrace to examine the thread immediately after exec.
655 */
656 regs->trap &= ~1UL;
657
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658#ifdef CONFIG_PPC32
659 regs->mq = 0;
660 regs->nip = start;
14cf11af 661 regs->msr = MSR_USER;
06d67d54 662#else
d4bf9a78 663 if (!test_thread_flag(TIF_32BIT)) {
90eac727 664 unsigned long entry, toc;
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665
666 /* start is a relocated pointer to the function descriptor for
667 * the elf _start routine. The first entry in the function
668 * descriptor is the entry address of _start and the second
669 * entry is the TOC value we need to use.
670 */
671 __get_user(entry, (unsigned long __user *)start);
672 __get_user(toc, (unsigned long __user *)start+1);
673
674 /* Check whether the e_entry function descriptor entries
675 * need to be relocated before we can use them.
676 */
677 if (load_addr != 0) {
678 entry += load_addr;
679 toc += load_addr;
680 }
681 regs->nip = entry;
682 regs->gpr[2] = toc;
683 regs->msr = MSR_USER64;
d4bf9a78
SR
684 } else {
685 regs->nip = start;
686 regs->gpr[2] = 0;
687 regs->msr = MSR_USER32;
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688 }
689#endif
690
48abec07 691 discard_lazy_cpu_state();
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MN
692#ifdef CONFIG_VSX
693 current->thread.used_vsr = 0;
694#endif
14cf11af 695 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
25c8a78b 696 current->thread.fpscr.val = 0;
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697#ifdef CONFIG_ALTIVEC
698 memset(current->thread.vr, 0, sizeof(current->thread.vr));
699 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
06d67d54 700 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
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701 current->thread.vrsave = 0;
702 current->thread.used_vr = 0;
703#endif /* CONFIG_ALTIVEC */
704#ifdef CONFIG_SPE
705 memset(current->thread.evr, 0, sizeof(current->thread.evr));
706 current->thread.acc = 0;
707 current->thread.spefscr = 0;
708 current->thread.used_spe = 0;
709#endif /* CONFIG_SPE */
710}
711
712#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
713 | PR_FP_EXC_RES | PR_FP_EXC_INV)
714
715int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
716{
717 struct pt_regs *regs = tsk->thread.regs;
718
719 /* This is a bit hairy. If we are an SPE enabled processor
720 * (have embedded fp) we store the IEEE exception enable flags in
721 * fpexc_mode. fpexc_mode is also used for setting FP exception
722 * mode (asyn, precise, disabled) for 'Classic' FP. */
723 if (val & PR_FP_EXC_SW_ENABLE) {
724#ifdef CONFIG_SPE
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725 if (cpu_has_feature(CPU_FTR_SPE)) {
726 tsk->thread.fpexc_mode = val &
727 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
728 return 0;
729 } else {
730 return -EINVAL;
731 }
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732#else
733 return -EINVAL;
734#endif
14cf11af 735 }
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736
737 /* on a CONFIG_SPE this does not hurt us. The bits that
738 * __pack_fe01 use do not overlap with bits used for
739 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
740 * on CONFIG_SPE implementations are reserved so writing to
741 * them does not change anything */
742 if (val > PR_FP_EXC_PRECISE)
743 return -EINVAL;
744 tsk->thread.fpexc_mode = __pack_fe01(val);
745 if (regs != NULL && (regs->msr & MSR_FP) != 0)
746 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
747 | tsk->thread.fpexc_mode;
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748 return 0;
749}
750
751int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
752{
753 unsigned int val;
754
755 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
756#ifdef CONFIG_SPE
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757 if (cpu_has_feature(CPU_FTR_SPE))
758 val = tsk->thread.fpexc_mode;
759 else
760 return -EINVAL;
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761#else
762 return -EINVAL;
763#endif
764 else
765 val = __unpack_fe01(tsk->thread.fpexc_mode);
766 return put_user(val, (unsigned int __user *) adr);
767}
768
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769int set_endian(struct task_struct *tsk, unsigned int val)
770{
771 struct pt_regs *regs = tsk->thread.regs;
772
773 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
774 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
775 return -EINVAL;
776
777 if (regs == NULL)
778 return -EINVAL;
779
780 if (val == PR_ENDIAN_BIG)
781 regs->msr &= ~MSR_LE;
782 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
783 regs->msr |= MSR_LE;
784 else
785 return -EINVAL;
786
787 return 0;
788}
789
790int get_endian(struct task_struct *tsk, unsigned long adr)
791{
792 struct pt_regs *regs = tsk->thread.regs;
793 unsigned int val;
794
795 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
796 !cpu_has_feature(CPU_FTR_REAL_LE))
797 return -EINVAL;
798
799 if (regs == NULL)
800 return -EINVAL;
801
802 if (regs->msr & MSR_LE) {
803 if (cpu_has_feature(CPU_FTR_REAL_LE))
804 val = PR_ENDIAN_LITTLE;
805 else
806 val = PR_ENDIAN_PPC_LITTLE;
807 } else
808 val = PR_ENDIAN_BIG;
809
810 return put_user(val, (unsigned int __user *)adr);
811}
812
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813int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
814{
815 tsk->thread.align_ctl = val;
816 return 0;
817}
818
819int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
820{
821 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
822}
823
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824#define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
825
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826int sys_clone(unsigned long clone_flags, unsigned long usp,
827 int __user *parent_tidp, void __user *child_threadptr,
828 int __user *child_tidp, int p6,
829 struct pt_regs *regs)
830{
831 CHECK_FULL_REGS(regs);
832 if (usp == 0)
833 usp = regs->gpr[1]; /* stack pointer for child */
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834#ifdef CONFIG_PPC64
835 if (test_thread_flag(TIF_32BIT)) {
836 parent_tidp = TRUNC_PTR(parent_tidp);
837 child_tidp = TRUNC_PTR(child_tidp);
838 }
839#endif
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840 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
841}
842
843int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
844 unsigned long p4, unsigned long p5, unsigned long p6,
845 struct pt_regs *regs)
846{
847 CHECK_FULL_REGS(regs);
848 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
849}
850
851int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
852 unsigned long p4, unsigned long p5, unsigned long p6,
853 struct pt_regs *regs)
854{
855 CHECK_FULL_REGS(regs);
856 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
857 regs, 0, NULL, NULL);
858}
859
860int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
861 unsigned long a3, unsigned long a4, unsigned long a5,
862 struct pt_regs *regs)
863{
864 int error;
06d67d54 865 char *filename;
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866
867 filename = getname((char __user *) a0);
868 error = PTR_ERR(filename);
869 if (IS_ERR(filename))
870 goto out;
871 flush_fp_to_thread(current);
872 flush_altivec_to_thread(current);
873 flush_spe_to_thread(current);
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874 error = do_execve(filename, (char __user * __user *) a1,
875 (char __user * __user *) a2, regs);
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876 putname(filename);
877out:
878 return error;
879}
880
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881#ifdef CONFIG_IRQSTACKS
882static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
883 unsigned long nbytes)
884{
885 unsigned long stack_page;
886 unsigned long cpu = task_cpu(p);
887
888 /*
889 * Avoid crashing if the stack has overflowed and corrupted
890 * task_cpu(p), which is in the thread_info struct.
891 */
892 if (cpu < NR_CPUS && cpu_possible(cpu)) {
893 stack_page = (unsigned long) hardirq_ctx[cpu];
894 if (sp >= stack_page + sizeof(struct thread_struct)
895 && sp <= stack_page + THREAD_SIZE - nbytes)
896 return 1;
897
898 stack_page = (unsigned long) softirq_ctx[cpu];
899 if (sp >= stack_page + sizeof(struct thread_struct)
900 && sp <= stack_page + THREAD_SIZE - nbytes)
901 return 1;
902 }
903 return 0;
904}
905
906#else
907#define valid_irq_stack(sp, p, nb) 0
908#endif /* CONFIG_IRQSTACKS */
909
2f25194d 910int validate_sp(unsigned long sp, struct task_struct *p,
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911 unsigned long nbytes)
912{
0cec6fd1 913 unsigned long stack_page = (unsigned long)task_stack_page(p);
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914
915 if (sp >= stack_page + sizeof(struct thread_struct)
916 && sp <= stack_page + THREAD_SIZE - nbytes)
917 return 1;
918
bb72c481 919 return valid_irq_stack(sp, p, nbytes);
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920}
921
2f25194d
AB
922EXPORT_SYMBOL(validate_sp);
923
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924unsigned long get_wchan(struct task_struct *p)
925{
926 unsigned long ip, sp;
927 int count = 0;
928
929 if (!p || p == current || p->state == TASK_RUNNING)
930 return 0;
931
932 sp = p->thread.ksp;
ec2b36b9 933 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
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934 return 0;
935
936 do {
937 sp = *(unsigned long *)sp;
ec2b36b9 938 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
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939 return 0;
940 if (count > 0) {
ec2b36b9 941 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
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942 if (!in_sched_functions(ip))
943 return ip;
944 }
945 } while (count++ < 16);
946 return 0;
947}
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948
949static int kstack_depth_to_print = 64;
950
951void show_stack(struct task_struct *tsk, unsigned long *stack)
952{
953 unsigned long sp, ip, lr, newsp;
954 int count = 0;
955 int firstframe = 1;
956
957 sp = (unsigned long) stack;
958 if (tsk == NULL)
959 tsk = current;
960 if (sp == 0) {
961 if (tsk == current)
962 asm("mr %0,1" : "=r" (sp));
963 else
964 sp = tsk->thread.ksp;
965 }
966
967 lr = 0;
968 printk("Call Trace:\n");
969 do {
ec2b36b9 970 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
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971 return;
972
973 stack = (unsigned long *) sp;
974 newsp = stack[0];
ec2b36b9 975 ip = stack[STACK_FRAME_LR_SAVE];
06d67d54 976 if (!firstframe || ip != lr) {
058c78f4 977 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
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978 if (firstframe)
979 printk(" (unreliable)");
980 printk("\n");
981 }
982 firstframe = 0;
983
984 /*
985 * See if this is an exception frame.
986 * We look for the "regshere" marker in the current frame.
987 */
ec2b36b9
BH
988 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
989 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
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990 struct pt_regs *regs = (struct pt_regs *)
991 (sp + STACK_FRAME_OVERHEAD);
06d67d54 992 lr = regs->link;
058c78f4
BH
993 printk("--- Exception: %lx at %pS\n LR = %pS\n",
994 regs->trap, (void *)regs->nip, (void *)lr);
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995 firstframe = 1;
996 }
997
998 sp = newsp;
999 } while (count++ < kstack_depth_to_print);
1000}
1001
1002void dump_stack(void)
1003{
1004 show_stack(current, NULL);
1005}
1006EXPORT_SYMBOL(dump_stack);
cb2c9b27
AB
1007
1008#ifdef CONFIG_PPC64
1009void ppc64_runlatch_on(void)
1010{
1011 unsigned long ctrl;
1012
1013 if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
1014 HMT_medium();
1015
1016 ctrl = mfspr(SPRN_CTRLF);
1017 ctrl |= CTRL_RUNLATCH;
1018 mtspr(SPRN_CTRLT, ctrl);
1019
1020 set_thread_flag(TIF_RUNLATCH);
1021 }
1022}
1023
1024void ppc64_runlatch_off(void)
1025{
1026 unsigned long ctrl;
1027
1028 if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
1029 HMT_medium();
1030
1031 clear_thread_flag(TIF_RUNLATCH);
1032
1033 ctrl = mfspr(SPRN_CTRLF);
1034 ctrl &= ~CTRL_RUNLATCH;
1035 mtspr(SPRN_CTRLT, ctrl);
1036 }
1037}
1038#endif
f6a61680
BH
1039
1040#if THREAD_SHIFT < PAGE_SHIFT
1041
1042static struct kmem_cache *thread_info_cache;
1043
1044struct thread_info *alloc_thread_info(struct task_struct *tsk)
1045{
1046 struct thread_info *ti;
1047
1048 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
1049 if (unlikely(ti == NULL))
1050 return NULL;
1051#ifdef CONFIG_DEBUG_STACK_USAGE
1052 memset(ti, 0, THREAD_SIZE);
1053#endif
1054 return ti;
1055}
1056
1057void free_thread_info(struct thread_info *ti)
1058{
1059 kmem_cache_free(thread_info_cache, ti);
1060}
1061
1062void thread_info_cache_init(void)
1063{
1064 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
1065 THREAD_SIZE, 0, NULL);
1066 BUG_ON(thread_info_cache == NULL);
1067}
1068
1069#endif /* THREAD_SHIFT < PAGE_SHIFT */