Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
1da177e4 | 31 | #include <linux/module.h> |
1da177e4 LT |
32 | #include <linux/acpi.h> |
33 | #include <linux/dmi.h> | |
e2668fb5 | 34 | #include <linux/sched.h> /* need_resched() */ |
e9e2cdb4 | 35 | #include <linux/clockchips.h> |
4f86d3a8 | 36 | #include <linux/cpuidle.h> |
1da177e4 | 37 | |
3434933b TG |
38 | /* |
39 | * Include the apic definitions for x86 to have the APIC timer related defines | |
40 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
41 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
42 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
43 | */ | |
44 | #ifdef CONFIG_X86 | |
45 | #include <asm/apic.h> | |
46 | #endif | |
47 | ||
1da177e4 LT |
48 | #include <acpi/acpi_bus.h> |
49 | #include <acpi/processor.h> | |
50 | ||
a192a958 LB |
51 | #define PREFIX "ACPI: " |
52 | ||
1da177e4 | 53 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 54 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 55 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 56 | |
4f86d3a8 LB |
57 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
58 | module_param(max_cstate, uint, 0000); | |
b6835052 | 59 | static unsigned int nocst __read_mostly; |
1da177e4 | 60 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
61 | static int bm_check_disable __read_mostly; |
62 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 63 | |
25de5718 | 64 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 65 | module_param(latency_factor, uint, 0644); |
1da177e4 | 66 | |
3d339dcb DL |
67 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
68 | ||
ac3ebafa DL |
69 | static struct acpi_processor_cx *acpi_cstate[CPUIDLE_STATE_MAX]; |
70 | ||
d1896049 TR |
71 | static int disabled_by_idle_boot_param(void) |
72 | { | |
73 | return boot_option_idle_override == IDLE_POLL || | |
d1896049 TR |
74 | boot_option_idle_override == IDLE_HALT; |
75 | } | |
76 | ||
1da177e4 LT |
77 | /* |
78 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
79 | * For now disable this. Probably a bug somewhere else. | |
80 | * | |
81 | * To skip this limit, boot/load with a large max_cstate limit. | |
82 | */ | |
1855256c | 83 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
84 | { |
85 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
86 | return 0; | |
87 | ||
3d35600a | 88 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
89 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
90 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 91 | |
3d35600a | 92 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
93 | |
94 | return 0; | |
95 | } | |
96 | ||
7ded5689 AR |
97 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
98 | callers to only run once -AK */ | |
99 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
876c184b TR |
100 | { set_max_cstate, "Clevo 5600D", { |
101 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
102 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 103 | (void *)2}, |
370d5cd8 AV |
104 | { set_max_cstate, "Pavilion zv5000", { |
105 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
106 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
107 | (void *)1}, | |
108 | { set_max_cstate, "Asus L8400B", { | |
109 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
110 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
111 | (void *)1}, | |
1da177e4 LT |
112 | {}, |
113 | }; | |
114 | ||
4f86d3a8 | 115 | |
2e906655 | 116 | /* |
117 | * Callers should disable interrupts before the call and enable | |
118 | * interrupts after return. | |
119 | */ | |
ddc081a1 VP |
120 | static void acpi_safe_halt(void) |
121 | { | |
122 | current_thread_info()->status &= ~TS_POLLING; | |
123 | /* | |
124 | * TS_POLLING-cleared state must be visible before we | |
125 | * test NEED_RESCHED: | |
126 | */ | |
127 | smp_mb(); | |
71e93d15 | 128 | if (!need_resched()) { |
ddc081a1 | 129 | safe_halt(); |
71e93d15 VP |
130 | local_irq_disable(); |
131 | } | |
ddc081a1 VP |
132 | current_thread_info()->status |= TS_POLLING; |
133 | } | |
134 | ||
169a0abb TG |
135 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
136 | ||
137 | /* | |
138 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
139 | * This seems to be a common problem on AMD boxen, but other vendors |
140 | * are affected too. We pick the most conservative approach: we assume | |
141 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 142 | */ |
7e275cc4 | 143 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
144 | struct acpi_processor_cx *cx) |
145 | { | |
146 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 147 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 148 | |
db954b58 VP |
149 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
150 | return; | |
151 | ||
02c68a02 | 152 | if (amd_e400_c1e_detected) |
87ad57ba SL |
153 | type = ACPI_STATE_C1; |
154 | ||
169a0abb TG |
155 | /* |
156 | * Check, if one of the previous states already marked the lapic | |
157 | * unstable | |
158 | */ | |
159 | if (pwr->timer_broadcast_on_state < state) | |
160 | return; | |
161 | ||
e585bef8 | 162 | if (cx->type >= type) |
296d93cd | 163 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
164 | } |
165 | ||
918aae42 | 166 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 167 | { |
f833bab8 | 168 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 TG |
169 | unsigned long reason; |
170 | ||
171 | reason = pr->power.timer_broadcast_on_state < INT_MAX ? | |
172 | CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; | |
173 | ||
174 | clockevents_notify(reason, &pr->id); | |
e9e2cdb4 TG |
175 | } |
176 | ||
918aae42 HS |
177 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
178 | { | |
179 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
180 | (void *)pr, 1); | |
181 | } | |
182 | ||
e9e2cdb4 | 183 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 184 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
185 | struct acpi_processor_cx *cx, |
186 | int broadcast) | |
187 | { | |
e9e2cdb4 TG |
188 | int state = cx - pr->power.states; |
189 | ||
190 | if (state >= pr->power.timer_broadcast_on_state) { | |
191 | unsigned long reason; | |
192 | ||
193 | reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : | |
194 | CLOCK_EVT_NOTIFY_BROADCAST_EXIT; | |
195 | clockevents_notify(reason, &pr->id); | |
196 | } | |
169a0abb TG |
197 | } |
198 | ||
199 | #else | |
200 | ||
7e275cc4 | 201 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 202 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
203 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
204 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
205 | struct acpi_processor_cx *cx, |
206 | int broadcast) | |
207 | { | |
208 | } | |
169a0abb TG |
209 | |
210 | #endif | |
211 | ||
815ab0fd LB |
212 | static u32 saved_bm_rld; |
213 | ||
214 | static void acpi_idle_bm_rld_save(void) | |
215 | { | |
216 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); | |
217 | } | |
218 | static void acpi_idle_bm_rld_restore(void) | |
219 | { | |
220 | u32 resumed_bm_rld; | |
221 | ||
222 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); | |
223 | ||
224 | if (resumed_bm_rld != saved_bm_rld) | |
225 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); | |
226 | } | |
b04e7bdb | 227 | |
e8110b64 | 228 | int acpi_processor_suspend(struct device *dev) |
b04e7bdb | 229 | { |
815ab0fd | 230 | acpi_idle_bm_rld_save(); |
b04e7bdb TG |
231 | return 0; |
232 | } | |
233 | ||
e8110b64 | 234 | int acpi_processor_resume(struct device *dev) |
b04e7bdb | 235 | { |
815ab0fd | 236 | acpi_idle_bm_rld_restore(); |
b04e7bdb TG |
237 | return 0; |
238 | } | |
239 | ||
592913ec | 240 | #if defined(CONFIG_X86) |
520daf72 | 241 | static void tsc_check_state(int state) |
ddb25f9a AK |
242 | { |
243 | switch (boot_cpu_data.x86_vendor) { | |
244 | case X86_VENDOR_AMD: | |
40fb1715 | 245 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
246 | /* |
247 | * AMD Fam10h TSC will tick in all | |
248 | * C/P/S0/S1 states when this bit is set. | |
249 | */ | |
40fb1715 | 250 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 251 | return; |
40fb1715 | 252 | |
ddb25f9a | 253 | /*FALL THROUGH*/ |
ddb25f9a | 254 | default: |
520daf72 LB |
255 | /* TSC could halt in idle, so notify users */ |
256 | if (state > ACPI_STATE_C1) | |
257 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
258 | } |
259 | } | |
520daf72 LB |
260 | #else |
261 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
262 | #endif |
263 | ||
4be44fcd | 264 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 265 | { |
1da177e4 LT |
266 | |
267 | if (!pr) | |
d550d98d | 268 | return -EINVAL; |
1da177e4 LT |
269 | |
270 | if (!pr->pblk) | |
d550d98d | 271 | return -ENODEV; |
1da177e4 | 272 | |
1da177e4 | 273 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
274 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
275 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
276 | ||
4c033552 VP |
277 | #ifndef CONFIG_HOTPLUG_CPU |
278 | /* | |
279 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 280 | * an SMP system. |
4c033552 | 281 | */ |
ad71860a | 282 | if ((num_online_cpus() > 1) && |
cee324b1 | 283 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 284 | return -ENODEV; |
4c033552 VP |
285 | #endif |
286 | ||
1da177e4 LT |
287 | /* determine C2 and C3 address from pblk */ |
288 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
289 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
290 | ||
291 | /* determine latencies from FADT */ | |
ba494bee BM |
292 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
293 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 294 | |
5d76b6f6 LB |
295 | /* |
296 | * FADT specified C2 latency must be less than or equal to | |
297 | * 100 microseconds. | |
298 | */ | |
ba494bee | 299 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 300 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 301 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
302 | /* invalidate C2 */ |
303 | pr->power.states[ACPI_STATE_C2].address = 0; | |
304 | } | |
305 | ||
a6d72c18 LB |
306 | /* |
307 | * FADT supplied C3 latency must be less than or equal to | |
308 | * 1000 microseconds. | |
309 | */ | |
ba494bee | 310 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 311 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 312 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
313 | /* invalidate C3 */ |
314 | pr->power.states[ACPI_STATE_C3].address = 0; | |
315 | } | |
316 | ||
1da177e4 LT |
317 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
318 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
319 | pr->power.states[ACPI_STATE_C2].address, | |
320 | pr->power.states[ACPI_STATE_C3].address)); | |
321 | ||
d550d98d | 322 | return 0; |
1da177e4 LT |
323 | } |
324 | ||
991528d7 | 325 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 326 | { |
991528d7 VP |
327 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
328 | /* set the first C-State to C1 */ | |
329 | /* all processors need to support C1 */ | |
330 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
331 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 332 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
333 | } |
334 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 335 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 336 | return 0; |
acf05f4b VP |
337 | } |
338 | ||
4be44fcd | 339 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 340 | { |
4be44fcd | 341 | acpi_status status = 0; |
439913ff | 342 | u64 count; |
cf824788 | 343 | int current_count; |
4be44fcd LB |
344 | int i; |
345 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
346 | union acpi_object *cst; | |
1da177e4 | 347 | |
1da177e4 | 348 | |
1da177e4 | 349 | if (nocst) |
d550d98d | 350 | return -ENODEV; |
1da177e4 | 351 | |
991528d7 | 352 | current_count = 0; |
1da177e4 LT |
353 | |
354 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
355 | if (ACPI_FAILURE(status)) { | |
356 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 357 | return -ENODEV; |
4be44fcd | 358 | } |
1da177e4 | 359 | |
50dd0969 | 360 | cst = buffer.pointer; |
1da177e4 LT |
361 | |
362 | /* There must be at least 2 elements */ | |
363 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 364 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
365 | status = -EFAULT; |
366 | goto end; | |
367 | } | |
368 | ||
369 | count = cst->package.elements[0].integer.value; | |
370 | ||
371 | /* Validate number of power states. */ | |
372 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 373 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
374 | status = -EFAULT; |
375 | goto end; | |
376 | } | |
377 | ||
1da177e4 LT |
378 | /* Tell driver that at least _CST is supported. */ |
379 | pr->flags.has_cst = 1; | |
380 | ||
381 | for (i = 1; i <= count; i++) { | |
382 | union acpi_object *element; | |
383 | union acpi_object *obj; | |
384 | struct acpi_power_register *reg; | |
385 | struct acpi_processor_cx cx; | |
386 | ||
387 | memset(&cx, 0, sizeof(cx)); | |
388 | ||
50dd0969 | 389 | element = &(cst->package.elements[i]); |
1da177e4 LT |
390 | if (element->type != ACPI_TYPE_PACKAGE) |
391 | continue; | |
392 | ||
393 | if (element->package.count != 4) | |
394 | continue; | |
395 | ||
50dd0969 | 396 | obj = &(element->package.elements[0]); |
1da177e4 LT |
397 | |
398 | if (obj->type != ACPI_TYPE_BUFFER) | |
399 | continue; | |
400 | ||
4be44fcd | 401 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
402 | |
403 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 404 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
405 | continue; |
406 | ||
1da177e4 | 407 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 408 | obj = &(element->package.elements[1]); |
1da177e4 LT |
409 | if (obj->type != ACPI_TYPE_INTEGER) |
410 | continue; | |
411 | ||
412 | cx.type = obj->integer.value; | |
991528d7 VP |
413 | /* |
414 | * Some buggy BIOSes won't list C1 in _CST - | |
415 | * Let acpi_processor_get_power_info_default() handle them later | |
416 | */ | |
417 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
418 | current_count++; | |
419 | ||
420 | cx.address = reg->address; | |
421 | cx.index = current_count + 1; | |
422 | ||
bc71bec9 | 423 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
424 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
425 | if (acpi_processor_ffh_cstate_probe | |
426 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 427 | cx.entry_method = ACPI_CSTATE_FFH; |
428 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
429 | /* |
430 | * C1 is a special case where FIXED_HARDWARE | |
431 | * can be handled in non-MWAIT way as well. | |
432 | * In that case, save this _CST entry info. | |
991528d7 VP |
433 | * Otherwise, ignore this info and continue. |
434 | */ | |
bc71bec9 | 435 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 436 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 437 | } else { |
991528d7 VP |
438 | continue; |
439 | } | |
da5e09a1 | 440 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 441 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
442 | /* |
443 | * In most cases the C1 space_id obtained from | |
444 | * _CST object is FIXED_HARDWARE access mode. | |
445 | * But when the option of idle=halt is added, | |
446 | * the entry_method type should be changed from | |
447 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
448 | * When the option of idle=nomwait is added, |
449 | * the C1 entry_method type should be | |
450 | * CSTATE_HALT. | |
c1e3b377 ZY |
451 | */ |
452 | cx.entry_method = ACPI_CSTATE_HALT; | |
453 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
454 | } | |
4fcb2fcd VP |
455 | } else { |
456 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
457 | cx.address); | |
991528d7 | 458 | } |
1da177e4 | 459 | |
0fda6b40 VP |
460 | if (cx.type == ACPI_STATE_C1) { |
461 | cx.valid = 1; | |
462 | } | |
4fcb2fcd | 463 | |
50dd0969 | 464 | obj = &(element->package.elements[2]); |
1da177e4 LT |
465 | if (obj->type != ACPI_TYPE_INTEGER) |
466 | continue; | |
467 | ||
468 | cx.latency = obj->integer.value; | |
469 | ||
50dd0969 | 470 | obj = &(element->package.elements[3]); |
1da177e4 LT |
471 | if (obj->type != ACPI_TYPE_INTEGER) |
472 | continue; | |
473 | ||
cf824788 JM |
474 | current_count++; |
475 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
476 | ||
477 | /* | |
478 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
479 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
480 | */ | |
481 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
482 | printk(KERN_WARNING | |
483 | "Limiting number of power states to max (%d)\n", | |
484 | ACPI_PROCESSOR_MAX_POWER); | |
485 | printk(KERN_WARNING | |
486 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
487 | break; | |
488 | } | |
1da177e4 LT |
489 | } |
490 | ||
4be44fcd | 491 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 492 | current_count)); |
1da177e4 LT |
493 | |
494 | /* Validate number of power states discovered */ | |
cf824788 | 495 | if (current_count < 2) |
6d93c648 | 496 | status = -EFAULT; |
1da177e4 | 497 | |
4be44fcd | 498 | end: |
02438d87 | 499 | kfree(buffer.pointer); |
1da177e4 | 500 | |
d550d98d | 501 | return status; |
1da177e4 LT |
502 | } |
503 | ||
4be44fcd LB |
504 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
505 | struct acpi_processor_cx *cx) | |
1da177e4 | 506 | { |
ee1ca48f PV |
507 | static int bm_check_flag = -1; |
508 | static int bm_control_flag = -1; | |
02df8b93 | 509 | |
1da177e4 LT |
510 | |
511 | if (!cx->address) | |
d550d98d | 512 | return; |
1da177e4 | 513 | |
1da177e4 LT |
514 | /* |
515 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
516 | * DMA transfers are used by any ISA device to avoid livelock. | |
517 | * Note that we could disable Type-F DMA (as recommended by | |
518 | * the erratum), but this is known to disrupt certain ISA | |
519 | * devices thus we take the conservative approach. | |
520 | */ | |
521 | else if (errata.piix4.fdma) { | |
522 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 523 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 524 | return; |
1da177e4 LT |
525 | } |
526 | ||
02df8b93 | 527 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 528 | if (bm_check_flag == -1) { |
02df8b93 VP |
529 | /* Determine whether bm_check is needed based on CPU */ |
530 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
531 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 532 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
533 | } else { |
534 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 535 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
536 | } |
537 | ||
538 | if (pr->flags.bm_check) { | |
02df8b93 | 539 | if (!pr->flags.bm_control) { |
ed3110ef VP |
540 | if (pr->flags.has_cst != 1) { |
541 | /* bus mastering control is necessary */ | |
542 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
543 | "C3 support requires BM control\n")); | |
544 | return; | |
545 | } else { | |
546 | /* Here we enter C3 without bus mastering */ | |
547 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
548 | "C3 support without BM control\n")); | |
549 | } | |
02df8b93 VP |
550 | } |
551 | } else { | |
02df8b93 VP |
552 | /* |
553 | * WBINVD should be set in fadt, for C3 state to be | |
554 | * supported on when bm_check is not required. | |
555 | */ | |
cee324b1 | 556 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 557 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
558 | "Cache invalidation should work properly" |
559 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 560 | return; |
02df8b93 | 561 | } |
02df8b93 VP |
562 | } |
563 | ||
1da177e4 LT |
564 | /* |
565 | * Otherwise we've met all of our C3 requirements. | |
566 | * Normalize the C3 latency to expidite policy. Enable | |
567 | * checking of bus mastering status (bm_check) so we can | |
568 | * use this in our C3 policy | |
569 | */ | |
570 | cx->valid = 1; | |
4f86d3a8 | 571 | |
31878dd8 LB |
572 | /* |
573 | * On older chipsets, BM_RLD needs to be set | |
574 | * in order for Bus Master activity to wake the | |
575 | * system from C3. Newer chipsets handle DMA | |
576 | * during C3 automatically and BM_RLD is a NOP. | |
577 | * In either case, the proper way to | |
578 | * handle BM_RLD is to set it and leave it set. | |
579 | */ | |
50ffba1b | 580 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 581 | |
d550d98d | 582 | return; |
1da177e4 LT |
583 | } |
584 | ||
1da177e4 LT |
585 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
586 | { | |
587 | unsigned int i; | |
588 | unsigned int working = 0; | |
6eb0a0fd | 589 | |
169a0abb | 590 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 591 | |
a0bf284b | 592 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
593 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
594 | ||
595 | switch (cx->type) { | |
596 | case ACPI_STATE_C1: | |
597 | cx->valid = 1; | |
598 | break; | |
599 | ||
600 | case ACPI_STATE_C2: | |
d22edd29 LB |
601 | if (!cx->address) |
602 | break; | |
603 | cx->valid = 1; | |
1da177e4 LT |
604 | break; |
605 | ||
606 | case ACPI_STATE_C3: | |
607 | acpi_processor_power_verify_c3(pr, cx); | |
608 | break; | |
609 | } | |
7e275cc4 LB |
610 | if (!cx->valid) |
611 | continue; | |
1da177e4 | 612 | |
7e275cc4 LB |
613 | lapic_timer_check_state(i, pr, cx); |
614 | tsc_check_state(cx->type); | |
615 | working++; | |
1da177e4 | 616 | } |
bd663347 | 617 | |
918aae42 | 618 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
619 | |
620 | return (working); | |
621 | } | |
622 | ||
4be44fcd | 623 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
624 | { |
625 | unsigned int i; | |
626 | int result; | |
627 | ||
1da177e4 LT |
628 | |
629 | /* NOTE: the idle thread may not be running while calling | |
630 | * this function */ | |
631 | ||
991528d7 VP |
632 | /* Zero initialize all the C-states info. */ |
633 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
634 | ||
1da177e4 | 635 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 636 | if (result == -ENODEV) |
c5a114f1 | 637 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 638 | |
991528d7 VP |
639 | if (result) |
640 | return result; | |
641 | ||
642 | acpi_processor_get_power_info_default(pr); | |
643 | ||
cf824788 | 644 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 645 | |
1da177e4 LT |
646 | /* |
647 | * if one state of type C2 or C3 is available, mark this | |
648 | * CPU as being "idle manageable" | |
649 | */ | |
650 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 651 | if (pr->power.states[i].valid) { |
1da177e4 | 652 | pr->power.count = i; |
2203d6ed LT |
653 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
654 | pr->flags.power = 1; | |
acf05f4b | 655 | } |
1da177e4 LT |
656 | } |
657 | ||
d550d98d | 658 | return 0; |
1da177e4 LT |
659 | } |
660 | ||
4f86d3a8 LB |
661 | /** |
662 | * acpi_idle_bm_check - checks if bus master activity was detected | |
663 | */ | |
664 | static int acpi_idle_bm_check(void) | |
665 | { | |
666 | u32 bm_status = 0; | |
667 | ||
d3e7e99f LB |
668 | if (bm_check_disable) |
669 | return 0; | |
670 | ||
50ffba1b | 671 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 672 | if (bm_status) |
50ffba1b | 673 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
674 | /* |
675 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
676 | * the true state of bus mastering activity; forcing us to | |
677 | * manually check the BMIDEA bit of each IDE channel. | |
678 | */ | |
679 | else if (errata.piix4.bmisx) { | |
680 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
681 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
682 | bm_status = 1; | |
683 | } | |
684 | return bm_status; | |
685 | } | |
686 | ||
4f86d3a8 LB |
687 | /** |
688 | * acpi_idle_do_entry - a helper function that does C2 and C3 type entry | |
689 | * @cx: cstate data | |
bc71bec9 | 690 | * |
691 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 LB |
692 | */ |
693 | static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx) | |
694 | { | |
dcf30997 SR |
695 | /* Don't trace irqs off for idle */ |
696 | stop_critical_timings(); | |
bc71bec9 | 697 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
698 | /* Call into architectural FFH based C-state */ |
699 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 700 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
701 | acpi_safe_halt(); | |
4f86d3a8 | 702 | } else { |
4f86d3a8 LB |
703 | /* IO port based C-state */ |
704 | inb(cx->address); | |
705 | /* Dummy wait op - must do something useless after P_LVL2 read | |
706 | because chipsets cannot guarantee that STPCLK# signal | |
707 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 708 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 | 709 | } |
dcf30997 | 710 | start_critical_timings(); |
4f86d3a8 LB |
711 | } |
712 | ||
713 | /** | |
714 | * acpi_idle_enter_c1 - enters an ACPI C1 state-type | |
715 | * @dev: the target CPU | |
46bcfad7 | 716 | * @drv: cpuidle driver containing cpuidle state info |
e978aa7d | 717 | * @index: index of target state |
4f86d3a8 LB |
718 | * |
719 | * This is equivalent to the HALT instruction. | |
720 | */ | |
721 | static int acpi_idle_enter_c1(struct cpuidle_device *dev, | |
46bcfad7 | 722 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
723 | { |
724 | struct acpi_processor *pr; | |
ac3ebafa | 725 | struct acpi_processor_cx *cx = acpi_cstate[index]; |
9b12e18c | 726 | |
4a6f4fe8 | 727 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
728 | |
729 | if (unlikely(!pr)) | |
e978aa7d | 730 | return -EINVAL; |
4f86d3a8 | 731 | |
7e275cc4 | 732 | lapic_timer_state_broadcast(pr, cx, 1); |
bc71bec9 | 733 | acpi_idle_do_entry(cx); |
e978aa7d | 734 | |
7e275cc4 | 735 | lapic_timer_state_broadcast(pr, cx, 0); |
4f86d3a8 | 736 | |
e978aa7d | 737 | return index; |
4f86d3a8 LB |
738 | } |
739 | ||
1a022e3f BO |
740 | |
741 | /** | |
742 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
743 | * @dev: the target CPU | |
744 | * @index: the index of suggested state | |
745 | */ | |
746 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
747 | { | |
ac3ebafa | 748 | struct acpi_processor_cx *cx = acpi_cstate[index]; |
1a022e3f BO |
749 | |
750 | ACPI_FLUSH_CPU_CACHE(); | |
751 | ||
752 | while (1) { | |
753 | ||
754 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 755 | safe_halt(); |
1a022e3f BO |
756 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
757 | inb(cx->address); | |
758 | /* See comment in acpi_idle_do_entry() */ | |
759 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
760 | } else | |
761 | return -ENODEV; | |
762 | } | |
763 | ||
764 | /* Never reached */ | |
765 | return 0; | |
766 | } | |
767 | ||
4f86d3a8 LB |
768 | /** |
769 | * acpi_idle_enter_simple - enters an ACPI state without BM handling | |
770 | * @dev: the target CPU | |
46bcfad7 | 771 | * @drv: cpuidle driver with cpuidle state information |
e978aa7d | 772 | * @index: the index of suggested state |
4f86d3a8 LB |
773 | */ |
774 | static int acpi_idle_enter_simple(struct cpuidle_device *dev, | |
46bcfad7 | 775 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
776 | { |
777 | struct acpi_processor *pr; | |
ac3ebafa | 778 | struct acpi_processor_cx *cx = acpi_cstate[index]; |
50629118 | 779 | |
4a6f4fe8 | 780 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
781 | |
782 | if (unlikely(!pr)) | |
e978aa7d | 783 | return -EINVAL; |
e196441b | 784 | |
d306ebc2 PV |
785 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
786 | current_thread_info()->status &= ~TS_POLLING; | |
787 | /* | |
788 | * TS_POLLING-cleared state must be visible before we test | |
789 | * NEED_RESCHED: | |
790 | */ | |
791 | smp_mb(); | |
4f86d3a8 | 792 | |
02cf4f98 LB |
793 | if (unlikely(need_resched())) { |
794 | current_thread_info()->status |= TS_POLLING; | |
e978aa7d | 795 | return -EINVAL; |
02cf4f98 | 796 | } |
4f86d3a8 LB |
797 | } |
798 | ||
e17bcb43 TG |
799 | /* |
800 | * Must be done before busmaster disable as we might need to | |
801 | * access HPET ! | |
802 | */ | |
7e275cc4 | 803 | lapic_timer_state_broadcast(pr, cx, 1); |
e17bcb43 | 804 | |
4f86d3a8 LB |
805 | if (cx->type == ACPI_STATE_C3) |
806 | ACPI_FLUSH_CPU_CACHE(); | |
807 | ||
50629118 VP |
808 | /* Tell the scheduler that we are going deep-idle: */ |
809 | sched_clock_idle_sleep_event(); | |
4f86d3a8 | 810 | acpi_idle_do_entry(cx); |
4f86d3a8 | 811 | |
a474a515 | 812 | sched_clock_idle_wakeup_event(0); |
e978aa7d | 813 | |
02cf4f98 LB |
814 | if (cx->entry_method != ACPI_CSTATE_FFH) |
815 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 816 | |
7e275cc4 | 817 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 818 | return index; |
4f86d3a8 LB |
819 | } |
820 | ||
821 | static int c3_cpu_count; | |
e12f65f7 | 822 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
823 | |
824 | /** | |
825 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
826 | * @dev: the target CPU | |
46bcfad7 | 827 | * @drv: cpuidle driver containing state data |
e978aa7d | 828 | * @index: the index of suggested state |
4f86d3a8 LB |
829 | * |
830 | * If BM is detected, the deepest non-C3 idle state is entered instead. | |
831 | */ | |
832 | static int acpi_idle_enter_bm(struct cpuidle_device *dev, | |
46bcfad7 | 833 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
834 | { |
835 | struct acpi_processor *pr; | |
ac3ebafa | 836 | struct acpi_processor_cx *cx = acpi_cstate[index]; |
50629118 | 837 | |
4a6f4fe8 | 838 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
839 | |
840 | if (unlikely(!pr)) | |
e978aa7d | 841 | return -EINVAL; |
4f86d3a8 | 842 | |
718be4aa | 843 | if (!cx->bm_sts_skip && acpi_idle_bm_check()) { |
46bcfad7 DD |
844 | if (drv->safe_state_index >= 0) { |
845 | return drv->states[drv->safe_state_index].enter(dev, | |
846 | drv, drv->safe_state_index); | |
ddc081a1 | 847 | } else { |
8651f97b | 848 | acpi_safe_halt(); |
75cc5235 | 849 | return -EBUSY; |
ddc081a1 VP |
850 | } |
851 | } | |
852 | ||
d306ebc2 PV |
853 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
854 | current_thread_info()->status &= ~TS_POLLING; | |
855 | /* | |
856 | * TS_POLLING-cleared state must be visible before we test | |
857 | * NEED_RESCHED: | |
858 | */ | |
859 | smp_mb(); | |
4f86d3a8 | 860 | |
02cf4f98 LB |
861 | if (unlikely(need_resched())) { |
862 | current_thread_info()->status |= TS_POLLING; | |
e978aa7d | 863 | return -EINVAL; |
02cf4f98 | 864 | } |
4f86d3a8 LB |
865 | } |
866 | ||
996520c1 VP |
867 | acpi_unlazy_tlb(smp_processor_id()); |
868 | ||
50629118 VP |
869 | /* Tell the scheduler that we are going deep-idle: */ |
870 | sched_clock_idle_sleep_event(); | |
4f86d3a8 LB |
871 | /* |
872 | * Must be done before busmaster disable as we might need to | |
873 | * access HPET ! | |
874 | */ | |
7e275cc4 | 875 | lapic_timer_state_broadcast(pr, cx, 1); |
4f86d3a8 | 876 | |
ddc081a1 VP |
877 | /* |
878 | * disable bus master | |
879 | * bm_check implies we need ARB_DIS | |
880 | * !bm_check implies we need cache flush | |
881 | * bm_control implies whether we can do ARB_DIS | |
882 | * | |
883 | * That leaves a case where bm_check is set and bm_control is | |
884 | * not set. In that case we cannot do much, we enter C3 | |
885 | * without doing anything. | |
886 | */ | |
887 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 888 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
889 | c3_cpu_count++; |
890 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
891 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 892 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 893 | raw_spin_unlock(&c3_lock); |
ddc081a1 VP |
894 | } else if (!pr->flags.bm_check) { |
895 | ACPI_FLUSH_CPU_CACHE(); | |
896 | } | |
4f86d3a8 | 897 | |
ddc081a1 | 898 | acpi_idle_do_entry(cx); |
4f86d3a8 | 899 | |
ddc081a1 VP |
900 | /* Re-enable bus master arbitration */ |
901 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 902 | raw_spin_lock(&c3_lock); |
50ffba1b | 903 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 904 | c3_cpu_count--; |
e12f65f7 | 905 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 906 | } |
e978aa7d | 907 | |
a474a515 | 908 | sched_clock_idle_wakeup_event(0); |
4f86d3a8 | 909 | |
02cf4f98 LB |
910 | if (cx->entry_method != ACPI_CSTATE_FFH) |
911 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 912 | |
7e275cc4 | 913 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 914 | return index; |
4f86d3a8 LB |
915 | } |
916 | ||
917 | struct cpuidle_driver acpi_idle_driver = { | |
918 | .name = "acpi_idle", | |
919 | .owner = THIS_MODULE, | |
a474a515 | 920 | .en_core_tk_irqen = 1, |
4f86d3a8 LB |
921 | }; |
922 | ||
923 | /** | |
46bcfad7 DD |
924 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
925 | * device i.e. per-cpu data | |
926 | * | |
4f86d3a8 | 927 | * @pr: the ACPI processor |
6ef0f086 | 928 | * @dev : the cpuidle device |
4f86d3a8 | 929 | */ |
6ef0f086 DL |
930 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, |
931 | struct cpuidle_device *dev) | |
4f86d3a8 | 932 | { |
9a0b8415 | 933 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 934 | struct acpi_processor_cx *cx; |
4f86d3a8 LB |
935 | |
936 | if (!pr->flags.power_setup_done) | |
937 | return -EINVAL; | |
938 | ||
939 | if (pr->flags.power == 0) { | |
940 | return -EINVAL; | |
941 | } | |
942 | ||
b88a634a KRW |
943 | if (!dev) |
944 | return -EINVAL; | |
945 | ||
dcb84f33 | 946 | dev->cpu = pr->id; |
4fcb2fcd | 947 | |
615dfd93 LB |
948 | if (max_cstate == 0) |
949 | max_cstate = 1; | |
950 | ||
4f86d3a8 LB |
951 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
952 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
953 | |
954 | if (!cx->valid) | |
955 | continue; | |
956 | ||
957 | #ifdef CONFIG_HOTPLUG_CPU | |
958 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
959 | !pr->flags.has_cst && | |
960 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
961 | continue; | |
1fec74a9 | 962 | #endif |
ac3ebafa | 963 | acpi_cstate[count] = cx; |
4f86d3a8 | 964 | |
46bcfad7 DD |
965 | count++; |
966 | if (count == CPUIDLE_STATE_MAX) | |
967 | break; | |
968 | } | |
969 | ||
970 | dev->state_count = count; | |
971 | ||
972 | if (!count) | |
973 | return -EINVAL; | |
974 | ||
975 | return 0; | |
976 | } | |
977 | ||
978 | /** | |
979 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
980 | * global state data i.e. idle routines | |
981 | * | |
982 | * @pr: the ACPI processor | |
983 | */ | |
984 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
985 | { | |
986 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
987 | struct acpi_processor_cx *cx; | |
988 | struct cpuidle_state *state; | |
989 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
990 | ||
991 | if (!pr->flags.power_setup_done) | |
992 | return -EINVAL; | |
993 | ||
994 | if (pr->flags.power == 0) | |
995 | return -EINVAL; | |
996 | ||
997 | drv->safe_state_index = -1; | |
4fcb2fcd | 998 | for (i = 0; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
999 | drv->states[i].name[0] = '\0'; |
1000 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
1001 | } |
1002 | ||
615dfd93 LB |
1003 | if (max_cstate == 0) |
1004 | max_cstate = 1; | |
1005 | ||
4f86d3a8 LB |
1006 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1007 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
1008 | |
1009 | if (!cx->valid) | |
1010 | continue; | |
1011 | ||
1012 | #ifdef CONFIG_HOTPLUG_CPU | |
1013 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1014 | !pr->flags.has_cst && | |
1015 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
1016 | continue; | |
1fec74a9 | 1017 | #endif |
4f86d3a8 | 1018 | |
46bcfad7 | 1019 | state = &drv->states[count]; |
4f86d3a8 | 1020 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 1021 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 1022 | state->exit_latency = cx->latency; |
4963f620 | 1023 | state->target_residency = cx->latency * latency_factor; |
4f86d3a8 LB |
1024 | |
1025 | state->flags = 0; | |
1026 | switch (cx->type) { | |
1027 | case ACPI_STATE_C1: | |
8e92b660 VP |
1028 | if (cx->entry_method == ACPI_CSTATE_FFH) |
1029 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | |
1030 | ||
4f86d3a8 | 1031 | state->enter = acpi_idle_enter_c1; |
1a022e3f | 1032 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1033 | drv->safe_state_index = count; |
4f86d3a8 LB |
1034 | break; |
1035 | ||
1036 | case ACPI_STATE_C2: | |
4f86d3a8 LB |
1037 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
1038 | state->enter = acpi_idle_enter_simple; | |
1a022e3f | 1039 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1040 | drv->safe_state_index = count; |
4f86d3a8 LB |
1041 | break; |
1042 | ||
1043 | case ACPI_STATE_C3: | |
4f86d3a8 | 1044 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
4f86d3a8 LB |
1045 | state->enter = pr->flags.bm_check ? |
1046 | acpi_idle_enter_bm : | |
1047 | acpi_idle_enter_simple; | |
1048 | break; | |
1049 | } | |
1050 | ||
1051 | count++; | |
9a0b8415 | 1052 | if (count == CPUIDLE_STATE_MAX) |
1053 | break; | |
4f86d3a8 LB |
1054 | } |
1055 | ||
46bcfad7 | 1056 | drv->state_count = count; |
4f86d3a8 LB |
1057 | |
1058 | if (!count) | |
1059 | return -EINVAL; | |
1060 | ||
4f86d3a8 LB |
1061 | return 0; |
1062 | } | |
1063 | ||
46bcfad7 | 1064 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 1065 | { |
dcb84f33 | 1066 | int ret = 0; |
e8b1b59d | 1067 | struct cpuidle_device *dev; |
4f86d3a8 | 1068 | |
d1896049 | 1069 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1070 | return 0; |
1071 | ||
4f86d3a8 LB |
1072 | if (!pr) |
1073 | return -EINVAL; | |
1074 | ||
1075 | if (nocst) { | |
1076 | return -ENODEV; | |
1077 | } | |
1078 | ||
1079 | if (!pr->flags.power_setup_done) | |
1080 | return -ENODEV; | |
1081 | ||
e8b1b59d | 1082 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 1083 | cpuidle_pause_and_lock(); |
3d339dcb | 1084 | cpuidle_disable_device(dev); |
4f86d3a8 | 1085 | acpi_processor_get_power_info(pr); |
dcb84f33 | 1086 | if (pr->flags.power) { |
6ef0f086 | 1087 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1088 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 1089 | } |
4f86d3a8 LB |
1090 | cpuidle_resume_and_unlock(); |
1091 | ||
1092 | return ret; | |
1093 | } | |
1094 | ||
46bcfad7 DD |
1095 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1096 | { | |
1097 | int cpu; | |
1098 | struct acpi_processor *_pr; | |
3d339dcb | 1099 | struct cpuidle_device *dev; |
46bcfad7 DD |
1100 | |
1101 | if (disabled_by_idle_boot_param()) | |
1102 | return 0; | |
1103 | ||
1104 | if (!pr) | |
1105 | return -EINVAL; | |
1106 | ||
1107 | if (nocst) | |
1108 | return -ENODEV; | |
1109 | ||
1110 | if (!pr->flags.power_setup_done) | |
1111 | return -ENODEV; | |
1112 | ||
1113 | /* | |
1114 | * FIXME: Design the ACPI notification to make it once per | |
1115 | * system instead of once per-cpu. This condition is a hack | |
1116 | * to make the code that updates C-States be called once. | |
1117 | */ | |
1118 | ||
9505626d | 1119 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 DD |
1120 | |
1121 | cpuidle_pause_and_lock(); | |
1122 | /* Protect against cpu-hotplug */ | |
1123 | get_online_cpus(); | |
1124 | ||
1125 | /* Disable all cpuidle devices */ | |
1126 | for_each_online_cpu(cpu) { | |
1127 | _pr = per_cpu(processors, cpu); | |
1128 | if (!_pr || !_pr->flags.power_setup_done) | |
1129 | continue; | |
3d339dcb DL |
1130 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1131 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1132 | } |
1133 | ||
1134 | /* Populate Updated C-state information */ | |
f427e5f1 | 1135 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1136 | acpi_processor_setup_cpuidle_states(pr); |
1137 | ||
1138 | /* Enable all cpuidle devices */ | |
1139 | for_each_online_cpu(cpu) { | |
1140 | _pr = per_cpu(processors, cpu); | |
1141 | if (!_pr || !_pr->flags.power_setup_done) | |
1142 | continue; | |
1143 | acpi_processor_get_power_info(_pr); | |
1144 | if (_pr->flags.power) { | |
3d339dcb | 1145 | dev = per_cpu(acpi_cpuidle_device, cpu); |
6ef0f086 | 1146 | acpi_processor_setup_cpuidle_cx(_pr, dev); |
3d339dcb | 1147 | cpuidle_enable_device(dev); |
46bcfad7 DD |
1148 | } |
1149 | } | |
1150 | put_online_cpus(); | |
1151 | cpuidle_resume_and_unlock(); | |
1152 | } | |
1153 | ||
1154 | return 0; | |
1155 | } | |
1156 | ||
1157 | static int acpi_processor_registered; | |
1158 | ||
38a991b6 | 1159 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1160 | { |
4be44fcd | 1161 | acpi_status status = 0; |
46bcfad7 | 1162 | int retval; |
3d339dcb | 1163 | struct cpuidle_device *dev; |
b6835052 | 1164 | static int first_run; |
1da177e4 | 1165 | |
d1896049 | 1166 | if (disabled_by_idle_boot_param()) |
36a91358 | 1167 | return 0; |
1da177e4 LT |
1168 | |
1169 | if (!first_run) { | |
1170 | dmi_check_system(processor_power_dmi_table); | |
c1c30634 | 1171 | max_cstate = acpi_processor_cstate_check(max_cstate); |
1da177e4 | 1172 | if (max_cstate < ACPI_C_STATES_MAX) |
4be44fcd LB |
1173 | printk(KERN_NOTICE |
1174 | "ACPI: processor limited to max C-state %d\n", | |
1175 | max_cstate); | |
1da177e4 LT |
1176 | first_run++; |
1177 | } | |
1178 | ||
02df8b93 | 1179 | if (!pr) |
d550d98d | 1180 | return -EINVAL; |
02df8b93 | 1181 | |
cee324b1 | 1182 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1183 | status = |
cee324b1 | 1184 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1185 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1186 | ACPI_EXCEPTION((AE_INFO, status, |
1187 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1188 | } |
1189 | } | |
1190 | ||
1191 | acpi_processor_get_power_info(pr); | |
4f86d3a8 | 1192 | pr->flags.power_setup_done = 1; |
1da177e4 LT |
1193 | |
1194 | /* | |
1195 | * Install the idle handler if processor power management is supported. | |
1196 | * Note that we use previously set idle handler will be used on | |
1197 | * platforms that only support C1. | |
1198 | */ | |
36a91358 | 1199 | if (pr->flags.power) { |
46bcfad7 DD |
1200 | /* Register acpi_idle_driver if not already registered */ |
1201 | if (!acpi_processor_registered) { | |
1202 | acpi_processor_setup_cpuidle_states(pr); | |
1203 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1204 | if (retval) | |
1205 | return retval; | |
1206 | printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", | |
1207 | acpi_idle_driver.name); | |
1208 | } | |
3d339dcb DL |
1209 | |
1210 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1211 | if (!dev) | |
1212 | return -ENOMEM; | |
1213 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1214 | ||
6ef0f086 | 1215 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1216 | |
46bcfad7 DD |
1217 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1218 | * must already be registered before registering device | |
1219 | */ | |
3d339dcb | 1220 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1221 | if (retval) { |
1222 | if (acpi_processor_registered == 0) | |
1223 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1224 | return retval; | |
1225 | } | |
1226 | acpi_processor_registered++; | |
1da177e4 | 1227 | } |
d550d98d | 1228 | return 0; |
1da177e4 LT |
1229 | } |
1230 | ||
38a991b6 | 1231 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1232 | { |
3d339dcb DL |
1233 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1234 | ||
d1896049 | 1235 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1236 | return 0; |
1237 | ||
46bcfad7 | 1238 | if (pr->flags.power) { |
3d339dcb | 1239 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1240 | acpi_processor_registered--; |
1241 | if (acpi_processor_registered == 0) | |
1242 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1243 | } | |
1da177e4 | 1244 | |
46bcfad7 | 1245 | pr->flags.power_setup_done = 0; |
d550d98d | 1246 | return 0; |
1da177e4 | 1247 | } |