Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
35 | #include <linux/proc_fs.h> | |
36 | #include <linux/seq_file.h> | |
37 | #include <linux/acpi.h> | |
38 | #include <linux/dmi.h> | |
39 | #include <linux/moduleparam.h> | |
4e57b681 | 40 | #include <linux/sched.h> /* need_resched() */ |
5c87579e | 41 | #include <linux/latency.h> |
e9e2cdb4 | 42 | #include <linux/clockchips.h> |
1da177e4 | 43 | |
3434933b TG |
44 | /* |
45 | * Include the apic definitions for x86 to have the APIC timer related defines | |
46 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
47 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
48 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
49 | */ | |
50 | #ifdef CONFIG_X86 | |
51 | #include <asm/apic.h> | |
52 | #endif | |
53 | ||
1da177e4 LT |
54 | #include <asm/io.h> |
55 | #include <asm/uaccess.h> | |
56 | ||
57 | #include <acpi/acpi_bus.h> | |
58 | #include <acpi/processor.h> | |
59 | ||
60 | #define ACPI_PROCESSOR_COMPONENT 0x01000000 | |
61 | #define ACPI_PROCESSOR_CLASS "processor" | |
1da177e4 | 62 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 63 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 64 | #define ACPI_PROCESSOR_FILE_POWER "power" |
1da177e4 | 65 | #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000) |
2aa44d05 | 66 | #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY) |
1da177e4 LT |
67 | #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */ |
68 | #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
b6835052 | 69 | static void (*pm_idle_save) (void) __read_mostly; |
1da177e4 LT |
70 | module_param(max_cstate, uint, 0644); |
71 | ||
b6835052 | 72 | static unsigned int nocst __read_mostly; |
1da177e4 LT |
73 | module_param(nocst, uint, 0000); |
74 | ||
75 | /* | |
76 | * bm_history -- bit-mask with a bit per jiffy of bus-master activity | |
77 | * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms | |
78 | * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms | |
79 | * 100 HZ: 0x0000000F: 4 jiffies = 40ms | |
80 | * reduce history for more aggressive entry into C3 | |
81 | */ | |
b6835052 | 82 | static unsigned int bm_history __read_mostly = |
4be44fcd | 83 | (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1)); |
1da177e4 LT |
84 | module_param(bm_history, uint, 0644); |
85 | /* -------------------------------------------------------------------------- | |
86 | Power Management | |
87 | -------------------------------------------------------------------------- */ | |
88 | ||
89 | /* | |
90 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
91 | * For now disable this. Probably a bug somewhere else. | |
92 | * | |
93 | * To skip this limit, boot/load with a large max_cstate limit. | |
94 | */ | |
335f16be | 95 | static int set_max_cstate(struct dmi_system_id *id) |
1da177e4 LT |
96 | { |
97 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
98 | return 0; | |
99 | ||
3d35600a | 100 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
101 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
102 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 103 | |
3d35600a | 104 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
105 | |
106 | return 0; | |
107 | } | |
108 | ||
7ded5689 AR |
109 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
110 | callers to only run once -AK */ | |
111 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
f831335d BS |
112 | { set_max_cstate, "IBM ThinkPad R40e", { |
113 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
114 | DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1}, | |
876c184b TR |
115 | { set_max_cstate, "IBM ThinkPad R40e", { |
116 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
117 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1}, | |
118 | { set_max_cstate, "IBM ThinkPad R40e", { | |
119 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
120 | DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1}, | |
121 | { set_max_cstate, "IBM ThinkPad R40e", { | |
122 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
123 | DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1}, | |
124 | { set_max_cstate, "IBM ThinkPad R40e", { | |
125 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
126 | DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1}, | |
127 | { set_max_cstate, "IBM ThinkPad R40e", { | |
128 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
129 | DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1}, | |
130 | { set_max_cstate, "IBM ThinkPad R40e", { | |
131 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
132 | DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1}, | |
133 | { set_max_cstate, "IBM ThinkPad R40e", { | |
134 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
135 | DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1}, | |
136 | { set_max_cstate, "IBM ThinkPad R40e", { | |
137 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
138 | DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1}, | |
139 | { set_max_cstate, "IBM ThinkPad R40e", { | |
140 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
141 | DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1}, | |
142 | { set_max_cstate, "IBM ThinkPad R40e", { | |
143 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
144 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1}, | |
145 | { set_max_cstate, "IBM ThinkPad R40e", { | |
146 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
147 | DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1}, | |
148 | { set_max_cstate, "IBM ThinkPad R40e", { | |
149 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
150 | DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1}, | |
151 | { set_max_cstate, "IBM ThinkPad R40e", { | |
152 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
153 | DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1}, | |
154 | { set_max_cstate, "IBM ThinkPad R40e", { | |
155 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
156 | DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1}, | |
157 | { set_max_cstate, "IBM ThinkPad R40e", { | |
158 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
159 | DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1}, | |
160 | { set_max_cstate, "Medion 41700", { | |
161 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
162 | DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, | |
163 | { set_max_cstate, "Clevo 5600D", { | |
164 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
165 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 166 | (void *)2}, |
1da177e4 LT |
167 | {}, |
168 | }; | |
169 | ||
4be44fcd | 170 | static inline u32 ticks_elapsed(u32 t1, u32 t2) |
1da177e4 LT |
171 | { |
172 | if (t2 >= t1) | |
173 | return (t2 - t1); | |
cee324b1 | 174 | else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER)) |
1da177e4 LT |
175 | return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF); |
176 | else | |
177 | return ((0xFFFFFFFF - t1) + t2); | |
178 | } | |
179 | ||
1da177e4 | 180 | static void |
4be44fcd LB |
181 | acpi_processor_power_activate(struct acpi_processor *pr, |
182 | struct acpi_processor_cx *new) | |
1da177e4 | 183 | { |
4be44fcd | 184 | struct acpi_processor_cx *old; |
1da177e4 LT |
185 | |
186 | if (!pr || !new) | |
187 | return; | |
188 | ||
189 | old = pr->power.state; | |
190 | ||
191 | if (old) | |
192 | old->promotion.count = 0; | |
4be44fcd | 193 | new->demotion.count = 0; |
1da177e4 LT |
194 | |
195 | /* Cleanup from old state. */ | |
196 | if (old) { | |
197 | switch (old->type) { | |
198 | case ACPI_STATE_C3: | |
199 | /* Disable bus master reload */ | |
02df8b93 | 200 | if (new->type != ACPI_STATE_C3 && pr->flags.bm_check) |
d8c71b6d | 201 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0); |
1da177e4 LT |
202 | break; |
203 | } | |
204 | } | |
205 | ||
206 | /* Prepare to use new state. */ | |
207 | switch (new->type) { | |
208 | case ACPI_STATE_C3: | |
209 | /* Enable bus master reload */ | |
02df8b93 | 210 | if (old->type != ACPI_STATE_C3 && pr->flags.bm_check) |
d8c71b6d | 211 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 LT |
212 | break; |
213 | } | |
214 | ||
215 | pr->power.state = new; | |
216 | ||
217 | return; | |
218 | } | |
219 | ||
64c7c8f8 NP |
220 | static void acpi_safe_halt(void) |
221 | { | |
495ab9c0 | 222 | current_thread_info()->status &= ~TS_POLLING; |
0888f06a IM |
223 | /* |
224 | * TS_POLLING-cleared state must be visible before we | |
225 | * test NEED_RESCHED: | |
226 | */ | |
227 | smp_mb(); | |
64c7c8f8 NP |
228 | if (!need_resched()) |
229 | safe_halt(); | |
495ab9c0 | 230 | current_thread_info()->status |= TS_POLLING; |
64c7c8f8 NP |
231 | } |
232 | ||
4be44fcd | 233 | static atomic_t c3_cpu_count; |
1da177e4 | 234 | |
991528d7 VP |
235 | /* Common C-state entry for C2, C3, .. */ |
236 | static void acpi_cstate_enter(struct acpi_processor_cx *cstate) | |
237 | { | |
238 | if (cstate->space_id == ACPI_CSTATE_FFH) { | |
239 | /* Call into architectural FFH based C-state */ | |
240 | acpi_processor_ffh_cstate_enter(cstate); | |
241 | } else { | |
242 | int unused; | |
243 | /* IO port based C-state */ | |
244 | inb(cstate->address); | |
245 | /* Dummy wait op - must do something useless after P_LVL2 read | |
246 | because chipsets cannot guarantee that STPCLK# signal | |
247 | gets asserted in time to freeze execution properly. */ | |
cee324b1 | 248 | unused = inl(acpi_gbl_FADT.xpm_timer_block.address); |
991528d7 VP |
249 | } |
250 | } | |
251 | ||
169a0abb TG |
252 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
253 | ||
254 | /* | |
255 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
256 | * This seems to be a common problem on AMD boxen, but other vendors |
257 | * are affected too. We pick the most conservative approach: we assume | |
258 | * that the local APIC stops in both C2 and C3. | |
169a0abb TG |
259 | */ |
260 | static void acpi_timer_check_state(int state, struct acpi_processor *pr, | |
261 | struct acpi_processor_cx *cx) | |
262 | { | |
263 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 264 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb TG |
265 | |
266 | /* | |
267 | * Check, if one of the previous states already marked the lapic | |
268 | * unstable | |
269 | */ | |
270 | if (pwr->timer_broadcast_on_state < state) | |
271 | return; | |
272 | ||
e585bef8 | 273 | if (cx->type >= type) |
296d93cd | 274 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
275 | } |
276 | ||
277 | static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) | |
278 | { | |
e9e2cdb4 TG |
279 | #ifdef CONFIG_GENERIC_CLOCKEVENTS |
280 | unsigned long reason; | |
281 | ||
282 | reason = pr->power.timer_broadcast_on_state < INT_MAX ? | |
283 | CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; | |
284 | ||
285 | clockevents_notify(reason, &pr->id); | |
286 | #else | |
169a0abb TG |
287 | cpumask_t mask = cpumask_of_cpu(pr->id); |
288 | ||
296d93cd | 289 | if (pr->power.timer_broadcast_on_state < INT_MAX) |
169a0abb | 290 | on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1); |
296d93cd | 291 | else |
169a0abb | 292 | on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1); |
e9e2cdb4 TG |
293 | #endif |
294 | } | |
295 | ||
296 | /* Power(C) State timer broadcast control */ | |
297 | static void acpi_state_timer_broadcast(struct acpi_processor *pr, | |
298 | struct acpi_processor_cx *cx, | |
299 | int broadcast) | |
300 | { | |
301 | #ifdef CONFIG_GENERIC_CLOCKEVENTS | |
302 | ||
303 | int state = cx - pr->power.states; | |
304 | ||
305 | if (state >= pr->power.timer_broadcast_on_state) { | |
306 | unsigned long reason; | |
307 | ||
308 | reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : | |
309 | CLOCK_EVT_NOTIFY_BROADCAST_EXIT; | |
310 | clockevents_notify(reason, &pr->id); | |
311 | } | |
312 | #endif | |
169a0abb TG |
313 | } |
314 | ||
315 | #else | |
316 | ||
317 | static void acpi_timer_check_state(int state, struct acpi_processor *pr, | |
318 | struct acpi_processor_cx *cstate) { } | |
319 | static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { } | |
e9e2cdb4 TG |
320 | static void acpi_state_timer_broadcast(struct acpi_processor *pr, |
321 | struct acpi_processor_cx *cx, | |
322 | int broadcast) | |
323 | { | |
324 | } | |
169a0abb TG |
325 | |
326 | #endif | |
327 | ||
b04e7bdb TG |
328 | /* |
329 | * Suspend / resume control | |
330 | */ | |
331 | static int acpi_idle_suspend; | |
332 | ||
333 | int acpi_processor_suspend(struct acpi_device * device, pm_message_t state) | |
334 | { | |
335 | acpi_idle_suspend = 1; | |
336 | return 0; | |
337 | } | |
338 | ||
339 | int acpi_processor_resume(struct acpi_device * device) | |
340 | { | |
341 | acpi_idle_suspend = 0; | |
342 | return 0; | |
343 | } | |
344 | ||
4be44fcd | 345 | static void acpi_processor_idle(void) |
1da177e4 | 346 | { |
4be44fcd | 347 | struct acpi_processor *pr = NULL; |
1da177e4 LT |
348 | struct acpi_processor_cx *cx = NULL; |
349 | struct acpi_processor_cx *next_state = NULL; | |
4be44fcd LB |
350 | int sleep_ticks = 0; |
351 | u32 t1, t2 = 0; | |
1da177e4 | 352 | |
1da177e4 LT |
353 | /* |
354 | * Interrupts must be disabled during bus mastering calculations and | |
355 | * for C2/C3 transitions. | |
356 | */ | |
357 | local_irq_disable(); | |
358 | ||
d5a3d32a VP |
359 | pr = processors[smp_processor_id()]; |
360 | if (!pr) { | |
361 | local_irq_enable(); | |
362 | return; | |
363 | } | |
364 | ||
1da177e4 LT |
365 | /* |
366 | * Check whether we truly need to go idle, or should | |
367 | * reschedule: | |
368 | */ | |
369 | if (unlikely(need_resched())) { | |
370 | local_irq_enable(); | |
371 | return; | |
372 | } | |
373 | ||
374 | cx = pr->power.state; | |
b04e7bdb | 375 | if (!cx || acpi_idle_suspend) { |
64c7c8f8 NP |
376 | if (pm_idle_save) |
377 | pm_idle_save(); | |
378 | else | |
379 | acpi_safe_halt(); | |
380 | return; | |
381 | } | |
1da177e4 LT |
382 | |
383 | /* | |
384 | * Check BM Activity | |
385 | * ----------------- | |
386 | * Check for bus mastering activity (if required), record, and check | |
387 | * for demotion. | |
388 | */ | |
389 | if (pr->flags.bm_check) { | |
4be44fcd LB |
390 | u32 bm_status = 0; |
391 | unsigned long diff = jiffies - pr->power.bm_check_timestamp; | |
1da177e4 | 392 | |
c5ab81ca DB |
393 | if (diff > 31) |
394 | diff = 31; | |
1da177e4 | 395 | |
c5ab81ca | 396 | pr->power.bm_activity <<= diff; |
1da177e4 | 397 | |
d8c71b6d | 398 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
1da177e4 | 399 | if (bm_status) { |
c5ab81ca | 400 | pr->power.bm_activity |= 0x1; |
d8c71b6d | 401 | acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
1da177e4 LT |
402 | } |
403 | /* | |
404 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
405 | * the true state of bus mastering activity; forcing us to | |
406 | * manually check the BMIDEA bit of each IDE channel. | |
407 | */ | |
408 | else if (errata.piix4.bmisx) { | |
409 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
4be44fcd | 410 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) |
c5ab81ca | 411 | pr->power.bm_activity |= 0x1; |
1da177e4 LT |
412 | } |
413 | ||
414 | pr->power.bm_check_timestamp = jiffies; | |
415 | ||
416 | /* | |
c4a001b1 | 417 | * If bus mastering is or was active this jiffy, demote |
1da177e4 LT |
418 | * to avoid a faulty transition. Note that the processor |
419 | * won't enter a low-power state during this call (to this | |
c4a001b1 | 420 | * function) but should upon the next. |
1da177e4 LT |
421 | * |
422 | * TBD: A better policy might be to fallback to the demotion | |
423 | * state (use it for this quantum only) istead of | |
424 | * demoting -- and rely on duration as our sole demotion | |
425 | * qualification. This may, however, introduce DMA | |
426 | * issues (e.g. floppy DMA transfer overrun/underrun). | |
427 | */ | |
c4a001b1 DB |
428 | if ((pr->power.bm_activity & 0x1) && |
429 | cx->demotion.threshold.bm) { | |
1da177e4 LT |
430 | local_irq_enable(); |
431 | next_state = cx->demotion.state; | |
432 | goto end; | |
433 | } | |
434 | } | |
435 | ||
4c033552 VP |
436 | #ifdef CONFIG_HOTPLUG_CPU |
437 | /* | |
438 | * Check for P_LVL2_UP flag before entering C2 and above on | |
439 | * an SMP system. We do it here instead of doing it at _CST/P_LVL | |
440 | * detection phase, to work cleanly with logical CPU hotplug. | |
441 | */ | |
442 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
cee324b1 | 443 | !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
1e483969 | 444 | cx = &pr->power.states[ACPI_STATE_C1]; |
4c033552 | 445 | #endif |
1e483969 | 446 | |
1da177e4 LT |
447 | /* |
448 | * Sleep: | |
449 | * ------ | |
450 | * Invoke the current Cx state to put the processor to sleep. | |
451 | */ | |
2a298a35 | 452 | if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) { |
495ab9c0 | 453 | current_thread_info()->status &= ~TS_POLLING; |
0888f06a IM |
454 | /* |
455 | * TS_POLLING-cleared state must be visible before we | |
456 | * test NEED_RESCHED: | |
457 | */ | |
458 | smp_mb(); | |
2a298a35 | 459 | if (need_resched()) { |
495ab9c0 | 460 | current_thread_info()->status |= TS_POLLING; |
af2eb17b | 461 | local_irq_enable(); |
2a298a35 NP |
462 | return; |
463 | } | |
464 | } | |
465 | ||
1da177e4 LT |
466 | switch (cx->type) { |
467 | ||
468 | case ACPI_STATE_C1: | |
469 | /* | |
470 | * Invoke C1. | |
471 | * Use the appropriate idle routine, the one that would | |
472 | * be used without acpi C-states. | |
473 | */ | |
474 | if (pm_idle_save) | |
475 | pm_idle_save(); | |
476 | else | |
64c7c8f8 NP |
477 | acpi_safe_halt(); |
478 | ||
1da177e4 | 479 | /* |
4be44fcd | 480 | * TBD: Can't get time duration while in C1, as resumes |
1da177e4 LT |
481 | * go to an ISR rather than here. Need to instrument |
482 | * base interrupt handler. | |
2aa44d05 IM |
483 | * |
484 | * Note: the TSC better not stop in C1, sched_clock() will | |
485 | * skew otherwise. | |
1da177e4 LT |
486 | */ |
487 | sleep_ticks = 0xFFFFFFFF; | |
488 | break; | |
489 | ||
490 | case ACPI_STATE_C2: | |
491 | /* Get start time (ticks) */ | |
cee324b1 | 492 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
2aa44d05 IM |
493 | /* Tell the scheduler that we are going deep-idle: */ |
494 | sched_clock_idle_sleep_event(); | |
1da177e4 | 495 | /* Invoke C2 */ |
e9e2cdb4 | 496 | acpi_state_timer_broadcast(pr, cx, 1); |
991528d7 | 497 | acpi_cstate_enter(cx); |
1da177e4 | 498 | /* Get end time (ticks) */ |
cee324b1 | 499 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
539eb11e | 500 | |
0aa366f3 | 501 | #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC) |
539eb11e | 502 | /* TSC halts in C2, so notify users */ |
5a90cf20 | 503 | mark_tsc_unstable("possible TSC halt in C2"); |
539eb11e | 504 | #endif |
2aa44d05 IM |
505 | /* Compute time (ticks) that we were actually asleep */ |
506 | sleep_ticks = ticks_elapsed(t1, t2); | |
507 | ||
508 | /* Tell the scheduler how much we idled: */ | |
509 | sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS); | |
510 | ||
1da177e4 LT |
511 | /* Re-enable interrupts */ |
512 | local_irq_enable(); | |
2aa44d05 IM |
513 | /* Do not account our idle-switching overhead: */ |
514 | sleep_ticks -= cx->latency_ticks + C2_OVERHEAD; | |
515 | ||
495ab9c0 | 516 | current_thread_info()->status |= TS_POLLING; |
e9e2cdb4 | 517 | acpi_state_timer_broadcast(pr, cx, 0); |
1da177e4 LT |
518 | break; |
519 | ||
520 | case ACPI_STATE_C3: | |
18eab855 VP |
521 | /* |
522 | * disable bus master | |
523 | * bm_check implies we need ARB_DIS | |
524 | * !bm_check implies we need cache flush | |
525 | * bm_control implies whether we can do ARB_DIS | |
526 | * | |
527 | * That leaves a case where bm_check is set and bm_control is | |
528 | * not set. In that case we cannot do much, we enter C3 | |
529 | * without doing anything. | |
530 | */ | |
531 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
02df8b93 | 532 | if (atomic_inc_return(&c3_cpu_count) == |
4be44fcd | 533 | num_online_cpus()) { |
02df8b93 VP |
534 | /* |
535 | * All CPUs are trying to go to C3 | |
536 | * Disable bus master arbitration | |
537 | */ | |
d8c71b6d | 538 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1); |
02df8b93 | 539 | } |
18eab855 | 540 | } else if (!pr->flags.bm_check) { |
02df8b93 VP |
541 | /* SMP with no shared cache... Invalidate cache */ |
542 | ACPI_FLUSH_CPU_CACHE(); | |
543 | } | |
4be44fcd | 544 | |
1da177e4 | 545 | /* Get start time (ticks) */ |
cee324b1 | 546 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
1da177e4 | 547 | /* Invoke C3 */ |
e9e2cdb4 | 548 | acpi_state_timer_broadcast(pr, cx, 1); |
2aa44d05 IM |
549 | /* Tell the scheduler that we are going deep-idle: */ |
550 | sched_clock_idle_sleep_event(); | |
991528d7 | 551 | acpi_cstate_enter(cx); |
1da177e4 | 552 | /* Get end time (ticks) */ |
cee324b1 | 553 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
18eab855 | 554 | if (pr->flags.bm_check && pr->flags.bm_control) { |
02df8b93 VP |
555 | /* Enable bus master arbitration */ |
556 | atomic_dec(&c3_cpu_count); | |
d8c71b6d | 557 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0); |
02df8b93 VP |
558 | } |
559 | ||
0aa366f3 | 560 | #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC) |
539eb11e | 561 | /* TSC halts in C3, so notify users */ |
5a90cf20 | 562 | mark_tsc_unstable("TSC halts in C3"); |
539eb11e | 563 | #endif |
2aa44d05 IM |
564 | /* Compute time (ticks) that we were actually asleep */ |
565 | sleep_ticks = ticks_elapsed(t1, t2); | |
566 | /* Tell the scheduler how much we idled: */ | |
567 | sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS); | |
568 | ||
1da177e4 LT |
569 | /* Re-enable interrupts */ |
570 | local_irq_enable(); | |
2aa44d05 IM |
571 | /* Do not account our idle-switching overhead: */ |
572 | sleep_ticks -= cx->latency_ticks + C3_OVERHEAD; | |
573 | ||
495ab9c0 | 574 | current_thread_info()->status |= TS_POLLING; |
e9e2cdb4 | 575 | acpi_state_timer_broadcast(pr, cx, 0); |
1da177e4 LT |
576 | break; |
577 | ||
578 | default: | |
579 | local_irq_enable(); | |
580 | return; | |
581 | } | |
a3c6598f DB |
582 | cx->usage++; |
583 | if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0)) | |
584 | cx->time += sleep_ticks; | |
1da177e4 LT |
585 | |
586 | next_state = pr->power.state; | |
587 | ||
1e483969 DSL |
588 | #ifdef CONFIG_HOTPLUG_CPU |
589 | /* Don't do promotion/demotion */ | |
590 | if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
cee324b1 | 591 | !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) { |
1e483969 DSL |
592 | next_state = cx; |
593 | goto end; | |
594 | } | |
595 | #endif | |
596 | ||
1da177e4 LT |
597 | /* |
598 | * Promotion? | |
599 | * ---------- | |
600 | * Track the number of longs (time asleep is greater than threshold) | |
601 | * and promote when the count threshold is reached. Note that bus | |
602 | * mastering activity may prevent promotions. | |
603 | * Do not promote above max_cstate. | |
604 | */ | |
605 | if (cx->promotion.state && | |
606 | ((cx->promotion.state - pr->power.states) <= max_cstate)) { | |
5c87579e AV |
607 | if (sleep_ticks > cx->promotion.threshold.ticks && |
608 | cx->promotion.state->latency <= system_latency_constraint()) { | |
1da177e4 | 609 | cx->promotion.count++; |
4be44fcd LB |
610 | cx->demotion.count = 0; |
611 | if (cx->promotion.count >= | |
612 | cx->promotion.threshold.count) { | |
1da177e4 | 613 | if (pr->flags.bm_check) { |
4be44fcd LB |
614 | if (! |
615 | (pr->power.bm_activity & cx-> | |
616 | promotion.threshold.bm)) { | |
617 | next_state = | |
618 | cx->promotion.state; | |
1da177e4 LT |
619 | goto end; |
620 | } | |
4be44fcd | 621 | } else { |
1da177e4 LT |
622 | next_state = cx->promotion.state; |
623 | goto end; | |
624 | } | |
625 | } | |
626 | } | |
627 | } | |
628 | ||
629 | /* | |
630 | * Demotion? | |
631 | * --------- | |
632 | * Track the number of shorts (time asleep is less than time threshold) | |
633 | * and demote when the usage threshold is reached. | |
634 | */ | |
635 | if (cx->demotion.state) { | |
636 | if (sleep_ticks < cx->demotion.threshold.ticks) { | |
637 | cx->demotion.count++; | |
638 | cx->promotion.count = 0; | |
639 | if (cx->demotion.count >= cx->demotion.threshold.count) { | |
640 | next_state = cx->demotion.state; | |
641 | goto end; | |
642 | } | |
643 | } | |
644 | } | |
645 | ||
4be44fcd | 646 | end: |
1da177e4 LT |
647 | /* |
648 | * Demote if current state exceeds max_cstate | |
5c87579e | 649 | * or if the latency of the current state is unacceptable |
1da177e4 | 650 | */ |
5c87579e AV |
651 | if ((pr->power.state - pr->power.states) > max_cstate || |
652 | pr->power.state->latency > system_latency_constraint()) { | |
1da177e4 LT |
653 | if (cx->demotion.state) |
654 | next_state = cx->demotion.state; | |
655 | } | |
656 | ||
657 | /* | |
658 | * New Cx State? | |
659 | * ------------- | |
660 | * If we're going to start using a new Cx state we must clean up | |
661 | * from the previous and prepare to use the new. | |
662 | */ | |
663 | if (next_state != pr->power.state) | |
664 | acpi_processor_power_activate(pr, next_state); | |
1da177e4 LT |
665 | } |
666 | ||
4be44fcd | 667 | static int acpi_processor_set_power_policy(struct acpi_processor *pr) |
1da177e4 LT |
668 | { |
669 | unsigned int i; | |
670 | unsigned int state_is_set = 0; | |
671 | struct acpi_processor_cx *lower = NULL; | |
672 | struct acpi_processor_cx *higher = NULL; | |
673 | struct acpi_processor_cx *cx; | |
674 | ||
1da177e4 LT |
675 | |
676 | if (!pr) | |
d550d98d | 677 | return -EINVAL; |
1da177e4 LT |
678 | |
679 | /* | |
680 | * This function sets the default Cx state policy (OS idle handler). | |
681 | * Our scheme is to promote quickly to C2 but more conservatively | |
682 | * to C3. We're favoring C2 for its characteristics of low latency | |
683 | * (quick response), good power savings, and ability to allow bus | |
684 | * mastering activity. Note that the Cx state policy is completely | |
685 | * customizable and can be altered dynamically. | |
686 | */ | |
687 | ||
688 | /* startup state */ | |
4be44fcd | 689 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
690 | cx = &pr->power.states[i]; |
691 | if (!cx->valid) | |
692 | continue; | |
693 | ||
694 | if (!state_is_set) | |
695 | pr->power.state = cx; | |
696 | state_is_set++; | |
697 | break; | |
4be44fcd | 698 | } |
1da177e4 LT |
699 | |
700 | if (!state_is_set) | |
d550d98d | 701 | return -ENODEV; |
1da177e4 LT |
702 | |
703 | /* demotion */ | |
4be44fcd | 704 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
705 | cx = &pr->power.states[i]; |
706 | if (!cx->valid) | |
707 | continue; | |
708 | ||
709 | if (lower) { | |
710 | cx->demotion.state = lower; | |
711 | cx->demotion.threshold.ticks = cx->latency_ticks; | |
712 | cx->demotion.threshold.count = 1; | |
713 | if (cx->type == ACPI_STATE_C3) | |
714 | cx->demotion.threshold.bm = bm_history; | |
715 | } | |
716 | ||
717 | lower = cx; | |
718 | } | |
719 | ||
720 | /* promotion */ | |
721 | for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) { | |
722 | cx = &pr->power.states[i]; | |
723 | if (!cx->valid) | |
724 | continue; | |
725 | ||
726 | if (higher) { | |
4be44fcd | 727 | cx->promotion.state = higher; |
1da177e4 LT |
728 | cx->promotion.threshold.ticks = cx->latency_ticks; |
729 | if (cx->type >= ACPI_STATE_C2) | |
730 | cx->promotion.threshold.count = 4; | |
731 | else | |
732 | cx->promotion.threshold.count = 10; | |
733 | if (higher->type == ACPI_STATE_C3) | |
734 | cx->promotion.threshold.bm = bm_history; | |
735 | } | |
736 | ||
737 | higher = cx; | |
738 | } | |
739 | ||
d550d98d | 740 | return 0; |
1da177e4 LT |
741 | } |
742 | ||
4be44fcd | 743 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 744 | { |
1da177e4 LT |
745 | |
746 | if (!pr) | |
d550d98d | 747 | return -EINVAL; |
1da177e4 LT |
748 | |
749 | if (!pr->pblk) | |
d550d98d | 750 | return -ENODEV; |
1da177e4 | 751 | |
1da177e4 | 752 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
753 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
754 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
755 | ||
4c033552 VP |
756 | #ifndef CONFIG_HOTPLUG_CPU |
757 | /* | |
758 | * Check for P_LVL2_UP flag before entering C2 and above on | |
759 | * an SMP system. | |
760 | */ | |
ad71860a | 761 | if ((num_online_cpus() > 1) && |
cee324b1 | 762 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 763 | return -ENODEV; |
4c033552 VP |
764 | #endif |
765 | ||
1da177e4 LT |
766 | /* determine C2 and C3 address from pblk */ |
767 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
768 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
769 | ||
770 | /* determine latencies from FADT */ | |
cee324b1 AS |
771 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency; |
772 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency; | |
1da177e4 LT |
773 | |
774 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
775 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
776 | pr->power.states[ACPI_STATE_C2].address, | |
777 | pr->power.states[ACPI_STATE_C3].address)); | |
778 | ||
d550d98d | 779 | return 0; |
1da177e4 LT |
780 | } |
781 | ||
991528d7 | 782 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 783 | { |
991528d7 VP |
784 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
785 | /* set the first C-State to C1 */ | |
786 | /* all processors need to support C1 */ | |
787 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
788 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
789 | } | |
790 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 791 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 792 | return 0; |
acf05f4b VP |
793 | } |
794 | ||
4be44fcd | 795 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 796 | { |
4be44fcd LB |
797 | acpi_status status = 0; |
798 | acpi_integer count; | |
cf824788 | 799 | int current_count; |
4be44fcd LB |
800 | int i; |
801 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
802 | union acpi_object *cst; | |
1da177e4 | 803 | |
1da177e4 | 804 | |
1da177e4 | 805 | if (nocst) |
d550d98d | 806 | return -ENODEV; |
1da177e4 | 807 | |
991528d7 | 808 | current_count = 0; |
1da177e4 LT |
809 | |
810 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
811 | if (ACPI_FAILURE(status)) { | |
812 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 813 | return -ENODEV; |
4be44fcd | 814 | } |
1da177e4 | 815 | |
50dd0969 | 816 | cst = buffer.pointer; |
1da177e4 LT |
817 | |
818 | /* There must be at least 2 elements */ | |
819 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 820 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
821 | status = -EFAULT; |
822 | goto end; | |
823 | } | |
824 | ||
825 | count = cst->package.elements[0].integer.value; | |
826 | ||
827 | /* Validate number of power states. */ | |
828 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 829 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
830 | status = -EFAULT; |
831 | goto end; | |
832 | } | |
833 | ||
1da177e4 LT |
834 | /* Tell driver that at least _CST is supported. */ |
835 | pr->flags.has_cst = 1; | |
836 | ||
837 | for (i = 1; i <= count; i++) { | |
838 | union acpi_object *element; | |
839 | union acpi_object *obj; | |
840 | struct acpi_power_register *reg; | |
841 | struct acpi_processor_cx cx; | |
842 | ||
843 | memset(&cx, 0, sizeof(cx)); | |
844 | ||
50dd0969 | 845 | element = &(cst->package.elements[i]); |
1da177e4 LT |
846 | if (element->type != ACPI_TYPE_PACKAGE) |
847 | continue; | |
848 | ||
849 | if (element->package.count != 4) | |
850 | continue; | |
851 | ||
50dd0969 | 852 | obj = &(element->package.elements[0]); |
1da177e4 LT |
853 | |
854 | if (obj->type != ACPI_TYPE_BUFFER) | |
855 | continue; | |
856 | ||
4be44fcd | 857 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
858 | |
859 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 860 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
861 | continue; |
862 | ||
1da177e4 | 863 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 864 | obj = &(element->package.elements[1]); |
1da177e4 LT |
865 | if (obj->type != ACPI_TYPE_INTEGER) |
866 | continue; | |
867 | ||
868 | cx.type = obj->integer.value; | |
991528d7 VP |
869 | /* |
870 | * Some buggy BIOSes won't list C1 in _CST - | |
871 | * Let acpi_processor_get_power_info_default() handle them later | |
872 | */ | |
873 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
874 | current_count++; | |
875 | ||
876 | cx.address = reg->address; | |
877 | cx.index = current_count + 1; | |
878 | ||
879 | cx.space_id = ACPI_CSTATE_SYSTEMIO; | |
880 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { | |
881 | if (acpi_processor_ffh_cstate_probe | |
882 | (pr->id, &cx, reg) == 0) { | |
883 | cx.space_id = ACPI_CSTATE_FFH; | |
884 | } else if (cx.type != ACPI_STATE_C1) { | |
885 | /* | |
886 | * C1 is a special case where FIXED_HARDWARE | |
887 | * can be handled in non-MWAIT way as well. | |
888 | * In that case, save this _CST entry info. | |
889 | * That is, we retain space_id of SYSTEM_IO for | |
890 | * halt based C1. | |
891 | * Otherwise, ignore this info and continue. | |
892 | */ | |
893 | continue; | |
894 | } | |
895 | } | |
1da177e4 | 896 | |
50dd0969 | 897 | obj = &(element->package.elements[2]); |
1da177e4 LT |
898 | if (obj->type != ACPI_TYPE_INTEGER) |
899 | continue; | |
900 | ||
901 | cx.latency = obj->integer.value; | |
902 | ||
50dd0969 | 903 | obj = &(element->package.elements[3]); |
1da177e4 LT |
904 | if (obj->type != ACPI_TYPE_INTEGER) |
905 | continue; | |
906 | ||
907 | cx.power = obj->integer.value; | |
908 | ||
cf824788 JM |
909 | current_count++; |
910 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
911 | ||
912 | /* | |
913 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
914 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
915 | */ | |
916 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
917 | printk(KERN_WARNING | |
918 | "Limiting number of power states to max (%d)\n", | |
919 | ACPI_PROCESSOR_MAX_POWER); | |
920 | printk(KERN_WARNING | |
921 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
922 | break; | |
923 | } | |
1da177e4 LT |
924 | } |
925 | ||
4be44fcd | 926 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 927 | current_count)); |
1da177e4 LT |
928 | |
929 | /* Validate number of power states discovered */ | |
cf824788 | 930 | if (current_count < 2) |
6d93c648 | 931 | status = -EFAULT; |
1da177e4 | 932 | |
4be44fcd | 933 | end: |
02438d87 | 934 | kfree(buffer.pointer); |
1da177e4 | 935 | |
d550d98d | 936 | return status; |
1da177e4 LT |
937 | } |
938 | ||
1da177e4 LT |
939 | static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx) |
940 | { | |
1da177e4 LT |
941 | |
942 | if (!cx->address) | |
d550d98d | 943 | return; |
1da177e4 LT |
944 | |
945 | /* | |
946 | * C2 latency must be less than or equal to 100 | |
947 | * microseconds. | |
948 | */ | |
949 | else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { | |
950 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 951 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 952 | return; |
1da177e4 LT |
953 | } |
954 | ||
1da177e4 LT |
955 | /* |
956 | * Otherwise we've met all of our C2 requirements. | |
957 | * Normalize the C2 latency to expidite policy | |
958 | */ | |
959 | cx->valid = 1; | |
960 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
961 | ||
d550d98d | 962 | return; |
1da177e4 LT |
963 | } |
964 | ||
4be44fcd LB |
965 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
966 | struct acpi_processor_cx *cx) | |
1da177e4 | 967 | { |
02df8b93 VP |
968 | static int bm_check_flag; |
969 | ||
1da177e4 LT |
970 | |
971 | if (!cx->address) | |
d550d98d | 972 | return; |
1da177e4 LT |
973 | |
974 | /* | |
975 | * C3 latency must be less than or equal to 1000 | |
976 | * microseconds. | |
977 | */ | |
978 | else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { | |
979 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 980 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 981 | return; |
1da177e4 LT |
982 | } |
983 | ||
1da177e4 LT |
984 | /* |
985 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
986 | * DMA transfers are used by any ISA device to avoid livelock. | |
987 | * Note that we could disable Type-F DMA (as recommended by | |
988 | * the erratum), but this is known to disrupt certain ISA | |
989 | * devices thus we take the conservative approach. | |
990 | */ | |
991 | else if (errata.piix4.fdma) { | |
992 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 993 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 994 | return; |
1da177e4 LT |
995 | } |
996 | ||
02df8b93 VP |
997 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
998 | if (!bm_check_flag) { | |
999 | /* Determine whether bm_check is needed based on CPU */ | |
1000 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
1001 | bm_check_flag = pr->flags.bm_check; | |
1002 | } else { | |
1003 | pr->flags.bm_check = bm_check_flag; | |
1004 | } | |
1005 | ||
1006 | if (pr->flags.bm_check) { | |
02df8b93 | 1007 | if (!pr->flags.bm_control) { |
ed3110ef VP |
1008 | if (pr->flags.has_cst != 1) { |
1009 | /* bus mastering control is necessary */ | |
1010 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
1011 | "C3 support requires BM control\n")); | |
1012 | return; | |
1013 | } else { | |
1014 | /* Here we enter C3 without bus mastering */ | |
1015 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
1016 | "C3 support without BM control\n")); | |
1017 | } | |
02df8b93 VP |
1018 | } |
1019 | } else { | |
02df8b93 VP |
1020 | /* |
1021 | * WBINVD should be set in fadt, for C3 state to be | |
1022 | * supported on when bm_check is not required. | |
1023 | */ | |
cee324b1 | 1024 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 1025 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
1026 | "Cache invalidation should work properly" |
1027 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 1028 | return; |
02df8b93 | 1029 | } |
d8c71b6d | 1030 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0); |
02df8b93 VP |
1031 | } |
1032 | ||
1da177e4 LT |
1033 | /* |
1034 | * Otherwise we've met all of our C3 requirements. | |
1035 | * Normalize the C3 latency to expidite policy. Enable | |
1036 | * checking of bus mastering status (bm_check) so we can | |
1037 | * use this in our C3 policy | |
1038 | */ | |
1039 | cx->valid = 1; | |
1040 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
1da177e4 | 1041 | |
d550d98d | 1042 | return; |
1da177e4 LT |
1043 | } |
1044 | ||
1da177e4 LT |
1045 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
1046 | { | |
1047 | unsigned int i; | |
1048 | unsigned int working = 0; | |
6eb0a0fd | 1049 | |
169a0abb | 1050 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 1051 | |
4be44fcd | 1052 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
1053 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
1054 | ||
1055 | switch (cx->type) { | |
1056 | case ACPI_STATE_C1: | |
1057 | cx->valid = 1; | |
1058 | break; | |
1059 | ||
1060 | case ACPI_STATE_C2: | |
1061 | acpi_processor_power_verify_c2(cx); | |
296d93cd | 1062 | if (cx->valid) |
169a0abb | 1063 | acpi_timer_check_state(i, pr, cx); |
1da177e4 LT |
1064 | break; |
1065 | ||
1066 | case ACPI_STATE_C3: | |
1067 | acpi_processor_power_verify_c3(pr, cx); | |
296d93cd | 1068 | if (cx->valid) |
169a0abb | 1069 | acpi_timer_check_state(i, pr, cx); |
1da177e4 LT |
1070 | break; |
1071 | } | |
1072 | ||
1073 | if (cx->valid) | |
1074 | working++; | |
1075 | } | |
bd663347 | 1076 | |
169a0abb | 1077 | acpi_propagate_timer_broadcast(pr); |
1da177e4 LT |
1078 | |
1079 | return (working); | |
1080 | } | |
1081 | ||
4be44fcd | 1082 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
1083 | { |
1084 | unsigned int i; | |
1085 | int result; | |
1086 | ||
1da177e4 LT |
1087 | |
1088 | /* NOTE: the idle thread may not be running while calling | |
1089 | * this function */ | |
1090 | ||
991528d7 VP |
1091 | /* Zero initialize all the C-states info. */ |
1092 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
1093 | ||
1da177e4 | 1094 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 1095 | if (result == -ENODEV) |
c5a114f1 | 1096 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 1097 | |
991528d7 VP |
1098 | if (result) |
1099 | return result; | |
1100 | ||
1101 | acpi_processor_get_power_info_default(pr); | |
1102 | ||
cf824788 | 1103 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 LT |
1104 | |
1105 | /* | |
1106 | * Set Default Policy | |
1107 | * ------------------ | |
1108 | * Now that we know which states are supported, set the default | |
1109 | * policy. Note that this policy can be changed dynamically | |
1110 | * (e.g. encourage deeper sleeps to conserve battery life when | |
1111 | * not on AC). | |
1112 | */ | |
1113 | result = acpi_processor_set_power_policy(pr); | |
1114 | if (result) | |
d550d98d | 1115 | return result; |
1da177e4 LT |
1116 | |
1117 | /* | |
1118 | * if one state of type C2 or C3 is available, mark this | |
1119 | * CPU as being "idle manageable" | |
1120 | */ | |
1121 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 1122 | if (pr->power.states[i].valid) { |
1da177e4 | 1123 | pr->power.count = i; |
2203d6ed LT |
1124 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
1125 | pr->flags.power = 1; | |
acf05f4b | 1126 | } |
1da177e4 LT |
1127 | } |
1128 | ||
d550d98d | 1129 | return 0; |
1da177e4 LT |
1130 | } |
1131 | ||
4be44fcd | 1132 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1da177e4 | 1133 | { |
4be44fcd | 1134 | int result = 0; |
1da177e4 | 1135 | |
1da177e4 LT |
1136 | |
1137 | if (!pr) | |
d550d98d | 1138 | return -EINVAL; |
1da177e4 | 1139 | |
4be44fcd | 1140 | if (nocst) { |
d550d98d | 1141 | return -ENODEV; |
1da177e4 LT |
1142 | } |
1143 | ||
1144 | if (!pr->flags.power_setup_done) | |
d550d98d | 1145 | return -ENODEV; |
1da177e4 LT |
1146 | |
1147 | /* Fall back to the default idle loop */ | |
1148 | pm_idle = pm_idle_save; | |
4be44fcd | 1149 | synchronize_sched(); /* Relies on interrupts forcing exit from idle. */ |
1da177e4 LT |
1150 | |
1151 | pr->flags.power = 0; | |
1152 | result = acpi_processor_get_power_info(pr); | |
1153 | if ((pr->flags.power == 1) && (pr->flags.power_setup_done)) | |
1154 | pm_idle = acpi_processor_idle; | |
1155 | ||
d550d98d | 1156 | return result; |
1da177e4 LT |
1157 | } |
1158 | ||
1159 | /* proc interface */ | |
1160 | ||
1161 | static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset) | |
1162 | { | |
50dd0969 | 1163 | struct acpi_processor *pr = seq->private; |
4be44fcd | 1164 | unsigned int i; |
1da177e4 | 1165 | |
1da177e4 LT |
1166 | |
1167 | if (!pr) | |
1168 | goto end; | |
1169 | ||
1170 | seq_printf(seq, "active state: C%zd\n" | |
4be44fcd | 1171 | "max_cstate: C%d\n" |
5c87579e AV |
1172 | "bus master activity: %08x\n" |
1173 | "maximum allowed latency: %d usec\n", | |
4be44fcd | 1174 | pr->power.state ? pr->power.state - pr->power.states : 0, |
5c87579e AV |
1175 | max_cstate, (unsigned)pr->power.bm_activity, |
1176 | system_latency_constraint()); | |
1da177e4 LT |
1177 | |
1178 | seq_puts(seq, "states:\n"); | |
1179 | ||
1180 | for (i = 1; i <= pr->power.count; i++) { | |
1181 | seq_printf(seq, " %cC%d: ", | |
4be44fcd LB |
1182 | (&pr->power.states[i] == |
1183 | pr->power.state ? '*' : ' '), i); | |
1da177e4 LT |
1184 | |
1185 | if (!pr->power.states[i].valid) { | |
1186 | seq_puts(seq, "<not supported>\n"); | |
1187 | continue; | |
1188 | } | |
1189 | ||
1190 | switch (pr->power.states[i].type) { | |
1191 | case ACPI_STATE_C1: | |
1192 | seq_printf(seq, "type[C1] "); | |
1193 | break; | |
1194 | case ACPI_STATE_C2: | |
1195 | seq_printf(seq, "type[C2] "); | |
1196 | break; | |
1197 | case ACPI_STATE_C3: | |
1198 | seq_printf(seq, "type[C3] "); | |
1199 | break; | |
1200 | default: | |
1201 | seq_printf(seq, "type[--] "); | |
1202 | break; | |
1203 | } | |
1204 | ||
1205 | if (pr->power.states[i].promotion.state) | |
1206 | seq_printf(seq, "promotion[C%zd] ", | |
4be44fcd LB |
1207 | (pr->power.states[i].promotion.state - |
1208 | pr->power.states)); | |
1da177e4 LT |
1209 | else |
1210 | seq_puts(seq, "promotion[--] "); | |
1211 | ||
1212 | if (pr->power.states[i].demotion.state) | |
1213 | seq_printf(seq, "demotion[C%zd] ", | |
4be44fcd LB |
1214 | (pr->power.states[i].demotion.state - |
1215 | pr->power.states)); | |
1da177e4 LT |
1216 | else |
1217 | seq_puts(seq, "demotion[--] "); | |
1218 | ||
a3c6598f | 1219 | seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n", |
4be44fcd | 1220 | pr->power.states[i].latency, |
a3c6598f | 1221 | pr->power.states[i].usage, |
b0b7eaaf | 1222 | (unsigned long long)pr->power.states[i].time); |
1da177e4 LT |
1223 | } |
1224 | ||
4be44fcd | 1225 | end: |
d550d98d | 1226 | return 0; |
1da177e4 LT |
1227 | } |
1228 | ||
1229 | static int acpi_processor_power_open_fs(struct inode *inode, struct file *file) | |
1230 | { | |
1231 | return single_open(file, acpi_processor_power_seq_show, | |
4be44fcd | 1232 | PDE(inode)->data); |
1da177e4 LT |
1233 | } |
1234 | ||
d7508032 | 1235 | static const struct file_operations acpi_processor_power_fops = { |
4be44fcd LB |
1236 | .open = acpi_processor_power_open_fs, |
1237 | .read = seq_read, | |
1238 | .llseek = seq_lseek, | |
1239 | .release = single_release, | |
1da177e4 LT |
1240 | }; |
1241 | ||
1fec74a9 | 1242 | #ifdef CONFIG_SMP |
5c87579e AV |
1243 | static void smp_callback(void *v) |
1244 | { | |
1245 | /* we already woke the CPU up, nothing more to do */ | |
1246 | } | |
1247 | ||
1248 | /* | |
1249 | * This function gets called when a part of the kernel has a new latency | |
1250 | * requirement. This means we need to get all processors out of their C-state, | |
1251 | * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that | |
1252 | * wakes them all right up. | |
1253 | */ | |
1254 | static int acpi_processor_latency_notify(struct notifier_block *b, | |
1255 | unsigned long l, void *v) | |
1256 | { | |
1257 | smp_call_function(smp_callback, NULL, 0, 1); | |
1258 | return NOTIFY_OK; | |
1259 | } | |
1260 | ||
1261 | static struct notifier_block acpi_processor_latency_notifier = { | |
1262 | .notifier_call = acpi_processor_latency_notify, | |
1263 | }; | |
1fec74a9 | 1264 | #endif |
5c87579e | 1265 | |
7af8b660 | 1266 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr, |
4be44fcd | 1267 | struct acpi_device *device) |
1da177e4 | 1268 | { |
4be44fcd | 1269 | acpi_status status = 0; |
b6835052 | 1270 | static int first_run; |
4be44fcd | 1271 | struct proc_dir_entry *entry = NULL; |
1da177e4 LT |
1272 | unsigned int i; |
1273 | ||
1da177e4 LT |
1274 | |
1275 | if (!first_run) { | |
1276 | dmi_check_system(processor_power_dmi_table); | |
1277 | if (max_cstate < ACPI_C_STATES_MAX) | |
4be44fcd LB |
1278 | printk(KERN_NOTICE |
1279 | "ACPI: processor limited to max C-state %d\n", | |
1280 | max_cstate); | |
1da177e4 | 1281 | first_run++; |
1fec74a9 | 1282 | #ifdef CONFIG_SMP |
5c87579e | 1283 | register_latency_notifier(&acpi_processor_latency_notifier); |
1fec74a9 | 1284 | #endif |
1da177e4 LT |
1285 | } |
1286 | ||
02df8b93 | 1287 | if (!pr) |
d550d98d | 1288 | return -EINVAL; |
02df8b93 | 1289 | |
cee324b1 | 1290 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1291 | status = |
cee324b1 | 1292 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1293 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1294 | ACPI_EXCEPTION((AE_INFO, status, |
1295 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1296 | } |
1297 | } | |
1298 | ||
1299 | acpi_processor_get_power_info(pr); | |
1300 | ||
1301 | /* | |
1302 | * Install the idle handler if processor power management is supported. | |
1303 | * Note that we use previously set idle handler will be used on | |
1304 | * platforms that only support C1. | |
1305 | */ | |
1306 | if ((pr->flags.power) && (!boot_option_idle_override)) { | |
1307 | printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id); | |
1308 | for (i = 1; i <= pr->power.count; i++) | |
1309 | if (pr->power.states[i].valid) | |
4be44fcd LB |
1310 | printk(" C%d[C%d]", i, |
1311 | pr->power.states[i].type); | |
1da177e4 LT |
1312 | printk(")\n"); |
1313 | ||
1314 | if (pr->id == 0) { | |
1315 | pm_idle_save = pm_idle; | |
1316 | pm_idle = acpi_processor_idle; | |
1317 | } | |
1318 | } | |
1319 | ||
1320 | /* 'power' [R] */ | |
1321 | entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER, | |
4be44fcd | 1322 | S_IRUGO, acpi_device_dir(device)); |
1da177e4 | 1323 | if (!entry) |
a6fc6720 | 1324 | return -EIO; |
1da177e4 LT |
1325 | else { |
1326 | entry->proc_fops = &acpi_processor_power_fops; | |
1327 | entry->data = acpi_driver_data(device); | |
1328 | entry->owner = THIS_MODULE; | |
1329 | } | |
1330 | ||
1331 | pr->flags.power_setup_done = 1; | |
1332 | ||
d550d98d | 1333 | return 0; |
1da177e4 LT |
1334 | } |
1335 | ||
4be44fcd LB |
1336 | int acpi_processor_power_exit(struct acpi_processor *pr, |
1337 | struct acpi_device *device) | |
1da177e4 | 1338 | { |
1da177e4 LT |
1339 | |
1340 | pr->flags.power_setup_done = 0; | |
1341 | ||
1342 | if (acpi_device_dir(device)) | |
4be44fcd LB |
1343 | remove_proc_entry(ACPI_PROCESSOR_FILE_POWER, |
1344 | acpi_device_dir(device)); | |
1da177e4 LT |
1345 | |
1346 | /* Unregister the idle handler when processor #0 is removed. */ | |
1347 | if (pr->id == 0) { | |
1348 | pm_idle = pm_idle_save; | |
1349 | ||
1350 | /* | |
1351 | * We are about to unload the current idle thread pm callback | |
1352 | * (pm_idle), Wait for all processors to update cached/local | |
1353 | * copies of pm_idle before proceeding. | |
1354 | */ | |
1355 | cpu_idle_wait(); | |
1fec74a9 | 1356 | #ifdef CONFIG_SMP |
5c87579e | 1357 | unregister_latency_notifier(&acpi_processor_latency_notifier); |
1fec74a9 | 1358 | #endif |
1da177e4 LT |
1359 | } |
1360 | ||
d550d98d | 1361 | return 0; |
1da177e4 | 1362 | } |