ixgb: repeat 32 bit ioremap cleanup
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
0abb6eb1 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT
33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
8b32e63d 39#define DRV_VERSION "1.0.126-k4"DRIVERNAPI
273dc74e
SH
40const char ixgb_driver_version[] = DRV_VERSION;
41static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT
42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK
54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT
56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
446490ca 70void ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog);
1da177e4
LT
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
7d12e780 96static irqreturn_t ixgb_intr(int irq, void *data);
446490ca 97static bool ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4 99#ifdef CONFIG_IXGB_NAPI
bea3348e 100static int ixgb_clean(struct napi_struct *napi, int budget);
446490ca
JP
101static bool ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
1da177e4 103#else
446490ca 104static bool ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
1da177e4
LT
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
1da177e4 107static void ixgb_tx_timeout(struct net_device *dev);
c4028958 108static void ixgb_tx_timeout_task(struct work_struct *work);
1da177e4
LT
109static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp);
222441a6
JP
111static void ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
112static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT
113static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114
1da177e4
LT
115#ifdef CONFIG_NET_POLL_CONTROLLER
116/* for netdump / net console */
117static void ixgb_netpoll(struct net_device *dev);
118#endif
119
01748fbb
LV
120static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
121 enum pci_channel_state state);
122static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
123static void ixgb_io_resume (struct pci_dev *pdev);
1da177e4 124
01748fbb
LV
125static struct pci_error_handlers ixgb_err_handler = {
126 .error_detected = ixgb_io_error_detected,
127 .slot_reset = ixgb_io_slot_reset,
128 .resume = ixgb_io_resume,
129};
130
1da177e4 131static struct pci_driver ixgb_driver = {
c2eba932 132 .name = ixgb_driver_name,
1da177e4 133 .id_table = ixgb_pci_tbl,
c2eba932
MC
134 .probe = ixgb_probe,
135 .remove = __devexit_p(ixgb_remove),
01748fbb 136 .err_handler = &ixgb_err_handler
1da177e4
LT
137};
138
139MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
140MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
141MODULE_LICENSE("GPL");
01e5abc2 142MODULE_VERSION(DRV_VERSION);
1da177e4 143
ec9c3f5d
AK
144#define DEFAULT_DEBUG_LEVEL_SHIFT 3
145static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
146module_param(debug, int, 0);
147MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
148
1da177e4 149/* some defines for controlling descriptor fetches in h/w */
3ae84d92
JB
150#define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
151#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
152 * this */
153#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
154 * is pushed this many descriptors
155 * from head */
1da177e4
LT
156
157/**
158 * ixgb_init_module - Driver Registration Routine
159 *
160 * ixgb_init_module is the first routine called when the driver is
161 * loaded. All it does is register with the PCI subsystem.
162 **/
163
164static int __init
165ixgb_init_module(void)
166{
1da177e4
LT
167 printk(KERN_INFO "%s - version %s\n",
168 ixgb_driver_string, ixgb_driver_version);
169
170 printk(KERN_INFO "%s\n", ixgb_copyright);
171
29917620 172 return pci_register_driver(&ixgb_driver);
1da177e4
LT
173}
174
175module_init(ixgb_init_module);
176
177/**
178 * ixgb_exit_module - Driver Exit Cleanup Routine
179 *
180 * ixgb_exit_module is called just before the driver is removed
181 * from memory.
182 **/
183
184static void __exit
185ixgb_exit_module(void)
186{
1da177e4
LT
187 pci_unregister_driver(&ixgb_driver);
188}
189
190module_exit(ixgb_exit_module);
191
192/**
193 * ixgb_irq_disable - Mask off interrupt generation on the NIC
194 * @adapter: board private structure
195 **/
196
235949d1 197static void
1da177e4
LT
198ixgb_irq_disable(struct ixgb_adapter *adapter)
199{
1da177e4
LT
200 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
201 IXGB_WRITE_FLUSH(&adapter->hw);
202 synchronize_irq(adapter->pdev->irq);
203}
204
205/**
206 * ixgb_irq_enable - Enable default interrupt generation settings
207 * @adapter: board private structure
208 **/
209
235949d1 210static void
1da177e4
LT
211ixgb_irq_enable(struct ixgb_adapter *adapter)
212{
9c61a9dc
JB
213 u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
214 IXGB_INT_TXDW | IXGB_INT_LSC;
215 if (adapter->hw.subsystem_vendor_id == SUN_SUBVENDOR_ID)
216 val |= IXGB_INT_GPI0;
217 IXGB_WRITE_REG(&adapter->hw, IMS, val);
218 IXGB_WRITE_FLUSH(&adapter->hw);
1da177e4
LT
219}
220
221int
222ixgb_up(struct ixgb_adapter *adapter)
223{
224 struct net_device *netdev = adapter->netdev;
fb136c07 225 int err, irq_flags = IRQF_SHARED;
1da177e4
LT
226 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
227 struct ixgb_hw *hw = &adapter->hw;
228
229 /* hardware has been reset, we need to reload some things */
230
8556f0d1 231 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT
232 ixgb_set_multi(netdev);
233
234 ixgb_restore_vlan(adapter);
235
236 ixgb_configure_tx(adapter);
237 ixgb_setup_rctl(adapter);
238 ixgb_configure_rx(adapter);
239 ixgb_alloc_rx_buffers(adapter);
240
e59d1696
AK
241 /* disable interrupts and get the hardware into a known state */
242 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
243
fb136c07
AK
244 /* only enable MSI if bus is in PCI-X mode */
245 if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
246 err = pci_enable_msi(adapter->pdev);
247 if (!err) {
248 adapter->have_msi = 1;
249 irq_flags = 0;
250 }
1da177e4
LT
251 /* proceed to try to request regular interrupt */
252 }
1da177e4 253
fb136c07
AK
254 err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
255 netdev->name, netdev);
256 if (err) {
257 if (adapter->have_msi)
258 pci_disable_msi(adapter->pdev);
ec9c3f5d
AK
259 DPRINTK(PROBE, ERR,
260 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 261 return err;
ec9c3f5d 262 }
1da177e4 263
1da177e4
LT
264 if((hw->max_frame_size != max_frame) ||
265 (hw->max_frame_size !=
266 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
267
268 hw->max_frame_size = max_frame;
269
270 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
271
272 if(hw->max_frame_size >
273 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
222441a6 274 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
1da177e4
LT
275
276 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
277 ctrl0 |= IXGB_CTRL0_JFE;
278 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
279 }
280 }
281 }
282
bab2bce7 283 clear_bit(__IXGB_DOWN, &adapter->flags);
1da177e4
LT
284
285#ifdef CONFIG_IXGB_NAPI
bea3348e 286 napi_enable(&adapter->napi);
1da177e4 287#endif
e59d1696
AK
288 ixgb_irq_enable(adapter);
289
bab2bce7
JB
290 mod_timer(&adapter->watchdog_timer, jiffies);
291
1da177e4
LT
292 return 0;
293}
294
295void
446490ca 296ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog)
1da177e4
LT
297{
298 struct net_device *netdev = adapter->netdev;
299
bab2bce7
JB
300 /* prevent the interrupt handler from restarting watchdog */
301 set_bit(__IXGB_DOWN, &adapter->flags);
302
49d85c50
DM
303#ifdef CONFIG_IXGB_NAPI
304 napi_disable(&adapter->napi);
49d85c50 305#endif
bab2bce7 306 /* waiting for NAPI to complete can re-enable interrupts */
1da177e4
LT
307 ixgb_irq_disable(adapter);
308 free_irq(adapter->pdev->irq, netdev);
fb136c07
AK
309
310 if (adapter->have_msi)
1da177e4
LT
311 pci_disable_msi(adapter->pdev);
312
1da177e4
LT
313 if(kill_watchdog)
314 del_timer_sync(&adapter->watchdog_timer);
49d85c50 315
1da177e4
LT
316 adapter->link_speed = 0;
317 adapter->link_duplex = 0;
318 netif_carrier_off(netdev);
319 netif_stop_queue(netdev);
320
321 ixgb_reset(adapter);
322 ixgb_clean_tx_ring(adapter);
323 ixgb_clean_rx_ring(adapter);
324}
325
326void
327ixgb_reset(struct ixgb_adapter *adapter)
328{
3fd7131f 329 struct ixgb_hw *hw = &adapter->hw;
1da177e4 330
3fd7131f
MW
331 ixgb_adapter_stop(hw);
332 if (!ixgb_init_hw(hw))
ec9c3f5d 333 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
3fd7131f
MW
334
335 /* restore frame size information */
336 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
337 if (hw->max_frame_size >
338 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
339 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
340 if (!(ctrl0 & IXGB_CTRL0_JFE)) {
341 ctrl0 |= IXGB_CTRL0_JFE;
342 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
343 }
344 }
1da177e4
LT
345}
346
347/**
348 * ixgb_probe - Device Initialization Routine
349 * @pdev: PCI device information struct
350 * @ent: entry in ixgb_pci_tbl
351 *
352 * Returns 0 on success, negative on failure
353 *
354 * ixgb_probe initializes an adapter identified by a pci_dev structure.
355 * The OS initialization, configuring of the adapter private structure,
356 * and a hardware reset occur.
357 **/
358
359static int __devinit
360ixgb_probe(struct pci_dev *pdev,
361 const struct pci_device_id *ent)
362{
363 struct net_device *netdev = NULL;
364 struct ixgb_adapter *adapter;
365 static int cards_found = 0;
1da177e4
LT
366 int pci_using_dac;
367 int i;
368 int err;
369
370 if((err = pci_enable_device(pdev)))
371 return err;
372
c91e468a
AS
373 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
374 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT
375 pci_using_dac = 1;
376 } else {
c91e468a
AS
377 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
378 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK
379 printk(KERN_ERR
380 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 381 goto err_dma_mask;
1da177e4
LT
382 }
383 pci_using_dac = 0;
384 }
385
386 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 387 goto err_request_regions;
1da177e4
LT
388
389 pci_set_master(pdev);
390
391 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
392 if(!netdev) {
393 err = -ENOMEM;
394 goto err_alloc_etherdev;
395 }
396
1da177e4
LT
397 SET_NETDEV_DEV(netdev, &pdev->dev);
398
399 pci_set_drvdata(pdev, netdev);
8908c6cd 400 adapter = netdev_priv(netdev);
1da177e4
LT
401 adapter->netdev = netdev;
402 adapter->pdev = pdev;
403 adapter->hw.back = adapter;
ec9c3f5d 404 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4 405
e539e466
JB
406 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
407 pci_resource_len(pdev, BAR_0));
408 if (!adapter->hw.hw_addr) {
1da177e4
LT
409 err = -EIO;
410 goto err_ioremap;
411 }
412
413 for(i = BAR_1; i <= BAR_5; i++) {
414 if(pci_resource_len(pdev, i) == 0)
415 continue;
416 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
417 adapter->hw.io_base = pci_resource_start(pdev, i);
418 break;
419 }
420 }
421
422 netdev->open = &ixgb_open;
423 netdev->stop = &ixgb_close;
424 netdev->hard_start_xmit = &ixgb_xmit_frame;
425 netdev->get_stats = &ixgb_get_stats;
426 netdev->set_multicast_list = &ixgb_set_multi;
427 netdev->set_mac_address = &ixgb_set_mac;
428 netdev->change_mtu = &ixgb_change_mtu;
429 ixgb_set_ethtool_ops(netdev);
430 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 431 netdev->watchdog_timeo = 5 * HZ;
1da177e4 432#ifdef CONFIG_IXGB_NAPI
bea3348e 433 netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
1da177e4
LT
434#endif
435 netdev->vlan_rx_register = ixgb_vlan_rx_register;
436 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
437 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
438#ifdef CONFIG_NET_POLL_CONTROLLER
439 netdev->poll_controller = ixgb_netpoll;
440#endif
441
0eb5a34c 442 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT
443
444 adapter->bd_number = cards_found;
445 adapter->link_speed = 0;
446 adapter->link_duplex = 0;
447
448 /* setup the private structure */
449
450 if((err = ixgb_sw_init(adapter)))
451 goto err_sw_init;
452
453 netdev->features = NETIF_F_SG |
454 NETIF_F_HW_CSUM |
455 NETIF_F_HW_VLAN_TX |
456 NETIF_F_HW_VLAN_RX |
457 NETIF_F_HW_VLAN_FILTER;
1da177e4 458 netdev->features |= NETIF_F_TSO;
f017f14b
AK
459#ifdef NETIF_F_LLTX
460 netdev->features |= NETIF_F_LLTX;
461#endif
1da177e4
LT
462
463 if(pci_using_dac)
464 netdev->features |= NETIF_F_HIGHDMA;
465
466 /* make sure the EEPROM is good */
467
468 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 469 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT
470 err = -EIO;
471 goto err_eeprom;
472 }
473
474 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 475 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 476
df859c51 477 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 478 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT
479 err = -EIO;
480 goto err_eeprom;
481 }
482
483 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
484
485 init_timer(&adapter->watchdog_timer);
486 adapter->watchdog_timer.function = &ixgb_watchdog;
487 adapter->watchdog_timer.data = (unsigned long)adapter;
488
c4028958 489 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
1da177e4 490
ec9c3f5d 491 strcpy(netdev->name, "eth%d");
1da177e4
LT
492 if((err = register_netdev(netdev)))
493 goto err_register;
494
495 /* we're going to reset, so assume we have no link for now */
496
497 netif_carrier_off(netdev);
498 netif_stop_queue(netdev);
499
ec9c3f5d 500 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT
501 ixgb_check_options(adapter);
502 /* reset the hardware with the new settings */
503
504 ixgb_reset(adapter);
505
506 cards_found++;
507 return 0;
508
509err_register:
510err_sw_init:
511err_eeprom:
512 iounmap(adapter->hw.hw_addr);
513err_ioremap:
514 free_netdev(netdev);
515err_alloc_etherdev:
516 pci_release_regions(pdev);
c91e468a
AS
517err_request_regions:
518err_dma_mask:
519 pci_disable_device(pdev);
1da177e4
LT
520 return err;
521}
522
523/**
524 * ixgb_remove - Device Removal Routine
525 * @pdev: PCI device information struct
526 *
527 * ixgb_remove is called by the PCI subsystem to alert the driver
528 * that it should release a PCI device. The could be caused by a
529 * Hot-Plug event, or because the driver is going to be removed from
530 * memory.
531 **/
532
533static void __devexit
534ixgb_remove(struct pci_dev *pdev)
535{
536 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 537 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
538
539 unregister_netdev(netdev);
540
541 iounmap(adapter->hw.hw_addr);
542 pci_release_regions(pdev);
543
544 free_netdev(netdev);
545}
546
547/**
548 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
549 * @adapter: board private structure to initialize
550 *
551 * ixgb_sw_init initializes the Adapter private data structure.
552 * Fields are initialized based on PCI device information and
553 * OS network device settings (MTU size).
554 **/
555
556static int __devinit
557ixgb_sw_init(struct ixgb_adapter *adapter)
558{
559 struct ixgb_hw *hw = &adapter->hw;
560 struct net_device *netdev = adapter->netdev;
561 struct pci_dev *pdev = adapter->pdev;
562
563 /* PCI config space info */
564
565 hw->vendor_id = pdev->vendor;
566 hw->device_id = pdev->device;
567 hw->subsystem_vendor_id = pdev->subsystem_vendor;
568 hw->subsystem_id = pdev->subsystem_device;
569
1da177e4 570 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 571 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT
572
573 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK
574 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
575 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
576 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT
577 hw->mac_type = ixgb_82597;
578 else {
579 /* should never have loaded on this device */
ec9c3f5d 580 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT
581 }
582
583 /* enable flow control to be programmed */
584 hw->fc.send_xon = 1;
585
1da177e4
LT
586 spin_lock_init(&adapter->tx_lock);
587
bab2bce7 588 set_bit(__IXGB_DOWN, &adapter->flags);
1da177e4
LT
589 return 0;
590}
591
592/**
593 * ixgb_open - Called when a network interface is made active
594 * @netdev: network interface device structure
595 *
596 * Returns 0 on success, negative value on failure
597 *
598 * The open entry point is called when a network interface is made
599 * active by the system (IFF_UP). At this point all resources needed
600 * for transmit and receive operations are allocated, the interrupt
601 * handler is registered with the OS, the watchdog timer is started,
602 * and the stack is notified that the interface is ready.
603 **/
604
605static int
606ixgb_open(struct net_device *netdev)
607{
8908c6cd 608 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
609 int err;
610
611 /* allocate transmit descriptors */
612
613 if((err = ixgb_setup_tx_resources(adapter)))
614 goto err_setup_tx;
615
616 /* allocate receive descriptors */
617
618 if((err = ixgb_setup_rx_resources(adapter)))
619 goto err_setup_rx;
620
621 if((err = ixgb_up(adapter)))
622 goto err_up;
623
624 return 0;
625
626err_up:
627 ixgb_free_rx_resources(adapter);
628err_setup_rx:
629 ixgb_free_tx_resources(adapter);
630err_setup_tx:
631 ixgb_reset(adapter);
632
633 return err;
634}
635
636/**
637 * ixgb_close - Disables a network interface
638 * @netdev: network interface device structure
639 *
640 * Returns 0, this is not allowed to fail
641 *
642 * The close entry point is called when an interface is de-activated
643 * by the OS. The hardware is still under the drivers control, but
644 * needs to be disabled. A global MAC reset is issued to stop the
645 * hardware, and all transmit and receive resources are freed.
646 **/
647
648static int
649ixgb_close(struct net_device *netdev)
650{
8908c6cd 651 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4 652
446490ca 653 ixgb_down(adapter, true);
1da177e4
LT
654
655 ixgb_free_tx_resources(adapter);
656 ixgb_free_rx_resources(adapter);
657
658 return 0;
659}
660
661/**
662 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
663 * @adapter: board private structure
664 *
665 * Return 0 on success, negative on failure
666 **/
667
668int
669ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
670{
671 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
672 struct pci_dev *pdev = adapter->pdev;
673 int size;
674
675 size = sizeof(struct ixgb_buffer) * txdr->count;
676 txdr->buffer_info = vmalloc(size);
677 if(!txdr->buffer_info) {
ec9c3f5d
AK
678 DPRINTK(PROBE, ERR,
679 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT
680 return -ENOMEM;
681 }
682 memset(txdr->buffer_info, 0, size);
683
684 /* round up to nearest 4K */
685
686 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
55e924cf 687 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT
688
689 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
690 if(!txdr->desc) {
691 vfree(txdr->buffer_info);
ec9c3f5d
AK
692 DPRINTK(PROBE, ERR,
693 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT
694 return -ENOMEM;
695 }
696 memset(txdr->desc, 0, txdr->size);
697
698 txdr->next_to_use = 0;
699 txdr->next_to_clean = 0;
700
701 return 0;
702}
703
704/**
705 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
706 * @adapter: board private structure
707 *
708 * Configure the Tx unit of the MAC after a reset.
709 **/
710
711static void
712ixgb_configure_tx(struct ixgb_adapter *adapter)
713{
222441a6
JP
714 u64 tdba = adapter->tx_ring.dma;
715 u32 tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
716 u32 tctl;
1da177e4
LT
717 struct ixgb_hw *hw = &adapter->hw;
718
719 /* Setup the Base and Length of the Tx Descriptor Ring
720 * tx_ring.dma can be either a 32 or 64 bit value
721 */
722
723 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
724 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
725
726 IXGB_WRITE_REG(hw, TDLEN, tdlen);
727
728 /* Setup the HW Tx Head and Tail descriptor pointers */
729
730 IXGB_WRITE_REG(hw, TDH, 0);
731 IXGB_WRITE_REG(hw, TDT, 0);
732
733 /* don't set up txdctl, it induces performance problems if configured
734 * incorrectly */
735 /* Set the Tx Interrupt Delay register */
736
737 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
738
739 /* Program the Transmit Control Register */
740
741 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
742 IXGB_WRITE_REG(hw, TCTL, tctl);
743
744 /* Setup Transmit Descriptor Settings for this adapter */
745 adapter->tx_cmd_type =
746 IXGB_TX_DESC_TYPE
747 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
748}
749
750/**
751 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
752 * @adapter: board private structure
753 *
754 * Returns 0 on success, negative on failure
755 **/
756
757int
758ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
759{
760 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
761 struct pci_dev *pdev = adapter->pdev;
762 int size;
763
764 size = sizeof(struct ixgb_buffer) * rxdr->count;
765 rxdr->buffer_info = vmalloc(size);
766 if(!rxdr->buffer_info) {
ec9c3f5d
AK
767 DPRINTK(PROBE, ERR,
768 "Unable to allocate receive descriptor ring\n");
1da177e4
LT
769 return -ENOMEM;
770 }
771 memset(rxdr->buffer_info, 0, size);
772
773 /* Round up to nearest 4K */
774
775 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
55e924cf 776 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT
777
778 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
779
780 if(!rxdr->desc) {
781 vfree(rxdr->buffer_info);
ec9c3f5d
AK
782 DPRINTK(PROBE, ERR,
783 "Unable to allocate receive descriptors\n");
1da177e4
LT
784 return -ENOMEM;
785 }
786 memset(rxdr->desc, 0, rxdr->size);
787
788 rxdr->next_to_clean = 0;
789 rxdr->next_to_use = 0;
790
791 return 0;
792}
793
794/**
795 * ixgb_setup_rctl - configure the receive control register
796 * @adapter: Board private structure
797 **/
798
799static void
800ixgb_setup_rctl(struct ixgb_adapter *adapter)
801{
222441a6 802 u32 rctl;
1da177e4
LT
803
804 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
805
806 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
807
808 rctl |=
809 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
810 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
811 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
812
813 rctl |= IXGB_RCTL_SECRC;
814
3f3dc0dd 815 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 816 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 817 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 818 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 819 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 820 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 821 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 822 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT
823
824 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
825}
826
827/**
828 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
829 * @adapter: board private structure
830 *
831 * Configure the Rx unit of the MAC after a reset.
832 **/
833
834static void
835ixgb_configure_rx(struct ixgb_adapter *adapter)
836{
222441a6
JP
837 u64 rdba = adapter->rx_ring.dma;
838 u32 rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
1da177e4 839 struct ixgb_hw *hw = &adapter->hw;
222441a6
JP
840 u32 rctl;
841 u32 rxcsum;
842 u32 rxdctl;
1da177e4
LT
843
844 /* make sure receives are disabled while setting up the descriptors */
845
846 rctl = IXGB_READ_REG(hw, RCTL);
847 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
848
849 /* set the Receive Delay Timer Register */
850
851 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
852
853 /* Setup the Base and Length of the Rx Descriptor Ring */
854
855 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
856 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
857
858 IXGB_WRITE_REG(hw, RDLEN, rdlen);
859
860 /* Setup the HW Rx Head and Tail Descriptor Pointers */
861 IXGB_WRITE_REG(hw, RDH, 0);
862 IXGB_WRITE_REG(hw, RDT, 0);
863
864 /* set up pre-fetching of receive buffers so we get some before we
865 * run out (default hardware behavior is to run out before fetching
866 * more). This sets up to fetch if HTHRESH rx descriptors are avail
867 * and the descriptors in hw cache are below PTHRESH. This avoids
868 * the hardware behavior of fetching <=512 descriptors in a single
869 * burst that pre-empts all other activity, usually causing fifo
870 * overflows. */
871 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
872 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
873 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
874 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
875 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
876
877 /* Enable Receive Checksum Offload for TCP and UDP */
446490ca 878 if (adapter->rx_csum) {
1da177e4
LT
879 rxcsum = IXGB_READ_REG(hw, RXCSUM);
880 rxcsum |= IXGB_RXCSUM_TUOFL;
881 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
882 }
883
884 /* Enable Receives */
885
886 IXGB_WRITE_REG(hw, RCTL, rctl);
887}
888
889/**
890 * ixgb_free_tx_resources - Free Tx Resources
891 * @adapter: board private structure
892 *
893 * Free all transmit software resources
894 **/
895
896void
897ixgb_free_tx_resources(struct ixgb_adapter *adapter)
898{
899 struct pci_dev *pdev = adapter->pdev;
900
901 ixgb_clean_tx_ring(adapter);
902
903 vfree(adapter->tx_ring.buffer_info);
904 adapter->tx_ring.buffer_info = NULL;
905
906 pci_free_consistent(pdev, adapter->tx_ring.size,
907 adapter->tx_ring.desc, adapter->tx_ring.dma);
908
909 adapter->tx_ring.desc = NULL;
910}
911
235949d1 912static void
1da177e4
LT
913ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
914 struct ixgb_buffer *buffer_info)
915{
916 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK
917
918 if (buffer_info->dma)
919 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
920 PCI_DMA_TODEVICE);
921
922 if (buffer_info->skb)
1da177e4 923 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK
924
925 buffer_info->skb = NULL;
926 buffer_info->dma = 0;
927 buffer_info->time_stamp = 0;
928 /* these fields must always be initialized in tx
929 * buffer_info->length = 0;
930 * buffer_info->next_to_watch = 0; */
1da177e4
LT
931}
932
933/**
934 * ixgb_clean_tx_ring - Free Tx Buffers
935 * @adapter: board private structure
936 **/
937
938static void
939ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
940{
941 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
942 struct ixgb_buffer *buffer_info;
943 unsigned long size;
944 unsigned int i;
945
946 /* Free all the Tx ring sk_buffs */
947
948 for(i = 0; i < tx_ring->count; i++) {
949 buffer_info = &tx_ring->buffer_info[i];
950 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
951 }
952
953 size = sizeof(struct ixgb_buffer) * tx_ring->count;
954 memset(tx_ring->buffer_info, 0, size);
955
956 /* Zero out the descriptor ring */
957
958 memset(tx_ring->desc, 0, tx_ring->size);
959
960 tx_ring->next_to_use = 0;
961 tx_ring->next_to_clean = 0;
962
963 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
964 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
965}
966
967/**
968 * ixgb_free_rx_resources - Free Rx Resources
969 * @adapter: board private structure
970 *
971 * Free all receive software resources
972 **/
973
974void
975ixgb_free_rx_resources(struct ixgb_adapter *adapter)
976{
977 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
978 struct pci_dev *pdev = adapter->pdev;
979
980 ixgb_clean_rx_ring(adapter);
981
982 vfree(rx_ring->buffer_info);
983 rx_ring->buffer_info = NULL;
984
985 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
986
987 rx_ring->desc = NULL;
988}
989
990/**
991 * ixgb_clean_rx_ring - Free Rx Buffers
992 * @adapter: board private structure
993 **/
994
995static void
996ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
997{
998 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
999 struct ixgb_buffer *buffer_info;
1000 struct pci_dev *pdev = adapter->pdev;
1001 unsigned long size;
1002 unsigned int i;
1003
1004 /* Free all the Rx ring sk_buffs */
1005
1006 for(i = 0; i < rx_ring->count; i++) {
1007 buffer_info = &rx_ring->buffer_info[i];
1008 if(buffer_info->skb) {
1009
1010 pci_unmap_single(pdev,
1011 buffer_info->dma,
1012 buffer_info->length,
1013 PCI_DMA_FROMDEVICE);
1014
1015 dev_kfree_skb(buffer_info->skb);
1016
1017 buffer_info->skb = NULL;
1018 }
1019 }
1020
1021 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1022 memset(rx_ring->buffer_info, 0, size);
1023
1024 /* Zero out the descriptor ring */
1025
1026 memset(rx_ring->desc, 0, rx_ring->size);
1027
1028 rx_ring->next_to_clean = 0;
1029 rx_ring->next_to_use = 0;
1030
1031 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1032 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1033}
1034
1035/**
1036 * ixgb_set_mac - Change the Ethernet Address of the NIC
1037 * @netdev: network interface device structure
1038 * @p: pointer to an address structure
1039 *
1040 * Returns 0 on success, negative on failure
1041 **/
1042
1043static int
1044ixgb_set_mac(struct net_device *netdev, void *p)
1045{
8908c6cd 1046 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1047 struct sockaddr *addr = p;
1048
1049 if(!is_valid_ether_addr(addr->sa_data))
1050 return -EADDRNOTAVAIL;
1051
1052 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1053
1054 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1055
1056 return 0;
1057}
1058
1059/**
1060 * ixgb_set_multi - Multicast and Promiscuous mode set
1061 * @netdev: network interface device structure
1062 *
1063 * The set_multi entry point is called whenever the multicast address
1064 * list or the network interface flags are updated. This routine is
1065 * responsible for configuring the hardware for proper multicast,
1066 * promiscuous mode, and all-multi behavior.
1067 **/
1068
1069static void
1070ixgb_set_multi(struct net_device *netdev)
1071{
8908c6cd 1072 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1073 struct ixgb_hw *hw = &adapter->hw;
1074 struct dev_mc_list *mc_ptr;
222441a6 1075 u32 rctl;
1da177e4
LT
1076 int i;
1077
1078 /* Check for Promiscuous and All Multicast modes */
1079
1080 rctl = IXGB_READ_REG(hw, RCTL);
1081
1082 if(netdev->flags & IFF_PROMISC) {
1083 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1084 } else if(netdev->flags & IFF_ALLMULTI) {
1085 rctl |= IXGB_RCTL_MPE;
1086 rctl &= ~IXGB_RCTL_UPE;
1087 } else {
1088 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1089 }
1090
1091 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1092 rctl |= IXGB_RCTL_MPE;
1093 IXGB_WRITE_REG(hw, RCTL, rctl);
1094 } else {
222441a6 1095 u8 mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
273dc74e 1096 IXGB_ETH_LENGTH_OF_ADDRESS];
1da177e4
LT
1097
1098 IXGB_WRITE_REG(hw, RCTL, rctl);
1099
1100 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1101 i++, mc_ptr = mc_ptr->next)
1102 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1103 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1104
1105 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1106 }
1107}
1108
1109/**
1110 * ixgb_watchdog - Timer Call-back
1111 * @data: pointer to netdev cast into an unsigned long
1112 **/
1113
1114static void
1115ixgb_watchdog(unsigned long data)
1116{
1117 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1118 struct net_device *netdev = adapter->netdev;
1119 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1120
1121 ixgb_check_for_link(&adapter->hw);
1122
1123 if (ixgb_check_for_bad_link(&adapter->hw)) {
1124 /* force the reset path */
1125 netif_stop_queue(netdev);
1126 }
1127
1128 if(adapter->hw.link_up) {
1129 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK
1130 DPRINTK(LINK, INFO,
1131 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT
1132 adapter->link_speed = 10000;
1133 adapter->link_duplex = FULL_DUPLEX;
1134 netif_carrier_on(netdev);
1135 netif_wake_queue(netdev);
1136 }
1137 } else {
1138 if(netif_carrier_ok(netdev)) {
1139 adapter->link_speed = 0;
1140 adapter->link_duplex = 0;
ec9c3f5d 1141 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT
1142 netif_carrier_off(netdev);
1143 netif_stop_queue(netdev);
1144
1145 }
1146 }
1147
1148 ixgb_update_stats(adapter);
1149
1150 if(!netif_carrier_ok(netdev)) {
1151 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1152 /* We've lost link, so the controller stops DMA,
1153 * but we've got queued Tx work that's never going
1154 * to get done, so reset controller to flush Tx.
1155 * (Do the reset outside of interrupt context). */
1156 schedule_work(&adapter->tx_timeout_task);
1157 }
1158 }
1159
1160 /* Force detection of hung controller every watchdog period */
446490ca 1161 adapter->detect_tx_hung = true;
1da177e4
LT
1162
1163 /* generate an interrupt to force clean up of any stragglers */
1164 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1165
1166 /* Reset the timer */
1167 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1168}
1169
1170#define IXGB_TX_FLAGS_CSUM 0x00000001
1171#define IXGB_TX_FLAGS_VLAN 0x00000002
1172#define IXGB_TX_FLAGS_TSO 0x00000004
1173
235949d1 1174static int
1da177e4
LT
1175ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1176{
1da177e4
LT
1177 struct ixgb_context_desc *context_desc;
1178 unsigned int i;
222441a6
JP
1179 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1180 u16 ipcse, tucse, mss;
1da177e4
LT
1181 int err;
1182
89114afd 1183 if (likely(skb_is_gso(skb))) {
adc54139 1184 struct ixgb_buffer *buffer_info;
eddc9ec5
ACM
1185 struct iphdr *iph;
1186
1da177e4
LT
1187 if (skb_header_cloned(skb)) {
1188 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1189 if (err)
1190 return err;
1191 }
1192
ab6a5bb6 1193 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 1194 mss = skb_shinfo(skb)->gso_size;
eddc9ec5
ACM
1195 iph = ip_hdr(skb);
1196 iph->tot_len = 0;
1197 iph->check = 0;
aa8223c7
ACM
1198 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1199 iph->daddr, 0,
1200 IPPROTO_TCP, 0);
bbe735e4 1201 ipcss = skb_network_offset(skb);
eddc9ec5 1202 ipcso = (void *)&(iph->check) - (void *)skb->data;
ea2ae17d
ACM
1203 ipcse = skb_transport_offset(skb) - 1;
1204 tucss = skb_transport_offset(skb);
aa8223c7 1205 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT
1206 tucse = 0;
1207
1208 i = adapter->tx_ring.next_to_use;
1209 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1210 buffer_info = &adapter->tx_ring.buffer_info[i];
1211 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1212
1213 context_desc->ipcss = ipcss;
1214 context_desc->ipcso = ipcso;
1215 context_desc->ipcse = cpu_to_le16(ipcse);
1216 context_desc->tucss = tucss;
1217 context_desc->tucso = tucso;
1218 context_desc->tucse = cpu_to_le16(tucse);
1219 context_desc->mss = cpu_to_le16(mss);
1220 context_desc->hdr_len = hdr_len;
1221 context_desc->status = 0;
1222 context_desc->cmd_type_len = cpu_to_le32(
1223 IXGB_CONTEXT_DESC_TYPE
1224 | IXGB_CONTEXT_DESC_CMD_TSE
1225 | IXGB_CONTEXT_DESC_CMD_IP
1226 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT
1227 | IXGB_CONTEXT_DESC_CMD_IDE
1228 | (skb->len - (hdr_len)));
1229
06c2f9ec 1230
1da177e4
LT
1231 if(++i == adapter->tx_ring.count) i = 0;
1232 adapter->tx_ring.next_to_use = i;
1233
1234 return 1;
1235 }
1da177e4
LT
1236
1237 return 0;
1238}
1239
446490ca 1240static bool
1da177e4
LT
1241ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1242{
1243 struct ixgb_context_desc *context_desc;
1244 unsigned int i;
222441a6 1245 u8 css, cso;
1da177e4 1246
84fa7933 1247 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
adc54139 1248 struct ixgb_buffer *buffer_info;
ea2ae17d 1249 css = skb_transport_offset(skb);
ff1dcadb 1250 cso = css + skb->csum_offset;
1da177e4
LT
1251
1252 i = adapter->tx_ring.next_to_use;
1253 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1254 buffer_info = &adapter->tx_ring.buffer_info[i];
1255 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1256
1257 context_desc->tucss = css;
1258 context_desc->tucso = cso;
1259 context_desc->tucse = 0;
1260 /* zero out any previously existing data in one instruction */
222441a6 1261 *(u32 *)&(context_desc->ipcss) = 0;
1da177e4
LT
1262 context_desc->status = 0;
1263 context_desc->hdr_len = 0;
1264 context_desc->mss = 0;
1265 context_desc->cmd_type_len =
1266 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1267 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT
1268
1269 if(++i == adapter->tx_ring.count) i = 0;
1270 adapter->tx_ring.next_to_use = i;
1271
446490ca 1272 return true;
1da177e4
LT
1273 }
1274
446490ca 1275 return false;
1da177e4
LT
1276}
1277
1278#define IXGB_MAX_TXD_PWR 14
1279#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1280
235949d1 1281static int
1da177e4
LT
1282ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1283 unsigned int first)
1284{
1285 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1286 struct ixgb_buffer *buffer_info;
1287 int len = skb->len;
1288 unsigned int offset = 0, size, count = 0, i;
5d927853 1289 unsigned int mss = skb_shinfo(skb)->gso_size;
1da177e4
LT
1290
1291 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1292 unsigned int f;
ac79c82e 1293
1da177e4
LT
1294 len -= skb->data_len;
1295
1296 i = tx_ring->next_to_use;
1297
1298 while(len) {
1299 buffer_info = &tx_ring->buffer_info[i];
709cf018 1300 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB
1301 /* Workaround for premature desc write-backs
1302 * in TSO mode. Append 4-byte sentinel desc */
1303 if (unlikely(mss && !nr_frags && size == len && size > 8))
1304 size -= 4;
1305
1da177e4 1306 buffer_info->length = size;
adc54139 1307 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1308 buffer_info->dma =
1309 pci_map_single(adapter->pdev,
1310 skb->data + offset,
1311 size,
1312 PCI_DMA_TODEVICE);
1313 buffer_info->time_stamp = jiffies;
1dfdd7df 1314 buffer_info->next_to_watch = 0;
1da177e4
LT
1315
1316 len -= size;
1317 offset += size;
1318 count++;
1319 if(++i == tx_ring->count) i = 0;
1320 }
1321
1322 for(f = 0; f < nr_frags; f++) {
1323 struct skb_frag_struct *frag;
1324
1325 frag = &skb_shinfo(skb)->frags[f];
1326 len = frag->size;
1327 offset = 0;
1328
1329 while(len) {
1330 buffer_info = &tx_ring->buffer_info[i];
709cf018 1331 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB
1332
1333 /* Workaround for premature desc write-backs
1334 * in TSO mode. Append 4-byte sentinel desc */
19abe86d
AK
1335 if (unlikely(mss && (f == (nr_frags - 1))
1336 && size == len && size > 8))
5d927853
JB
1337 size -= 4;
1338
1da177e4
LT
1339 buffer_info->length = size;
1340 buffer_info->dma =
1341 pci_map_page(adapter->pdev,
1342 frag->page,
1343 frag->page_offset + offset,
1344 size,
1345 PCI_DMA_TODEVICE);
1346 buffer_info->time_stamp = jiffies;
1dfdd7df 1347 buffer_info->next_to_watch = 0;
1da177e4
LT
1348
1349 len -= size;
1350 offset += size;
1351 count++;
1352 if(++i == tx_ring->count) i = 0;
1353 }
1354 }
1355 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1356 tx_ring->buffer_info[i].skb = skb;
1357 tx_ring->buffer_info[first].next_to_watch = i;
1358
1359 return count;
1360}
1361
235949d1 1362static void
1da177e4
LT
1363ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1364{
1365 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1366 struct ixgb_tx_desc *tx_desc = NULL;
1367 struct ixgb_buffer *buffer_info;
222441a6
JP
1368 u32 cmd_type_len = adapter->tx_cmd_type;
1369 u8 status = 0;
1370 u8 popts = 0;
1da177e4
LT
1371 unsigned int i;
1372
1373 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1374 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1375 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1376 }
1377
1378 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1379 popts |= IXGB_TX_DESC_POPTS_TXSM;
1380
1381 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1382 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1383 }
1384
1385 i = tx_ring->next_to_use;
1386
1387 while(count--) {
1388 buffer_info = &tx_ring->buffer_info[i];
1389 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1390 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1391 tx_desc->cmd_type_len =
1392 cpu_to_le32(cmd_type_len | buffer_info->length);
1393 tx_desc->status = status;
1394 tx_desc->popts = popts;
1395 tx_desc->vlan = cpu_to_le16(vlan_id);
1396
1397 if(++i == tx_ring->count) i = 0;
1398 }
1399
1400 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1401 | IXGB_TX_DESC_CMD_RS );
1402
1403 /* Force memory writes to complete before letting h/w
1404 * know there are new descriptors to fetch. (Only
1405 * applicable for weak-ordered memory model archs,
1406 * such as IA-64). */
1407 wmb();
1408
1409 tx_ring->next_to_use = i;
1410 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1411}
1412
dfd341e4
JB
1413static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1414{
1415 struct ixgb_adapter *adapter = netdev_priv(netdev);
1416 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1417
1418 netif_stop_queue(netdev);
1419 /* Herbert's original patch had:
1420 * smp_mb__after_netif_stop_queue();
1421 * but since that doesn't exist yet, just open code it. */
1422 smp_mb();
1423
1424 /* We need to check again in a case another CPU has just
1425 * made room available. */
1426 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1427 return -EBUSY;
1428
1429 /* A reprieve! */
1430 netif_start_queue(netdev);
1431 ++adapter->restart_queue;
1432 return 0;
1433}
1434
1435static int ixgb_maybe_stop_tx(struct net_device *netdev,
1436 struct ixgb_desc_ring *tx_ring, int size)
1437{
1438 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1439 return 0;
1440 return __ixgb_maybe_stop_tx(netdev, size);
1441}
1442
1443
1da177e4
LT
1444/* Tx Descriptors needed, worst case */
1445#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1446 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
5d927853
JB
1447#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1448 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1449 + 1 /* one more needed for sentinel TSO workaround */
1da177e4
LT
1450
1451static int
1452ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1453{
8908c6cd 1454 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1455 unsigned int first;
1456 unsigned int tx_flags = 0;
1457 unsigned long flags;
1458 int vlan_id = 0;
1459 int tso;
1460
bab2bce7
JB
1461 if (test_bit(__IXGB_DOWN, &adapter->flags)) {
1462 dev_kfree_skb(skb);
1463 return NETDEV_TX_OK;
1464 }
1465
1da177e4
LT
1466 if(skb->len <= 0) {
1467 dev_kfree_skb_any(skb);
1468 return 0;
1469 }
1470
f017f14b 1471#ifdef NETIF_F_LLTX
bab2bce7 1472 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
f017f14b
AK
1473 /* Collision - tell upper layer to requeue */
1474 local_irq_restore(flags);
1475 return NETDEV_TX_LOCKED;
1476 }
1477#else
1da177e4 1478 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK
1479#endif
1480
dfd341e4
JB
1481 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1482 DESC_NEEDED))) {
1da177e4
LT
1483 netif_stop_queue(netdev);
1484 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1485 return NETDEV_TX_BUSY;
1da177e4 1486 }
f017f14b
AK
1487
1488#ifndef NETIF_F_LLTX
1da177e4 1489 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1490#endif
1da177e4
LT
1491
1492 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1493 tx_flags |= IXGB_TX_FLAGS_VLAN;
1494 vlan_id = vlan_tx_tag_get(skb);
1495 }
1496
1497 first = adapter->tx_ring.next_to_use;
1498
1499 tso = ixgb_tso(adapter, skb);
1500 if (tso < 0) {
1501 dev_kfree_skb_any(skb);
f017f14b
AK
1502#ifdef NETIF_F_LLTX
1503 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1504#endif
1da177e4
LT
1505 return NETDEV_TX_OK;
1506 }
1507
96f9c2e2 1508 if (likely(tso))
1da177e4
LT
1509 tx_flags |= IXGB_TX_FLAGS_TSO;
1510 else if(ixgb_tx_csum(adapter, skb))
1511 tx_flags |= IXGB_TX_FLAGS_CSUM;
1512
1513 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1514 tx_flags);
1515
1516 netdev->trans_start = jiffies;
1517
f017f14b
AK
1518#ifdef NETIF_F_LLTX
1519 /* Make sure there is space in the ring for the next send. */
dfd341e4 1520 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
f017f14b
AK
1521
1522 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1523
1524#endif
1525 return NETDEV_TX_OK;
1da177e4
LT
1526}
1527
1528/**
1529 * ixgb_tx_timeout - Respond to a Tx Hang
1530 * @netdev: network interface device structure
1531 **/
1532
1533static void
1534ixgb_tx_timeout(struct net_device *netdev)
1535{
8908c6cd 1536 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1537
1538 /* Do the reset outside of interrupt context */
1539 schedule_work(&adapter->tx_timeout_task);
1540}
1541
1542static void
c4028958 1543ixgb_tx_timeout_task(struct work_struct *work)
1da177e4 1544{
c4028958
DH
1545 struct ixgb_adapter *adapter =
1546 container_of(work, struct ixgb_adapter, tx_timeout_task);
1da177e4 1547
9b8118df 1548 adapter->tx_timeout_count++;
446490ca 1549 ixgb_down(adapter, true);
1da177e4
LT
1550 ixgb_up(adapter);
1551}
1552
1553/**
1554 * ixgb_get_stats - Get System Network Statistics
1555 * @netdev: network interface device structure
1556 *
1557 * Returns the address of the device statistics structure.
1558 * The statistics are actually updated from the timer callback.
1559 **/
1560
1561static struct net_device_stats *
1562ixgb_get_stats(struct net_device *netdev)
1563{
8908c6cd 1564 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1565
1566 return &adapter->net_stats;
1567}
1568
1569/**
1570 * ixgb_change_mtu - Change the Maximum Transfer Unit
1571 * @netdev: network interface device structure
1572 * @new_mtu: new value for maximum frame size
1573 *
1574 * Returns 0 on success, negative on failure
1575 **/
1576
1577static int
1578ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1579{
8908c6cd 1580 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1581 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1582 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1583
1584
1585 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1586 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1587 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT
1588 return -EINVAL;
1589 }
1590
3f3dc0dd 1591 adapter->rx_buffer_len = max_frame;
1da177e4
LT
1592
1593 netdev->mtu = new_mtu;
1594
3f3dc0dd 1595 if ((old_max_frame != max_frame) && netif_running(netdev)) {
446490ca 1596 ixgb_down(adapter, true);
1da177e4
LT
1597 ixgb_up(adapter);
1598 }
1599
1600 return 0;
1601}
1602
1603/**
1604 * ixgb_update_stats - Update the board statistics counters.
1605 * @adapter: board private structure
1606 **/
1607
1608void
1609ixgb_update_stats(struct ixgb_adapter *adapter)
1610{
5633684d 1611 struct net_device *netdev = adapter->netdev;
01748fbb
LV
1612 struct pci_dev *pdev = adapter->pdev;
1613
1614 /* Prevent stats update while adapter is being reset */
81b1955e 1615 if (pci_channel_offline(pdev))
01748fbb 1616 return;
5633684d
MC
1617
1618 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1619 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1620 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1621 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1622 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1623 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1624
1625 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1626 /* fix up multicast stats by removing broadcasts */
7b89178d
MC
1627 if(multi >= bcast)
1628 multi -= bcast;
5633684d
MC
1629
1630 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1631 adapter->stats.mprch += (multi >> 32);
1632 adapter->stats.bprcl += bcast_l;
1633 adapter->stats.bprch += bcast_h;
1634 } else {
1635 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1636 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1637 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1638 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1639 }
1da177e4
LT
1640 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1641 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1642 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1643 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT
1644 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1645 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1646 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1647 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1648 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1649 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1650 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1651 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1652 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1653 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1654 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1655 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1656 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1657 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1658 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1659 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1660 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1661 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1662 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1663 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1664 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1665 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1666 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1667 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1668 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1669 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1670 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1671 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1672 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1673 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1674 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1675 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1676 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1677 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1678 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1679 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1680 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1681 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1682 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1683 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1684 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1685 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1686 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1687 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1688 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1689 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1690 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1691 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1692 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1693 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1694 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1695 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1696
1697 /* Fill out the OS statistics structure */
1698
1699 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1700 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1701 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1702 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1703 adapter->net_stats.multicast = adapter->stats.mprcl;
1704 adapter->net_stats.collisions = 0;
1705
1706 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1707 * with a length in the type/len field */
1708 adapter->net_stats.rx_errors =
1709 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1710 adapter->stats.ruc +
1711 adapter->stats.roc /*+ adapter->stats.rlec */ +
1712 adapter->stats.icbc +
1713 adapter->stats.ecbc + adapter->stats.mpc;
1714
1da177e4
LT
1715 /* see above
1716 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1717 */
1718
1719 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1720 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1721 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1722 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1723
1724 adapter->net_stats.tx_errors = 0;
1725 adapter->net_stats.rx_frame_errors = 0;
1726 adapter->net_stats.tx_aborted_errors = 0;
1727 adapter->net_stats.tx_carrier_errors = 0;
1728 adapter->net_stats.tx_fifo_errors = 0;
1729 adapter->net_stats.tx_heartbeat_errors = 0;
1730 adapter->net_stats.tx_window_errors = 0;
1731}
1732
1733#define IXGB_MAX_INTR 10
1734/**
1735 * ixgb_intr - Interrupt Handler
1736 * @irq: interrupt number
1737 * @data: pointer to a network interface device structure
1da177e4
LT
1738 **/
1739
1740static irqreturn_t
7d12e780 1741ixgb_intr(int irq, void *data)
1da177e4
LT
1742{
1743 struct net_device *netdev = data;
8908c6cd 1744 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4 1745 struct ixgb_hw *hw = &adapter->hw;
222441a6 1746 u32 icr = IXGB_READ_REG(hw, ICR);
1da177e4
LT
1747#ifndef CONFIG_IXGB_NAPI
1748 unsigned int i;
1749#endif
1750
1751 if(unlikely(!icr))
1752 return IRQ_NONE; /* Not our interrupt */
1753
bab2bce7
JB
1754 if (unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)))
1755 if (!test_bit(__IXGB_DOWN, &adapter->flags))
1756 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT
1757
1758#ifdef CONFIG_IXGB_NAPI
bea3348e 1759 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1da177e4
LT
1760
1761 /* Disable interrupts and register for poll. The flush
1762 of the posted write is intentionally left out.
1763 */
1764
1da177e4 1765 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
bea3348e 1766 __netif_rx_schedule(netdev, &adapter->napi);
1da177e4
LT
1767 }
1768#else
1769 /* yes, that is actually a & and it is meant to make sure that
1770 * every pass through this for loop checks both receive and
1771 * transmit queues for completed descriptors, intended to
1772 * avoid starvation issues and assist tx/rx fairness. */
1773 for(i = 0; i < IXGB_MAX_INTR; i++)
1774 if(!ixgb_clean_rx_irq(adapter) &
1775 !ixgb_clean_tx_irq(adapter))
1776 break;
1777#endif
1778 return IRQ_HANDLED;
1779}
1780
1781#ifdef CONFIG_IXGB_NAPI
1782/**
1783 * ixgb_clean - NAPI Rx polling callback
1784 * @adapter: board private structure
1785 **/
1786
1787static int
bea3348e 1788ixgb_clean(struct napi_struct *napi, int budget)
1da177e4 1789{
bea3348e
SH
1790 struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1791 struct net_device *netdev = adapter->netdev;
1da177e4
LT
1792 int work_done = 0;
1793
53e52c72 1794 ixgb_clean_tx_irq(adapter);
bea3348e 1795 ixgb_clean_rx_irq(adapter, &work_done, budget);
1da177e4 1796
53e52c72
DM
1797 /* If budget not fully consumed, exit the polling mode */
1798 if (work_done < budget) {
bea3348e 1799 netif_rx_complete(netdev, napi);
1da177e4 1800 ixgb_irq_enable(adapter);
1da177e4
LT
1801 }
1802
bea3348e 1803 return work_done;
1da177e4
LT
1804}
1805#endif
1806
1807/**
1808 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1809 * @adapter: board private structure
1810 **/
1811
446490ca 1812static bool
1da177e4
LT
1813ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1814{
1815 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1816 struct net_device *netdev = adapter->netdev;
1817 struct ixgb_tx_desc *tx_desc, *eop_desc;
1818 struct ixgb_buffer *buffer_info;
1819 unsigned int i, eop;
446490ca 1820 bool cleaned = false;
1da177e4
LT
1821
1822 i = tx_ring->next_to_clean;
1823 eop = tx_ring->buffer_info[i].next_to_watch;
1824 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1825
1826 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1827
446490ca 1828 for (cleaned = false; !cleaned; ) {
1da177e4
LT
1829 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1830 buffer_info = &tx_ring->buffer_info[i];
1831
1832 if (tx_desc->popts
1833 & (IXGB_TX_DESC_POPTS_TXSM |
1834 IXGB_TX_DESC_POPTS_IXSM))
1835 adapter->hw_csum_tx_good++;
1836
1837 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1838
222441a6 1839 *(u32 *)&(tx_desc->status) = 0;
1da177e4
LT
1840
1841 cleaned = (i == eop);
1842 if(++i == tx_ring->count) i = 0;
1843 }
1844
1845 eop = tx_ring->buffer_info[i].next_to_watch;
1846 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1847 }
1848
1849 tx_ring->next_to_clean = i;
1850
0f8ecbad
JB
1851 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
1852 IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED)) {
1853 /* Make sure that anybody stopping the queue after this
1854 * sees the new next_to_clean. */
1855 smp_mb();
1856
1857 if (netif_queue_stopped(netdev) &&
1858 !(test_bit(__IXGB_DOWN, &adapter->flags))) {
3352a3b2 1859 netif_wake_queue(netdev);
0f8ecbad
JB
1860 ++adapter->restart_queue;
1861 }
1da177e4 1862 }
1da177e4
LT
1863
1864 if(adapter->detect_tx_hung) {
1865 /* detect a transmit hang in hardware, this serializes the
1866 * check with the clearing of time_stamp and movement of i */
446490ca 1867 adapter->detect_tx_hung = false;
9b8118df
AK
1868 if (tx_ring->buffer_info[eop].dma &&
1869 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1870 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK
1871 IXGB_STATUS_TXOFF)) {
1872 /* detected Tx unit hang */
1873 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1874 " TDH <%x>\n"
1875 " TDT <%x>\n"
1876 " next_to_use <%x>\n"
1877 " next_to_clean <%x>\n"
1878 "buffer_info[next_to_clean]\n"
1879 " time_stamp <%lx>\n"
1880 " next_to_watch <%x>\n"
1881 " jiffies <%lx>\n"
1882 " next_to_watch.status <%x>\n",
1883 IXGB_READ_REG(&adapter->hw, TDH),
1884 IXGB_READ_REG(&adapter->hw, TDT),
1885 tx_ring->next_to_use,
1886 tx_ring->next_to_clean,
1887 tx_ring->buffer_info[eop].time_stamp,
1888 eop,
1889 jiffies,
1890 eop_desc->status);
1da177e4 1891 netif_stop_queue(netdev);
9b8118df 1892 }
1da177e4
LT
1893 }
1894
1895 return cleaned;
1896}
1897
1898/**
1899 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1900 * @adapter: board private structure
1901 * @rx_desc: receive descriptor
1902 * @sk_buff: socket buffer with received data
1903 **/
1904
235949d1 1905static void
1da177e4
LT
1906ixgb_rx_checksum(struct ixgb_adapter *adapter,
1907 struct ixgb_rx_desc *rx_desc,
1908 struct sk_buff *skb)
1909{
1910 /* Ignore Checksum bit is set OR
1911 * TCP Checksum has not been calculated
1912 */
1913 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1914 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1915 skb->ip_summed = CHECKSUM_NONE;
1916 return;
1917 }
1918
1919 /* At this point we know the hardware did the TCP checksum */
1920 /* now look at the TCP checksum error bit */
1921 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1922 /* let the stack verify checksum errors */
1923 skb->ip_summed = CHECKSUM_NONE;
1924 adapter->hw_csum_rx_error++;
1925 } else {
1926 /* TCP checksum is good */
1927 skb->ip_summed = CHECKSUM_UNNECESSARY;
1928 adapter->hw_csum_rx_good++;
1929 }
1930}
1931
1932/**
1933 * ixgb_clean_rx_irq - Send received data up the network stack,
1934 * @adapter: board private structure
1935 **/
1936
446490ca 1937static bool
1da177e4
LT
1938#ifdef CONFIG_IXGB_NAPI
1939ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1940#else
1941ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1942#endif
1943{
1944 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1945 struct net_device *netdev = adapter->netdev;
1946 struct pci_dev *pdev = adapter->pdev;
1947 struct ixgb_rx_desc *rx_desc, *next_rxd;
1948 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
222441a6 1949 u32 length;
1da177e4 1950 unsigned int i, j;
446490ca 1951 bool cleaned = false;
1da177e4
LT
1952
1953 i = rx_ring->next_to_clean;
1954 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1955 buffer_info = &rx_ring->buffer_info[i];
1956
1957 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC
1958 struct sk_buff *skb, *next_skb;
1959 u8 status;
1da177e4
LT
1960
1961#ifdef CONFIG_IXGB_NAPI
1962 if(*work_done >= work_to_do)
1963 break;
1964
1965 (*work_done)++;
1966#endif
f404de1c 1967 status = rx_desc->status;
1da177e4 1968 skb = buffer_info->skb;
1dfdd7df 1969 buffer_info->skb = NULL;
f404de1c 1970
1da177e4
LT
1971 prefetch(skb->data);
1972
1973 if(++i == rx_ring->count) i = 0;
1974 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1975 prefetch(next_rxd);
1976
1977 if((j = i + 1) == rx_ring->count) j = 0;
1978 next2_buffer = &rx_ring->buffer_info[j];
1979 prefetch(next2_buffer);
1980
1981 next_buffer = &rx_ring->buffer_info[i];
1982 next_skb = next_buffer->skb;
1983 prefetch(next_skb);
1984
446490ca 1985 cleaned = true;
1da177e4
LT
1986
1987 pci_unmap_single(pdev,
1988 buffer_info->dma,
1989 buffer_info->length,
1990 PCI_DMA_FROMDEVICE);
1991
1992 length = le16_to_cpu(rx_desc->length);
1993
f404de1c 1994 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT
1995
1996 /* All receives must fit into a single buffer */
1997
1998 IXGB_DBG("Receive packet consumed multiple buffers "
1999 "length<%x>\n", length);
2000
2001 dev_kfree_skb_irq(skb);
f404de1c 2002 goto rxdesc_done;
1da177e4
LT
2003 }
2004
2005 if (unlikely(rx_desc->errors
2006 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
2007 | IXGB_RX_DESC_ERRORS_P |
2008 IXGB_RX_DESC_ERRORS_RXE))) {
2009
2010 dev_kfree_skb_irq(skb);
f404de1c 2011 goto rxdesc_done;
1da177e4
LT
2012 }
2013
6b900bb4
AK
2014 /* code added for copybreak, this should improve
2015 * performance for small packets with large amounts
2016 * of reassembly being done in the stack */
2017#define IXGB_CB_LENGTH 256
2018 if (length < IXGB_CB_LENGTH) {
2019 struct sk_buff *new_skb =
5791704f 2020 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
6b900bb4
AK
2021 if (new_skb) {
2022 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM
2023 skb_copy_to_linear_data_offset(new_skb,
2024 -NET_IP_ALIGN,
2025 (skb->data -
2026 NET_IP_ALIGN),
2027 (length +
2028 NET_IP_ALIGN));
6b900bb4
AK
2029 /* save the skb in buffer_info as good */
2030 buffer_info->skb = skb;
2031 skb = new_skb;
2032 }
2033 }
2034 /* end copybreak code */
2035
1da177e4
LT
2036 /* Good Receive */
2037 skb_put(skb, length);
2038
2039 /* Receive Checksum Offload */
2040 ixgb_rx_checksum(adapter, rx_desc, skb);
2041
2042 skb->protocol = eth_type_trans(skb, netdev);
2043#ifdef CONFIG_IXGB_NAPI
f404de1c 2044 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4 2045 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 2046 le16_to_cpu(rx_desc->special));
1da177e4
LT
2047 } else {
2048 netif_receive_skb(skb);
2049 }
2050#else /* CONFIG_IXGB_NAPI */
f404de1c 2051 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4 2052 vlan_hwaccel_rx(skb, adapter->vlgrp,
38b22195 2053 le16_to_cpu(rx_desc->special));
1da177e4
LT
2054 } else {
2055 netif_rx(skb);
2056 }
2057#endif /* CONFIG_IXGB_NAPI */
2058 netdev->last_rx = jiffies;
2059
f404de1c
MC
2060rxdesc_done:
2061 /* clean up descriptor, might be written over by hw */
1da177e4 2062 rx_desc->status = 0;
1da177e4 2063
f404de1c 2064 /* use prefetched values */
1da177e4
LT
2065 rx_desc = next_rxd;
2066 buffer_info = next_buffer;
2067 }
2068
2069 rx_ring->next_to_clean = i;
2070
2071 ixgb_alloc_rx_buffers(adapter);
2072
2073 return cleaned;
2074}
2075
2076/**
2077 * ixgb_alloc_rx_buffers - Replace used receive buffers
2078 * @adapter: address of board private structure
2079 **/
2080
2081static void
2082ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2083{
2084 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2085 struct net_device *netdev = adapter->netdev;
2086 struct pci_dev *pdev = adapter->pdev;
2087 struct ixgb_rx_desc *rx_desc;
2088 struct ixgb_buffer *buffer_info;
2089 struct sk_buff *skb;
2090 unsigned int i;
1da177e4
LT
2091 long cleancount;
2092
2093 i = rx_ring->next_to_use;
2094 buffer_info = &rx_ring->buffer_info[i];
2095 cleancount = IXGB_DESC_UNUSED(rx_ring);
2096
1da177e4 2097
41639fed
MC
2098 /* leave three descriptors unused */
2099 while(--cleancount > 2) {
1dfdd7df 2100 /* recycle! its good for you */
69c7a940
AK
2101 skb = buffer_info->skb;
2102 if (skb) {
1dfdd7df
AK
2103 skb_trim(skb, 0);
2104 goto map_skb;
2105 }
1da177e4 2106
69c7a940
AK
2107 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2108 + NET_IP_ALIGN);
1dfdd7df 2109 if (unlikely(!skb)) {
1da177e4 2110 /* Better luck next round */
1dfdd7df 2111 adapter->alloc_rx_buff_failed++;
1da177e4
LT
2112 break;
2113 }
2114
2115 /* Make buffer alignment 2 beyond a 16 byte boundary
2116 * this will result in a 16 byte aligned IP header after
2117 * the 14 byte MAC header is removed
2118 */
2119 skb_reserve(skb, NET_IP_ALIGN);
2120
1da177e4
LT
2121 buffer_info->skb = skb;
2122 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK
2123map_skb:
2124 buffer_info->dma = pci_map_single(pdev,
2125 skb->data,
2126 adapter->rx_buffer_len,
2127 PCI_DMA_FROMDEVICE);
1da177e4 2128
1dfdd7df 2129 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2130 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC
2131 /* guarantee DD bit not set now before h/w gets descriptor
2132 * this is the rest of the workaround for h/w double
2133 * writeback. */
2134 rx_desc->status = 0;
1da177e4 2135
1da177e4
LT
2136
2137 if(++i == rx_ring->count) i = 0;
2138 buffer_info = &rx_ring->buffer_info[i];
2139 }
2140
1dfdd7df
AK
2141 if (likely(rx_ring->next_to_use != i)) {
2142 rx_ring->next_to_use = i;
2143 if (unlikely(i-- == 0))
2144 i = (rx_ring->count - 1);
2145
2146 /* Force memory writes to complete before letting h/w
2147 * know there are new descriptors to fetch. (Only
2148 * applicable for weak-ordered memory model archs, such
2149 * as IA-64). */
2150 wmb();
2151 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2152 }
1da177e4
LT
2153}
2154
2155/**
2156 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2157 *
2158 * @param netdev network interface device structure
2159 * @param grp indicates to enable or disable tagging/stripping
2160 **/
2161static void
2162ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2163{
8908c6cd 2164 struct ixgb_adapter *adapter = netdev_priv(netdev);
222441a6 2165 u32 ctrl, rctl;
1da177e4
LT
2166
2167 ixgb_irq_disable(adapter);
2168 adapter->vlgrp = grp;
2169
2170 if(grp) {
2171 /* enable VLAN tag insert/strip */
2172 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2173 ctrl |= IXGB_CTRL0_VME;
2174 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2175
2176 /* enable VLAN receive filtering */
2177
2178 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2179 rctl |= IXGB_RCTL_VFE;
2180 rctl &= ~IXGB_RCTL_CFIEN;
2181 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2182 } else {
2183 /* disable VLAN tag insert/strip */
2184
2185 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2186 ctrl &= ~IXGB_CTRL0_VME;
2187 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2188
2189 /* disable VLAN filtering */
2190
2191 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2192 rctl &= ~IXGB_RCTL_VFE;
2193 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2194 }
2195
bab2bce7
JB
2196 /* don't enable interrupts unless we are UP */
2197 if (adapter->netdev->flags & IFF_UP)
2198 ixgb_irq_enable(adapter);
1da177e4
LT
2199}
2200
2201static void
222441a6 2202ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 2203{
8908c6cd 2204 struct ixgb_adapter *adapter = netdev_priv(netdev);
222441a6 2205 u32 vfta, index;
1da177e4
LT
2206
2207 /* add VID to filter table */
2208
2209 index = (vid >> 5) & 0x7F;
2210 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2211 vfta |= (1 << (vid & 0x1F));
2212 ixgb_write_vfta(&adapter->hw, index, vfta);
2213}
2214
2215static void
222441a6 2216ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 2217{
8908c6cd 2218 struct ixgb_adapter *adapter = netdev_priv(netdev);
222441a6 2219 u32 vfta, index;
1da177e4
LT
2220
2221 ixgb_irq_disable(adapter);
2222
5c15bdec 2223 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4 2224
bab2bce7
JB
2225 /* don't enable interrupts unless we are UP */
2226 if (adapter->netdev->flags & IFF_UP)
2227 ixgb_irq_enable(adapter);
1da177e4 2228
bab2bce7 2229 /* remove VID from filter table */
1da177e4
LT
2230
2231 index = (vid >> 5) & 0x7F;
2232 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2233 vfta &= ~(1 << (vid & 0x1F));
2234 ixgb_write_vfta(&adapter->hw, index, vfta);
2235}
2236
2237static void
2238ixgb_restore_vlan(struct ixgb_adapter *adapter)
2239{
2240 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2241
2242 if(adapter->vlgrp) {
222441a6 2243 u16 vid;
1da177e4 2244 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 2245 if(!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT
2246 continue;
2247 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2248 }
2249 }
2250}
2251
1da177e4
LT
2252#ifdef CONFIG_NET_POLL_CONTROLLER
2253/*
2254 * Polling 'interrupt' - used by things like netconsole to send skbs
2255 * without having to re-enable interrupts. It's not called while
2256 * the interrupt routine is executing.
2257 */
2258
2259static void ixgb_netpoll(struct net_device *dev)
2260{
f990b426 2261 struct ixgb_adapter *adapter = netdev_priv(dev);
ac79c82e 2262
1da177e4 2263 disable_irq(adapter->pdev->irq);
7d12e780 2264 ixgb_intr(adapter->pdev->irq, dev);
1da177e4
LT
2265 enable_irq(adapter->pdev->irq);
2266}
2267#endif
2268
01748fbb
LV
2269/**
2270 * ixgb_io_error_detected() - called when PCI error is detected
2271 * @pdev pointer to pci device with error
2272 * @state pci channel state after error
2273 *
2274 * This callback is called by the PCI subsystem whenever
2275 * a PCI bus error is detected.
2276 */
2277static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2278 enum pci_channel_state state)
2279{
2280 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2281 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2282
2283 if(netif_running(netdev))
446490ca 2284 ixgb_down(adapter, true);
01748fbb
LV
2285
2286 pci_disable_device(pdev);
2287
2288 /* Request a slot reset. */
2289 return PCI_ERS_RESULT_NEED_RESET;
2290}
2291
2292/**
2293 * ixgb_io_slot_reset - called after the pci bus has been reset.
2294 * @pdev pointer to pci device with error
2295 *
2296 * This callback is called after the PCI buss has been reset.
2297 * Basically, this tries to restart the card from scratch.
2298 * This is a shortened version of the device probe/discovery code,
2299 * it resembles the first-half of the ixgb_probe() routine.
2300 */
2301static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2302{
2303 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2304 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2305
2306 if(pci_enable_device(pdev)) {
2307 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2308 return PCI_ERS_RESULT_DISCONNECT;
2309 }
2310
2311 /* Perform card reset only on one instance of the card */
2312 if (0 != PCI_FUNC (pdev->devfn))
2313 return PCI_ERS_RESULT_RECOVERED;
2314
2315 pci_set_master(pdev);
2316
2317 netif_carrier_off(netdev);
2318 netif_stop_queue(netdev);
2319 ixgb_reset(adapter);
2320
2321 /* Make sure the EEPROM is good */
2322 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2323 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2324 return PCI_ERS_RESULT_DISCONNECT;
2325 }
2326 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2327 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2328
2329 if(!is_valid_ether_addr(netdev->perm_addr)) {
2330 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2331 return PCI_ERS_RESULT_DISCONNECT;
2332 }
2333
2334 return PCI_ERS_RESULT_RECOVERED;
2335}
2336
2337/**
2338 * ixgb_io_resume - called when its OK to resume normal operations
2339 * @pdev pointer to pci device with error
2340 *
2341 * The error recovery driver tells us that its OK to resume
2342 * normal operation. Implementation resembles the second-half
2343 * of the ixgb_probe() routine.
2344 */
2345static void ixgb_io_resume (struct pci_dev *pdev)
2346{
2347 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2348 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2349
2350 pci_set_master(pdev);
2351
2352 if(netif_running(netdev)) {
2353 if(ixgb_up(adapter)) {
2354 printk ("ixgb: can't bring device back up after reset\n");
2355 return;
2356 }
2357 }
2358
2359 netif_device_attach(netdev);
2360 mod_timer(&adapter->watchdog_timer, jiffies);
2361}
2362
1da177e4 2363/* ixgb_main.c */