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ixgb: add NETIF_F_LLTX analogous to e1000
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
ab707da7
MC		 32 * 1.0.96 04/19/05
33 * - Make needlessly global code static -- bunk@stusta.de
34 * - ethtool cleanup -- shemminger@osdl.org
35 * - Support for MODULE_VERSION -- linville@tuxdriver.com
36 * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
1da177e4
LT		 37 * 1.0.88 01/05/05
38 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
39 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
40 * 1.0.84 10/26/04
41 * - reset buffer_info->dma in Tx resource cleanup logic
42 * 1.0.83 10/12/04
43 * - sparse cleanup - shemminger@osdl.org
44 * - fix tx resource cleanup logic
45 */
46
47char ixgb_driver_name[] = "ixgb";
e9ab1d14 48static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 49
50#ifndef CONFIG_IXGB_NAPI
51#define DRIVERNAPI
52#else
53#define DRIVERNAPI "-NAPI"
54#endif
ab707da7 55#define DRV_VERSION "1.0.100-k2"DRIVERNAPI
01e5abc2 56char ixgb_driver_version[] = DRV_VERSION;
ab707da7 57static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 58
59/* ixgb_pci_tbl - PCI Device ID Table
60 *
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
66 */
67static struct pci_device_id ixgb_pci_tbl[] = {
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
70 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
71 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
72 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
73 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74
75 /* required last entry */
76 {0,}
77};
78
79MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
80
81/* Local Function Prototypes */
82
83int ixgb_up(struct ixgb_adapter *adapter);
84void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
85void ixgb_reset(struct ixgb_adapter *adapter);
86int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
87int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
88void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
89void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
90void ixgb_update_stats(struct ixgb_adapter *adapter);
91
92static int ixgb_init_module(void);
93static void ixgb_exit_module(void);
94static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
95static void __devexit ixgb_remove(struct pci_dev *pdev);
96static int ixgb_sw_init(struct ixgb_adapter *adapter);
97static int ixgb_open(struct net_device *netdev);
98static int ixgb_close(struct net_device *netdev);
99static void ixgb_configure_tx(struct ixgb_adapter *adapter);
100static void ixgb_configure_rx(struct ixgb_adapter *adapter);
101static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
102static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
103static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
104static void ixgb_set_multi(struct net_device *netdev);
105static void ixgb_watchdog(unsigned long data);
106static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
107static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
108static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
109static int ixgb_set_mac(struct net_device *netdev, void *p);
110static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
111static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 112
1da177e4
LT		 113#ifdef CONFIG_IXGB_NAPI
114static int ixgb_clean(struct net_device *netdev, int *budget);
115static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
116 int *work_done, int work_to_do);
117#else
118static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
119#endif
120static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
121void ixgb_set_ethtool_ops(struct net_device *netdev);
122static void ixgb_tx_timeout(struct net_device *dev);
123static void ixgb_tx_timeout_task(struct net_device *dev);
124static void ixgb_vlan_rx_register(struct net_device *netdev,
125 struct vlan_group *grp);
126static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
127static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
128static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
129
1da177e4
LT		 130#ifdef CONFIG_NET_POLL_CONTROLLER
131/* for netdump / net console */
132static void ixgb_netpoll(struct net_device *dev);
133#endif
134
1da177e4
LT		 135/* Exported from other modules */
136
137extern void ixgb_check_options(struct ixgb_adapter *adapter);
138
139static struct pci_driver ixgb_driver = {
c2eba932 140 .name = ixgb_driver_name,
1da177e4 141 .id_table = ixgb_pci_tbl,
c2eba932
MC		 142 .probe = ixgb_probe,
143 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 144};
145
146MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
147MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
148MODULE_LICENSE("GPL");
01e5abc2 149MODULE_VERSION(DRV_VERSION);
1da177e4
LT		 150
151/* some defines for controlling descriptor fetches in h/w */
1da177e4 152#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC		 153#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
154 * this */
155#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
156 * is pushed this many descriptors
157 * from head */
1da177e4
LT		 158
159/**
160 * ixgb_init_module - Driver Registration Routine
161 *
162 * ixgb_init_module is the first routine called when the driver is
163 * loaded. All it does is register with the PCI subsystem.
164 **/
165
166static int __init
167ixgb_init_module(void)
168{
1da177e4
LT		 169 printk(KERN_INFO "%s - version %s\n",
170 ixgb_driver_string, ixgb_driver_version);
171
172 printk(KERN_INFO "%s\n", ixgb_copyright);
173
c2eba932 174 return pci_module_init(&ixgb_driver);
1da177e4
LT		 175}
176
177module_init(ixgb_init_module);
178
179/**
180 * ixgb_exit_module - Driver Exit Cleanup Routine
181 *
182 * ixgb_exit_module is called just before the driver is removed
183 * from memory.
184 **/
185
186static void __exit
187ixgb_exit_module(void)
188{
1da177e4
LT		 189 pci_unregister_driver(&ixgb_driver);
190}
191
192module_exit(ixgb_exit_module);
193
194/**
195 * ixgb_irq_disable - Mask off interrupt generation on the NIC
196 * @adapter: board private structure
197 **/
198
199static inline void
200ixgb_irq_disable(struct ixgb_adapter *adapter)
201{
202 atomic_inc(&adapter->irq_sem);
203 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
204 IXGB_WRITE_FLUSH(&adapter->hw);
205 synchronize_irq(adapter->pdev->irq);
206}
207
208/**
209 * ixgb_irq_enable - Enable default interrupt generation settings
210 * @adapter: board private structure
211 **/
212
213static inline void
214ixgb_irq_enable(struct ixgb_adapter *adapter)
215{
216 if(atomic_dec_and_test(&adapter->irq_sem)) {
217 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 218 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
219 IXGB_INT_LSC);
1da177e4
LT		 220 IXGB_WRITE_FLUSH(&adapter->hw);
221 }
222}
223
224int
225ixgb_up(struct ixgb_adapter *adapter)
226{
227 struct net_device *netdev = adapter->netdev;
228 int err;
229 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
230 struct ixgb_hw *hw = &adapter->hw;
231
232 /* hardware has been reset, we need to reload some things */
233
234 ixgb_set_multi(netdev);
235
236 ixgb_restore_vlan(adapter);
237
238 ixgb_configure_tx(adapter);
239 ixgb_setup_rctl(adapter);
240 ixgb_configure_rx(adapter);
241 ixgb_alloc_rx_buffers(adapter);
242
243#ifdef CONFIG_PCI_MSI
244 {
245 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
246 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
247 adapter->have_msi = TRUE;
248
249 if (!pcix)
250 adapter->have_msi = FALSE;
251 else if((err = pci_enable_msi(adapter->pdev))) {
252 printk (KERN_ERR
253 "Unable to allocate MSI interrupt Error: %d\n", err);
254 adapter->have_msi = FALSE;
255 /* proceed to try to request regular interrupt */
256 }
257 }
258
259#endif
260 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
261 SA_SHIRQ | SA_SAMPLE_RANDOM,
262 netdev->name, netdev)))
263 return err;
264
265 /* disable interrupts and get the hardware into a known state */
266 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
267
268 if((hw->max_frame_size != max_frame) ||
269 (hw->max_frame_size !=
270 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
271
272 hw->max_frame_size = max_frame;
273
274 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
275
276 if(hw->max_frame_size >
277 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
278 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
279
280 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
281 ctrl0 |= IXGB_CTRL0_JFE;
282 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
283 }
284 }
285 }
286
287 mod_timer(&adapter->watchdog_timer, jiffies);
288 ixgb_irq_enable(adapter);
289
290#ifdef CONFIG_IXGB_NAPI
291 netif_poll_enable(netdev);
292#endif
293 return 0;
294}
295
296void
297ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
298{
299 struct net_device *netdev = adapter->netdev;
300
301 ixgb_irq_disable(adapter);
302 free_irq(adapter->pdev->irq, netdev);
303#ifdef CONFIG_PCI_MSI
304 if(adapter->have_msi == TRUE)
305 pci_disable_msi(adapter->pdev);
306
307#endif
308 if(kill_watchdog)
309 del_timer_sync(&adapter->watchdog_timer);
310#ifdef CONFIG_IXGB_NAPI
311 netif_poll_disable(netdev);
312#endif
313 adapter->link_speed = 0;
314 adapter->link_duplex = 0;
315 netif_carrier_off(netdev);
316 netif_stop_queue(netdev);
317
318 ixgb_reset(adapter);
319 ixgb_clean_tx_ring(adapter);
320 ixgb_clean_rx_ring(adapter);
321}
322
323void
324ixgb_reset(struct ixgb_adapter *adapter)
325{
326
327 ixgb_adapter_stop(&adapter->hw);
328 if(!ixgb_init_hw(&adapter->hw))
329 IXGB_DBG("ixgb_init_hw failed.\n");
330}
331
332/**
333 * ixgb_probe - Device Initialization Routine
334 * @pdev: PCI device information struct
335 * @ent: entry in ixgb_pci_tbl
336 *
337 * Returns 0 on success, negative on failure
338 *
339 * ixgb_probe initializes an adapter identified by a pci_dev structure.
340 * The OS initialization, configuring of the adapter private structure,
341 * and a hardware reset occur.
342 **/
343
344static int __devinit
345ixgb_probe(struct pci_dev *pdev,
346 const struct pci_device_id *ent)
347{
348 struct net_device *netdev = NULL;
349 struct ixgb_adapter *adapter;
350 static int cards_found = 0;
351 unsigned long mmio_start;
352 int mmio_len;
353 int pci_using_dac;
354 int i;
355 int err;
356
357 if((err = pci_enable_device(pdev)))
358 return err;
359
c91e468a
AS		 360 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
361 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 362 pci_using_dac = 1;
363 } else {
c91e468a
AS		 364 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
365 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 366 IXGB_ERR("No usable DMA configuration, aborting\n");
c91e468a 367 goto err_dma_mask;
1da177e4
LT		 368 }
369 pci_using_dac = 0;
370 }
371
372 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 373 goto err_request_regions;
1da177e4
LT		 374
375 pci_set_master(pdev);
376
377 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
378 if(!netdev) {
379 err = -ENOMEM;
380 goto err_alloc_etherdev;
381 }
382
383 SET_MODULE_OWNER(netdev);
384 SET_NETDEV_DEV(netdev, &pdev->dev);
385
386 pci_set_drvdata(pdev, netdev);
8908c6cd 387 adapter = netdev_priv(netdev);
1da177e4
LT		 388 adapter->netdev = netdev;
389 adapter->pdev = pdev;
390 adapter->hw.back = adapter;
391
392 mmio_start = pci_resource_start(pdev, BAR_0);
393 mmio_len = pci_resource_len(pdev, BAR_0);
394
395 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
396 if(!adapter->hw.hw_addr) {
397 err = -EIO;
398 goto err_ioremap;
399 }
400
401 for(i = BAR_1; i <= BAR_5; i++) {
402 if(pci_resource_len(pdev, i) == 0)
403 continue;
404 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
405 adapter->hw.io_base = pci_resource_start(pdev, i);
406 break;
407 }
408 }
409
410 netdev->open = &ixgb_open;
411 netdev->stop = &ixgb_close;
412 netdev->hard_start_xmit = &ixgb_xmit_frame;
413 netdev->get_stats = &ixgb_get_stats;
414 netdev->set_multicast_list = &ixgb_set_multi;
415 netdev->set_mac_address = &ixgb_set_mac;
416 netdev->change_mtu = &ixgb_change_mtu;
417 ixgb_set_ethtool_ops(netdev);
418 netdev->tx_timeout = &ixgb_tx_timeout;
419 netdev->watchdog_timeo = HZ;
420#ifdef CONFIG_IXGB_NAPI
421 netdev->poll = &ixgb_clean;
422 netdev->weight = 64;
423#endif
424 netdev->vlan_rx_register = ixgb_vlan_rx_register;
425 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
426 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
427#ifdef CONFIG_NET_POLL_CONTROLLER
428 netdev->poll_controller = ixgb_netpoll;
429#endif
430
431 netdev->mem_start = mmio_start;
432 netdev->mem_end = mmio_start + mmio_len;
433 netdev->base_addr = adapter->hw.io_base;
434
435 adapter->bd_number = cards_found;
436 adapter->link_speed = 0;
437 adapter->link_duplex = 0;
438
439 /* setup the private structure */
440
441 if((err = ixgb_sw_init(adapter)))
442 goto err_sw_init;
443
444 netdev->features = NETIF_F_SG |
445 NETIF_F_HW_CSUM |
446 NETIF_F_HW_VLAN_TX |
447 NETIF_F_HW_VLAN_RX |
448 NETIF_F_HW_VLAN_FILTER;
449#ifdef NETIF_F_TSO
450 netdev->features |= NETIF_F_TSO;
451#endif
f017f14b
AK		 452#ifdef NETIF_F_LLTX
453 netdev->features |= NETIF_F_LLTX;
454#endif
1da177e4
LT		 455
456 if(pci_using_dac)
457 netdev->features |= NETIF_F_HIGHDMA;
458
459 /* make sure the EEPROM is good */
460
461 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
462 printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
463 err = -EIO;
464 goto err_eeprom;
465 }
466
467 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 468 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 469
df859c51 470 if(!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 471 err = -EIO;
472 goto err_eeprom;
473 }
474
475 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
476
477 init_timer(&adapter->watchdog_timer);
478 adapter->watchdog_timer.function = &ixgb_watchdog;
479 adapter->watchdog_timer.data = (unsigned long)adapter;
480
481 INIT_WORK(&adapter->tx_timeout_task,
482 (void (*)(void *))ixgb_tx_timeout_task, netdev);
483
484 if((err = register_netdev(netdev)))
485 goto err_register;
486
487 /* we're going to reset, so assume we have no link for now */
488
489 netif_carrier_off(netdev);
490 netif_stop_queue(netdev);
491
492 printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
493 netdev->name);
494 ixgb_check_options(adapter);
495 /* reset the hardware with the new settings */
496
497 ixgb_reset(adapter);
498
499 cards_found++;
500 return 0;
501
502err_register:
503err_sw_init:
504err_eeprom:
505 iounmap(adapter->hw.hw_addr);
506err_ioremap:
507 free_netdev(netdev);
508err_alloc_etherdev:
509 pci_release_regions(pdev);
c91e468a
AS		 510err_request_regions:
511err_dma_mask:
512 pci_disable_device(pdev);
1da177e4
LT		 513 return err;
514}
515
516/**
517 * ixgb_remove - Device Removal Routine
518 * @pdev: PCI device information struct
519 *
520 * ixgb_remove is called by the PCI subsystem to alert the driver
521 * that it should release a PCI device. The could be caused by a
522 * Hot-Plug event, or because the driver is going to be removed from
523 * memory.
524 **/
525
526static void __devexit
527ixgb_remove(struct pci_dev *pdev)
528{
529 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 530 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 531
532 unregister_netdev(netdev);
533
534 iounmap(adapter->hw.hw_addr);
535 pci_release_regions(pdev);
536
537 free_netdev(netdev);
538}
539
540/**
541 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
542 * @adapter: board private structure to initialize
543 *
544 * ixgb_sw_init initializes the Adapter private data structure.
545 * Fields are initialized based on PCI device information and
546 * OS network device settings (MTU size).
547 **/
548
549static int __devinit
550ixgb_sw_init(struct ixgb_adapter *adapter)
551{
552 struct ixgb_hw *hw = &adapter->hw;
553 struct net_device *netdev = adapter->netdev;
554 struct pci_dev *pdev = adapter->pdev;
555
556 /* PCI config space info */
557
558 hw->vendor_id = pdev->vendor;
559 hw->device_id = pdev->device;
560 hw->subsystem_vendor_id = pdev->subsystem_vendor;
561 hw->subsystem_id = pdev->subsystem_device;
562
563 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
564
565 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
566
567 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
568 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
569 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
570 hw->mac_type = ixgb_82597;
571 else {
572 /* should never have loaded on this device */
573 printk(KERN_ERR "ixgb: unsupported device id\n");
574 }
575
576 /* enable flow control to be programmed */
577 hw->fc.send_xon = 1;
578
579 atomic_set(&adapter->irq_sem, 1);
580 spin_lock_init(&adapter->tx_lock);
581
582 return 0;
583}
584
585/**
586 * ixgb_open - Called when a network interface is made active
587 * @netdev: network interface device structure
588 *
589 * Returns 0 on success, negative value on failure
590 *
591 * The open entry point is called when a network interface is made
592 * active by the system (IFF_UP). At this point all resources needed
593 * for transmit and receive operations are allocated, the interrupt
594 * handler is registered with the OS, the watchdog timer is started,
595 * and the stack is notified that the interface is ready.
596 **/
597
598static int
599ixgb_open(struct net_device *netdev)
600{
8908c6cd 601 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 602 int err;
603
604 /* allocate transmit descriptors */
605
606 if((err = ixgb_setup_tx_resources(adapter)))
607 goto err_setup_tx;
608
609 /* allocate receive descriptors */
610
611 if((err = ixgb_setup_rx_resources(adapter)))
612 goto err_setup_rx;
613
614 if((err = ixgb_up(adapter)))
615 goto err_up;
616
617 return 0;
618
619err_up:
620 ixgb_free_rx_resources(adapter);
621err_setup_rx:
622 ixgb_free_tx_resources(adapter);
623err_setup_tx:
624 ixgb_reset(adapter);
625
626 return err;
627}
628
629/**
630 * ixgb_close - Disables a network interface
631 * @netdev: network interface device structure
632 *
633 * Returns 0, this is not allowed to fail
634 *
635 * The close entry point is called when an interface is de-activated
636 * by the OS. The hardware is still under the drivers control, but
637 * needs to be disabled. A global MAC reset is issued to stop the
638 * hardware, and all transmit and receive resources are freed.
639 **/
640
641static int
642ixgb_close(struct net_device *netdev)
643{
8908c6cd 644 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 645
646 ixgb_down(adapter, TRUE);
647
648 ixgb_free_tx_resources(adapter);
649 ixgb_free_rx_resources(adapter);
650
651 return 0;
652}
653
654/**
655 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
656 * @adapter: board private structure
657 *
658 * Return 0 on success, negative on failure
659 **/
660
661int
662ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
663{
664 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
665 struct pci_dev *pdev = adapter->pdev;
666 int size;
667
668 size = sizeof(struct ixgb_buffer) * txdr->count;
669 txdr->buffer_info = vmalloc(size);
670 if(!txdr->buffer_info) {
671 return -ENOMEM;
672 }
673 memset(txdr->buffer_info, 0, size);
674
675 /* round up to nearest 4K */
676
677 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
678 IXGB_ROUNDUP(txdr->size, 4096);
679
680 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
681 if(!txdr->desc) {
682 vfree(txdr->buffer_info);
683 return -ENOMEM;
684 }
685 memset(txdr->desc, 0, txdr->size);
686
687 txdr->next_to_use = 0;
688 txdr->next_to_clean = 0;
689
690 return 0;
691}
692
693/**
694 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
695 * @adapter: board private structure
696 *
697 * Configure the Tx unit of the MAC after a reset.
698 **/
699
700static void
701ixgb_configure_tx(struct ixgb_adapter *adapter)
702{
703 uint64_t tdba = adapter->tx_ring.dma;
704 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
705 uint32_t tctl;
706 struct ixgb_hw *hw = &adapter->hw;
707
708 /* Setup the Base and Length of the Tx Descriptor Ring
709 * tx_ring.dma can be either a 32 or 64 bit value
710 */
711
712 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
713 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
714
715 IXGB_WRITE_REG(hw, TDLEN, tdlen);
716
717 /* Setup the HW Tx Head and Tail descriptor pointers */
718
719 IXGB_WRITE_REG(hw, TDH, 0);
720 IXGB_WRITE_REG(hw, TDT, 0);
721
722 /* don't set up txdctl, it induces performance problems if configured
723 * incorrectly */
724 /* Set the Tx Interrupt Delay register */
725
726 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
727
728 /* Program the Transmit Control Register */
729
730 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
731 IXGB_WRITE_REG(hw, TCTL, tctl);
732
733 /* Setup Transmit Descriptor Settings for this adapter */
734 adapter->tx_cmd_type =
735 IXGB_TX_DESC_TYPE
736 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
737}
738
739/**
740 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
741 * @adapter: board private structure
742 *
743 * Returns 0 on success, negative on failure
744 **/
745
746int
747ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
748{
749 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
750 struct pci_dev *pdev = adapter->pdev;
751 int size;
752
753 size = sizeof(struct ixgb_buffer) * rxdr->count;
754 rxdr->buffer_info = vmalloc(size);
755 if(!rxdr->buffer_info) {
756 return -ENOMEM;
757 }
758 memset(rxdr->buffer_info, 0, size);
759
760 /* Round up to nearest 4K */
761
762 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
763 IXGB_ROUNDUP(rxdr->size, 4096);
764
765 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
766
767 if(!rxdr->desc) {
768 vfree(rxdr->buffer_info);
769 return -ENOMEM;
770 }
771 memset(rxdr->desc, 0, rxdr->size);
772
773 rxdr->next_to_clean = 0;
774 rxdr->next_to_use = 0;
775
776 return 0;
777}
778
779/**
780 * ixgb_setup_rctl - configure the receive control register
781 * @adapter: Board private structure
782 **/
783
784static void
785ixgb_setup_rctl(struct ixgb_adapter *adapter)
786{
787 uint32_t rctl;
788
789 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
790
791 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
792
793 rctl |=
794 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
795 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
796 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
797
798 rctl |= IXGB_RCTL_SECRC;
799
800 switch (adapter->rx_buffer_len) {
801 case IXGB_RXBUFFER_2048:
802 default:
803 rctl |= IXGB_RCTL_BSIZE_2048;
804 break;
805 case IXGB_RXBUFFER_4096:
806 rctl |= IXGB_RCTL_BSIZE_4096;
807 break;
808 case IXGB_RXBUFFER_8192:
809 rctl |= IXGB_RCTL_BSIZE_8192;
810 break;
811 case IXGB_RXBUFFER_16384:
812 rctl |= IXGB_RCTL_BSIZE_16384;
813 break;
814 }
815
816 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
817}
818
819/**
820 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
821 * @adapter: board private structure
822 *
823 * Configure the Rx unit of the MAC after a reset.
824 **/
825
826static void
827ixgb_configure_rx(struct ixgb_adapter *adapter)
828{
829 uint64_t rdba = adapter->rx_ring.dma;
830 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
831 struct ixgb_hw *hw = &adapter->hw;
832 uint32_t rctl;
833 uint32_t rxcsum;
834 uint32_t rxdctl;
835
836 /* make sure receives are disabled while setting up the descriptors */
837
838 rctl = IXGB_READ_REG(hw, RCTL);
839 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
840
841 /* set the Receive Delay Timer Register */
842
843 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
844
845 /* Setup the Base and Length of the Rx Descriptor Ring */
846
847 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
848 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
849
850 IXGB_WRITE_REG(hw, RDLEN, rdlen);
851
852 /* Setup the HW Rx Head and Tail Descriptor Pointers */
853 IXGB_WRITE_REG(hw, RDH, 0);
854 IXGB_WRITE_REG(hw, RDT, 0);
855
856 /* set up pre-fetching of receive buffers so we get some before we
857 * run out (default hardware behavior is to run out before fetching
858 * more). This sets up to fetch if HTHRESH rx descriptors are avail
859 * and the descriptors in hw cache are below PTHRESH. This avoids
860 * the hardware behavior of fetching <=512 descriptors in a single
861 * burst that pre-empts all other activity, usually causing fifo
862 * overflows. */
863 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
864 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
865 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
866 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
867 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
868
869 /* Enable Receive Checksum Offload for TCP and UDP */
870 if(adapter->rx_csum == TRUE) {
871 rxcsum = IXGB_READ_REG(hw, RXCSUM);
872 rxcsum |= IXGB_RXCSUM_TUOFL;
873 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
874 }
875
876 /* Enable Receives */
877
878 IXGB_WRITE_REG(hw, RCTL, rctl);
879}
880
881/**
882 * ixgb_free_tx_resources - Free Tx Resources
883 * @adapter: board private structure
884 *
885 * Free all transmit software resources
886 **/
887
888void
889ixgb_free_tx_resources(struct ixgb_adapter *adapter)
890{
891 struct pci_dev *pdev = adapter->pdev;
892
893 ixgb_clean_tx_ring(adapter);
894
895 vfree(adapter->tx_ring.buffer_info);
896 adapter->tx_ring.buffer_info = NULL;
897
898 pci_free_consistent(pdev, adapter->tx_ring.size,
899 adapter->tx_ring.desc, adapter->tx_ring.dma);
900
901 adapter->tx_ring.desc = NULL;
902}
903
904static inline void
905ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
906 struct ixgb_buffer *buffer_info)
907{
908 struct pci_dev *pdev = adapter->pdev;
909 if(buffer_info->dma) {
910 pci_unmap_page(pdev,
911 buffer_info->dma,
912 buffer_info->length,
913 PCI_DMA_TODEVICE);
914 buffer_info->dma = 0;
915 }
916 if(buffer_info->skb) {
917 dev_kfree_skb_any(buffer_info->skb);
918 buffer_info->skb = NULL;
919 }
920}
921
922/**
923 * ixgb_clean_tx_ring - Free Tx Buffers
924 * @adapter: board private structure
925 **/
926
927static void
928ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
929{
930 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
931 struct ixgb_buffer *buffer_info;
932 unsigned long size;
933 unsigned int i;
934
935 /* Free all the Tx ring sk_buffs */
936
937 for(i = 0; i < tx_ring->count; i++) {
938 buffer_info = &tx_ring->buffer_info[i];
939 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
940 }
941
942 size = sizeof(struct ixgb_buffer) * tx_ring->count;
943 memset(tx_ring->buffer_info, 0, size);
944
945 /* Zero out the descriptor ring */
946
947 memset(tx_ring->desc, 0, tx_ring->size);
948
949 tx_ring->next_to_use = 0;
950 tx_ring->next_to_clean = 0;
951
952 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
953 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
954}
955
956/**
957 * ixgb_free_rx_resources - Free Rx Resources
958 * @adapter: board private structure
959 *
960 * Free all receive software resources
961 **/
962
963void
964ixgb_free_rx_resources(struct ixgb_adapter *adapter)
965{
966 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
967 struct pci_dev *pdev = adapter->pdev;
968
969 ixgb_clean_rx_ring(adapter);
970
971 vfree(rx_ring->buffer_info);
972 rx_ring->buffer_info = NULL;
973
974 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
975
976 rx_ring->desc = NULL;
977}
978
979/**
980 * ixgb_clean_rx_ring - Free Rx Buffers
981 * @adapter: board private structure
982 **/
983
984static void
985ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
986{
987 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
988 struct ixgb_buffer *buffer_info;
989 struct pci_dev *pdev = adapter->pdev;
990 unsigned long size;
991 unsigned int i;
992
993 /* Free all the Rx ring sk_buffs */
994
995 for(i = 0; i < rx_ring->count; i++) {
996 buffer_info = &rx_ring->buffer_info[i];
997 if(buffer_info->skb) {
998
999 pci_unmap_single(pdev,
1000 buffer_info->dma,
1001 buffer_info->length,
1002 PCI_DMA_FROMDEVICE);
1003
1004 dev_kfree_skb(buffer_info->skb);
1005
1006 buffer_info->skb = NULL;
1007 }
1008 }
1009
1010 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1011 memset(rx_ring->buffer_info, 0, size);
1012
1013 /* Zero out the descriptor ring */
1014
1015 memset(rx_ring->desc, 0, rx_ring->size);
1016
1017 rx_ring->next_to_clean = 0;
1018 rx_ring->next_to_use = 0;
1019
1020 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1021 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1022}
1023
1024/**
1025 * ixgb_set_mac - Change the Ethernet Address of the NIC
1026 * @netdev: network interface device structure
1027 * @p: pointer to an address structure
1028 *
1029 * Returns 0 on success, negative on failure
1030 **/
1031
1032static int
1033ixgb_set_mac(struct net_device *netdev, void *p)
1034{
8908c6cd 1035 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1036 struct sockaddr *addr = p;
1037
1038 if(!is_valid_ether_addr(addr->sa_data))
1039 return -EADDRNOTAVAIL;
1040
1041 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1042
1043 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1044
1045 return 0;
1046}
1047
1048/**
1049 * ixgb_set_multi - Multicast and Promiscuous mode set
1050 * @netdev: network interface device structure
1051 *
1052 * The set_multi entry point is called whenever the multicast address
1053 * list or the network interface flags are updated. This routine is
1054 * responsible for configuring the hardware for proper multicast,
1055 * promiscuous mode, and all-multi behavior.
1056 **/
1057
1058static void
1059ixgb_set_multi(struct net_device *netdev)
1060{
8908c6cd 1061 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1062 struct ixgb_hw *hw = &adapter->hw;
1063 struct dev_mc_list *mc_ptr;
1064 uint32_t rctl;
1065 int i;
1066
1067 /* Check for Promiscuous and All Multicast modes */
1068
1069 rctl = IXGB_READ_REG(hw, RCTL);
1070
1071 if(netdev->flags & IFF_PROMISC) {
1072 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1073 } else if(netdev->flags & IFF_ALLMULTI) {
1074 rctl |= IXGB_RCTL_MPE;
1075 rctl &= ~IXGB_RCTL_UPE;
1076 } else {
1077 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1078 }
1079
1080 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1081 rctl |= IXGB_RCTL_MPE;
1082 IXGB_WRITE_REG(hw, RCTL, rctl);
1083 } else {
1084 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1085
1086 IXGB_WRITE_REG(hw, RCTL, rctl);
1087
1088 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1089 i++, mc_ptr = mc_ptr->next)
1090 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1091 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1092
1093 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1094 }
1095}
1096
1097/**
1098 * ixgb_watchdog - Timer Call-back
1099 * @data: pointer to netdev cast into an unsigned long
1100 **/
1101
1102static void
1103ixgb_watchdog(unsigned long data)
1104{
1105 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1106 struct net_device *netdev = adapter->netdev;
1107 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1108
1109 ixgb_check_for_link(&adapter->hw);
1110
1111 if (ixgb_check_for_bad_link(&adapter->hw)) {
1112 /* force the reset path */
1113 netif_stop_queue(netdev);
1114 }
1115
1116 if(adapter->hw.link_up) {
1117 if(!netif_carrier_ok(netdev)) {
1118 printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
1119 netdev->name, 10000, "Full Duplex");
1120 adapter->link_speed = 10000;
1121 adapter->link_duplex = FULL_DUPLEX;
1122 netif_carrier_on(netdev);
1123 netif_wake_queue(netdev);
1124 }
1125 } else {
1126 if(netif_carrier_ok(netdev)) {
1127 adapter->link_speed = 0;
1128 adapter->link_duplex = 0;
1129 printk(KERN_INFO
1130 "ixgb: %s NIC Link is Down\n",
1131 netdev->name);
1132 netif_carrier_off(netdev);
1133 netif_stop_queue(netdev);
1134
1135 }
1136 }
1137
1138 ixgb_update_stats(adapter);
1139
1140 if(!netif_carrier_ok(netdev)) {
1141 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1142 /* We've lost link, so the controller stops DMA,
1143 * but we've got queued Tx work that's never going
1144 * to get done, so reset controller to flush Tx.
1145 * (Do the reset outside of interrupt context). */
1146 schedule_work(&adapter->tx_timeout_task);
1147 }
1148 }
1149
1150 /* Force detection of hung controller every watchdog period */
1151 adapter->detect_tx_hung = TRUE;
1152
1153 /* generate an interrupt to force clean up of any stragglers */
1154 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1155
1156 /* Reset the timer */
1157 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1158}
1159
1160#define IXGB_TX_FLAGS_CSUM 0x00000001
1161#define IXGB_TX_FLAGS_VLAN 0x00000002
1162#define IXGB_TX_FLAGS_TSO 0x00000004
1163
1164static inline int
1165ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1166{
1167#ifdef NETIF_F_TSO
1168 struct ixgb_context_desc *context_desc;
1169 unsigned int i;
1170 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1171 uint16_t ipcse, tucse, mss;
1172 int err;
1173
1174 if(likely(skb_shinfo(skb)->tso_size)) {
1175 if (skb_header_cloned(skb)) {
1176 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1177 if (err)
1178 return err;
1179 }
1180
1181 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1182 mss = skb_shinfo(skb)->tso_size;
1183 skb->nh.iph->tot_len = 0;
1184 skb->nh.iph->check = 0;
1185 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1186 skb->nh.iph->daddr,
1187 0, IPPROTO_TCP, 0);
1188 ipcss = skb->nh.raw - skb->data;
1189 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1190 ipcse = skb->h.raw - skb->data - 1;
1191 tucss = skb->h.raw - skb->data;
1192 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1193 tucse = 0;
1194
1195 i = adapter->tx_ring.next_to_use;
1196 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1197
1198 context_desc->ipcss = ipcss;
1199 context_desc->ipcso = ipcso;
1200 context_desc->ipcse = cpu_to_le16(ipcse);
1201 context_desc->tucss = tucss;
1202 context_desc->tucso = tucso;
1203 context_desc->tucse = cpu_to_le16(tucse);
1204 context_desc->mss = cpu_to_le16(mss);
1205 context_desc->hdr_len = hdr_len;
1206 context_desc->status = 0;
1207 context_desc->cmd_type_len = cpu_to_le32(
1208 IXGB_CONTEXT_DESC_TYPE
1209 | IXGB_CONTEXT_DESC_CMD_TSE
1210 | IXGB_CONTEXT_DESC_CMD_IP
1211 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1212 | IXGB_CONTEXT_DESC_CMD_IDE
1213 | (skb->len - (hdr_len)));
1214
06c2f9ec 1215
1da177e4
LT		 1216 if(++i == adapter->tx_ring.count) i = 0;
1217 adapter->tx_ring.next_to_use = i;
1218
1219 return 1;
1220 }
1221#endif
1222
1223 return 0;
1224}
1225
1226static inline boolean_t
1227ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1228{
1229 struct ixgb_context_desc *context_desc;
1230 unsigned int i;
1231 uint8_t css, cso;
1232
1233 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1234 css = skb->h.raw - skb->data;
1235 cso = (skb->h.raw + skb->csum) - skb->data;
1236
1237 i = adapter->tx_ring.next_to_use;
1238 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1239
1240 context_desc->tucss = css;
1241 context_desc->tucso = cso;
1242 context_desc->tucse = 0;
1243 /* zero out any previously existing data in one instruction */
1244 *(uint32_t *)&(context_desc->ipcss) = 0;
1245 context_desc->status = 0;
1246 context_desc->hdr_len = 0;
1247 context_desc->mss = 0;
1248 context_desc->cmd_type_len =
1249 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1250 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1251
1252 if(++i == adapter->tx_ring.count) i = 0;
1253 adapter->tx_ring.next_to_use = i;
1254
1255 return TRUE;
1256 }
1257
1258 return FALSE;
1259}
1260
1261#define IXGB_MAX_TXD_PWR 14
1262#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1263
1264static inline int
1265ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1266 unsigned int first)
1267{
1268 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1269 struct ixgb_buffer *buffer_info;
1270 int len = skb->len;
1271 unsigned int offset = 0, size, count = 0, i;
96f9c2e2 1272 unsigned int mss = skb_shinfo(skb)->tso_size;
1da177e4
LT		 1273
1274 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1275 unsigned int f;
ac79c82e 1276
1da177e4
LT		 1277 len -= skb->data_len;
1278
1279 i = tx_ring->next_to_use;
1280
1281 while(len) {
1282 buffer_info = &tx_ring->buffer_info[i];
1283 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1284 /* Workaround for premature desc write-backs
1285 * in TSO mode. Append 4-byte sentinel desc */
1286 if(unlikely(mss && !nr_frags && size == len && size > 8))
1287 size -= 4;
1288
1da177e4
LT		 1289 buffer_info->length = size;
1290 buffer_info->dma =
1291 pci_map_single(adapter->pdev,
1292 skb->data + offset,
1293 size,
1294 PCI_DMA_TODEVICE);
1295 buffer_info->time_stamp = jiffies;
1296
1297 len -= size;
1298 offset += size;
1299 count++;
1300 if(++i == tx_ring->count) i = 0;
1301 }
1302
1303 for(f = 0; f < nr_frags; f++) {
1304 struct skb_frag_struct *frag;
1305
1306 frag = &skb_shinfo(skb)->frags[f];
1307 len = frag->size;
1308 offset = 0;
1309
1310 while(len) {
1311 buffer_info = &tx_ring->buffer_info[i];
1312 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1313 /* Workaround for premature desc write-backs
1314 * in TSO mode. Append 4-byte sentinel desc */
1315 if(unlikely(mss && (f == (nr_frags-1)) && (size == len)
1316 && (size > 8)))
1317 size -= 4;
1318
1da177e4
LT		 1319 buffer_info->length = size;
1320 buffer_info->dma =
1321 pci_map_page(adapter->pdev,
1322 frag->page,
1323 frag->page_offset + offset,
1324 size,
1325 PCI_DMA_TODEVICE);
1326 buffer_info->time_stamp = jiffies;
1327
1328 len -= size;
1329 offset += size;
1330 count++;
1331 if(++i == tx_ring->count) i = 0;
1332 }
1333 }
1334 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1335 tx_ring->buffer_info[i].skb = skb;
1336 tx_ring->buffer_info[first].next_to_watch = i;
1337
1338 return count;
1339}
1340
1341static inline void
1342ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1343{
1344 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1345 struct ixgb_tx_desc *tx_desc = NULL;
1346 struct ixgb_buffer *buffer_info;
1347 uint32_t cmd_type_len = adapter->tx_cmd_type;
1348 uint8_t status = 0;
1349 uint8_t popts = 0;
1350 unsigned int i;
1351
1352 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1353 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1354 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1355 }
1356
1357 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1358 popts |= IXGB_TX_DESC_POPTS_TXSM;
1359
1360 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1361 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1362 }
1363
1364 i = tx_ring->next_to_use;
1365
1366 while(count--) {
1367 buffer_info = &tx_ring->buffer_info[i];
1368 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1369 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1370 tx_desc->cmd_type_len =
1371 cpu_to_le32(cmd_type_len | buffer_info->length);
1372 tx_desc->status = status;
1373 tx_desc->popts = popts;
1374 tx_desc->vlan = cpu_to_le16(vlan_id);
1375
1376 if(++i == tx_ring->count) i = 0;
1377 }
1378
1379 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1380 | IXGB_TX_DESC_CMD_RS );
1381
1382 /* Force memory writes to complete before letting h/w
1383 * know there are new descriptors to fetch. (Only
1384 * applicable for weak-ordered memory model archs,
1385 * such as IA-64). */
1386 wmb();
1387
1388 tx_ring->next_to_use = i;
1389 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1390}
1391
1392/* Tx Descriptors needed, worst case */
1393#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1394 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1395#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
96f9c2e2
AK		 1396 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 \
1397 /* one more for TSO workaround */ + 1
1da177e4
LT		 1398
1399static int
1400ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1401{
8908c6cd 1402 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1403 unsigned int first;
1404 unsigned int tx_flags = 0;
1405 unsigned long flags;
1406 int vlan_id = 0;
1407 int tso;
1408
1409 if(skb->len <= 0) {
1410 dev_kfree_skb_any(skb);
1411 return 0;
1412 }
1413
f017f14b
AK		 1414#ifdef NETIF_F_LLTX
1415 local_irq_save(flags);
1416 if (!spin_trylock(&adapter->tx_lock)) {
1417 /* Collision - tell upper layer to requeue */
1418 local_irq_restore(flags);
1419 return NETDEV_TX_LOCKED;
1420 }
1421#else
1da177e4 1422 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1423#endif
1424
1da177e4
LT		 1425 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1426 netif_stop_queue(netdev);
1427 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1428 return NETDEV_TX_BUSY;
1da177e4 1429 }
f017f14b
AK		 1430
1431#ifndef NETIF_F_LLTX
1da177e4 1432 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1433#endif
1da177e4
LT		 1434
1435 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1436 tx_flags |= IXGB_TX_FLAGS_VLAN;
1437 vlan_id = vlan_tx_tag_get(skb);
1438 }
1439
1440 first = adapter->tx_ring.next_to_use;
1441
1442 tso = ixgb_tso(adapter, skb);
1443 if (tso < 0) {
1444 dev_kfree_skb_any(skb);
f017f14b
AK		 1445#ifdef NETIF_F_LLTX
1446 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1447#endif
1da177e4
LT		 1448 return NETDEV_TX_OK;
1449 }
1450
96f9c2e2 1451 if (likely(tso))
1da177e4
LT		 1452 tx_flags |= IXGB_TX_FLAGS_TSO;
1453 else if(ixgb_tx_csum(adapter, skb))
1454 tx_flags |= IXGB_TX_FLAGS_CSUM;
1455
1456 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1457 tx_flags);
1458
1459 netdev->trans_start = jiffies;
1460
f017f14b
AK		 1461#ifdef NETIF_F_LLTX
1462 /* Make sure there is space in the ring for the next send. */
1463 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1464 netif_stop_queue(netdev);
1465
1466 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1467
1468#endif
1469 return NETDEV_TX_OK;
1da177e4
LT		 1470}
1471
1472/**
1473 * ixgb_tx_timeout - Respond to a Tx Hang
1474 * @netdev: network interface device structure
1475 **/
1476
1477static void
1478ixgb_tx_timeout(struct net_device *netdev)
1479{
8908c6cd 1480 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1481
1482 /* Do the reset outside of interrupt context */
1483 schedule_work(&adapter->tx_timeout_task);
1484}
1485
1486static void
1487ixgb_tx_timeout_task(struct net_device *netdev)
1488{
8908c6cd 1489 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1490
1491 ixgb_down(adapter, TRUE);
1492 ixgb_up(adapter);
1493}
1494
1495/**
1496 * ixgb_get_stats - Get System Network Statistics
1497 * @netdev: network interface device structure
1498 *
1499 * Returns the address of the device statistics structure.
1500 * The statistics are actually updated from the timer callback.
1501 **/
1502
1503static struct net_device_stats *
1504ixgb_get_stats(struct net_device *netdev)
1505{
8908c6cd 1506 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1507
1508 return &adapter->net_stats;
1509}
1510
1511/**
1512 * ixgb_change_mtu - Change the Maximum Transfer Unit
1513 * @netdev: network interface device structure
1514 * @new_mtu: new value for maximum frame size
1515 *
1516 * Returns 0 on success, negative on failure
1517 **/
1518
1519static int
1520ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1521{
8908c6cd 1522 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1523 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1524 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1525
1526
1527 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1528 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1529 IXGB_ERR("Invalid MTU setting\n");
1530 return -EINVAL;
1531 }
1532
1533 if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1534 || (max_frame <= IXGB_RXBUFFER_2048)) {
1535 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
1536
1537 } else if(max_frame <= IXGB_RXBUFFER_4096) {
1538 adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
1539
1540 } else if(max_frame <= IXGB_RXBUFFER_8192) {
1541 adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
1542
1543 } else {
1544 adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
1545 }
1546
1547 netdev->mtu = new_mtu;
1548
1549 if(old_max_frame != max_frame && netif_running(netdev)) {
1550
1551 ixgb_down(adapter, TRUE);
1552 ixgb_up(adapter);
1553 }
1554
1555 return 0;
1556}
1557
1558/**
1559 * ixgb_update_stats - Update the board statistics counters.
1560 * @adapter: board private structure
1561 **/
1562
1563void
1564ixgb_update_stats(struct ixgb_adapter *adapter)
1565{
5633684d
MC		 1566 struct net_device *netdev = adapter->netdev;
1567
1568 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1569 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1570 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1571 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1572 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1573 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1574
1575 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1576 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1577 if(multi >= bcast)
1578 multi -= bcast;
5633684d
MC		 1579
1580 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1581 adapter->stats.mprch += (multi >> 32);
1582 adapter->stats.bprcl += bcast_l;
1583 adapter->stats.bprch += bcast_h;
1584 } else {
1585 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1586 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1587 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1588 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1589 }
1da177e4
LT		 1590 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1591 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1592 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1593 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1594 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1595 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1596 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1597 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1598 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1599 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1600 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1601 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1602 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1603 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1604 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1605 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1606 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1607 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1608 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1609 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1610 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1611 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1612 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1613 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1614 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1615 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1616 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1617 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1618 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1619 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1620 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1621 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1622 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1623 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1624 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1625 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1626 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1627 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1628 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1629 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1630 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1631 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1632 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1633 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1634 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1635 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1636 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1637 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1638 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1639 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1640 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1641 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1642 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1643 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1644 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1645 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1646
1647 /* Fill out the OS statistics structure */
1648
1649 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1650 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1651 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1652 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1653 adapter->net_stats.multicast = adapter->stats.mprcl;
1654 adapter->net_stats.collisions = 0;
1655
1656 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1657 * with a length in the type/len field */
1658 adapter->net_stats.rx_errors =
1659 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1660 adapter->stats.ruc +
1661 adapter->stats.roc /*+ adapter->stats.rlec */ +
1662 adapter->stats.icbc +
1663 adapter->stats.ecbc + adapter->stats.mpc;
1664
1da177e4
LT		 1665 /* see above
1666 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1667 */
1668
1669 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1670 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1671 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1672 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1673
1674 adapter->net_stats.tx_errors = 0;
1675 adapter->net_stats.rx_frame_errors = 0;
1676 adapter->net_stats.tx_aborted_errors = 0;
1677 adapter->net_stats.tx_carrier_errors = 0;
1678 adapter->net_stats.tx_fifo_errors = 0;
1679 adapter->net_stats.tx_heartbeat_errors = 0;
1680 adapter->net_stats.tx_window_errors = 0;
1681}
1682
1683#define IXGB_MAX_INTR 10
1684/**
1685 * ixgb_intr - Interrupt Handler
1686 * @irq: interrupt number
1687 * @data: pointer to a network interface device structure
1688 * @pt_regs: CPU registers structure
1689 **/
1690
1691static irqreturn_t
1692ixgb_intr(int irq, void *data, struct pt_regs *regs)
1693{
1694 struct net_device *netdev = data;
8908c6cd 1695 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1696 struct ixgb_hw *hw = &adapter->hw;
1697 uint32_t icr = IXGB_READ_REG(hw, ICR);
1698#ifndef CONFIG_IXGB_NAPI
1699 unsigned int i;
1700#endif
1701
1702 if(unlikely(!icr))
1703 return IRQ_NONE; /* Not our interrupt */
1704
1705 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1706 mod_timer(&adapter->watchdog_timer, jiffies);
1707 }
1708
1709#ifdef CONFIG_IXGB_NAPI
1710 if(netif_rx_schedule_prep(netdev)) {
1711
1712 /* Disable interrupts and register for poll. The flush
1713 of the posted write is intentionally left out.
1714 */
1715
1716 atomic_inc(&adapter->irq_sem);
1717 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1718 __netif_rx_schedule(netdev);
1719 }
1720#else
1721 /* yes, that is actually a & and it is meant to make sure that
1722 * every pass through this for loop checks both receive and
1723 * transmit queues for completed descriptors, intended to
1724 * avoid starvation issues and assist tx/rx fairness. */
1725 for(i = 0; i < IXGB_MAX_INTR; i++)
1726 if(!ixgb_clean_rx_irq(adapter) &
1727 !ixgb_clean_tx_irq(adapter))
1728 break;
1729#endif
1730 return IRQ_HANDLED;
1731}
1732
1733#ifdef CONFIG_IXGB_NAPI
1734/**
1735 * ixgb_clean - NAPI Rx polling callback
1736 * @adapter: board private structure
1737 **/
1738
1739static int
1740ixgb_clean(struct net_device *netdev, int *budget)
1741{
8908c6cd 1742 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1743 int work_to_do = min(*budget, netdev->quota);
1744 int tx_cleaned;
1745 int work_done = 0;
1746
1747 tx_cleaned = ixgb_clean_tx_irq(adapter);
1748 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1749
1750 *budget -= work_done;
1751 netdev->quota -= work_done;
1752
1753 /* if no Tx and not enough Rx work done, exit the polling mode */
1754 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1755 netif_rx_complete(netdev);
1756 ixgb_irq_enable(adapter);
1757 return 0;
1758 }
1759
1760 return 1;
1761}
1762#endif
1763
1764/**
1765 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1766 * @adapter: board private structure
1767 **/
1768
1769static boolean_t
1770ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1771{
1772 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1773 struct net_device *netdev = adapter->netdev;
1774 struct ixgb_tx_desc *tx_desc, *eop_desc;
1775 struct ixgb_buffer *buffer_info;
1776 unsigned int i, eop;
1777 boolean_t cleaned = FALSE;
1778
1779 i = tx_ring->next_to_clean;
1780 eop = tx_ring->buffer_info[i].next_to_watch;
1781 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1782
1783 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1784
1785 for(cleaned = FALSE; !cleaned; ) {
1786 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1787 buffer_info = &tx_ring->buffer_info[i];
1788
1789 if (tx_desc->popts
1790 & (IXGB_TX_DESC_POPTS_TXSM |
1791 IXGB_TX_DESC_POPTS_IXSM))
1792 adapter->hw_csum_tx_good++;
1793
1794 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1795
1796 *(uint32_t *)&(tx_desc->status) = 0;
1797
1798 cleaned = (i == eop);
1799 if(++i == tx_ring->count) i = 0;
1800 }
1801
1802 eop = tx_ring->buffer_info[i].next_to_watch;
1803 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1804 }
1805
1806 tx_ring->next_to_clean = i;
1807
1808 spin_lock(&adapter->tx_lock);
1809 if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1810 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
1811
1812 netif_wake_queue(netdev);
1813 }
1814 spin_unlock(&adapter->tx_lock);
1815
1816 if(adapter->detect_tx_hung) {
1817 /* detect a transmit hang in hardware, this serializes the
1818 * check with the clearing of time_stamp and movement of i */
1819 adapter->detect_tx_hung = FALSE;
1820 if(tx_ring->buffer_info[i].dma &&
1821 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
1822 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1823 IXGB_STATUS_TXOFF))
1824 netif_stop_queue(netdev);
1825 }
1826
1827 return cleaned;
1828}
1829
1830/**
1831 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1832 * @adapter: board private structure
1833 * @rx_desc: receive descriptor
1834 * @sk_buff: socket buffer with received data
1835 **/
1836
1837static inline void
1838ixgb_rx_checksum(struct ixgb_adapter *adapter,
1839 struct ixgb_rx_desc *rx_desc,
1840 struct sk_buff *skb)
1841{
1842 /* Ignore Checksum bit is set OR
1843 * TCP Checksum has not been calculated
1844 */
1845 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1846 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1847 skb->ip_summed = CHECKSUM_NONE;
1848 return;
1849 }
1850
1851 /* At this point we know the hardware did the TCP checksum */
1852 /* now look at the TCP checksum error bit */
1853 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1854 /* let the stack verify checksum errors */
1855 skb->ip_summed = CHECKSUM_NONE;
1856 adapter->hw_csum_rx_error++;
1857 } else {
1858 /* TCP checksum is good */
1859 skb->ip_summed = CHECKSUM_UNNECESSARY;
1860 adapter->hw_csum_rx_good++;
1861 }
1862}
1863
1864/**
1865 * ixgb_clean_rx_irq - Send received data up the network stack,
1866 * @adapter: board private structure
1867 **/
1868
1869static boolean_t
1870#ifdef CONFIG_IXGB_NAPI
1871ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1872#else
1873ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1874#endif
1875{
1876 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1877 struct net_device *netdev = adapter->netdev;
1878 struct pci_dev *pdev = adapter->pdev;
1879 struct ixgb_rx_desc *rx_desc, *next_rxd;
1880 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1881 uint32_t length;
1882 unsigned int i, j;
1883 boolean_t cleaned = FALSE;
1884
1885 i = rx_ring->next_to_clean;
1886 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1887 buffer_info = &rx_ring->buffer_info[i];
1888
1889 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1890 struct sk_buff *skb, *next_skb;
1891 u8 status;
1da177e4
LT		 1892
1893#ifdef CONFIG_IXGB_NAPI
1894 if(*work_done >= work_to_do)
1895 break;
1896
1897 (*work_done)++;
1898#endif
f404de1c 1899 status = rx_desc->status;
1da177e4 1900 skb = buffer_info->skb;
f404de1c 1901
1da177e4
LT		 1902 prefetch(skb->data);
1903
1904 if(++i == rx_ring->count) i = 0;
1905 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1906 prefetch(next_rxd);
1907
1908 if((j = i + 1) == rx_ring->count) j = 0;
1909 next2_buffer = &rx_ring->buffer_info[j];
1910 prefetch(next2_buffer);
1911
1912 next_buffer = &rx_ring->buffer_info[i];
1913 next_skb = next_buffer->skb;
1914 prefetch(next_skb);
1915
1da177e4
LT		 1916 cleaned = TRUE;
1917
1918 pci_unmap_single(pdev,
1919 buffer_info->dma,
1920 buffer_info->length,
1921 PCI_DMA_FROMDEVICE);
1922
1923 length = le16_to_cpu(rx_desc->length);
1924
f404de1c 1925 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1926
1927 /* All receives must fit into a single buffer */
1928
1929 IXGB_DBG("Receive packet consumed multiple buffers "
1930 "length<%x>\n", length);
1931
1932 dev_kfree_skb_irq(skb);
f404de1c 1933 goto rxdesc_done;
1da177e4
LT		 1934 }
1935
1936 if (unlikely(rx_desc->errors
1937 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1938 | IXGB_RX_DESC_ERRORS_P |
1939 IXGB_RX_DESC_ERRORS_RXE))) {
1940
1941 dev_kfree_skb_irq(skb);
f404de1c 1942 goto rxdesc_done;
1da177e4
LT		 1943 }
1944
1945 /* Good Receive */
1946 skb_put(skb, length);
1947
1948 /* Receive Checksum Offload */
1949 ixgb_rx_checksum(adapter, rx_desc, skb);
1950
1951 skb->protocol = eth_type_trans(skb, netdev);
1952#ifdef CONFIG_IXGB_NAPI
f404de1c 1953 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1954 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1955 le16_to_cpu(rx_desc->special) &
1956 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1957 } else {
1958 netif_receive_skb(skb);
1959 }
1960#else /* CONFIG_IXGB_NAPI */
f404de1c 1961 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1962 vlan_hwaccel_rx(skb, adapter->vlgrp,
1963 le16_to_cpu(rx_desc->special) &
1964 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1965 } else {
1966 netif_rx(skb);
1967 }
1968#endif /* CONFIG_IXGB_NAPI */
1969 netdev->last_rx = jiffies;
1970
f404de1c
MC		 1971rxdesc_done:
1972 /* clean up descriptor, might be written over by hw */
1da177e4
LT		 1973 rx_desc->status = 0;
1974 buffer_info->skb = NULL;
1975
f404de1c 1976 /* use prefetched values */
1da177e4
LT		 1977 rx_desc = next_rxd;
1978 buffer_info = next_buffer;
1979 }
1980
1981 rx_ring->next_to_clean = i;
1982
1983 ixgb_alloc_rx_buffers(adapter);
1984
1985 return cleaned;
1986}
1987
1988/**
1989 * ixgb_alloc_rx_buffers - Replace used receive buffers
1990 * @adapter: address of board private structure
1991 **/
1992
1993static void
1994ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
1995{
1996 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1997 struct net_device *netdev = adapter->netdev;
1998 struct pci_dev *pdev = adapter->pdev;
1999 struct ixgb_rx_desc *rx_desc;
2000 struct ixgb_buffer *buffer_info;
2001 struct sk_buff *skb;
2002 unsigned int i;
2003 int num_group_tail_writes;
2004 long cleancount;
2005
2006 i = rx_ring->next_to_use;
2007 buffer_info = &rx_ring->buffer_info[i];
2008 cleancount = IXGB_DESC_UNUSED(rx_ring);
2009
2010 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2011
41639fed
MC		 2012 /* leave three descriptors unused */
2013 while(--cleancount > 2) {
1da177e4
LT		 2014 rx_desc = IXGB_RX_DESC(*rx_ring, i);
2015
2016 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
2017
2018 if(unlikely(!skb)) {
2019 /* Better luck next round */
2020 break;
2021 }
2022
2023 /* Make buffer alignment 2 beyond a 16 byte boundary
2024 * this will result in a 16 byte aligned IP header after
2025 * the 14 byte MAC header is removed
2026 */
2027 skb_reserve(skb, NET_IP_ALIGN);
2028
2029 skb->dev = netdev;
2030
2031 buffer_info->skb = skb;
2032 buffer_info->length = adapter->rx_buffer_len;
2033 buffer_info->dma =
2034 pci_map_single(pdev,
2035 skb->data,
2036 adapter->rx_buffer_len,
2037 PCI_DMA_FROMDEVICE);
2038
2039 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2040 /* guarantee DD bit not set now before h/w gets descriptor
2041 * this is the rest of the workaround for h/w double
2042 * writeback. */
2043 rx_desc->status = 0;
1da177e4
LT		 2044
2045 if((i & ~(num_group_tail_writes- 1)) == i) {
2046 /* Force memory writes to complete before letting h/w
2047 * know there are new descriptors to fetch. (Only
2048 * applicable for weak-ordered memory model archs,
2049 * such as IA-64). */
2050 wmb();
2051
2052 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2053 }
2054
2055 if(++i == rx_ring->count) i = 0;
2056 buffer_info = &rx_ring->buffer_info[i];
2057 }
2058
2059 rx_ring->next_to_use = i;
2060}
2061
2062/**
2063 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2064 *
2065 * @param netdev network interface device structure
2066 * @param grp indicates to enable or disable tagging/stripping
2067 **/
2068static void
2069ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2070{
8908c6cd 2071 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2072 uint32_t ctrl, rctl;
2073
2074 ixgb_irq_disable(adapter);
2075 adapter->vlgrp = grp;
2076
2077 if(grp) {
2078 /* enable VLAN tag insert/strip */
2079 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2080 ctrl |= IXGB_CTRL0_VME;
2081 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2082
2083 /* enable VLAN receive filtering */
2084
2085 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2086 rctl |= IXGB_RCTL_VFE;
2087 rctl &= ~IXGB_RCTL_CFIEN;
2088 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2089 } else {
2090 /* disable VLAN tag insert/strip */
2091
2092 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2093 ctrl &= ~IXGB_CTRL0_VME;
2094 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2095
2096 /* disable VLAN filtering */
2097
2098 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2099 rctl &= ~IXGB_RCTL_VFE;
2100 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2101 }
2102
2103 ixgb_irq_enable(adapter);
2104}
2105
2106static void
2107ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2108{
8908c6cd 2109 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2110 uint32_t vfta, index;
2111
2112 /* add VID to filter table */
2113
2114 index = (vid >> 5) & 0x7F;
2115 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2116 vfta |= (1 << (vid & 0x1F));
2117 ixgb_write_vfta(&adapter->hw, index, vfta);
2118}
2119
2120static void
2121ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2122{
8908c6cd 2123 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2124 uint32_t vfta, index;
2125
2126 ixgb_irq_disable(adapter);
2127
2128 if(adapter->vlgrp)
2129 adapter->vlgrp->vlan_devices[vid] = NULL;
2130
2131 ixgb_irq_enable(adapter);
2132
2133 /* remove VID from filter table*/
2134
2135 index = (vid >> 5) & 0x7F;
2136 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2137 vfta &= ~(1 << (vid & 0x1F));
2138 ixgb_write_vfta(&adapter->hw, index, vfta);
2139}
2140
2141static void
2142ixgb_restore_vlan(struct ixgb_adapter *adapter)
2143{
2144 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2145
2146 if(adapter->vlgrp) {
2147 uint16_t vid;
2148 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2149 if(!adapter->vlgrp->vlan_devices[vid])
2150 continue;
2151 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2152 }
2153 }
2154}
2155
1da177e4
LT		 2156#ifdef CONFIG_NET_POLL_CONTROLLER
2157/*
2158 * Polling 'interrupt' - used by things like netconsole to send skbs
2159 * without having to re-enable interrupts. It's not called while
2160 * the interrupt routine is executing.
2161 */
2162
2163static void ixgb_netpoll(struct net_device *dev)
2164{
2165 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2166
1da177e4
LT		 2167 disable_irq(adapter->pdev->irq);
2168 ixgb_intr(adapter->pdev->irq, dev, NULL);
2169 enable_irq(adapter->pdev->irq);
2170}
2171#endif
2172
2173/* ixgb_main.c */
kernel source for telekom puls (alcatel/mediatek)