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e1000e: Fix typo ! &
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
0abb6eb1 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
a3ffab87 39#define DRV_VERSION "1.0.126-k2"DRIVERNAPI
273dc74e
SH		 40const char ixgb_driver_version[] = DRV_VERSION;
41static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK		 54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT		 56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
70void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
7d12e780 96static irqreturn_t ixgb_intr(int irq, void *data);
1da177e4 97static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4 99#ifdef CONFIG_IXGB_NAPI
bea3348e 100static int ixgb_clean(struct napi_struct *napi, int budget);
1da177e4
LT		 101static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103#else
104static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
1da177e4 107static void ixgb_tx_timeout(struct net_device *dev);
c4028958 108static void ixgb_tx_timeout_task(struct work_struct *work);
1da177e4
LT		 109static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp);
111static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
112static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
113static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114
1da177e4
LT		 115#ifdef CONFIG_NET_POLL_CONTROLLER
116/* for netdump / net console */
117static void ixgb_netpoll(struct net_device *dev);
118#endif
119
01748fbb
LV		 120static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
121 enum pci_channel_state state);
122static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
123static void ixgb_io_resume (struct pci_dev *pdev);
1da177e4 124
01748fbb
LV		 125static struct pci_error_handlers ixgb_err_handler = {
126 .error_detected = ixgb_io_error_detected,
127 .slot_reset = ixgb_io_slot_reset,
128 .resume = ixgb_io_resume,
129};
130
1da177e4 131static struct pci_driver ixgb_driver = {
c2eba932 132 .name = ixgb_driver_name,
1da177e4 133 .id_table = ixgb_pci_tbl,
c2eba932
MC		 134 .probe = ixgb_probe,
135 .remove = __devexit_p(ixgb_remove),
01748fbb 136 .err_handler = &ixgb_err_handler
1da177e4
LT		 137};
138
139MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
140MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
141MODULE_LICENSE("GPL");
01e5abc2 142MODULE_VERSION(DRV_VERSION);
1da177e4 143
ec9c3f5d
AK		 144#define DEFAULT_DEBUG_LEVEL_SHIFT 3
145static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
146module_param(debug, int, 0);
147MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
148
1da177e4 149/* some defines for controlling descriptor fetches in h/w */
3ae84d92
JB		 150#define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
151#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
152 * this */
153#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
154 * is pushed this many descriptors
155 * from head */
1da177e4
LT		 156
157/**
158 * ixgb_init_module - Driver Registration Routine
159 *
160 * ixgb_init_module is the first routine called when the driver is
161 * loaded. All it does is register with the PCI subsystem.
162 **/
163
164static int __init
165ixgb_init_module(void)
166{
1da177e4
LT		 167 printk(KERN_INFO "%s - version %s\n",
168 ixgb_driver_string, ixgb_driver_version);
169
170 printk(KERN_INFO "%s\n", ixgb_copyright);
171
29917620 172 return pci_register_driver(&ixgb_driver);
1da177e4
LT		 173}
174
175module_init(ixgb_init_module);
176
177/**
178 * ixgb_exit_module - Driver Exit Cleanup Routine
179 *
180 * ixgb_exit_module is called just before the driver is removed
181 * from memory.
182 **/
183
184static void __exit
185ixgb_exit_module(void)
186{
1da177e4
LT		 187 pci_unregister_driver(&ixgb_driver);
188}
189
190module_exit(ixgb_exit_module);
191
192/**
193 * ixgb_irq_disable - Mask off interrupt generation on the NIC
194 * @adapter: board private structure
195 **/
196
235949d1 197static void
1da177e4
LT		 198ixgb_irq_disable(struct ixgb_adapter *adapter)
199{
200 atomic_inc(&adapter->irq_sem);
201 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
202 IXGB_WRITE_FLUSH(&adapter->hw);
203 synchronize_irq(adapter->pdev->irq);
204}
205
206/**
207 * ixgb_irq_enable - Enable default interrupt generation settings
208 * @adapter: board private structure
209 **/
210
235949d1 211static void
1da177e4
LT		 212ixgb_irq_enable(struct ixgb_adapter *adapter)
213{
214 if(atomic_dec_and_test(&adapter->irq_sem)) {
215 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 216 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
217 IXGB_INT_LSC);
1da177e4
LT		 218 IXGB_WRITE_FLUSH(&adapter->hw);
219 }
220}
221
222int
223ixgb_up(struct ixgb_adapter *adapter)
224{
225 struct net_device *netdev = adapter->netdev;
fb136c07 226 int err, irq_flags = IRQF_SHARED;
1da177e4
LT		 227 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
228 struct ixgb_hw *hw = &adapter->hw;
229
230 /* hardware has been reset, we need to reload some things */
231
8556f0d1 232 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT		 233 ixgb_set_multi(netdev);
234
235 ixgb_restore_vlan(adapter);
236
237 ixgb_configure_tx(adapter);
238 ixgb_setup_rctl(adapter);
239 ixgb_configure_rx(adapter);
240 ixgb_alloc_rx_buffers(adapter);
241
e59d1696
AK		 242 /* disable interrupts and get the hardware into a known state */
243 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
244
fb136c07
AK		 245 /* only enable MSI if bus is in PCI-X mode */
246 if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
247 err = pci_enable_msi(adapter->pdev);
248 if (!err) {
249 adapter->have_msi = 1;
250 irq_flags = 0;
251 }
1da177e4
LT		 252 /* proceed to try to request regular interrupt */
253 }
1da177e4 254
fb136c07
AK		 255 err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
256 netdev->name, netdev);
257 if (err) {
258 if (adapter->have_msi)
259 pci_disable_msi(adapter->pdev);
ec9c3f5d
AK		 260 DPRINTK(PROBE, ERR,
261 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 262 return err;
ec9c3f5d 263 }
1da177e4 264
1da177e4
LT		 265 if((hw->max_frame_size != max_frame) ||
266 (hw->max_frame_size !=
267 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
268
269 hw->max_frame_size = max_frame;
270
271 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
272
273 if(hw->max_frame_size >
274 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
275 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
276
277 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
278 ctrl0 |= IXGB_CTRL0_JFE;
279 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
280 }
281 }
282 }
283
284 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 285
286#ifdef CONFIG_IXGB_NAPI
bea3348e 287 napi_enable(&adapter->napi);
1da177e4 288#endif
e59d1696
AK		 289 ixgb_irq_enable(adapter);
290
1da177e4
LT		 291 return 0;
292}
293
294void
295ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
296{
297 struct net_device *netdev = adapter->netdev;
298
299 ixgb_irq_disable(adapter);
300 free_irq(adapter->pdev->irq, netdev);
fb136c07
AK		 301
302 if (adapter->have_msi)
1da177e4
LT		 303 pci_disable_msi(adapter->pdev);
304
1da177e4
LT		 305 if(kill_watchdog)
306 del_timer_sync(&adapter->watchdog_timer);
307#ifdef CONFIG_IXGB_NAPI
bea3348e 308 napi_disable(&adapter->napi);
1da177e4
LT		 309#endif
310 adapter->link_speed = 0;
311 adapter->link_duplex = 0;
312 netif_carrier_off(netdev);
313 netif_stop_queue(netdev);
314
315 ixgb_reset(adapter);
316 ixgb_clean_tx_ring(adapter);
317 ixgb_clean_rx_ring(adapter);
318}
319
320void
321ixgb_reset(struct ixgb_adapter *adapter)
322{
323
324 ixgb_adapter_stop(&adapter->hw);
325 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 326 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT		 327}
328
329/**
330 * ixgb_probe - Device Initialization Routine
331 * @pdev: PCI device information struct
332 * @ent: entry in ixgb_pci_tbl
333 *
334 * Returns 0 on success, negative on failure
335 *
336 * ixgb_probe initializes an adapter identified by a pci_dev structure.
337 * The OS initialization, configuring of the adapter private structure,
338 * and a hardware reset occur.
339 **/
340
341static int __devinit
342ixgb_probe(struct pci_dev *pdev,
343 const struct pci_device_id *ent)
344{
345 struct net_device *netdev = NULL;
346 struct ixgb_adapter *adapter;
347 static int cards_found = 0;
348 unsigned long mmio_start;
349 int mmio_len;
350 int pci_using_dac;
351 int i;
352 int err;
353
354 if((err = pci_enable_device(pdev)))
355 return err;
356
c91e468a
AS		 357 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
358 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 359 pci_using_dac = 1;
360 } else {
c91e468a
AS		 361 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
362 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK		 363 printk(KERN_ERR
364 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 365 goto err_dma_mask;
1da177e4
LT		 366 }
367 pci_using_dac = 0;
368 }
369
370 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 371 goto err_request_regions;
1da177e4
LT		 372
373 pci_set_master(pdev);
374
375 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
376 if(!netdev) {
377 err = -ENOMEM;
378 goto err_alloc_etherdev;
379 }
380
1da177e4
LT		 381 SET_NETDEV_DEV(netdev, &pdev->dev);
382
383 pci_set_drvdata(pdev, netdev);
8908c6cd 384 adapter = netdev_priv(netdev);
1da177e4
LT		 385 adapter->netdev = netdev;
386 adapter->pdev = pdev;
387 adapter->hw.back = adapter;
ec9c3f5d 388 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT		 389
390 mmio_start = pci_resource_start(pdev, BAR_0);
391 mmio_len = pci_resource_len(pdev, BAR_0);
392
393 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
394 if(!adapter->hw.hw_addr) {
395 err = -EIO;
396 goto err_ioremap;
397 }
398
399 for(i = BAR_1; i <= BAR_5; i++) {
400 if(pci_resource_len(pdev, i) == 0)
401 continue;
402 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
403 adapter->hw.io_base = pci_resource_start(pdev, i);
404 break;
405 }
406 }
407
408 netdev->open = &ixgb_open;
409 netdev->stop = &ixgb_close;
410 netdev->hard_start_xmit = &ixgb_xmit_frame;
411 netdev->get_stats = &ixgb_get_stats;
412 netdev->set_multicast_list = &ixgb_set_multi;
413 netdev->set_mac_address = &ixgb_set_mac;
414 netdev->change_mtu = &ixgb_change_mtu;
415 ixgb_set_ethtool_ops(netdev);
416 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 417 netdev->watchdog_timeo = 5 * HZ;
1da177e4 418#ifdef CONFIG_IXGB_NAPI
bea3348e 419 netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
1da177e4
LT		 420#endif
421 netdev->vlan_rx_register = ixgb_vlan_rx_register;
422 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
423 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
424#ifdef CONFIG_NET_POLL_CONTROLLER
425 netdev->poll_controller = ixgb_netpoll;
426#endif
427
0eb5a34c 428 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 429 netdev->mem_start = mmio_start;
430 netdev->mem_end = mmio_start + mmio_len;
431 netdev->base_addr = adapter->hw.io_base;
432
433 adapter->bd_number = cards_found;
434 adapter->link_speed = 0;
435 adapter->link_duplex = 0;
436
437 /* setup the private structure */
438
439 if((err = ixgb_sw_init(adapter)))
440 goto err_sw_init;
441
442 netdev->features = NETIF_F_SG |
443 NETIF_F_HW_CSUM |
444 NETIF_F_HW_VLAN_TX |
445 NETIF_F_HW_VLAN_RX |
446 NETIF_F_HW_VLAN_FILTER;
1da177e4 447 netdev->features |= NETIF_F_TSO;
f017f14b
AK		 448#ifdef NETIF_F_LLTX
449 netdev->features |= NETIF_F_LLTX;
450#endif
1da177e4
LT		 451
452 if(pci_using_dac)
453 netdev->features |= NETIF_F_HIGHDMA;
454
455 /* make sure the EEPROM is good */
456
457 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 458 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 459 err = -EIO;
460 goto err_eeprom;
461 }
462
463 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 464 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 465
df859c51 466 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 467 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 468 err = -EIO;
469 goto err_eeprom;
470 }
471
472 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
473
474 init_timer(&adapter->watchdog_timer);
475 adapter->watchdog_timer.function = &ixgb_watchdog;
476 adapter->watchdog_timer.data = (unsigned long)adapter;
477
c4028958 478 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
1da177e4 479
ec9c3f5d 480 strcpy(netdev->name, "eth%d");
1da177e4
LT		 481 if((err = register_netdev(netdev)))
482 goto err_register;
483
484 /* we're going to reset, so assume we have no link for now */
485
486 netif_carrier_off(netdev);
487 netif_stop_queue(netdev);
488
ec9c3f5d 489 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT		 490 ixgb_check_options(adapter);
491 /* reset the hardware with the new settings */
492
493 ixgb_reset(adapter);
494
495 cards_found++;
496 return 0;
497
498err_register:
499err_sw_init:
500err_eeprom:
501 iounmap(adapter->hw.hw_addr);
502err_ioremap:
503 free_netdev(netdev);
504err_alloc_etherdev:
505 pci_release_regions(pdev);
c91e468a
AS		 506err_request_regions:
507err_dma_mask:
508 pci_disable_device(pdev);
1da177e4
LT		 509 return err;
510}
511
512/**
513 * ixgb_remove - Device Removal Routine
514 * @pdev: PCI device information struct
515 *
516 * ixgb_remove is called by the PCI subsystem to alert the driver
517 * that it should release a PCI device. The could be caused by a
518 * Hot-Plug event, or because the driver is going to be removed from
519 * memory.
520 **/
521
522static void __devexit
523ixgb_remove(struct pci_dev *pdev)
524{
525 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 526 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 527
528 unregister_netdev(netdev);
529
530 iounmap(adapter->hw.hw_addr);
531 pci_release_regions(pdev);
532
533 free_netdev(netdev);
534}
535
536/**
537 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
538 * @adapter: board private structure to initialize
539 *
540 * ixgb_sw_init initializes the Adapter private data structure.
541 * Fields are initialized based on PCI device information and
542 * OS network device settings (MTU size).
543 **/
544
545static int __devinit
546ixgb_sw_init(struct ixgb_adapter *adapter)
547{
548 struct ixgb_hw *hw = &adapter->hw;
549 struct net_device *netdev = adapter->netdev;
550 struct pci_dev *pdev = adapter->pdev;
551
552 /* PCI config space info */
553
554 hw->vendor_id = pdev->vendor;
555 hw->device_id = pdev->device;
556 hw->subsystem_vendor_id = pdev->subsystem_vendor;
557 hw->subsystem_id = pdev->subsystem_device;
558
1da177e4 559 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 560 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT		 561
562 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK		 563 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
564 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
565 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT		 566 hw->mac_type = ixgb_82597;
567 else {
568 /* should never have loaded on this device */
ec9c3f5d 569 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT		 570 }
571
572 /* enable flow control to be programmed */
573 hw->fc.send_xon = 1;
574
575 atomic_set(&adapter->irq_sem, 1);
576 spin_lock_init(&adapter->tx_lock);
577
578 return 0;
579}
580
581/**
582 * ixgb_open - Called when a network interface is made active
583 * @netdev: network interface device structure
584 *
585 * Returns 0 on success, negative value on failure
586 *
587 * The open entry point is called when a network interface is made
588 * active by the system (IFF_UP). At this point all resources needed
589 * for transmit and receive operations are allocated, the interrupt
590 * handler is registered with the OS, the watchdog timer is started,
591 * and the stack is notified that the interface is ready.
592 **/
593
594static int
595ixgb_open(struct net_device *netdev)
596{
8908c6cd 597 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 598 int err;
599
600 /* allocate transmit descriptors */
601
602 if((err = ixgb_setup_tx_resources(adapter)))
603 goto err_setup_tx;
604
605 /* allocate receive descriptors */
606
607 if((err = ixgb_setup_rx_resources(adapter)))
608 goto err_setup_rx;
609
610 if((err = ixgb_up(adapter)))
611 goto err_up;
612
613 return 0;
614
615err_up:
616 ixgb_free_rx_resources(adapter);
617err_setup_rx:
618 ixgb_free_tx_resources(adapter);
619err_setup_tx:
620 ixgb_reset(adapter);
621
622 return err;
623}
624
625/**
626 * ixgb_close - Disables a network interface
627 * @netdev: network interface device structure
628 *
629 * Returns 0, this is not allowed to fail
630 *
631 * The close entry point is called when an interface is de-activated
632 * by the OS. The hardware is still under the drivers control, but
633 * needs to be disabled. A global MAC reset is issued to stop the
634 * hardware, and all transmit and receive resources are freed.
635 **/
636
637static int
638ixgb_close(struct net_device *netdev)
639{
8908c6cd 640 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 641
642 ixgb_down(adapter, TRUE);
643
644 ixgb_free_tx_resources(adapter);
645 ixgb_free_rx_resources(adapter);
646
647 return 0;
648}
649
650/**
651 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
652 * @adapter: board private structure
653 *
654 * Return 0 on success, negative on failure
655 **/
656
657int
658ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
659{
660 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
661 struct pci_dev *pdev = adapter->pdev;
662 int size;
663
664 size = sizeof(struct ixgb_buffer) * txdr->count;
665 txdr->buffer_info = vmalloc(size);
666 if(!txdr->buffer_info) {
ec9c3f5d
AK		 667 DPRINTK(PROBE, ERR,
668 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT		 669 return -ENOMEM;
670 }
671 memset(txdr->buffer_info, 0, size);
672
673 /* round up to nearest 4K */
674
675 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
55e924cf 676 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 677
678 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
679 if(!txdr->desc) {
680 vfree(txdr->buffer_info);
ec9c3f5d
AK		 681 DPRINTK(PROBE, ERR,
682 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT		 683 return -ENOMEM;
684 }
685 memset(txdr->desc, 0, txdr->size);
686
687 txdr->next_to_use = 0;
688 txdr->next_to_clean = 0;
689
690 return 0;
691}
692
693/**
694 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
695 * @adapter: board private structure
696 *
697 * Configure the Tx unit of the MAC after a reset.
698 **/
699
700static void
701ixgb_configure_tx(struct ixgb_adapter *adapter)
702{
703 uint64_t tdba = adapter->tx_ring.dma;
704 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
705 uint32_t tctl;
706 struct ixgb_hw *hw = &adapter->hw;
707
708 /* Setup the Base and Length of the Tx Descriptor Ring
709 * tx_ring.dma can be either a 32 or 64 bit value
710 */
711
712 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
713 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
714
715 IXGB_WRITE_REG(hw, TDLEN, tdlen);
716
717 /* Setup the HW Tx Head and Tail descriptor pointers */
718
719 IXGB_WRITE_REG(hw, TDH, 0);
720 IXGB_WRITE_REG(hw, TDT, 0);
721
722 /* don't set up txdctl, it induces performance problems if configured
723 * incorrectly */
724 /* Set the Tx Interrupt Delay register */
725
726 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
727
728 /* Program the Transmit Control Register */
729
730 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
731 IXGB_WRITE_REG(hw, TCTL, tctl);
732
733 /* Setup Transmit Descriptor Settings for this adapter */
734 adapter->tx_cmd_type =
735 IXGB_TX_DESC_TYPE
736 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
737}
738
739/**
740 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
741 * @adapter: board private structure
742 *
743 * Returns 0 on success, negative on failure
744 **/
745
746int
747ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
748{
749 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
750 struct pci_dev *pdev = adapter->pdev;
751 int size;
752
753 size = sizeof(struct ixgb_buffer) * rxdr->count;
754 rxdr->buffer_info = vmalloc(size);
755 if(!rxdr->buffer_info) {
ec9c3f5d
AK		 756 DPRINTK(PROBE, ERR,
757 "Unable to allocate receive descriptor ring\n");
1da177e4
LT		 758 return -ENOMEM;
759 }
760 memset(rxdr->buffer_info, 0, size);
761
762 /* Round up to nearest 4K */
763
764 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
55e924cf 765 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 766
767 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
768
769 if(!rxdr->desc) {
770 vfree(rxdr->buffer_info);
ec9c3f5d
AK		 771 DPRINTK(PROBE, ERR,
772 "Unable to allocate receive descriptors\n");
1da177e4
LT		 773 return -ENOMEM;
774 }
775 memset(rxdr->desc, 0, rxdr->size);
776
777 rxdr->next_to_clean = 0;
778 rxdr->next_to_use = 0;
779
780 return 0;
781}
782
783/**
784 * ixgb_setup_rctl - configure the receive control register
785 * @adapter: Board private structure
786 **/
787
788static void
789ixgb_setup_rctl(struct ixgb_adapter *adapter)
790{
791 uint32_t rctl;
792
793 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
794
795 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
796
797 rctl |=
798 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
799 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
800 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
801
802 rctl |= IXGB_RCTL_SECRC;
803
3f3dc0dd 804 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 805 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 806 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 807 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 808 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 809 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 810 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 811 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT		 812
813 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
814}
815
816/**
817 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
818 * @adapter: board private structure
819 *
820 * Configure the Rx unit of the MAC after a reset.
821 **/
822
823static void
824ixgb_configure_rx(struct ixgb_adapter *adapter)
825{
826 uint64_t rdba = adapter->rx_ring.dma;
827 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
828 struct ixgb_hw *hw = &adapter->hw;
829 uint32_t rctl;
830 uint32_t rxcsum;
831 uint32_t rxdctl;
832
833 /* make sure receives are disabled while setting up the descriptors */
834
835 rctl = IXGB_READ_REG(hw, RCTL);
836 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
837
838 /* set the Receive Delay Timer Register */
839
840 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
841
842 /* Setup the Base and Length of the Rx Descriptor Ring */
843
844 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
845 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
846
847 IXGB_WRITE_REG(hw, RDLEN, rdlen);
848
849 /* Setup the HW Rx Head and Tail Descriptor Pointers */
850 IXGB_WRITE_REG(hw, RDH, 0);
851 IXGB_WRITE_REG(hw, RDT, 0);
852
853 /* set up pre-fetching of receive buffers so we get some before we
854 * run out (default hardware behavior is to run out before fetching
855 * more). This sets up to fetch if HTHRESH rx descriptors are avail
856 * and the descriptors in hw cache are below PTHRESH. This avoids
857 * the hardware behavior of fetching <=512 descriptors in a single
858 * burst that pre-empts all other activity, usually causing fifo
859 * overflows. */
860 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
861 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
862 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
863 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
864 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
865
866 /* Enable Receive Checksum Offload for TCP and UDP */
867 if(adapter->rx_csum == TRUE) {
868 rxcsum = IXGB_READ_REG(hw, RXCSUM);
869 rxcsum |= IXGB_RXCSUM_TUOFL;
870 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
871 }
872
873 /* Enable Receives */
874
875 IXGB_WRITE_REG(hw, RCTL, rctl);
876}
877
878/**
879 * ixgb_free_tx_resources - Free Tx Resources
880 * @adapter: board private structure
881 *
882 * Free all transmit software resources
883 **/
884
885void
886ixgb_free_tx_resources(struct ixgb_adapter *adapter)
887{
888 struct pci_dev *pdev = adapter->pdev;
889
890 ixgb_clean_tx_ring(adapter);
891
892 vfree(adapter->tx_ring.buffer_info);
893 adapter->tx_ring.buffer_info = NULL;
894
895 pci_free_consistent(pdev, adapter->tx_ring.size,
896 adapter->tx_ring.desc, adapter->tx_ring.dma);
897
898 adapter->tx_ring.desc = NULL;
899}
900
235949d1 901static void
1da177e4
LT		 902ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
903 struct ixgb_buffer *buffer_info)
904{
905 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK		 906
907 if (buffer_info->dma)
908 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
909 PCI_DMA_TODEVICE);
910
911 if (buffer_info->skb)
1da177e4 912 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK		 913
914 buffer_info->skb = NULL;
915 buffer_info->dma = 0;
916 buffer_info->time_stamp = 0;
917 /* these fields must always be initialized in tx
918 * buffer_info->length = 0;
919 * buffer_info->next_to_watch = 0; */
1da177e4
LT		 920}
921
922/**
923 * ixgb_clean_tx_ring - Free Tx Buffers
924 * @adapter: board private structure
925 **/
926
927static void
928ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
929{
930 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
931 struct ixgb_buffer *buffer_info;
932 unsigned long size;
933 unsigned int i;
934
935 /* Free all the Tx ring sk_buffs */
936
937 for(i = 0; i < tx_ring->count; i++) {
938 buffer_info = &tx_ring->buffer_info[i];
939 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
940 }
941
942 size = sizeof(struct ixgb_buffer) * tx_ring->count;
943 memset(tx_ring->buffer_info, 0, size);
944
945 /* Zero out the descriptor ring */
946
947 memset(tx_ring->desc, 0, tx_ring->size);
948
949 tx_ring->next_to_use = 0;
950 tx_ring->next_to_clean = 0;
951
952 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
953 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
954}
955
956/**
957 * ixgb_free_rx_resources - Free Rx Resources
958 * @adapter: board private structure
959 *
960 * Free all receive software resources
961 **/
962
963void
964ixgb_free_rx_resources(struct ixgb_adapter *adapter)
965{
966 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
967 struct pci_dev *pdev = adapter->pdev;
968
969 ixgb_clean_rx_ring(adapter);
970
971 vfree(rx_ring->buffer_info);
972 rx_ring->buffer_info = NULL;
973
974 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
975
976 rx_ring->desc = NULL;
977}
978
979/**
980 * ixgb_clean_rx_ring - Free Rx Buffers
981 * @adapter: board private structure
982 **/
983
984static void
985ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
986{
987 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
988 struct ixgb_buffer *buffer_info;
989 struct pci_dev *pdev = adapter->pdev;
990 unsigned long size;
991 unsigned int i;
992
993 /* Free all the Rx ring sk_buffs */
994
995 for(i = 0; i < rx_ring->count; i++) {
996 buffer_info = &rx_ring->buffer_info[i];
997 if(buffer_info->skb) {
998
999 pci_unmap_single(pdev,
1000 buffer_info->dma,
1001 buffer_info->length,
1002 PCI_DMA_FROMDEVICE);
1003
1004 dev_kfree_skb(buffer_info->skb);
1005
1006 buffer_info->skb = NULL;
1007 }
1008 }
1009
1010 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1011 memset(rx_ring->buffer_info, 0, size);
1012
1013 /* Zero out the descriptor ring */
1014
1015 memset(rx_ring->desc, 0, rx_ring->size);
1016
1017 rx_ring->next_to_clean = 0;
1018 rx_ring->next_to_use = 0;
1019
1020 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1021 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1022}
1023
1024/**
1025 * ixgb_set_mac - Change the Ethernet Address of the NIC
1026 * @netdev: network interface device structure
1027 * @p: pointer to an address structure
1028 *
1029 * Returns 0 on success, negative on failure
1030 **/
1031
1032static int
1033ixgb_set_mac(struct net_device *netdev, void *p)
1034{
8908c6cd 1035 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1036 struct sockaddr *addr = p;
1037
1038 if(!is_valid_ether_addr(addr->sa_data))
1039 return -EADDRNOTAVAIL;
1040
1041 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1042
1043 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1044
1045 return 0;
1046}
1047
1048/**
1049 * ixgb_set_multi - Multicast and Promiscuous mode set
1050 * @netdev: network interface device structure
1051 *
1052 * The set_multi entry point is called whenever the multicast address
1053 * list or the network interface flags are updated. This routine is
1054 * responsible for configuring the hardware for proper multicast,
1055 * promiscuous mode, and all-multi behavior.
1056 **/
1057
1058static void
1059ixgb_set_multi(struct net_device *netdev)
1060{
8908c6cd 1061 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1062 struct ixgb_hw *hw = &adapter->hw;
1063 struct dev_mc_list *mc_ptr;
1064 uint32_t rctl;
1065 int i;
1066
1067 /* Check for Promiscuous and All Multicast modes */
1068
1069 rctl = IXGB_READ_REG(hw, RCTL);
1070
1071 if(netdev->flags & IFF_PROMISC) {
1072 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1073 } else if(netdev->flags & IFF_ALLMULTI) {
1074 rctl |= IXGB_RCTL_MPE;
1075 rctl &= ~IXGB_RCTL_UPE;
1076 } else {
1077 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1078 }
1079
1080 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1081 rctl |= IXGB_RCTL_MPE;
1082 IXGB_WRITE_REG(hw, RCTL, rctl);
1083 } else {
273dc74e
SH		 1084 uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
1085 IXGB_ETH_LENGTH_OF_ADDRESS];
1da177e4
LT		 1086
1087 IXGB_WRITE_REG(hw, RCTL, rctl);
1088
1089 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1090 i++, mc_ptr = mc_ptr->next)
1091 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1092 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1093
1094 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1095 }
1096}
1097
1098/**
1099 * ixgb_watchdog - Timer Call-back
1100 * @data: pointer to netdev cast into an unsigned long
1101 **/
1102
1103static void
1104ixgb_watchdog(unsigned long data)
1105{
1106 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1107 struct net_device *netdev = adapter->netdev;
1108 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1109
1110 ixgb_check_for_link(&adapter->hw);
1111
1112 if (ixgb_check_for_bad_link(&adapter->hw)) {
1113 /* force the reset path */
1114 netif_stop_queue(netdev);
1115 }
1116
1117 if(adapter->hw.link_up) {
1118 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK		 1119 DPRINTK(LINK, INFO,
1120 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT		 1121 adapter->link_speed = 10000;
1122 adapter->link_duplex = FULL_DUPLEX;
1123 netif_carrier_on(netdev);
1124 netif_wake_queue(netdev);
1125 }
1126 } else {
1127 if(netif_carrier_ok(netdev)) {
1128 adapter->link_speed = 0;
1129 adapter->link_duplex = 0;
ec9c3f5d 1130 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT		 1131 netif_carrier_off(netdev);
1132 netif_stop_queue(netdev);
1133
1134 }
1135 }
1136
1137 ixgb_update_stats(adapter);
1138
1139 if(!netif_carrier_ok(netdev)) {
1140 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1141 /* We've lost link, so the controller stops DMA,
1142 * but we've got queued Tx work that's never going
1143 * to get done, so reset controller to flush Tx.
1144 * (Do the reset outside of interrupt context). */
1145 schedule_work(&adapter->tx_timeout_task);
1146 }
1147 }
1148
1149 /* Force detection of hung controller every watchdog period */
1150 adapter->detect_tx_hung = TRUE;
1151
1152 /* generate an interrupt to force clean up of any stragglers */
1153 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1154
1155 /* Reset the timer */
1156 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1157}
1158
1159#define IXGB_TX_FLAGS_CSUM 0x00000001
1160#define IXGB_TX_FLAGS_VLAN 0x00000002
1161#define IXGB_TX_FLAGS_TSO 0x00000004
1162
235949d1 1163static int
1da177e4
LT		 1164ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1165{
1da177e4
LT		 1166 struct ixgb_context_desc *context_desc;
1167 unsigned int i;
1168 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1169 uint16_t ipcse, tucse, mss;
1170 int err;
1171
89114afd 1172 if (likely(skb_is_gso(skb))) {
adc54139 1173 struct ixgb_buffer *buffer_info;
eddc9ec5
ACM		 1174 struct iphdr *iph;
1175
1da177e4
LT		 1176 if (skb_header_cloned(skb)) {
1177 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1178 if (err)
1179 return err;
1180 }
1181
ab6a5bb6 1182 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 1183 mss = skb_shinfo(skb)->gso_size;
eddc9ec5
ACM		 1184 iph = ip_hdr(skb);
1185 iph->tot_len = 0;
1186 iph->check = 0;
aa8223c7
ACM		 1187 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1188 iph->daddr, 0,
1189 IPPROTO_TCP, 0);
bbe735e4 1190 ipcss = skb_network_offset(skb);
eddc9ec5 1191 ipcso = (void *)&(iph->check) - (void *)skb->data;
ea2ae17d
ACM		 1192 ipcse = skb_transport_offset(skb) - 1;
1193 tucss = skb_transport_offset(skb);
aa8223c7 1194 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 1195 tucse = 0;
1196
1197 i = adapter->tx_ring.next_to_use;
1198 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB		 1199 buffer_info = &adapter->tx_ring.buffer_info[i];
1200 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1201
1202 context_desc->ipcss = ipcss;
1203 context_desc->ipcso = ipcso;
1204 context_desc->ipcse = cpu_to_le16(ipcse);
1205 context_desc->tucss = tucss;
1206 context_desc->tucso = tucso;
1207 context_desc->tucse = cpu_to_le16(tucse);
1208 context_desc->mss = cpu_to_le16(mss);
1209 context_desc->hdr_len = hdr_len;
1210 context_desc->status = 0;
1211 context_desc->cmd_type_len = cpu_to_le32(
1212 IXGB_CONTEXT_DESC_TYPE
1213 | IXGB_CONTEXT_DESC_CMD_TSE
1214 | IXGB_CONTEXT_DESC_CMD_IP
1215 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1216 | IXGB_CONTEXT_DESC_CMD_IDE
1217 | (skb->len - (hdr_len)));
1218
06c2f9ec 1219
1da177e4
LT		 1220 if(++i == adapter->tx_ring.count) i = 0;
1221 adapter->tx_ring.next_to_use = i;
1222
1223 return 1;
1224 }
1da177e4
LT		 1225
1226 return 0;
1227}
1228
235949d1 1229static boolean_t
1da177e4
LT		 1230ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1231{
1232 struct ixgb_context_desc *context_desc;
1233 unsigned int i;
1234 uint8_t css, cso;
1235
84fa7933 1236 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
adc54139 1237 struct ixgb_buffer *buffer_info;
ea2ae17d 1238 css = skb_transport_offset(skb);
ff1dcadb 1239 cso = css + skb->csum_offset;
1da177e4
LT		 1240
1241 i = adapter->tx_ring.next_to_use;
1242 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB		 1243 buffer_info = &adapter->tx_ring.buffer_info[i];
1244 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1245
1246 context_desc->tucss = css;
1247 context_desc->tucso = cso;
1248 context_desc->tucse = 0;
1249 /* zero out any previously existing data in one instruction */
1250 *(uint32_t *)&(context_desc->ipcss) = 0;
1251 context_desc->status = 0;
1252 context_desc->hdr_len = 0;
1253 context_desc->mss = 0;
1254 context_desc->cmd_type_len =
1255 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1256 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1257
1258 if(++i == adapter->tx_ring.count) i = 0;
1259 adapter->tx_ring.next_to_use = i;
1260
1261 return TRUE;
1262 }
1263
1264 return FALSE;
1265}
1266
1267#define IXGB_MAX_TXD_PWR 14
1268#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1269
235949d1 1270static int
1da177e4
LT		 1271ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1272 unsigned int first)
1273{
1274 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1275 struct ixgb_buffer *buffer_info;
1276 int len = skb->len;
1277 unsigned int offset = 0, size, count = 0, i;
5d927853 1278 unsigned int mss = skb_shinfo(skb)->gso_size;
1da177e4
LT		 1279
1280 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1281 unsigned int f;
ac79c82e 1282
1da177e4
LT		 1283 len -= skb->data_len;
1284
1285 i = tx_ring->next_to_use;
1286
1287 while(len) {
1288 buffer_info = &tx_ring->buffer_info[i];
709cf018 1289 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB		 1290 /* Workaround for premature desc write-backs
1291 * in TSO mode. Append 4-byte sentinel desc */
1292 if (unlikely(mss && !nr_frags && size == len && size > 8))
1293 size -= 4;
1294
1da177e4 1295 buffer_info->length = size;
adc54139 1296 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1297 buffer_info->dma =
1298 pci_map_single(adapter->pdev,
1299 skb->data + offset,
1300 size,
1301 PCI_DMA_TODEVICE);
1302 buffer_info->time_stamp = jiffies;
1dfdd7df 1303 buffer_info->next_to_watch = 0;
1da177e4
LT		 1304
1305 len -= size;
1306 offset += size;
1307 count++;
1308 if(++i == tx_ring->count) i = 0;
1309 }
1310
1311 for(f = 0; f < nr_frags; f++) {
1312 struct skb_frag_struct *frag;
1313
1314 frag = &skb_shinfo(skb)->frags[f];
1315 len = frag->size;
1316 offset = 0;
1317
1318 while(len) {
1319 buffer_info = &tx_ring->buffer_info[i];
709cf018 1320 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB		 1321
1322 /* Workaround for premature desc write-backs
1323 * in TSO mode. Append 4-byte sentinel desc */
1324 if (unlikely(mss && !nr_frags && size == len
1325 && size > 8))
1326 size -= 4;
1327
1da177e4
LT		 1328 buffer_info->length = size;
1329 buffer_info->dma =
1330 pci_map_page(adapter->pdev,
1331 frag->page,
1332 frag->page_offset + offset,
1333 size,
1334 PCI_DMA_TODEVICE);
1335 buffer_info->time_stamp = jiffies;
1dfdd7df 1336 buffer_info->next_to_watch = 0;
1da177e4
LT		 1337
1338 len -= size;
1339 offset += size;
1340 count++;
1341 if(++i == tx_ring->count) i = 0;
1342 }
1343 }
1344 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1345 tx_ring->buffer_info[i].skb = skb;
1346 tx_ring->buffer_info[first].next_to_watch = i;
1347
1348 return count;
1349}
1350
235949d1 1351static void
1da177e4
LT		 1352ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1353{
1354 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1355 struct ixgb_tx_desc *tx_desc = NULL;
1356 struct ixgb_buffer *buffer_info;
1357 uint32_t cmd_type_len = adapter->tx_cmd_type;
1358 uint8_t status = 0;
1359 uint8_t popts = 0;
1360 unsigned int i;
1361
1362 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1363 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1364 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1365 }
1366
1367 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1368 popts |= IXGB_TX_DESC_POPTS_TXSM;
1369
1370 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1371 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1372 }
1373
1374 i = tx_ring->next_to_use;
1375
1376 while(count--) {
1377 buffer_info = &tx_ring->buffer_info[i];
1378 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1379 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1380 tx_desc->cmd_type_len =
1381 cpu_to_le32(cmd_type_len | buffer_info->length);
1382 tx_desc->status = status;
1383 tx_desc->popts = popts;
1384 tx_desc->vlan = cpu_to_le16(vlan_id);
1385
1386 if(++i == tx_ring->count) i = 0;
1387 }
1388
1389 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1390 | IXGB_TX_DESC_CMD_RS );
1391
1392 /* Force memory writes to complete before letting h/w
1393 * know there are new descriptors to fetch. (Only
1394 * applicable for weak-ordered memory model archs,
1395 * such as IA-64). */
1396 wmb();
1397
1398 tx_ring->next_to_use = i;
1399 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1400}
1401
dfd341e4
JB		 1402static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1403{
1404 struct ixgb_adapter *adapter = netdev_priv(netdev);
1405 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1406
1407 netif_stop_queue(netdev);
1408 /* Herbert's original patch had:
1409 * smp_mb__after_netif_stop_queue();
1410 * but since that doesn't exist yet, just open code it. */
1411 smp_mb();
1412
1413 /* We need to check again in a case another CPU has just
1414 * made room available. */
1415 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1416 return -EBUSY;
1417
1418 /* A reprieve! */
1419 netif_start_queue(netdev);
1420 ++adapter->restart_queue;
1421 return 0;
1422}
1423
1424static int ixgb_maybe_stop_tx(struct net_device *netdev,
1425 struct ixgb_desc_ring *tx_ring, int size)
1426{
1427 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1428 return 0;
1429 return __ixgb_maybe_stop_tx(netdev, size);
1430}
1431
1432
1da177e4
LT		 1433/* Tx Descriptors needed, worst case */
1434#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1435 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
5d927853
JB		 1436#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1437 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1438 + 1 /* one more needed for sentinel TSO workaround */
1da177e4
LT		 1439
1440static int
1441ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1442{
8908c6cd 1443 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1444 unsigned int first;
1445 unsigned int tx_flags = 0;
1446 unsigned long flags;
1447 int vlan_id = 0;
1448 int tso;
1449
1450 if(skb->len <= 0) {
1451 dev_kfree_skb_any(skb);
1452 return 0;
1453 }
1454
f017f14b
AK		 1455#ifdef NETIF_F_LLTX
1456 local_irq_save(flags);
1457 if (!spin_trylock(&adapter->tx_lock)) {
1458 /* Collision - tell upper layer to requeue */
1459 local_irq_restore(flags);
1460 return NETDEV_TX_LOCKED;
1461 }
1462#else
1da177e4 1463 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1464#endif
1465
dfd341e4
JB		 1466 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1467 DESC_NEEDED))) {
1da177e4
LT		 1468 netif_stop_queue(netdev);
1469 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1470 return NETDEV_TX_BUSY;
1da177e4 1471 }
f017f14b
AK		 1472
1473#ifndef NETIF_F_LLTX
1da177e4 1474 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1475#endif
1da177e4
LT		 1476
1477 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1478 tx_flags |= IXGB_TX_FLAGS_VLAN;
1479 vlan_id = vlan_tx_tag_get(skb);
1480 }
1481
1482 first = adapter->tx_ring.next_to_use;
1483
1484 tso = ixgb_tso(adapter, skb);
1485 if (tso < 0) {
1486 dev_kfree_skb_any(skb);
f017f14b
AK		 1487#ifdef NETIF_F_LLTX
1488 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1489#endif
1da177e4
LT		 1490 return NETDEV_TX_OK;
1491 }
1492
96f9c2e2 1493 if (likely(tso))
1da177e4
LT		 1494 tx_flags |= IXGB_TX_FLAGS_TSO;
1495 else if(ixgb_tx_csum(adapter, skb))
1496 tx_flags |= IXGB_TX_FLAGS_CSUM;
1497
1498 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1499 tx_flags);
1500
1501 netdev->trans_start = jiffies;
1502
f017f14b
AK		 1503#ifdef NETIF_F_LLTX
1504 /* Make sure there is space in the ring for the next send. */
dfd341e4 1505 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
f017f14b
AK		 1506
1507 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1508
1509#endif
1510 return NETDEV_TX_OK;
1da177e4
LT		 1511}
1512
1513/**
1514 * ixgb_tx_timeout - Respond to a Tx Hang
1515 * @netdev: network interface device structure
1516 **/
1517
1518static void
1519ixgb_tx_timeout(struct net_device *netdev)
1520{
8908c6cd 1521 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1522
1523 /* Do the reset outside of interrupt context */
1524 schedule_work(&adapter->tx_timeout_task);
1525}
1526
1527static void
c4028958 1528ixgb_tx_timeout_task(struct work_struct *work)
1da177e4 1529{
c4028958
DH		 1530 struct ixgb_adapter *adapter =
1531 container_of(work, struct ixgb_adapter, tx_timeout_task);
1da177e4 1532
9b8118df 1533 adapter->tx_timeout_count++;
1da177e4
LT		 1534 ixgb_down(adapter, TRUE);
1535 ixgb_up(adapter);
1536}
1537
1538/**
1539 * ixgb_get_stats - Get System Network Statistics
1540 * @netdev: network interface device structure
1541 *
1542 * Returns the address of the device statistics structure.
1543 * The statistics are actually updated from the timer callback.
1544 **/
1545
1546static struct net_device_stats *
1547ixgb_get_stats(struct net_device *netdev)
1548{
8908c6cd 1549 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1550
1551 return &adapter->net_stats;
1552}
1553
1554/**
1555 * ixgb_change_mtu - Change the Maximum Transfer Unit
1556 * @netdev: network interface device structure
1557 * @new_mtu: new value for maximum frame size
1558 *
1559 * Returns 0 on success, negative on failure
1560 **/
1561
1562static int
1563ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1564{
8908c6cd 1565 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1566 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1567 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1568
1569
1570 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1571 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1572 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT		 1573 return -EINVAL;
1574 }
1575
3f3dc0dd 1576 adapter->rx_buffer_len = max_frame;
1da177e4
LT		 1577
1578 netdev->mtu = new_mtu;
1579
3f3dc0dd 1580 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT		 1581 ixgb_down(adapter, TRUE);
1582 ixgb_up(adapter);
1583 }
1584
1585 return 0;
1586}
1587
1588/**
1589 * ixgb_update_stats - Update the board statistics counters.
1590 * @adapter: board private structure
1591 **/
1592
1593void
1594ixgb_update_stats(struct ixgb_adapter *adapter)
1595{
5633684d 1596 struct net_device *netdev = adapter->netdev;
01748fbb
LV		 1597 struct pci_dev *pdev = adapter->pdev;
1598
1599 /* Prevent stats update while adapter is being reset */
81b1955e 1600 if (pci_channel_offline(pdev))
01748fbb 1601 return;
5633684d
MC		 1602
1603 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1604 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1605 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1606 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1607 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1608 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1609
1610 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1611 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1612 if(multi >= bcast)
1613 multi -= bcast;
5633684d
MC		 1614
1615 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1616 adapter->stats.mprch += (multi >> 32);
1617 adapter->stats.bprcl += bcast_l;
1618 adapter->stats.bprch += bcast_h;
1619 } else {
1620 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1621 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1622 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1623 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1624 }
1da177e4
LT		 1625 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1626 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1627 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1628 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1629 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1630 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1631 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1632 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1633 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1634 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1635 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1636 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1637 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1638 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1639 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1640 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1641 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1642 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1643 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1644 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1645 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1646 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1647 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1648 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1649 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1650 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1651 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1652 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1653 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1654 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1655 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1656 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1657 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1658 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1659 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1660 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1661 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1662 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1663 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1664 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1665 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1666 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1667 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1668 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1669 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1670 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1671 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1672 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1673 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1674 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1675 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1676 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1677 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1678 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1679 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1680 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1681
1682 /* Fill out the OS statistics structure */
1683
1684 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1685 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1686 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1687 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1688 adapter->net_stats.multicast = adapter->stats.mprcl;
1689 adapter->net_stats.collisions = 0;
1690
1691 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1692 * with a length in the type/len field */
1693 adapter->net_stats.rx_errors =
1694 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1695 adapter->stats.ruc +
1696 adapter->stats.roc /*+ adapter->stats.rlec */ +
1697 adapter->stats.icbc +
1698 adapter->stats.ecbc + adapter->stats.mpc;
1699
1da177e4
LT		 1700 /* see above
1701 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1702 */
1703
1704 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1705 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1706 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1707 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1708
1709 adapter->net_stats.tx_errors = 0;
1710 adapter->net_stats.rx_frame_errors = 0;
1711 adapter->net_stats.tx_aborted_errors = 0;
1712 adapter->net_stats.tx_carrier_errors = 0;
1713 adapter->net_stats.tx_fifo_errors = 0;
1714 adapter->net_stats.tx_heartbeat_errors = 0;
1715 adapter->net_stats.tx_window_errors = 0;
1716}
1717
1718#define IXGB_MAX_INTR 10
1719/**
1720 * ixgb_intr - Interrupt Handler
1721 * @irq: interrupt number
1722 * @data: pointer to a network interface device structure
1da177e4
LT		 1723 **/
1724
1725static irqreturn_t
7d12e780 1726ixgb_intr(int irq, void *data)
1da177e4
LT		 1727{
1728 struct net_device *netdev = data;
8908c6cd 1729 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1730 struct ixgb_hw *hw = &adapter->hw;
1731 uint32_t icr = IXGB_READ_REG(hw, ICR);
1732#ifndef CONFIG_IXGB_NAPI
1733 unsigned int i;
1734#endif
1735
1736 if(unlikely(!icr))
1737 return IRQ_NONE; /* Not our interrupt */
1738
1739 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1740 mod_timer(&adapter->watchdog_timer, jiffies);
1741 }
1742
1743#ifdef CONFIG_IXGB_NAPI
bea3348e 1744 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1da177e4
LT		 1745
1746 /* Disable interrupts and register for poll. The flush
1747 of the posted write is intentionally left out.
1748 */
1749
1750 atomic_inc(&adapter->irq_sem);
1751 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
bea3348e 1752 __netif_rx_schedule(netdev, &adapter->napi);
1da177e4
LT		 1753 }
1754#else
1755 /* yes, that is actually a & and it is meant to make sure that
1756 * every pass through this for loop checks both receive and
1757 * transmit queues for completed descriptors, intended to
1758 * avoid starvation issues and assist tx/rx fairness. */
1759 for(i = 0; i < IXGB_MAX_INTR; i++)
1760 if(!ixgb_clean_rx_irq(adapter) &
1761 !ixgb_clean_tx_irq(adapter))
1762 break;
1763#endif
1764 return IRQ_HANDLED;
1765}
1766
1767#ifdef CONFIG_IXGB_NAPI
1768/**
1769 * ixgb_clean - NAPI Rx polling callback
1770 * @adapter: board private structure
1771 **/
1772
1773static int
bea3348e 1774ixgb_clean(struct napi_struct *napi, int budget)
1da177e4 1775{
bea3348e
SH		 1776 struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1777 struct net_device *netdev = adapter->netdev;
1da177e4
LT		 1778 int tx_cleaned;
1779 int work_done = 0;
1780
1781 tx_cleaned = ixgb_clean_tx_irq(adapter);
bea3348e 1782 ixgb_clean_rx_irq(adapter, &work_done, budget);
1da177e4
LT		 1783
1784 /* if no Tx and not enough Rx work done, exit the polling mode */
1785 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
bea3348e 1786 netif_rx_complete(netdev, napi);
1da177e4 1787 ixgb_irq_enable(adapter);
1da177e4
LT		 1788 }
1789
bea3348e 1790 return work_done;
1da177e4
LT		 1791}
1792#endif
1793
1794/**
1795 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1796 * @adapter: board private structure
1797 **/
1798
1799static boolean_t
1800ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1801{
1802 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1803 struct net_device *netdev = adapter->netdev;
1804 struct ixgb_tx_desc *tx_desc, *eop_desc;
1805 struct ixgb_buffer *buffer_info;
1806 unsigned int i, eop;
1807 boolean_t cleaned = FALSE;
1808
1809 i = tx_ring->next_to_clean;
1810 eop = tx_ring->buffer_info[i].next_to_watch;
1811 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1812
1813 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1814
1815 for(cleaned = FALSE; !cleaned; ) {
1816 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1817 buffer_info = &tx_ring->buffer_info[i];
1818
1819 if (tx_desc->popts
1820 & (IXGB_TX_DESC_POPTS_TXSM |
1821 IXGB_TX_DESC_POPTS_IXSM))
1822 adapter->hw_csum_tx_good++;
1823
1824 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1825
1826 *(uint32_t *)&(tx_desc->status) = 0;
1827
1828 cleaned = (i == eop);
1829 if(++i == tx_ring->count) i = 0;
1830 }
1831
1832 eop = tx_ring->buffer_info[i].next_to_watch;
1833 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1834 }
1835
1836 tx_ring->next_to_clean = i;
1837
3352a3b2
AK		 1838 if (unlikely(netif_queue_stopped(netdev))) {
1839 spin_lock(&adapter->tx_lock);
1840 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
ab8ced2f 1841 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
3352a3b2
AK		 1842 netif_wake_queue(netdev);
1843 spin_unlock(&adapter->tx_lock);
1da177e4 1844 }
1da177e4
LT		 1845
1846 if(adapter->detect_tx_hung) {
1847 /* detect a transmit hang in hardware, this serializes the
1848 * check with the clearing of time_stamp and movement of i */
1849 adapter->detect_tx_hung = FALSE;
9b8118df
AK		 1850 if (tx_ring->buffer_info[eop].dma &&
1851 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1852 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK		 1853 IXGB_STATUS_TXOFF)) {
1854 /* detected Tx unit hang */
1855 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1856 " TDH <%x>\n"
1857 " TDT <%x>\n"
1858 " next_to_use <%x>\n"
1859 " next_to_clean <%x>\n"
1860 "buffer_info[next_to_clean]\n"
1861 " time_stamp <%lx>\n"
1862 " next_to_watch <%x>\n"
1863 " jiffies <%lx>\n"
1864 " next_to_watch.status <%x>\n",
1865 IXGB_READ_REG(&adapter->hw, TDH),
1866 IXGB_READ_REG(&adapter->hw, TDT),
1867 tx_ring->next_to_use,
1868 tx_ring->next_to_clean,
1869 tx_ring->buffer_info[eop].time_stamp,
1870 eop,
1871 jiffies,
1872 eop_desc->status);
1da177e4 1873 netif_stop_queue(netdev);
9b8118df 1874 }
1da177e4
LT		 1875 }
1876
1877 return cleaned;
1878}
1879
1880/**
1881 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1882 * @adapter: board private structure
1883 * @rx_desc: receive descriptor
1884 * @sk_buff: socket buffer with received data
1885 **/
1886
235949d1 1887static void
1da177e4
LT		 1888ixgb_rx_checksum(struct ixgb_adapter *adapter,
1889 struct ixgb_rx_desc *rx_desc,
1890 struct sk_buff *skb)
1891{
1892 /* Ignore Checksum bit is set OR
1893 * TCP Checksum has not been calculated
1894 */
1895 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1896 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1897 skb->ip_summed = CHECKSUM_NONE;
1898 return;
1899 }
1900
1901 /* At this point we know the hardware did the TCP checksum */
1902 /* now look at the TCP checksum error bit */
1903 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1904 /* let the stack verify checksum errors */
1905 skb->ip_summed = CHECKSUM_NONE;
1906 adapter->hw_csum_rx_error++;
1907 } else {
1908 /* TCP checksum is good */
1909 skb->ip_summed = CHECKSUM_UNNECESSARY;
1910 adapter->hw_csum_rx_good++;
1911 }
1912}
1913
1914/**
1915 * ixgb_clean_rx_irq - Send received data up the network stack,
1916 * @adapter: board private structure
1917 **/
1918
1919static boolean_t
1920#ifdef CONFIG_IXGB_NAPI
1921ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1922#else
1923ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1924#endif
1925{
1926 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1927 struct net_device *netdev = adapter->netdev;
1928 struct pci_dev *pdev = adapter->pdev;
1929 struct ixgb_rx_desc *rx_desc, *next_rxd;
1930 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1931 uint32_t length;
1932 unsigned int i, j;
1933 boolean_t cleaned = FALSE;
1934
1935 i = rx_ring->next_to_clean;
1936 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1937 buffer_info = &rx_ring->buffer_info[i];
1938
1939 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1940 struct sk_buff *skb, *next_skb;
1941 u8 status;
1da177e4
LT		 1942
1943#ifdef CONFIG_IXGB_NAPI
1944 if(*work_done >= work_to_do)
1945 break;
1946
1947 (*work_done)++;
1948#endif
f404de1c 1949 status = rx_desc->status;
1da177e4 1950 skb = buffer_info->skb;
1dfdd7df 1951 buffer_info->skb = NULL;
f404de1c 1952
1da177e4
LT		 1953 prefetch(skb->data);
1954
1955 if(++i == rx_ring->count) i = 0;
1956 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1957 prefetch(next_rxd);
1958
1959 if((j = i + 1) == rx_ring->count) j = 0;
1960 next2_buffer = &rx_ring->buffer_info[j];
1961 prefetch(next2_buffer);
1962
1963 next_buffer = &rx_ring->buffer_info[i];
1964 next_skb = next_buffer->skb;
1965 prefetch(next_skb);
1966
1da177e4
LT		 1967 cleaned = TRUE;
1968
1969 pci_unmap_single(pdev,
1970 buffer_info->dma,
1971 buffer_info->length,
1972 PCI_DMA_FROMDEVICE);
1973
1974 length = le16_to_cpu(rx_desc->length);
1975
f404de1c 1976 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1977
1978 /* All receives must fit into a single buffer */
1979
1980 IXGB_DBG("Receive packet consumed multiple buffers "
1981 "length<%x>\n", length);
1982
1983 dev_kfree_skb_irq(skb);
f404de1c 1984 goto rxdesc_done;
1da177e4
LT		 1985 }
1986
1987 if (unlikely(rx_desc->errors
1988 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1989 | IXGB_RX_DESC_ERRORS_P |
1990 IXGB_RX_DESC_ERRORS_RXE))) {
1991
1992 dev_kfree_skb_irq(skb);
f404de1c 1993 goto rxdesc_done;
1da177e4
LT		 1994 }
1995
6b900bb4
AK		 1996 /* code added for copybreak, this should improve
1997 * performance for small packets with large amounts
1998 * of reassembly being done in the stack */
1999#define IXGB_CB_LENGTH 256
2000 if (length < IXGB_CB_LENGTH) {
2001 struct sk_buff *new_skb =
5791704f 2002 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
6b900bb4
AK		 2003 if (new_skb) {
2004 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 2005 skb_copy_to_linear_data_offset(new_skb,
2006 -NET_IP_ALIGN,
2007 (skb->data -
2008 NET_IP_ALIGN),
2009 (length +
2010 NET_IP_ALIGN));
6b900bb4
AK		 2011 /* save the skb in buffer_info as good */
2012 buffer_info->skb = skb;
2013 skb = new_skb;
2014 }
2015 }
2016 /* end copybreak code */
2017
1da177e4
LT		 2018 /* Good Receive */
2019 skb_put(skb, length);
2020
2021 /* Receive Checksum Offload */
2022 ixgb_rx_checksum(adapter, rx_desc, skb);
2023
2024 skb->protocol = eth_type_trans(skb, netdev);
2025#ifdef CONFIG_IXGB_NAPI
f404de1c 2026 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2027 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2028 le16_to_cpu(rx_desc->special) &
2029 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2030 } else {
2031 netif_receive_skb(skb);
2032 }
2033#else /* CONFIG_IXGB_NAPI */
f404de1c 2034 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2035 vlan_hwaccel_rx(skb, adapter->vlgrp,
2036 le16_to_cpu(rx_desc->special) &
2037 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2038 } else {
2039 netif_rx(skb);
2040 }
2041#endif /* CONFIG_IXGB_NAPI */
2042 netdev->last_rx = jiffies;
2043
f404de1c
MC		 2044rxdesc_done:
2045 /* clean up descriptor, might be written over by hw */
1da177e4 2046 rx_desc->status = 0;
1da177e4 2047
f404de1c 2048 /* use prefetched values */
1da177e4
LT		 2049 rx_desc = next_rxd;
2050 buffer_info = next_buffer;
2051 }
2052
2053 rx_ring->next_to_clean = i;
2054
2055 ixgb_alloc_rx_buffers(adapter);
2056
2057 return cleaned;
2058}
2059
2060/**
2061 * ixgb_alloc_rx_buffers - Replace used receive buffers
2062 * @adapter: address of board private structure
2063 **/
2064
2065static void
2066ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2067{
2068 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2069 struct net_device *netdev = adapter->netdev;
2070 struct pci_dev *pdev = adapter->pdev;
2071 struct ixgb_rx_desc *rx_desc;
2072 struct ixgb_buffer *buffer_info;
2073 struct sk_buff *skb;
2074 unsigned int i;
2075 int num_group_tail_writes;
2076 long cleancount;
2077
2078 i = rx_ring->next_to_use;
2079 buffer_info = &rx_ring->buffer_info[i];
2080 cleancount = IXGB_DESC_UNUSED(rx_ring);
2081
2082 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2083
41639fed
MC		 2084 /* leave three descriptors unused */
2085 while(--cleancount > 2) {
1dfdd7df 2086 /* recycle! its good for you */
69c7a940
AK		 2087 skb = buffer_info->skb;
2088 if (skb) {
1dfdd7df
AK		 2089 skb_trim(skb, 0);
2090 goto map_skb;
2091 }
1da177e4 2092
69c7a940
AK		 2093 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2094 + NET_IP_ALIGN);
1dfdd7df 2095 if (unlikely(!skb)) {
1da177e4 2096 /* Better luck next round */
1dfdd7df 2097 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 2098 break;
2099 }
2100
2101 /* Make buffer alignment 2 beyond a 16 byte boundary
2102 * this will result in a 16 byte aligned IP header after
2103 * the 14 byte MAC header is removed
2104 */
2105 skb_reserve(skb, NET_IP_ALIGN);
2106
1da177e4
LT		 2107 buffer_info->skb = skb;
2108 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK		 2109map_skb:
2110 buffer_info->dma = pci_map_single(pdev,
2111 skb->data,
2112 adapter->rx_buffer_len,
2113 PCI_DMA_FROMDEVICE);
1da177e4 2114
1dfdd7df 2115 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2116 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2117 /* guarantee DD bit not set now before h/w gets descriptor
2118 * this is the rest of the workaround for h/w double
2119 * writeback. */
2120 rx_desc->status = 0;
1da177e4 2121
1da177e4
LT		 2122
2123 if(++i == rx_ring->count) i = 0;
2124 buffer_info = &rx_ring->buffer_info[i];
2125 }
2126
1dfdd7df
AK		 2127 if (likely(rx_ring->next_to_use != i)) {
2128 rx_ring->next_to_use = i;
2129 if (unlikely(i-- == 0))
2130 i = (rx_ring->count - 1);
2131
2132 /* Force memory writes to complete before letting h/w
2133 * know there are new descriptors to fetch. (Only
2134 * applicable for weak-ordered memory model archs, such
2135 * as IA-64). */
2136 wmb();
2137 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2138 }
1da177e4
LT		 2139}
2140
2141/**
2142 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2143 *
2144 * @param netdev network interface device structure
2145 * @param grp indicates to enable or disable tagging/stripping
2146 **/
2147static void
2148ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2149{
8908c6cd 2150 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2151 uint32_t ctrl, rctl;
2152
2153 ixgb_irq_disable(adapter);
2154 adapter->vlgrp = grp;
2155
2156 if(grp) {
2157 /* enable VLAN tag insert/strip */
2158 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2159 ctrl |= IXGB_CTRL0_VME;
2160 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2161
2162 /* enable VLAN receive filtering */
2163
2164 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2165 rctl |= IXGB_RCTL_VFE;
2166 rctl &= ~IXGB_RCTL_CFIEN;
2167 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2168 } else {
2169 /* disable VLAN tag insert/strip */
2170
2171 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2172 ctrl &= ~IXGB_CTRL0_VME;
2173 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2174
2175 /* disable VLAN filtering */
2176
2177 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2178 rctl &= ~IXGB_RCTL_VFE;
2179 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2180 }
2181
2182 ixgb_irq_enable(adapter);
2183}
2184
2185static void
2186ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2187{
8908c6cd 2188 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2189 uint32_t vfta, index;
2190
2191 /* add VID to filter table */
2192
2193 index = (vid >> 5) & 0x7F;
2194 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2195 vfta |= (1 << (vid & 0x1F));
2196 ixgb_write_vfta(&adapter->hw, index, vfta);
2197}
2198
2199static void
2200ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2201{
8908c6cd 2202 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2203 uint32_t vfta, index;
2204
2205 ixgb_irq_disable(adapter);
2206
5c15bdec 2207 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4
LT		 2208
2209 ixgb_irq_enable(adapter);
2210
2211 /* remove VID from filter table*/
2212
2213 index = (vid >> 5) & 0x7F;
2214 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2215 vfta &= ~(1 << (vid & 0x1F));
2216 ixgb_write_vfta(&adapter->hw, index, vfta);
2217}
2218
2219static void
2220ixgb_restore_vlan(struct ixgb_adapter *adapter)
2221{
2222 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2223
2224 if(adapter->vlgrp) {
2225 uint16_t vid;
2226 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 2227 if(!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 2228 continue;
2229 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2230 }
2231 }
2232}
2233
1da177e4
LT		 2234#ifdef CONFIG_NET_POLL_CONTROLLER
2235/*
2236 * Polling 'interrupt' - used by things like netconsole to send skbs
2237 * without having to re-enable interrupts. It's not called while
2238 * the interrupt routine is executing.
2239 */
2240
2241static void ixgb_netpoll(struct net_device *dev)
2242{
f990b426 2243 struct ixgb_adapter *adapter = netdev_priv(dev);
ac79c82e 2244
1da177e4 2245 disable_irq(adapter->pdev->irq);
7d12e780 2246 ixgb_intr(adapter->pdev->irq, dev);
1da177e4
LT		 2247 enable_irq(adapter->pdev->irq);
2248}
2249#endif
2250
01748fbb
LV		 2251/**
2252 * ixgb_io_error_detected() - called when PCI error is detected
2253 * @pdev pointer to pci device with error
2254 * @state pci channel state after error
2255 *
2256 * This callback is called by the PCI subsystem whenever
2257 * a PCI bus error is detected.
2258 */
2259static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2260 enum pci_channel_state state)
2261{
2262 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2263 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2264
2265 if(netif_running(netdev))
2266 ixgb_down(adapter, TRUE);
2267
2268 pci_disable_device(pdev);
2269
2270 /* Request a slot reset. */
2271 return PCI_ERS_RESULT_NEED_RESET;
2272}
2273
2274/**
2275 * ixgb_io_slot_reset - called after the pci bus has been reset.
2276 * @pdev pointer to pci device with error
2277 *
2278 * This callback is called after the PCI buss has been reset.
2279 * Basically, this tries to restart the card from scratch.
2280 * This is a shortened version of the device probe/discovery code,
2281 * it resembles the first-half of the ixgb_probe() routine.
2282 */
2283static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2284{
2285 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2286 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2287
2288 if(pci_enable_device(pdev)) {
2289 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2290 return PCI_ERS_RESULT_DISCONNECT;
2291 }
2292
2293 /* Perform card reset only on one instance of the card */
2294 if (0 != PCI_FUNC (pdev->devfn))
2295 return PCI_ERS_RESULT_RECOVERED;
2296
2297 pci_set_master(pdev);
2298
2299 netif_carrier_off(netdev);
2300 netif_stop_queue(netdev);
2301 ixgb_reset(adapter);
2302
2303 /* Make sure the EEPROM is good */
2304 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2305 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2306 return PCI_ERS_RESULT_DISCONNECT;
2307 }
2308 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2309 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2310
2311 if(!is_valid_ether_addr(netdev->perm_addr)) {
2312 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2313 return PCI_ERS_RESULT_DISCONNECT;
2314 }
2315
2316 return PCI_ERS_RESULT_RECOVERED;
2317}
2318
2319/**
2320 * ixgb_io_resume - called when its OK to resume normal operations
2321 * @pdev pointer to pci device with error
2322 *
2323 * The error recovery driver tells us that its OK to resume
2324 * normal operation. Implementation resembles the second-half
2325 * of the ixgb_probe() routine.
2326 */
2327static void ixgb_io_resume (struct pci_dev *pdev)
2328{
2329 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2330 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2331
2332 pci_set_master(pdev);
2333
2334 if(netif_running(netdev)) {
2335 if(ixgb_up(adapter)) {
2336 printk ("ixgb: can't bring device back up after reset\n");
2337 return;
2338 }
2339 }
2340
2341 netif_device_attach(netdev);
2342 mod_timer(&adapter->watchdog_timer, jiffies);
2343}
2344
1da177e4 2345/* ixgb_main.c */
kernel source for telekom puls (alcatel/mediatek)