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Merge branch 'upstream-fixes' into upstream
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
ab707da7
MC		 32 * 1.0.96 04/19/05
33 * - Make needlessly global code static -- bunk@stusta.de
34 * - ethtool cleanup -- shemminger@osdl.org
35 * - Support for MODULE_VERSION -- linville@tuxdriver.com
36 * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
1da177e4
LT		 37 * 1.0.88 01/05/05
38 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
39 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
40 * 1.0.84 10/26/04
41 * - reset buffer_info->dma in Tx resource cleanup logic
42 * 1.0.83 10/12/04
43 * - sparse cleanup - shemminger@osdl.org
44 * - fix tx resource cleanup logic
45 */
46
47char ixgb_driver_name[] = "ixgb";
e9ab1d14 48static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 49
50#ifndef CONFIG_IXGB_NAPI
51#define DRIVERNAPI
52#else
53#define DRIVERNAPI "-NAPI"
54#endif
ab707da7 55#define DRV_VERSION "1.0.100-k2"DRIVERNAPI
01e5abc2 56char ixgb_driver_version[] = DRV_VERSION;
ab707da7 57static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 58
59/* ixgb_pci_tbl - PCI Device ID Table
60 *
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
66 */
67static struct pci_device_id ixgb_pci_tbl[] = {
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
70 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
71 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
72 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
73 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74
75 /* required last entry */
76 {0,}
77};
78
79MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
80
81/* Local Function Prototypes */
82
83int ixgb_up(struct ixgb_adapter *adapter);
84void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
85void ixgb_reset(struct ixgb_adapter *adapter);
86int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
87int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
88void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
89void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
90void ixgb_update_stats(struct ixgb_adapter *adapter);
91
92static int ixgb_init_module(void);
93static void ixgb_exit_module(void);
94static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
95static void __devexit ixgb_remove(struct pci_dev *pdev);
96static int ixgb_sw_init(struct ixgb_adapter *adapter);
97static int ixgb_open(struct net_device *netdev);
98static int ixgb_close(struct net_device *netdev);
99static void ixgb_configure_tx(struct ixgb_adapter *adapter);
100static void ixgb_configure_rx(struct ixgb_adapter *adapter);
101static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
102static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
103static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
104static void ixgb_set_multi(struct net_device *netdev);
105static void ixgb_watchdog(unsigned long data);
106static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
107static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
108static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
109static int ixgb_set_mac(struct net_device *netdev, void *p);
110static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
111static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 112
1da177e4
LT		 113#ifdef CONFIG_IXGB_NAPI
114static int ixgb_clean(struct net_device *netdev, int *budget);
115static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
116 int *work_done, int work_to_do);
117#else
118static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
119#endif
120static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
121void ixgb_set_ethtool_ops(struct net_device *netdev);
122static void ixgb_tx_timeout(struct net_device *dev);
123static void ixgb_tx_timeout_task(struct net_device *dev);
124static void ixgb_vlan_rx_register(struct net_device *netdev,
125 struct vlan_group *grp);
126static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
127static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
128static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
129
1da177e4
LT		 130#ifdef CONFIG_NET_POLL_CONTROLLER
131/* for netdump / net console */
132static void ixgb_netpoll(struct net_device *dev);
133#endif
134
1da177e4
LT		 135/* Exported from other modules */
136
137extern void ixgb_check_options(struct ixgb_adapter *adapter);
138
139static struct pci_driver ixgb_driver = {
c2eba932 140 .name = ixgb_driver_name,
1da177e4 141 .id_table = ixgb_pci_tbl,
c2eba932
MC		 142 .probe = ixgb_probe,
143 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 144};
145
146MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
147MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
148MODULE_LICENSE("GPL");
01e5abc2 149MODULE_VERSION(DRV_VERSION);
1da177e4
LT		 150
151/* some defines for controlling descriptor fetches in h/w */
1da177e4 152#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC		 153#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
154 * this */
155#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
156 * is pushed this many descriptors
157 * from head */
1da177e4
LT		 158
159/**
160 * ixgb_init_module - Driver Registration Routine
161 *
162 * ixgb_init_module is the first routine called when the driver is
163 * loaded. All it does is register with the PCI subsystem.
164 **/
165
166static int __init
167ixgb_init_module(void)
168{
1da177e4
LT		 169 printk(KERN_INFO "%s - version %s\n",
170 ixgb_driver_string, ixgb_driver_version);
171
172 printk(KERN_INFO "%s\n", ixgb_copyright);
173
c2eba932 174 return pci_module_init(&ixgb_driver);
1da177e4
LT		 175}
176
177module_init(ixgb_init_module);
178
179/**
180 * ixgb_exit_module - Driver Exit Cleanup Routine
181 *
182 * ixgb_exit_module is called just before the driver is removed
183 * from memory.
184 **/
185
186static void __exit
187ixgb_exit_module(void)
188{
1da177e4
LT		 189 pci_unregister_driver(&ixgb_driver);
190}
191
192module_exit(ixgb_exit_module);
193
194/**
195 * ixgb_irq_disable - Mask off interrupt generation on the NIC
196 * @adapter: board private structure
197 **/
198
199static inline void
200ixgb_irq_disable(struct ixgb_adapter *adapter)
201{
202 atomic_inc(&adapter->irq_sem);
203 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
204 IXGB_WRITE_FLUSH(&adapter->hw);
205 synchronize_irq(adapter->pdev->irq);
206}
207
208/**
209 * ixgb_irq_enable - Enable default interrupt generation settings
210 * @adapter: board private structure
211 **/
212
213static inline void
214ixgb_irq_enable(struct ixgb_adapter *adapter)
215{
216 if(atomic_dec_and_test(&adapter->irq_sem)) {
217 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 218 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
219 IXGB_INT_LSC);
1da177e4
LT		 220 IXGB_WRITE_FLUSH(&adapter->hw);
221 }
222}
223
224int
225ixgb_up(struct ixgb_adapter *adapter)
226{
227 struct net_device *netdev = adapter->netdev;
228 int err;
229 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
230 struct ixgb_hw *hw = &adapter->hw;
231
232 /* hardware has been reset, we need to reload some things */
233
234 ixgb_set_multi(netdev);
235
236 ixgb_restore_vlan(adapter);
237
238 ixgb_configure_tx(adapter);
239 ixgb_setup_rctl(adapter);
240 ixgb_configure_rx(adapter);
241 ixgb_alloc_rx_buffers(adapter);
242
243#ifdef CONFIG_PCI_MSI
244 {
245 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
246 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
247 adapter->have_msi = TRUE;
248
249 if (!pcix)
250 adapter->have_msi = FALSE;
251 else if((err = pci_enable_msi(adapter->pdev))) {
252 printk (KERN_ERR
253 "Unable to allocate MSI interrupt Error: %d\n", err);
254 adapter->have_msi = FALSE;
255 /* proceed to try to request regular interrupt */
256 }
257 }
258
259#endif
260 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
261 SA_SHIRQ | SA_SAMPLE_RANDOM,
262 netdev->name, netdev)))
263 return err;
264
265 /* disable interrupts and get the hardware into a known state */
266 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
267
268 if((hw->max_frame_size != max_frame) ||
269 (hw->max_frame_size !=
270 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
271
272 hw->max_frame_size = max_frame;
273
274 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
275
276 if(hw->max_frame_size >
277 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
278 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
279
280 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
281 ctrl0 |= IXGB_CTRL0_JFE;
282 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
283 }
284 }
285 }
286
287 mod_timer(&adapter->watchdog_timer, jiffies);
288 ixgb_irq_enable(adapter);
289
290#ifdef CONFIG_IXGB_NAPI
291 netif_poll_enable(netdev);
292#endif
293 return 0;
294}
295
296void
297ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
298{
299 struct net_device *netdev = adapter->netdev;
300
301 ixgb_irq_disable(adapter);
302 free_irq(adapter->pdev->irq, netdev);
303#ifdef CONFIG_PCI_MSI
304 if(adapter->have_msi == TRUE)
305 pci_disable_msi(adapter->pdev);
306
307#endif
308 if(kill_watchdog)
309 del_timer_sync(&adapter->watchdog_timer);
310#ifdef CONFIG_IXGB_NAPI
311 netif_poll_disable(netdev);
312#endif
313 adapter->link_speed = 0;
314 adapter->link_duplex = 0;
315 netif_carrier_off(netdev);
316 netif_stop_queue(netdev);
317
318 ixgb_reset(adapter);
319 ixgb_clean_tx_ring(adapter);
320 ixgb_clean_rx_ring(adapter);
321}
322
323void
324ixgb_reset(struct ixgb_adapter *adapter)
325{
326
327 ixgb_adapter_stop(&adapter->hw);
328 if(!ixgb_init_hw(&adapter->hw))
329 IXGB_DBG("ixgb_init_hw failed.\n");
330}
331
332/**
333 * ixgb_probe - Device Initialization Routine
334 * @pdev: PCI device information struct
335 * @ent: entry in ixgb_pci_tbl
336 *
337 * Returns 0 on success, negative on failure
338 *
339 * ixgb_probe initializes an adapter identified by a pci_dev structure.
340 * The OS initialization, configuring of the adapter private structure,
341 * and a hardware reset occur.
342 **/
343
344static int __devinit
345ixgb_probe(struct pci_dev *pdev,
346 const struct pci_device_id *ent)
347{
348 struct net_device *netdev = NULL;
349 struct ixgb_adapter *adapter;
350 static int cards_found = 0;
351 unsigned long mmio_start;
352 int mmio_len;
353 int pci_using_dac;
354 int i;
355 int err;
356
357 if((err = pci_enable_device(pdev)))
358 return err;
359
c91e468a
AS		 360 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
361 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 362 pci_using_dac = 1;
363 } else {
c91e468a
AS		 364 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
365 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 366 IXGB_ERR("No usable DMA configuration, aborting\n");
c91e468a 367 goto err_dma_mask;
1da177e4
LT		 368 }
369 pci_using_dac = 0;
370 }
371
372 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 373 goto err_request_regions;
1da177e4
LT		 374
375 pci_set_master(pdev);
376
377 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
378 if(!netdev) {
379 err = -ENOMEM;
380 goto err_alloc_etherdev;
381 }
382
383 SET_MODULE_OWNER(netdev);
384 SET_NETDEV_DEV(netdev, &pdev->dev);
385
386 pci_set_drvdata(pdev, netdev);
8908c6cd 387 adapter = netdev_priv(netdev);
1da177e4
LT		 388 adapter->netdev = netdev;
389 adapter->pdev = pdev;
390 adapter->hw.back = adapter;
391
392 mmio_start = pci_resource_start(pdev, BAR_0);
393 mmio_len = pci_resource_len(pdev, BAR_0);
394
395 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
396 if(!adapter->hw.hw_addr) {
397 err = -EIO;
398 goto err_ioremap;
399 }
400
401 for(i = BAR_1; i <= BAR_5; i++) {
402 if(pci_resource_len(pdev, i) == 0)
403 continue;
404 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
405 adapter->hw.io_base = pci_resource_start(pdev, i);
406 break;
407 }
408 }
409
410 netdev->open = &ixgb_open;
411 netdev->stop = &ixgb_close;
412 netdev->hard_start_xmit = &ixgb_xmit_frame;
413 netdev->get_stats = &ixgb_get_stats;
414 netdev->set_multicast_list = &ixgb_set_multi;
415 netdev->set_mac_address = &ixgb_set_mac;
416 netdev->change_mtu = &ixgb_change_mtu;
417 ixgb_set_ethtool_ops(netdev);
418 netdev->tx_timeout = &ixgb_tx_timeout;
419 netdev->watchdog_timeo = HZ;
420#ifdef CONFIG_IXGB_NAPI
421 netdev->poll = &ixgb_clean;
422 netdev->weight = 64;
423#endif
424 netdev->vlan_rx_register = ixgb_vlan_rx_register;
425 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
426 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
427#ifdef CONFIG_NET_POLL_CONTROLLER
428 netdev->poll_controller = ixgb_netpoll;
429#endif
430
431 netdev->mem_start = mmio_start;
432 netdev->mem_end = mmio_start + mmio_len;
433 netdev->base_addr = adapter->hw.io_base;
434
435 adapter->bd_number = cards_found;
436 adapter->link_speed = 0;
437 adapter->link_duplex = 0;
438
439 /* setup the private structure */
440
441 if((err = ixgb_sw_init(adapter)))
442 goto err_sw_init;
443
444 netdev->features = NETIF_F_SG |
445 NETIF_F_HW_CSUM |
446 NETIF_F_HW_VLAN_TX |
447 NETIF_F_HW_VLAN_RX |
448 NETIF_F_HW_VLAN_FILTER;
449#ifdef NETIF_F_TSO
450 netdev->features |= NETIF_F_TSO;
451#endif
452
453 if(pci_using_dac)
454 netdev->features |= NETIF_F_HIGHDMA;
455
456 /* make sure the EEPROM is good */
457
458 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
459 printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
460 err = -EIO;
461 goto err_eeprom;
462 }
463
464 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 465 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 466
df859c51 467 if(!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 468 err = -EIO;
469 goto err_eeprom;
470 }
471
472 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
473
474 init_timer(&adapter->watchdog_timer);
475 adapter->watchdog_timer.function = &ixgb_watchdog;
476 adapter->watchdog_timer.data = (unsigned long)adapter;
477
478 INIT_WORK(&adapter->tx_timeout_task,
479 (void (*)(void *))ixgb_tx_timeout_task, netdev);
480
481 if((err = register_netdev(netdev)))
482 goto err_register;
483
484 /* we're going to reset, so assume we have no link for now */
485
486 netif_carrier_off(netdev);
487 netif_stop_queue(netdev);
488
489 printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
490 netdev->name);
491 ixgb_check_options(adapter);
492 /* reset the hardware with the new settings */
493
494 ixgb_reset(adapter);
495
496 cards_found++;
497 return 0;
498
499err_register:
500err_sw_init:
501err_eeprom:
502 iounmap(adapter->hw.hw_addr);
503err_ioremap:
504 free_netdev(netdev);
505err_alloc_etherdev:
506 pci_release_regions(pdev);
c91e468a
AS		 507err_request_regions:
508err_dma_mask:
509 pci_disable_device(pdev);
1da177e4
LT		 510 return err;
511}
512
513/**
514 * ixgb_remove - Device Removal Routine
515 * @pdev: PCI device information struct
516 *
517 * ixgb_remove is called by the PCI subsystem to alert the driver
518 * that it should release a PCI device. The could be caused by a
519 * Hot-Plug event, or because the driver is going to be removed from
520 * memory.
521 **/
522
523static void __devexit
524ixgb_remove(struct pci_dev *pdev)
525{
526 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 527 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 528
529 unregister_netdev(netdev);
530
531 iounmap(adapter->hw.hw_addr);
532 pci_release_regions(pdev);
533
534 free_netdev(netdev);
535}
536
537/**
538 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
539 * @adapter: board private structure to initialize
540 *
541 * ixgb_sw_init initializes the Adapter private data structure.
542 * Fields are initialized based on PCI device information and
543 * OS network device settings (MTU size).
544 **/
545
546static int __devinit
547ixgb_sw_init(struct ixgb_adapter *adapter)
548{
549 struct ixgb_hw *hw = &adapter->hw;
550 struct net_device *netdev = adapter->netdev;
551 struct pci_dev *pdev = adapter->pdev;
552
553 /* PCI config space info */
554
555 hw->vendor_id = pdev->vendor;
556 hw->device_id = pdev->device;
557 hw->subsystem_vendor_id = pdev->subsystem_vendor;
558 hw->subsystem_id = pdev->subsystem_device;
559
560 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
561
562 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
563
564 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
565 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
566 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
567 hw->mac_type = ixgb_82597;
568 else {
569 /* should never have loaded on this device */
570 printk(KERN_ERR "ixgb: unsupported device id\n");
571 }
572
573 /* enable flow control to be programmed */
574 hw->fc.send_xon = 1;
575
576 atomic_set(&adapter->irq_sem, 1);
577 spin_lock_init(&adapter->tx_lock);
578
579 return 0;
580}
581
582/**
583 * ixgb_open - Called when a network interface is made active
584 * @netdev: network interface device structure
585 *
586 * Returns 0 on success, negative value on failure
587 *
588 * The open entry point is called when a network interface is made
589 * active by the system (IFF_UP). At this point all resources needed
590 * for transmit and receive operations are allocated, the interrupt
591 * handler is registered with the OS, the watchdog timer is started,
592 * and the stack is notified that the interface is ready.
593 **/
594
595static int
596ixgb_open(struct net_device *netdev)
597{
8908c6cd 598 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 599 int err;
600
601 /* allocate transmit descriptors */
602
603 if((err = ixgb_setup_tx_resources(adapter)))
604 goto err_setup_tx;
605
606 /* allocate receive descriptors */
607
608 if((err = ixgb_setup_rx_resources(adapter)))
609 goto err_setup_rx;
610
611 if((err = ixgb_up(adapter)))
612 goto err_up;
613
614 return 0;
615
616err_up:
617 ixgb_free_rx_resources(adapter);
618err_setup_rx:
619 ixgb_free_tx_resources(adapter);
620err_setup_tx:
621 ixgb_reset(adapter);
622
623 return err;
624}
625
626/**
627 * ixgb_close - Disables a network interface
628 * @netdev: network interface device structure
629 *
630 * Returns 0, this is not allowed to fail
631 *
632 * The close entry point is called when an interface is de-activated
633 * by the OS. The hardware is still under the drivers control, but
634 * needs to be disabled. A global MAC reset is issued to stop the
635 * hardware, and all transmit and receive resources are freed.
636 **/
637
638static int
639ixgb_close(struct net_device *netdev)
640{
8908c6cd 641 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 642
643 ixgb_down(adapter, TRUE);
644
645 ixgb_free_tx_resources(adapter);
646 ixgb_free_rx_resources(adapter);
647
648 return 0;
649}
650
651/**
652 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
653 * @adapter: board private structure
654 *
655 * Return 0 on success, negative on failure
656 **/
657
658int
659ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
660{
661 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
662 struct pci_dev *pdev = adapter->pdev;
663 int size;
664
665 size = sizeof(struct ixgb_buffer) * txdr->count;
666 txdr->buffer_info = vmalloc(size);
667 if(!txdr->buffer_info) {
668 return -ENOMEM;
669 }
670 memset(txdr->buffer_info, 0, size);
671
672 /* round up to nearest 4K */
673
674 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
675 IXGB_ROUNDUP(txdr->size, 4096);
676
677 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
678 if(!txdr->desc) {
679 vfree(txdr->buffer_info);
680 return -ENOMEM;
681 }
682 memset(txdr->desc, 0, txdr->size);
683
684 txdr->next_to_use = 0;
685 txdr->next_to_clean = 0;
686
687 return 0;
688}
689
690/**
691 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
692 * @adapter: board private structure
693 *
694 * Configure the Tx unit of the MAC after a reset.
695 **/
696
697static void
698ixgb_configure_tx(struct ixgb_adapter *adapter)
699{
700 uint64_t tdba = adapter->tx_ring.dma;
701 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
702 uint32_t tctl;
703 struct ixgb_hw *hw = &adapter->hw;
704
705 /* Setup the Base and Length of the Tx Descriptor Ring
706 * tx_ring.dma can be either a 32 or 64 bit value
707 */
708
709 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
710 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
711
712 IXGB_WRITE_REG(hw, TDLEN, tdlen);
713
714 /* Setup the HW Tx Head and Tail descriptor pointers */
715
716 IXGB_WRITE_REG(hw, TDH, 0);
717 IXGB_WRITE_REG(hw, TDT, 0);
718
719 /* don't set up txdctl, it induces performance problems if configured
720 * incorrectly */
721 /* Set the Tx Interrupt Delay register */
722
723 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
724
725 /* Program the Transmit Control Register */
726
727 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
728 IXGB_WRITE_REG(hw, TCTL, tctl);
729
730 /* Setup Transmit Descriptor Settings for this adapter */
731 adapter->tx_cmd_type =
732 IXGB_TX_DESC_TYPE
733 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
734}
735
736/**
737 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
738 * @adapter: board private structure
739 *
740 * Returns 0 on success, negative on failure
741 **/
742
743int
744ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
745{
746 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
747 struct pci_dev *pdev = adapter->pdev;
748 int size;
749
750 size = sizeof(struct ixgb_buffer) * rxdr->count;
751 rxdr->buffer_info = vmalloc(size);
752 if(!rxdr->buffer_info) {
753 return -ENOMEM;
754 }
755 memset(rxdr->buffer_info, 0, size);
756
757 /* Round up to nearest 4K */
758
759 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
760 IXGB_ROUNDUP(rxdr->size, 4096);
761
762 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
763
764 if(!rxdr->desc) {
765 vfree(rxdr->buffer_info);
766 return -ENOMEM;
767 }
768 memset(rxdr->desc, 0, rxdr->size);
769
770 rxdr->next_to_clean = 0;
771 rxdr->next_to_use = 0;
772
773 return 0;
774}
775
776/**
777 * ixgb_setup_rctl - configure the receive control register
778 * @adapter: Board private structure
779 **/
780
781static void
782ixgb_setup_rctl(struct ixgb_adapter *adapter)
783{
784 uint32_t rctl;
785
786 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
787
788 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
789
790 rctl |=
791 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
792 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
793 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
794
795 rctl |= IXGB_RCTL_SECRC;
796
797 switch (adapter->rx_buffer_len) {
798 case IXGB_RXBUFFER_2048:
799 default:
800 rctl |= IXGB_RCTL_BSIZE_2048;
801 break;
802 case IXGB_RXBUFFER_4096:
803 rctl |= IXGB_RCTL_BSIZE_4096;
804 break;
805 case IXGB_RXBUFFER_8192:
806 rctl |= IXGB_RCTL_BSIZE_8192;
807 break;
808 case IXGB_RXBUFFER_16384:
809 rctl |= IXGB_RCTL_BSIZE_16384;
810 break;
811 }
812
813 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
814}
815
816/**
817 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
818 * @adapter: board private structure
819 *
820 * Configure the Rx unit of the MAC after a reset.
821 **/
822
823static void
824ixgb_configure_rx(struct ixgb_adapter *adapter)
825{
826 uint64_t rdba = adapter->rx_ring.dma;
827 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
828 struct ixgb_hw *hw = &adapter->hw;
829 uint32_t rctl;
830 uint32_t rxcsum;
831 uint32_t rxdctl;
832
833 /* make sure receives are disabled while setting up the descriptors */
834
835 rctl = IXGB_READ_REG(hw, RCTL);
836 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
837
838 /* set the Receive Delay Timer Register */
839
840 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
841
842 /* Setup the Base and Length of the Rx Descriptor Ring */
843
844 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
845 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
846
847 IXGB_WRITE_REG(hw, RDLEN, rdlen);
848
849 /* Setup the HW Rx Head and Tail Descriptor Pointers */
850 IXGB_WRITE_REG(hw, RDH, 0);
851 IXGB_WRITE_REG(hw, RDT, 0);
852
853 /* set up pre-fetching of receive buffers so we get some before we
854 * run out (default hardware behavior is to run out before fetching
855 * more). This sets up to fetch if HTHRESH rx descriptors are avail
856 * and the descriptors in hw cache are below PTHRESH. This avoids
857 * the hardware behavior of fetching <=512 descriptors in a single
858 * burst that pre-empts all other activity, usually causing fifo
859 * overflows. */
860 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
861 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
862 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
863 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
864 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
865
866 /* Enable Receive Checksum Offload for TCP and UDP */
867 if(adapter->rx_csum == TRUE) {
868 rxcsum = IXGB_READ_REG(hw, RXCSUM);
869 rxcsum |= IXGB_RXCSUM_TUOFL;
870 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
871 }
872
873 /* Enable Receives */
874
875 IXGB_WRITE_REG(hw, RCTL, rctl);
876}
877
878/**
879 * ixgb_free_tx_resources - Free Tx Resources
880 * @adapter: board private structure
881 *
882 * Free all transmit software resources
883 **/
884
885void
886ixgb_free_tx_resources(struct ixgb_adapter *adapter)
887{
888 struct pci_dev *pdev = adapter->pdev;
889
890 ixgb_clean_tx_ring(adapter);
891
892 vfree(adapter->tx_ring.buffer_info);
893 adapter->tx_ring.buffer_info = NULL;
894
895 pci_free_consistent(pdev, adapter->tx_ring.size,
896 adapter->tx_ring.desc, adapter->tx_ring.dma);
897
898 adapter->tx_ring.desc = NULL;
899}
900
901static inline void
902ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
903 struct ixgb_buffer *buffer_info)
904{
905 struct pci_dev *pdev = adapter->pdev;
906 if(buffer_info->dma) {
907 pci_unmap_page(pdev,
908 buffer_info->dma,
909 buffer_info->length,
910 PCI_DMA_TODEVICE);
911 buffer_info->dma = 0;
912 }
913 if(buffer_info->skb) {
914 dev_kfree_skb_any(buffer_info->skb);
915 buffer_info->skb = NULL;
916 }
917}
918
919/**
920 * ixgb_clean_tx_ring - Free Tx Buffers
921 * @adapter: board private structure
922 **/
923
924static void
925ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
926{
927 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
928 struct ixgb_buffer *buffer_info;
929 unsigned long size;
930 unsigned int i;
931
932 /* Free all the Tx ring sk_buffs */
933
934 for(i = 0; i < tx_ring->count; i++) {
935 buffer_info = &tx_ring->buffer_info[i];
936 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
937 }
938
939 size = sizeof(struct ixgb_buffer) * tx_ring->count;
940 memset(tx_ring->buffer_info, 0, size);
941
942 /* Zero out the descriptor ring */
943
944 memset(tx_ring->desc, 0, tx_ring->size);
945
946 tx_ring->next_to_use = 0;
947 tx_ring->next_to_clean = 0;
948
949 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
950 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
951}
952
953/**
954 * ixgb_free_rx_resources - Free Rx Resources
955 * @adapter: board private structure
956 *
957 * Free all receive software resources
958 **/
959
960void
961ixgb_free_rx_resources(struct ixgb_adapter *adapter)
962{
963 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
964 struct pci_dev *pdev = adapter->pdev;
965
966 ixgb_clean_rx_ring(adapter);
967
968 vfree(rx_ring->buffer_info);
969 rx_ring->buffer_info = NULL;
970
971 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
972
973 rx_ring->desc = NULL;
974}
975
976/**
977 * ixgb_clean_rx_ring - Free Rx Buffers
978 * @adapter: board private structure
979 **/
980
981static void
982ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
983{
984 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
985 struct ixgb_buffer *buffer_info;
986 struct pci_dev *pdev = adapter->pdev;
987 unsigned long size;
988 unsigned int i;
989
990 /* Free all the Rx ring sk_buffs */
991
992 for(i = 0; i < rx_ring->count; i++) {
993 buffer_info = &rx_ring->buffer_info[i];
994 if(buffer_info->skb) {
995
996 pci_unmap_single(pdev,
997 buffer_info->dma,
998 buffer_info->length,
999 PCI_DMA_FROMDEVICE);
1000
1001 dev_kfree_skb(buffer_info->skb);
1002
1003 buffer_info->skb = NULL;
1004 }
1005 }
1006
1007 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1008 memset(rx_ring->buffer_info, 0, size);
1009
1010 /* Zero out the descriptor ring */
1011
1012 memset(rx_ring->desc, 0, rx_ring->size);
1013
1014 rx_ring->next_to_clean = 0;
1015 rx_ring->next_to_use = 0;
1016
1017 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1018 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1019}
1020
1021/**
1022 * ixgb_set_mac - Change the Ethernet Address of the NIC
1023 * @netdev: network interface device structure
1024 * @p: pointer to an address structure
1025 *
1026 * Returns 0 on success, negative on failure
1027 **/
1028
1029static int
1030ixgb_set_mac(struct net_device *netdev, void *p)
1031{
8908c6cd 1032 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1033 struct sockaddr *addr = p;
1034
1035 if(!is_valid_ether_addr(addr->sa_data))
1036 return -EADDRNOTAVAIL;
1037
1038 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1039
1040 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1041
1042 return 0;
1043}
1044
1045/**
1046 * ixgb_set_multi - Multicast and Promiscuous mode set
1047 * @netdev: network interface device structure
1048 *
1049 * The set_multi entry point is called whenever the multicast address
1050 * list or the network interface flags are updated. This routine is
1051 * responsible for configuring the hardware for proper multicast,
1052 * promiscuous mode, and all-multi behavior.
1053 **/
1054
1055static void
1056ixgb_set_multi(struct net_device *netdev)
1057{
8908c6cd 1058 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1059 struct ixgb_hw *hw = &adapter->hw;
1060 struct dev_mc_list *mc_ptr;
1061 uint32_t rctl;
1062 int i;
1063
1064 /* Check for Promiscuous and All Multicast modes */
1065
1066 rctl = IXGB_READ_REG(hw, RCTL);
1067
1068 if(netdev->flags & IFF_PROMISC) {
1069 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1070 } else if(netdev->flags & IFF_ALLMULTI) {
1071 rctl |= IXGB_RCTL_MPE;
1072 rctl &= ~IXGB_RCTL_UPE;
1073 } else {
1074 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1075 }
1076
1077 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1078 rctl |= IXGB_RCTL_MPE;
1079 IXGB_WRITE_REG(hw, RCTL, rctl);
1080 } else {
1081 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1082
1083 IXGB_WRITE_REG(hw, RCTL, rctl);
1084
1085 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1086 i++, mc_ptr = mc_ptr->next)
1087 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1088 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1089
1090 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1091 }
1092}
1093
1094/**
1095 * ixgb_watchdog - Timer Call-back
1096 * @data: pointer to netdev cast into an unsigned long
1097 **/
1098
1099static void
1100ixgb_watchdog(unsigned long data)
1101{
1102 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1103 struct net_device *netdev = adapter->netdev;
1104 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1105
1106 ixgb_check_for_link(&adapter->hw);
1107
1108 if (ixgb_check_for_bad_link(&adapter->hw)) {
1109 /* force the reset path */
1110 netif_stop_queue(netdev);
1111 }
1112
1113 if(adapter->hw.link_up) {
1114 if(!netif_carrier_ok(netdev)) {
1115 printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
1116 netdev->name, 10000, "Full Duplex");
1117 adapter->link_speed = 10000;
1118 adapter->link_duplex = FULL_DUPLEX;
1119 netif_carrier_on(netdev);
1120 netif_wake_queue(netdev);
1121 }
1122 } else {
1123 if(netif_carrier_ok(netdev)) {
1124 adapter->link_speed = 0;
1125 adapter->link_duplex = 0;
1126 printk(KERN_INFO
1127 "ixgb: %s NIC Link is Down\n",
1128 netdev->name);
1129 netif_carrier_off(netdev);
1130 netif_stop_queue(netdev);
1131
1132 }
1133 }
1134
1135 ixgb_update_stats(adapter);
1136
1137 if(!netif_carrier_ok(netdev)) {
1138 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1139 /* We've lost link, so the controller stops DMA,
1140 * but we've got queued Tx work that's never going
1141 * to get done, so reset controller to flush Tx.
1142 * (Do the reset outside of interrupt context). */
1143 schedule_work(&adapter->tx_timeout_task);
1144 }
1145 }
1146
1147 /* Force detection of hung controller every watchdog period */
1148 adapter->detect_tx_hung = TRUE;
1149
1150 /* generate an interrupt to force clean up of any stragglers */
1151 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1152
1153 /* Reset the timer */
1154 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1155}
1156
1157#define IXGB_TX_FLAGS_CSUM 0x00000001
1158#define IXGB_TX_FLAGS_VLAN 0x00000002
1159#define IXGB_TX_FLAGS_TSO 0x00000004
1160
1161static inline int
1162ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1163{
1164#ifdef NETIF_F_TSO
1165 struct ixgb_context_desc *context_desc;
1166 unsigned int i;
1167 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1168 uint16_t ipcse, tucse, mss;
1169 int err;
1170
1171 if(likely(skb_shinfo(skb)->tso_size)) {
1172 if (skb_header_cloned(skb)) {
1173 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1174 if (err)
1175 return err;
1176 }
1177
1178 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1179 mss = skb_shinfo(skb)->tso_size;
1180 skb->nh.iph->tot_len = 0;
1181 skb->nh.iph->check = 0;
1182 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1183 skb->nh.iph->daddr,
1184 0, IPPROTO_TCP, 0);
1185 ipcss = skb->nh.raw - skb->data;
1186 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1187 ipcse = skb->h.raw - skb->data - 1;
1188 tucss = skb->h.raw - skb->data;
1189 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1190 tucse = 0;
1191
1192 i = adapter->tx_ring.next_to_use;
1193 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1194
1195 context_desc->ipcss = ipcss;
1196 context_desc->ipcso = ipcso;
1197 context_desc->ipcse = cpu_to_le16(ipcse);
1198 context_desc->tucss = tucss;
1199 context_desc->tucso = tucso;
1200 context_desc->tucse = cpu_to_le16(tucse);
1201 context_desc->mss = cpu_to_le16(mss);
1202 context_desc->hdr_len = hdr_len;
1203 context_desc->status = 0;
1204 context_desc->cmd_type_len = cpu_to_le32(
1205 IXGB_CONTEXT_DESC_TYPE
1206 | IXGB_CONTEXT_DESC_CMD_TSE
1207 | IXGB_CONTEXT_DESC_CMD_IP
1208 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1209 | IXGB_CONTEXT_DESC_CMD_IDE
1210 | (skb->len - (hdr_len)));
1211
06c2f9ec 1212
1da177e4
LT		 1213 if(++i == adapter->tx_ring.count) i = 0;
1214 adapter->tx_ring.next_to_use = i;
1215
1216 return 1;
1217 }
1218#endif
1219
1220 return 0;
1221}
1222
1223static inline boolean_t
1224ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1225{
1226 struct ixgb_context_desc *context_desc;
1227 unsigned int i;
1228 uint8_t css, cso;
1229
1230 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1231 css = skb->h.raw - skb->data;
1232 cso = (skb->h.raw + skb->csum) - skb->data;
1233
1234 i = adapter->tx_ring.next_to_use;
1235 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1236
1237 context_desc->tucss = css;
1238 context_desc->tucso = cso;
1239 context_desc->tucse = 0;
1240 /* zero out any previously existing data in one instruction */
1241 *(uint32_t *)&(context_desc->ipcss) = 0;
1242 context_desc->status = 0;
1243 context_desc->hdr_len = 0;
1244 context_desc->mss = 0;
1245 context_desc->cmd_type_len =
1246 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1247 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1248
1249 if(++i == adapter->tx_ring.count) i = 0;
1250 adapter->tx_ring.next_to_use = i;
1251
1252 return TRUE;
1253 }
1254
1255 return FALSE;
1256}
1257
1258#define IXGB_MAX_TXD_PWR 14
1259#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1260
1261static inline int
1262ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1263 unsigned int first)
1264{
1265 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1266 struct ixgb_buffer *buffer_info;
1267 int len = skb->len;
1268 unsigned int offset = 0, size, count = 0, i;
1269
1270 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1271 unsigned int f;
ac79c82e 1272
1da177e4
LT		 1273 len -= skb->data_len;
1274
1275 i = tx_ring->next_to_use;
1276
1277 while(len) {
1278 buffer_info = &tx_ring->buffer_info[i];
1279 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1280 buffer_info->length = size;
1281 buffer_info->dma =
1282 pci_map_single(adapter->pdev,
1283 skb->data + offset,
1284 size,
1285 PCI_DMA_TODEVICE);
1286 buffer_info->time_stamp = jiffies;
1287
1288 len -= size;
1289 offset += size;
1290 count++;
1291 if(++i == tx_ring->count) i = 0;
1292 }
1293
1294 for(f = 0; f < nr_frags; f++) {
1295 struct skb_frag_struct *frag;
1296
1297 frag = &skb_shinfo(skb)->frags[f];
1298 len = frag->size;
1299 offset = 0;
1300
1301 while(len) {
1302 buffer_info = &tx_ring->buffer_info[i];
1303 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1304 buffer_info->length = size;
1305 buffer_info->dma =
1306 pci_map_page(adapter->pdev,
1307 frag->page,
1308 frag->page_offset + offset,
1309 size,
1310 PCI_DMA_TODEVICE);
1311 buffer_info->time_stamp = jiffies;
1312
1313 len -= size;
1314 offset += size;
1315 count++;
1316 if(++i == tx_ring->count) i = 0;
1317 }
1318 }
1319 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1320 tx_ring->buffer_info[i].skb = skb;
1321 tx_ring->buffer_info[first].next_to_watch = i;
1322
1323 return count;
1324}
1325
1326static inline void
1327ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1328{
1329 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1330 struct ixgb_tx_desc *tx_desc = NULL;
1331 struct ixgb_buffer *buffer_info;
1332 uint32_t cmd_type_len = adapter->tx_cmd_type;
1333 uint8_t status = 0;
1334 uint8_t popts = 0;
1335 unsigned int i;
1336
1337 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1338 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1339 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1340 }
1341
1342 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1343 popts |= IXGB_TX_DESC_POPTS_TXSM;
1344
1345 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1346 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1347 }
1348
1349 i = tx_ring->next_to_use;
1350
1351 while(count--) {
1352 buffer_info = &tx_ring->buffer_info[i];
1353 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1354 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1355 tx_desc->cmd_type_len =
1356 cpu_to_le32(cmd_type_len | buffer_info->length);
1357 tx_desc->status = status;
1358 tx_desc->popts = popts;
1359 tx_desc->vlan = cpu_to_le16(vlan_id);
1360
1361 if(++i == tx_ring->count) i = 0;
1362 }
1363
1364 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1365 | IXGB_TX_DESC_CMD_RS );
1366
1367 /* Force memory writes to complete before letting h/w
1368 * know there are new descriptors to fetch. (Only
1369 * applicable for weak-ordered memory model archs,
1370 * such as IA-64). */
1371 wmb();
1372
1373 tx_ring->next_to_use = i;
1374 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1375}
1376
1377/* Tx Descriptors needed, worst case */
1378#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1379 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1380#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
1381 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
1382
1383static int
1384ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1385{
8908c6cd 1386 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1387 unsigned int first;
1388 unsigned int tx_flags = 0;
1389 unsigned long flags;
1390 int vlan_id = 0;
1391 int tso;
1392
1393 if(skb->len <= 0) {
1394 dev_kfree_skb_any(skb);
1395 return 0;
1396 }
1397
1398 spin_lock_irqsave(&adapter->tx_lock, flags);
1399 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1400 netif_stop_queue(netdev);
1401 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1402 return 1;
1403 }
1404 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1405
1406 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1407 tx_flags |= IXGB_TX_FLAGS_VLAN;
1408 vlan_id = vlan_tx_tag_get(skb);
1409 }
1410
1411 first = adapter->tx_ring.next_to_use;
1412
1413 tso = ixgb_tso(adapter, skb);
1414 if (tso < 0) {
1415 dev_kfree_skb_any(skb);
1416 return NETDEV_TX_OK;
1417 }
1418
1419 if (tso)
1420 tx_flags |= IXGB_TX_FLAGS_TSO;
1421 else if(ixgb_tx_csum(adapter, skb))
1422 tx_flags |= IXGB_TX_FLAGS_CSUM;
1423
1424 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1425 tx_flags);
1426
1427 netdev->trans_start = jiffies;
1428
1429 return 0;
1430}
1431
1432/**
1433 * ixgb_tx_timeout - Respond to a Tx Hang
1434 * @netdev: network interface device structure
1435 **/
1436
1437static void
1438ixgb_tx_timeout(struct net_device *netdev)
1439{
8908c6cd 1440 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1441
1442 /* Do the reset outside of interrupt context */
1443 schedule_work(&adapter->tx_timeout_task);
1444}
1445
1446static void
1447ixgb_tx_timeout_task(struct net_device *netdev)
1448{
8908c6cd 1449 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1450
1451 ixgb_down(adapter, TRUE);
1452 ixgb_up(adapter);
1453}
1454
1455/**
1456 * ixgb_get_stats - Get System Network Statistics
1457 * @netdev: network interface device structure
1458 *
1459 * Returns the address of the device statistics structure.
1460 * The statistics are actually updated from the timer callback.
1461 **/
1462
1463static struct net_device_stats *
1464ixgb_get_stats(struct net_device *netdev)
1465{
8908c6cd 1466 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1467
1468 return &adapter->net_stats;
1469}
1470
1471/**
1472 * ixgb_change_mtu - Change the Maximum Transfer Unit
1473 * @netdev: network interface device structure
1474 * @new_mtu: new value for maximum frame size
1475 *
1476 * Returns 0 on success, negative on failure
1477 **/
1478
1479static int
1480ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1481{
8908c6cd 1482 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1483 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1484 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1485
1486
1487 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1488 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1489 IXGB_ERR("Invalid MTU setting\n");
1490 return -EINVAL;
1491 }
1492
1493 if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1494 || (max_frame <= IXGB_RXBUFFER_2048)) {
1495 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
1496
1497 } else if(max_frame <= IXGB_RXBUFFER_4096) {
1498 adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
1499
1500 } else if(max_frame <= IXGB_RXBUFFER_8192) {
1501 adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
1502
1503 } else {
1504 adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
1505 }
1506
1507 netdev->mtu = new_mtu;
1508
1509 if(old_max_frame != max_frame && netif_running(netdev)) {
1510
1511 ixgb_down(adapter, TRUE);
1512 ixgb_up(adapter);
1513 }
1514
1515 return 0;
1516}
1517
1518/**
1519 * ixgb_update_stats - Update the board statistics counters.
1520 * @adapter: board private structure
1521 **/
1522
1523void
1524ixgb_update_stats(struct ixgb_adapter *adapter)
1525{
5633684d
MC		 1526 struct net_device *netdev = adapter->netdev;
1527
1528 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1529 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1530 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1531 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1532 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1533 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1534
1535 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1536 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1537 if(multi >= bcast)
1538 multi -= bcast;
5633684d
MC		 1539
1540 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1541 adapter->stats.mprch += (multi >> 32);
1542 adapter->stats.bprcl += bcast_l;
1543 adapter->stats.bprch += bcast_h;
1544 } else {
1545 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1546 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1547 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1548 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1549 }
1da177e4
LT		 1550 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1551 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1552 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1553 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1554 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1555 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1556 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1557 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1558 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1559 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1560 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1561 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1562 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1563 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1564 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1565 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1566 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1567 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1568 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1569 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1570 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1571 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1572 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1573 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1574 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1575 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1576 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1577 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1578 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1579 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1580 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1581 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1582 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1583 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1584 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1585 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1586 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1587 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1588 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1589 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1590 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1591 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1592 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1593 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1594 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1595 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1596 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1597 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1598 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1599 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1600 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1601 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1602 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1603 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1604 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1605 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1606
1607 /* Fill out the OS statistics structure */
1608
1609 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1610 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1611 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1612 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1613 adapter->net_stats.multicast = adapter->stats.mprcl;
1614 adapter->net_stats.collisions = 0;
1615
1616 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1617 * with a length in the type/len field */
1618 adapter->net_stats.rx_errors =
1619 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1620 adapter->stats.ruc +
1621 adapter->stats.roc /*+ adapter->stats.rlec */ +
1622 adapter->stats.icbc +
1623 adapter->stats.ecbc + adapter->stats.mpc;
1624
1da177e4
LT		 1625 /* see above
1626 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1627 */
1628
1629 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1630 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1631 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1632 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1633
1634 adapter->net_stats.tx_errors = 0;
1635 adapter->net_stats.rx_frame_errors = 0;
1636 adapter->net_stats.tx_aborted_errors = 0;
1637 adapter->net_stats.tx_carrier_errors = 0;
1638 adapter->net_stats.tx_fifo_errors = 0;
1639 adapter->net_stats.tx_heartbeat_errors = 0;
1640 adapter->net_stats.tx_window_errors = 0;
1641}
1642
1643#define IXGB_MAX_INTR 10
1644/**
1645 * ixgb_intr - Interrupt Handler
1646 * @irq: interrupt number
1647 * @data: pointer to a network interface device structure
1648 * @pt_regs: CPU registers structure
1649 **/
1650
1651static irqreturn_t
1652ixgb_intr(int irq, void *data, struct pt_regs *regs)
1653{
1654 struct net_device *netdev = data;
8908c6cd 1655 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1656 struct ixgb_hw *hw = &adapter->hw;
1657 uint32_t icr = IXGB_READ_REG(hw, ICR);
1658#ifndef CONFIG_IXGB_NAPI
1659 unsigned int i;
1660#endif
1661
1662 if(unlikely(!icr))
1663 return IRQ_NONE; /* Not our interrupt */
1664
1665 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1666 mod_timer(&adapter->watchdog_timer, jiffies);
1667 }
1668
1669#ifdef CONFIG_IXGB_NAPI
1670 if(netif_rx_schedule_prep(netdev)) {
1671
1672 /* Disable interrupts and register for poll. The flush
1673 of the posted write is intentionally left out.
1674 */
1675
1676 atomic_inc(&adapter->irq_sem);
1677 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1678 __netif_rx_schedule(netdev);
1679 }
1680#else
1681 /* yes, that is actually a & and it is meant to make sure that
1682 * every pass through this for loop checks both receive and
1683 * transmit queues for completed descriptors, intended to
1684 * avoid starvation issues and assist tx/rx fairness. */
1685 for(i = 0; i < IXGB_MAX_INTR; i++)
1686 if(!ixgb_clean_rx_irq(adapter) &
1687 !ixgb_clean_tx_irq(adapter))
1688 break;
1689#endif
1690 return IRQ_HANDLED;
1691}
1692
1693#ifdef CONFIG_IXGB_NAPI
1694/**
1695 * ixgb_clean - NAPI Rx polling callback
1696 * @adapter: board private structure
1697 **/
1698
1699static int
1700ixgb_clean(struct net_device *netdev, int *budget)
1701{
8908c6cd 1702 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1703 int work_to_do = min(*budget, netdev->quota);
1704 int tx_cleaned;
1705 int work_done = 0;
1706
1707 tx_cleaned = ixgb_clean_tx_irq(adapter);
1708 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1709
1710 *budget -= work_done;
1711 netdev->quota -= work_done;
1712
1713 /* if no Tx and not enough Rx work done, exit the polling mode */
1714 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1715 netif_rx_complete(netdev);
1716 ixgb_irq_enable(adapter);
1717 return 0;
1718 }
1719
1720 return 1;
1721}
1722#endif
1723
1724/**
1725 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1726 * @adapter: board private structure
1727 **/
1728
1729static boolean_t
1730ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1731{
1732 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1733 struct net_device *netdev = adapter->netdev;
1734 struct ixgb_tx_desc *tx_desc, *eop_desc;
1735 struct ixgb_buffer *buffer_info;
1736 unsigned int i, eop;
1737 boolean_t cleaned = FALSE;
1738
1739 i = tx_ring->next_to_clean;
1740 eop = tx_ring->buffer_info[i].next_to_watch;
1741 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1742
1743 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1744
1745 for(cleaned = FALSE; !cleaned; ) {
1746 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1747 buffer_info = &tx_ring->buffer_info[i];
1748
1749 if (tx_desc->popts
1750 & (IXGB_TX_DESC_POPTS_TXSM |
1751 IXGB_TX_DESC_POPTS_IXSM))
1752 adapter->hw_csum_tx_good++;
1753
1754 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1755
1756 *(uint32_t *)&(tx_desc->status) = 0;
1757
1758 cleaned = (i == eop);
1759 if(++i == tx_ring->count) i = 0;
1760 }
1761
1762 eop = tx_ring->buffer_info[i].next_to_watch;
1763 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1764 }
1765
1766 tx_ring->next_to_clean = i;
1767
1768 spin_lock(&adapter->tx_lock);
1769 if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1770 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
1771
1772 netif_wake_queue(netdev);
1773 }
1774 spin_unlock(&adapter->tx_lock);
1775
1776 if(adapter->detect_tx_hung) {
1777 /* detect a transmit hang in hardware, this serializes the
1778 * check with the clearing of time_stamp and movement of i */
1779 adapter->detect_tx_hung = FALSE;
1780 if(tx_ring->buffer_info[i].dma &&
1781 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
1782 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1783 IXGB_STATUS_TXOFF))
1784 netif_stop_queue(netdev);
1785 }
1786
1787 return cleaned;
1788}
1789
1790/**
1791 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1792 * @adapter: board private structure
1793 * @rx_desc: receive descriptor
1794 * @sk_buff: socket buffer with received data
1795 **/
1796
1797static inline void
1798ixgb_rx_checksum(struct ixgb_adapter *adapter,
1799 struct ixgb_rx_desc *rx_desc,
1800 struct sk_buff *skb)
1801{
1802 /* Ignore Checksum bit is set OR
1803 * TCP Checksum has not been calculated
1804 */
1805 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1806 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1807 skb->ip_summed = CHECKSUM_NONE;
1808 return;
1809 }
1810
1811 /* At this point we know the hardware did the TCP checksum */
1812 /* now look at the TCP checksum error bit */
1813 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1814 /* let the stack verify checksum errors */
1815 skb->ip_summed = CHECKSUM_NONE;
1816 adapter->hw_csum_rx_error++;
1817 } else {
1818 /* TCP checksum is good */
1819 skb->ip_summed = CHECKSUM_UNNECESSARY;
1820 adapter->hw_csum_rx_good++;
1821 }
1822}
1823
1824/**
1825 * ixgb_clean_rx_irq - Send received data up the network stack,
1826 * @adapter: board private structure
1827 **/
1828
1829static boolean_t
1830#ifdef CONFIG_IXGB_NAPI
1831ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1832#else
1833ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1834#endif
1835{
1836 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1837 struct net_device *netdev = adapter->netdev;
1838 struct pci_dev *pdev = adapter->pdev;
1839 struct ixgb_rx_desc *rx_desc, *next_rxd;
1840 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1841 uint32_t length;
1842 unsigned int i, j;
1843 boolean_t cleaned = FALSE;
1844
1845 i = rx_ring->next_to_clean;
1846 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1847 buffer_info = &rx_ring->buffer_info[i];
1848
1849 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1850 struct sk_buff *skb, *next_skb;
1851 u8 status;
1da177e4
LT		 1852
1853#ifdef CONFIG_IXGB_NAPI
1854 if(*work_done >= work_to_do)
1855 break;
1856
1857 (*work_done)++;
1858#endif
f404de1c 1859 status = rx_desc->status;
1da177e4 1860 skb = buffer_info->skb;
f404de1c 1861
1da177e4
LT		 1862 prefetch(skb->data);
1863
1864 if(++i == rx_ring->count) i = 0;
1865 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1866 prefetch(next_rxd);
1867
1868 if((j = i + 1) == rx_ring->count) j = 0;
1869 next2_buffer = &rx_ring->buffer_info[j];
1870 prefetch(next2_buffer);
1871
1872 next_buffer = &rx_ring->buffer_info[i];
1873 next_skb = next_buffer->skb;
1874 prefetch(next_skb);
1875
1da177e4
LT		 1876 cleaned = TRUE;
1877
1878 pci_unmap_single(pdev,
1879 buffer_info->dma,
1880 buffer_info->length,
1881 PCI_DMA_FROMDEVICE);
1882
1883 length = le16_to_cpu(rx_desc->length);
1884
f404de1c 1885 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1886
1887 /* All receives must fit into a single buffer */
1888
1889 IXGB_DBG("Receive packet consumed multiple buffers "
1890 "length<%x>\n", length);
1891
1892 dev_kfree_skb_irq(skb);
f404de1c 1893 goto rxdesc_done;
1da177e4
LT		 1894 }
1895
1896 if (unlikely(rx_desc->errors
1897 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1898 | IXGB_RX_DESC_ERRORS_P |
1899 IXGB_RX_DESC_ERRORS_RXE))) {
1900
1901 dev_kfree_skb_irq(skb);
f404de1c 1902 goto rxdesc_done;
1da177e4
LT		 1903 }
1904
1905 /* Good Receive */
1906 skb_put(skb, length);
1907
1908 /* Receive Checksum Offload */
1909 ixgb_rx_checksum(adapter, rx_desc, skb);
1910
1911 skb->protocol = eth_type_trans(skb, netdev);
1912#ifdef CONFIG_IXGB_NAPI
f404de1c 1913 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1914 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1915 le16_to_cpu(rx_desc->special) &
1916 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1917 } else {
1918 netif_receive_skb(skb);
1919 }
1920#else /* CONFIG_IXGB_NAPI */
f404de1c 1921 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1922 vlan_hwaccel_rx(skb, adapter->vlgrp,
1923 le16_to_cpu(rx_desc->special) &
1924 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1925 } else {
1926 netif_rx(skb);
1927 }
1928#endif /* CONFIG_IXGB_NAPI */
1929 netdev->last_rx = jiffies;
1930
f404de1c
MC		 1931rxdesc_done:
1932 /* clean up descriptor, might be written over by hw */
1da177e4
LT		 1933 rx_desc->status = 0;
1934 buffer_info->skb = NULL;
1935
f404de1c 1936 /* use prefetched values */
1da177e4
LT		 1937 rx_desc = next_rxd;
1938 buffer_info = next_buffer;
1939 }
1940
1941 rx_ring->next_to_clean = i;
1942
1943 ixgb_alloc_rx_buffers(adapter);
1944
1945 return cleaned;
1946}
1947
1948/**
1949 * ixgb_alloc_rx_buffers - Replace used receive buffers
1950 * @adapter: address of board private structure
1951 **/
1952
1953static void
1954ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
1955{
1956 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1957 struct net_device *netdev = adapter->netdev;
1958 struct pci_dev *pdev = adapter->pdev;
1959 struct ixgb_rx_desc *rx_desc;
1960 struct ixgb_buffer *buffer_info;
1961 struct sk_buff *skb;
1962 unsigned int i;
1963 int num_group_tail_writes;
1964 long cleancount;
1965
1966 i = rx_ring->next_to_use;
1967 buffer_info = &rx_ring->buffer_info[i];
1968 cleancount = IXGB_DESC_UNUSED(rx_ring);
1969
1970 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
1971
41639fed
MC		 1972 /* leave three descriptors unused */
1973 while(--cleancount > 2) {
1da177e4
LT		 1974 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1975
1976 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1977
1978 if(unlikely(!skb)) {
1979 /* Better luck next round */
1980 break;
1981 }
1982
1983 /* Make buffer alignment 2 beyond a 16 byte boundary
1984 * this will result in a 16 byte aligned IP header after
1985 * the 14 byte MAC header is removed
1986 */
1987 skb_reserve(skb, NET_IP_ALIGN);
1988
1989 skb->dev = netdev;
1990
1991 buffer_info->skb = skb;
1992 buffer_info->length = adapter->rx_buffer_len;
1993 buffer_info->dma =
1994 pci_map_single(pdev,
1995 skb->data,
1996 adapter->rx_buffer_len,
1997 PCI_DMA_FROMDEVICE);
1998
1999 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2000 /* guarantee DD bit not set now before h/w gets descriptor
2001 * this is the rest of the workaround for h/w double
2002 * writeback. */
2003 rx_desc->status = 0;
1da177e4
LT		 2004
2005 if((i & ~(num_group_tail_writes- 1)) == i) {
2006 /* Force memory writes to complete before letting h/w
2007 * know there are new descriptors to fetch. (Only
2008 * applicable for weak-ordered memory model archs,
2009 * such as IA-64). */
2010 wmb();
2011
2012 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2013 }
2014
2015 if(++i == rx_ring->count) i = 0;
2016 buffer_info = &rx_ring->buffer_info[i];
2017 }
2018
2019 rx_ring->next_to_use = i;
2020}
2021
2022/**
2023 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2024 *
2025 * @param netdev network interface device structure
2026 * @param grp indicates to enable or disable tagging/stripping
2027 **/
2028static void
2029ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2030{
8908c6cd 2031 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2032 uint32_t ctrl, rctl;
2033
2034 ixgb_irq_disable(adapter);
2035 adapter->vlgrp = grp;
2036
2037 if(grp) {
2038 /* enable VLAN tag insert/strip */
2039 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2040 ctrl |= IXGB_CTRL0_VME;
2041 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2042
2043 /* enable VLAN receive filtering */
2044
2045 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2046 rctl |= IXGB_RCTL_VFE;
2047 rctl &= ~IXGB_RCTL_CFIEN;
2048 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2049 } else {
2050 /* disable VLAN tag insert/strip */
2051
2052 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2053 ctrl &= ~IXGB_CTRL0_VME;
2054 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2055
2056 /* disable VLAN filtering */
2057
2058 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2059 rctl &= ~IXGB_RCTL_VFE;
2060 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2061 }
2062
2063 ixgb_irq_enable(adapter);
2064}
2065
2066static void
2067ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2068{
8908c6cd 2069 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2070 uint32_t vfta, index;
2071
2072 /* add VID to filter table */
2073
2074 index = (vid >> 5) & 0x7F;
2075 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2076 vfta |= (1 << (vid & 0x1F));
2077 ixgb_write_vfta(&adapter->hw, index, vfta);
2078}
2079
2080static void
2081ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2082{
8908c6cd 2083 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2084 uint32_t vfta, index;
2085
2086 ixgb_irq_disable(adapter);
2087
2088 if(adapter->vlgrp)
2089 adapter->vlgrp->vlan_devices[vid] = NULL;
2090
2091 ixgb_irq_enable(adapter);
2092
2093 /* remove VID from filter table*/
2094
2095 index = (vid >> 5) & 0x7F;
2096 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2097 vfta &= ~(1 << (vid & 0x1F));
2098 ixgb_write_vfta(&adapter->hw, index, vfta);
2099}
2100
2101static void
2102ixgb_restore_vlan(struct ixgb_adapter *adapter)
2103{
2104 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2105
2106 if(adapter->vlgrp) {
2107 uint16_t vid;
2108 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2109 if(!adapter->vlgrp->vlan_devices[vid])
2110 continue;
2111 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2112 }
2113 }
2114}
2115
1da177e4
LT		 2116#ifdef CONFIG_NET_POLL_CONTROLLER
2117/*
2118 * Polling 'interrupt' - used by things like netconsole to send skbs
2119 * without having to re-enable interrupts. It's not called while
2120 * the interrupt routine is executing.
2121 */
2122
2123static void ixgb_netpoll(struct net_device *dev)
2124{
2125 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2126
1da177e4
LT		 2127 disable_irq(adapter->pdev->irq);
2128 ixgb_intr(adapter->pdev->irq, dev, NULL);
2129 enable_irq(adapter->pdev->irq);
2130}
2131#endif
2132
2133/* ixgb_main.c */
kernel source for telekom puls (alcatel/mediatek)