ixgb: remove lock access in the fast path
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
ab707da7
MC
32 * 1.0.96 04/19/05
33 * - Make needlessly global code static -- bunk@stusta.de
34 * - ethtool cleanup -- shemminger@osdl.org
35 * - Support for MODULE_VERSION -- linville@tuxdriver.com
36 * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
1da177e4
LT
37 * 1.0.88 01/05/05
38 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
39 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
40 * 1.0.84 10/26/04
41 * - reset buffer_info->dma in Tx resource cleanup logic
42 * 1.0.83 10/12/04
43 * - sparse cleanup - shemminger@osdl.org
44 * - fix tx resource cleanup logic
45 */
46
47char ixgb_driver_name[] = "ixgb";
e9ab1d14 48static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT
49
50#ifndef CONFIG_IXGB_NAPI
51#define DRIVERNAPI
52#else
53#define DRIVERNAPI "-NAPI"
54#endif
a24e2513 55#define DRV_VERSION "1.0.104-k4"DRIVERNAPI
01e5abc2 56char ixgb_driver_version[] = DRV_VERSION;
ab707da7 57static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT
58
59/* ixgb_pci_tbl - PCI Device ID Table
60 *
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
66 */
67static struct pci_device_id ixgb_pci_tbl[] = {
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK
70 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
71 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT
72 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
73 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
75 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
76
77 /* required last entry */
78 {0,}
79};
80
81MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
82
83/* Local Function Prototypes */
84
85int ixgb_up(struct ixgb_adapter *adapter);
86void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
87void ixgb_reset(struct ixgb_adapter *adapter);
88int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
89int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
90void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
91void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
92void ixgb_update_stats(struct ixgb_adapter *adapter);
93
94static int ixgb_init_module(void);
95static void ixgb_exit_module(void);
96static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
97static void __devexit ixgb_remove(struct pci_dev *pdev);
98static int ixgb_sw_init(struct ixgb_adapter *adapter);
99static int ixgb_open(struct net_device *netdev);
100static int ixgb_close(struct net_device *netdev);
101static void ixgb_configure_tx(struct ixgb_adapter *adapter);
102static void ixgb_configure_rx(struct ixgb_adapter *adapter);
103static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
104static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
105static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
106static void ixgb_set_multi(struct net_device *netdev);
107static void ixgb_watchdog(unsigned long data);
108static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
109static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
110static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
111static int ixgb_set_mac(struct net_device *netdev, void *p);
112static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
113static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 114
1da177e4
LT
115#ifdef CONFIG_IXGB_NAPI
116static int ixgb_clean(struct net_device *netdev, int *budget);
117static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
118 int *work_done, int work_to_do);
119#else
120static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
121#endif
122static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
123void ixgb_set_ethtool_ops(struct net_device *netdev);
124static void ixgb_tx_timeout(struct net_device *dev);
125static void ixgb_tx_timeout_task(struct net_device *dev);
126static void ixgb_vlan_rx_register(struct net_device *netdev,
127 struct vlan_group *grp);
128static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
129static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
130static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
131
1da177e4
LT
132#ifdef CONFIG_NET_POLL_CONTROLLER
133/* for netdump / net console */
134static void ixgb_netpoll(struct net_device *dev);
135#endif
136
1da177e4
LT
137/* Exported from other modules */
138
139extern void ixgb_check_options(struct ixgb_adapter *adapter);
140
141static struct pci_driver ixgb_driver = {
c2eba932 142 .name = ixgb_driver_name,
1da177e4 143 .id_table = ixgb_pci_tbl,
c2eba932
MC
144 .probe = ixgb_probe,
145 .remove = __devexit_p(ixgb_remove),
1da177e4
LT
146};
147
148MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
149MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
150MODULE_LICENSE("GPL");
01e5abc2 151MODULE_VERSION(DRV_VERSION);
1da177e4 152
ec9c3f5d
AK
153#define DEFAULT_DEBUG_LEVEL_SHIFT 3
154static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
155module_param(debug, int, 0);
156MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
157
1da177e4 158/* some defines for controlling descriptor fetches in h/w */
1da177e4 159#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC
160#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
161 * this */
162#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
163 * is pushed this many descriptors
164 * from head */
1da177e4
LT
165
166/**
167 * ixgb_init_module - Driver Registration Routine
168 *
169 * ixgb_init_module is the first routine called when the driver is
170 * loaded. All it does is register with the PCI subsystem.
171 **/
172
173static int __init
174ixgb_init_module(void)
175{
1da177e4
LT
176 printk(KERN_INFO "%s - version %s\n",
177 ixgb_driver_string, ixgb_driver_version);
178
179 printk(KERN_INFO "%s\n", ixgb_copyright);
180
c2eba932 181 return pci_module_init(&ixgb_driver);
1da177e4
LT
182}
183
184module_init(ixgb_init_module);
185
186/**
187 * ixgb_exit_module - Driver Exit Cleanup Routine
188 *
189 * ixgb_exit_module is called just before the driver is removed
190 * from memory.
191 **/
192
193static void __exit
194ixgb_exit_module(void)
195{
1da177e4
LT
196 pci_unregister_driver(&ixgb_driver);
197}
198
199module_exit(ixgb_exit_module);
200
201/**
202 * ixgb_irq_disable - Mask off interrupt generation on the NIC
203 * @adapter: board private structure
204 **/
205
206static inline void
207ixgb_irq_disable(struct ixgb_adapter *adapter)
208{
209 atomic_inc(&adapter->irq_sem);
210 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
211 IXGB_WRITE_FLUSH(&adapter->hw);
212 synchronize_irq(adapter->pdev->irq);
213}
214
215/**
216 * ixgb_irq_enable - Enable default interrupt generation settings
217 * @adapter: board private structure
218 **/
219
220static inline void
221ixgb_irq_enable(struct ixgb_adapter *adapter)
222{
223 if(atomic_dec_and_test(&adapter->irq_sem)) {
224 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC
225 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
226 IXGB_INT_LSC);
1da177e4
LT
227 IXGB_WRITE_FLUSH(&adapter->hw);
228 }
229}
230
231int
232ixgb_up(struct ixgb_adapter *adapter)
233{
234 struct net_device *netdev = adapter->netdev;
235 int err;
236 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
237 struct ixgb_hw *hw = &adapter->hw;
238
239 /* hardware has been reset, we need to reload some things */
240
8556f0d1 241 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT
242 ixgb_set_multi(netdev);
243
244 ixgb_restore_vlan(adapter);
245
246 ixgb_configure_tx(adapter);
247 ixgb_setup_rctl(adapter);
248 ixgb_configure_rx(adapter);
249 ixgb_alloc_rx_buffers(adapter);
250
e59d1696
AK
251 /* disable interrupts and get the hardware into a known state */
252 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
253
1da177e4
LT
254#ifdef CONFIG_PCI_MSI
255 {
256 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
257 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
258 adapter->have_msi = TRUE;
259
260 if (!pcix)
261 adapter->have_msi = FALSE;
262 else if((err = pci_enable_msi(adapter->pdev))) {
ec9c3f5d 263 DPRINTK(PROBE, ERR,
1da177e4
LT
264 "Unable to allocate MSI interrupt Error: %d\n", err);
265 adapter->have_msi = FALSE;
266 /* proceed to try to request regular interrupt */
267 }
268 }
269
270#endif
271 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
272 SA_SHIRQ | SA_SAMPLE_RANDOM,
ec9c3f5d
AK
273 netdev->name, netdev))) {
274 DPRINTK(PROBE, ERR,
275 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 276 return err;
ec9c3f5d 277 }
1da177e4 278
1da177e4
LT
279 if((hw->max_frame_size != max_frame) ||
280 (hw->max_frame_size !=
281 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
282
283 hw->max_frame_size = max_frame;
284
285 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
286
287 if(hw->max_frame_size >
288 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
289 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
290
291 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
292 ctrl0 |= IXGB_CTRL0_JFE;
293 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
294 }
295 }
296 }
297
298 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT
299
300#ifdef CONFIG_IXGB_NAPI
301 netif_poll_enable(netdev);
302#endif
e59d1696
AK
303 ixgb_irq_enable(adapter);
304
1da177e4
LT
305 return 0;
306}
307
308void
309ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
310{
311 struct net_device *netdev = adapter->netdev;
312
313 ixgb_irq_disable(adapter);
314 free_irq(adapter->pdev->irq, netdev);
315#ifdef CONFIG_PCI_MSI
316 if(adapter->have_msi == TRUE)
317 pci_disable_msi(adapter->pdev);
318
319#endif
320 if(kill_watchdog)
321 del_timer_sync(&adapter->watchdog_timer);
322#ifdef CONFIG_IXGB_NAPI
323 netif_poll_disable(netdev);
324#endif
325 adapter->link_speed = 0;
326 adapter->link_duplex = 0;
327 netif_carrier_off(netdev);
328 netif_stop_queue(netdev);
329
330 ixgb_reset(adapter);
331 ixgb_clean_tx_ring(adapter);
332 ixgb_clean_rx_ring(adapter);
333}
334
335void
336ixgb_reset(struct ixgb_adapter *adapter)
337{
338
339 ixgb_adapter_stop(&adapter->hw);
340 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 341 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT
342}
343
344/**
345 * ixgb_probe - Device Initialization Routine
346 * @pdev: PCI device information struct
347 * @ent: entry in ixgb_pci_tbl
348 *
349 * Returns 0 on success, negative on failure
350 *
351 * ixgb_probe initializes an adapter identified by a pci_dev structure.
352 * The OS initialization, configuring of the adapter private structure,
353 * and a hardware reset occur.
354 **/
355
356static int __devinit
357ixgb_probe(struct pci_dev *pdev,
358 const struct pci_device_id *ent)
359{
360 struct net_device *netdev = NULL;
361 struct ixgb_adapter *adapter;
362 static int cards_found = 0;
363 unsigned long mmio_start;
364 int mmio_len;
365 int pci_using_dac;
366 int i;
367 int err;
368
369 if((err = pci_enable_device(pdev)))
370 return err;
371
c91e468a
AS
372 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
373 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT
374 pci_using_dac = 1;
375 } else {
c91e468a
AS
376 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
377 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK
378 printk(KERN_ERR
379 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 380 goto err_dma_mask;
1da177e4
LT
381 }
382 pci_using_dac = 0;
383 }
384
385 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 386 goto err_request_regions;
1da177e4
LT
387
388 pci_set_master(pdev);
389
390 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
391 if(!netdev) {
392 err = -ENOMEM;
393 goto err_alloc_etherdev;
394 }
395
396 SET_MODULE_OWNER(netdev);
397 SET_NETDEV_DEV(netdev, &pdev->dev);
398
399 pci_set_drvdata(pdev, netdev);
8908c6cd 400 adapter = netdev_priv(netdev);
1da177e4
LT
401 adapter->netdev = netdev;
402 adapter->pdev = pdev;
403 adapter->hw.back = adapter;
ec9c3f5d 404 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT
405
406 mmio_start = pci_resource_start(pdev, BAR_0);
407 mmio_len = pci_resource_len(pdev, BAR_0);
408
409 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
410 if(!adapter->hw.hw_addr) {
411 err = -EIO;
412 goto err_ioremap;
413 }
414
415 for(i = BAR_1; i <= BAR_5; i++) {
416 if(pci_resource_len(pdev, i) == 0)
417 continue;
418 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
419 adapter->hw.io_base = pci_resource_start(pdev, i);
420 break;
421 }
422 }
423
424 netdev->open = &ixgb_open;
425 netdev->stop = &ixgb_close;
426 netdev->hard_start_xmit = &ixgb_xmit_frame;
427 netdev->get_stats = &ixgb_get_stats;
428 netdev->set_multicast_list = &ixgb_set_multi;
429 netdev->set_mac_address = &ixgb_set_mac;
430 netdev->change_mtu = &ixgb_change_mtu;
431 ixgb_set_ethtool_ops(netdev);
432 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 433 netdev->watchdog_timeo = 5 * HZ;
1da177e4
LT
434#ifdef CONFIG_IXGB_NAPI
435 netdev->poll = &ixgb_clean;
436 netdev->weight = 64;
437#endif
438 netdev->vlan_rx_register = ixgb_vlan_rx_register;
439 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
440 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
441#ifdef CONFIG_NET_POLL_CONTROLLER
442 netdev->poll_controller = ixgb_netpoll;
443#endif
444
ec9c3f5d 445 strcpy(netdev->name, pci_name(pdev));
1da177e4
LT
446 netdev->mem_start = mmio_start;
447 netdev->mem_end = mmio_start + mmio_len;
448 netdev->base_addr = adapter->hw.io_base;
449
450 adapter->bd_number = cards_found;
451 adapter->link_speed = 0;
452 adapter->link_duplex = 0;
453
454 /* setup the private structure */
455
456 if((err = ixgb_sw_init(adapter)))
457 goto err_sw_init;
458
459 netdev->features = NETIF_F_SG |
460 NETIF_F_HW_CSUM |
461 NETIF_F_HW_VLAN_TX |
462 NETIF_F_HW_VLAN_RX |
463 NETIF_F_HW_VLAN_FILTER;
464#ifdef NETIF_F_TSO
465 netdev->features |= NETIF_F_TSO;
466#endif
f017f14b
AK
467#ifdef NETIF_F_LLTX
468 netdev->features |= NETIF_F_LLTX;
469#endif
1da177e4
LT
470
471 if(pci_using_dac)
472 netdev->features |= NETIF_F_HIGHDMA;
473
474 /* make sure the EEPROM is good */
475
476 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 477 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT
478 err = -EIO;
479 goto err_eeprom;
480 }
481
482 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 483 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 484
df859c51 485 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 486 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT
487 err = -EIO;
488 goto err_eeprom;
489 }
490
491 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
492
493 init_timer(&adapter->watchdog_timer);
494 adapter->watchdog_timer.function = &ixgb_watchdog;
495 adapter->watchdog_timer.data = (unsigned long)adapter;
496
497 INIT_WORK(&adapter->tx_timeout_task,
498 (void (*)(void *))ixgb_tx_timeout_task, netdev);
499
ec9c3f5d 500 strcpy(netdev->name, "eth%d");
1da177e4
LT
501 if((err = register_netdev(netdev)))
502 goto err_register;
503
504 /* we're going to reset, so assume we have no link for now */
505
506 netif_carrier_off(netdev);
507 netif_stop_queue(netdev);
508
ec9c3f5d 509 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT
510 ixgb_check_options(adapter);
511 /* reset the hardware with the new settings */
512
513 ixgb_reset(adapter);
514
515 cards_found++;
516 return 0;
517
518err_register:
519err_sw_init:
520err_eeprom:
521 iounmap(adapter->hw.hw_addr);
522err_ioremap:
523 free_netdev(netdev);
524err_alloc_etherdev:
525 pci_release_regions(pdev);
c91e468a
AS
526err_request_regions:
527err_dma_mask:
528 pci_disable_device(pdev);
1da177e4
LT
529 return err;
530}
531
532/**
533 * ixgb_remove - Device Removal Routine
534 * @pdev: PCI device information struct
535 *
536 * ixgb_remove is called by the PCI subsystem to alert the driver
537 * that it should release a PCI device. The could be caused by a
538 * Hot-Plug event, or because the driver is going to be removed from
539 * memory.
540 **/
541
542static void __devexit
543ixgb_remove(struct pci_dev *pdev)
544{
545 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 546 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
547
548 unregister_netdev(netdev);
549
550 iounmap(adapter->hw.hw_addr);
551 pci_release_regions(pdev);
552
553 free_netdev(netdev);
554}
555
556/**
557 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
558 * @adapter: board private structure to initialize
559 *
560 * ixgb_sw_init initializes the Adapter private data structure.
561 * Fields are initialized based on PCI device information and
562 * OS network device settings (MTU size).
563 **/
564
565static int __devinit
566ixgb_sw_init(struct ixgb_adapter *adapter)
567{
568 struct ixgb_hw *hw = &adapter->hw;
569 struct net_device *netdev = adapter->netdev;
570 struct pci_dev *pdev = adapter->pdev;
571
572 /* PCI config space info */
573
574 hw->vendor_id = pdev->vendor;
575 hw->device_id = pdev->device;
576 hw->subsystem_vendor_id = pdev->subsystem_vendor;
577 hw->subsystem_id = pdev->subsystem_device;
578
1da177e4 579 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 580 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT
581
582 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK
583 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
584 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
585 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT
586 hw->mac_type = ixgb_82597;
587 else {
588 /* should never have loaded on this device */
ec9c3f5d 589 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT
590 }
591
592 /* enable flow control to be programmed */
593 hw->fc.send_xon = 1;
594
595 atomic_set(&adapter->irq_sem, 1);
596 spin_lock_init(&adapter->tx_lock);
597
598 return 0;
599}
600
601/**
602 * ixgb_open - Called when a network interface is made active
603 * @netdev: network interface device structure
604 *
605 * Returns 0 on success, negative value on failure
606 *
607 * The open entry point is called when a network interface is made
608 * active by the system (IFF_UP). At this point all resources needed
609 * for transmit and receive operations are allocated, the interrupt
610 * handler is registered with the OS, the watchdog timer is started,
611 * and the stack is notified that the interface is ready.
612 **/
613
614static int
615ixgb_open(struct net_device *netdev)
616{
8908c6cd 617 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
618 int err;
619
620 /* allocate transmit descriptors */
621
622 if((err = ixgb_setup_tx_resources(adapter)))
623 goto err_setup_tx;
624
625 /* allocate receive descriptors */
626
627 if((err = ixgb_setup_rx_resources(adapter)))
628 goto err_setup_rx;
629
630 if((err = ixgb_up(adapter)))
631 goto err_up;
632
633 return 0;
634
635err_up:
636 ixgb_free_rx_resources(adapter);
637err_setup_rx:
638 ixgb_free_tx_resources(adapter);
639err_setup_tx:
640 ixgb_reset(adapter);
641
642 return err;
643}
644
645/**
646 * ixgb_close - Disables a network interface
647 * @netdev: network interface device structure
648 *
649 * Returns 0, this is not allowed to fail
650 *
651 * The close entry point is called when an interface is de-activated
652 * by the OS. The hardware is still under the drivers control, but
653 * needs to be disabled. A global MAC reset is issued to stop the
654 * hardware, and all transmit and receive resources are freed.
655 **/
656
657static int
658ixgb_close(struct net_device *netdev)
659{
8908c6cd 660 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
661
662 ixgb_down(adapter, TRUE);
663
664 ixgb_free_tx_resources(adapter);
665 ixgb_free_rx_resources(adapter);
666
667 return 0;
668}
669
670/**
671 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
672 * @adapter: board private structure
673 *
674 * Return 0 on success, negative on failure
675 **/
676
677int
678ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
679{
680 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
681 struct pci_dev *pdev = adapter->pdev;
682 int size;
683
684 size = sizeof(struct ixgb_buffer) * txdr->count;
685 txdr->buffer_info = vmalloc(size);
686 if(!txdr->buffer_info) {
ec9c3f5d
AK
687 DPRINTK(PROBE, ERR,
688 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT
689 return -ENOMEM;
690 }
691 memset(txdr->buffer_info, 0, size);
692
693 /* round up to nearest 4K */
694
695 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
696 IXGB_ROUNDUP(txdr->size, 4096);
697
698 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
699 if(!txdr->desc) {
700 vfree(txdr->buffer_info);
ec9c3f5d
AK
701 DPRINTK(PROBE, ERR,
702 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT
703 return -ENOMEM;
704 }
705 memset(txdr->desc, 0, txdr->size);
706
707 txdr->next_to_use = 0;
708 txdr->next_to_clean = 0;
709
710 return 0;
711}
712
713/**
714 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
715 * @adapter: board private structure
716 *
717 * Configure the Tx unit of the MAC after a reset.
718 **/
719
720static void
721ixgb_configure_tx(struct ixgb_adapter *adapter)
722{
723 uint64_t tdba = adapter->tx_ring.dma;
724 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
725 uint32_t tctl;
726 struct ixgb_hw *hw = &adapter->hw;
727
728 /* Setup the Base and Length of the Tx Descriptor Ring
729 * tx_ring.dma can be either a 32 or 64 bit value
730 */
731
732 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
733 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
734
735 IXGB_WRITE_REG(hw, TDLEN, tdlen);
736
737 /* Setup the HW Tx Head and Tail descriptor pointers */
738
739 IXGB_WRITE_REG(hw, TDH, 0);
740 IXGB_WRITE_REG(hw, TDT, 0);
741
742 /* don't set up txdctl, it induces performance problems if configured
743 * incorrectly */
744 /* Set the Tx Interrupt Delay register */
745
746 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
747
748 /* Program the Transmit Control Register */
749
750 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
751 IXGB_WRITE_REG(hw, TCTL, tctl);
752
753 /* Setup Transmit Descriptor Settings for this adapter */
754 adapter->tx_cmd_type =
755 IXGB_TX_DESC_TYPE
756 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
757}
758
759/**
760 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
761 * @adapter: board private structure
762 *
763 * Returns 0 on success, negative on failure
764 **/
765
766int
767ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
768{
769 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
770 struct pci_dev *pdev = adapter->pdev;
771 int size;
772
773 size = sizeof(struct ixgb_buffer) * rxdr->count;
774 rxdr->buffer_info = vmalloc(size);
775 if(!rxdr->buffer_info) {
ec9c3f5d
AK
776 DPRINTK(PROBE, ERR,
777 "Unable to allocate receive descriptor ring\n");
1da177e4
LT
778 return -ENOMEM;
779 }
780 memset(rxdr->buffer_info, 0, size);
781
782 /* Round up to nearest 4K */
783
784 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
785 IXGB_ROUNDUP(rxdr->size, 4096);
786
787 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
788
789 if(!rxdr->desc) {
790 vfree(rxdr->buffer_info);
ec9c3f5d
AK
791 DPRINTK(PROBE, ERR,
792 "Unable to allocate receive descriptors\n");
1da177e4
LT
793 return -ENOMEM;
794 }
795 memset(rxdr->desc, 0, rxdr->size);
796
797 rxdr->next_to_clean = 0;
798 rxdr->next_to_use = 0;
799
800 return 0;
801}
802
803/**
804 * ixgb_setup_rctl - configure the receive control register
805 * @adapter: Board private structure
806 **/
807
808static void
809ixgb_setup_rctl(struct ixgb_adapter *adapter)
810{
811 uint32_t rctl;
812
813 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
814
815 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
816
817 rctl |=
818 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
819 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
820 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
821
822 rctl |= IXGB_RCTL_SECRC;
823
3f3dc0dd 824 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 825 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 826 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 827 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 828 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 829 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 830 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 831 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT
832
833 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
834}
835
836/**
837 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
838 * @adapter: board private structure
839 *
840 * Configure the Rx unit of the MAC after a reset.
841 **/
842
843static void
844ixgb_configure_rx(struct ixgb_adapter *adapter)
845{
846 uint64_t rdba = adapter->rx_ring.dma;
847 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
848 struct ixgb_hw *hw = &adapter->hw;
849 uint32_t rctl;
850 uint32_t rxcsum;
851 uint32_t rxdctl;
852
853 /* make sure receives are disabled while setting up the descriptors */
854
855 rctl = IXGB_READ_REG(hw, RCTL);
856 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
857
858 /* set the Receive Delay Timer Register */
859
860 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
861
862 /* Setup the Base and Length of the Rx Descriptor Ring */
863
864 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
865 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
866
867 IXGB_WRITE_REG(hw, RDLEN, rdlen);
868
869 /* Setup the HW Rx Head and Tail Descriptor Pointers */
870 IXGB_WRITE_REG(hw, RDH, 0);
871 IXGB_WRITE_REG(hw, RDT, 0);
872
873 /* set up pre-fetching of receive buffers so we get some before we
874 * run out (default hardware behavior is to run out before fetching
875 * more). This sets up to fetch if HTHRESH rx descriptors are avail
876 * and the descriptors in hw cache are below PTHRESH. This avoids
877 * the hardware behavior of fetching <=512 descriptors in a single
878 * burst that pre-empts all other activity, usually causing fifo
879 * overflows. */
880 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
881 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
882 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
883 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
884 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
885
886 /* Enable Receive Checksum Offload for TCP and UDP */
887 if(adapter->rx_csum == TRUE) {
888 rxcsum = IXGB_READ_REG(hw, RXCSUM);
889 rxcsum |= IXGB_RXCSUM_TUOFL;
890 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
891 }
892
893 /* Enable Receives */
894
895 IXGB_WRITE_REG(hw, RCTL, rctl);
896}
897
898/**
899 * ixgb_free_tx_resources - Free Tx Resources
900 * @adapter: board private structure
901 *
902 * Free all transmit software resources
903 **/
904
905void
906ixgb_free_tx_resources(struct ixgb_adapter *adapter)
907{
908 struct pci_dev *pdev = adapter->pdev;
909
910 ixgb_clean_tx_ring(adapter);
911
912 vfree(adapter->tx_ring.buffer_info);
913 adapter->tx_ring.buffer_info = NULL;
914
915 pci_free_consistent(pdev, adapter->tx_ring.size,
916 adapter->tx_ring.desc, adapter->tx_ring.dma);
917
918 adapter->tx_ring.desc = NULL;
919}
920
921static inline void
922ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
923 struct ixgb_buffer *buffer_info)
924{
925 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK
926
927 if (buffer_info->dma)
928 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
929 PCI_DMA_TODEVICE);
930
931 if (buffer_info->skb)
1da177e4 932 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK
933
934 buffer_info->skb = NULL;
935 buffer_info->dma = 0;
936 buffer_info->time_stamp = 0;
937 /* these fields must always be initialized in tx
938 * buffer_info->length = 0;
939 * buffer_info->next_to_watch = 0; */
1da177e4
LT
940}
941
942/**
943 * ixgb_clean_tx_ring - Free Tx Buffers
944 * @adapter: board private structure
945 **/
946
947static void
948ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
949{
950 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
951 struct ixgb_buffer *buffer_info;
952 unsigned long size;
953 unsigned int i;
954
955 /* Free all the Tx ring sk_buffs */
956
957 for(i = 0; i < tx_ring->count; i++) {
958 buffer_info = &tx_ring->buffer_info[i];
959 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
960 }
961
962 size = sizeof(struct ixgb_buffer) * tx_ring->count;
963 memset(tx_ring->buffer_info, 0, size);
964
965 /* Zero out the descriptor ring */
966
967 memset(tx_ring->desc, 0, tx_ring->size);
968
969 tx_ring->next_to_use = 0;
970 tx_ring->next_to_clean = 0;
971
972 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
973 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
974}
975
976/**
977 * ixgb_free_rx_resources - Free Rx Resources
978 * @adapter: board private structure
979 *
980 * Free all receive software resources
981 **/
982
983void
984ixgb_free_rx_resources(struct ixgb_adapter *adapter)
985{
986 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
987 struct pci_dev *pdev = adapter->pdev;
988
989 ixgb_clean_rx_ring(adapter);
990
991 vfree(rx_ring->buffer_info);
992 rx_ring->buffer_info = NULL;
993
994 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
995
996 rx_ring->desc = NULL;
997}
998
999/**
1000 * ixgb_clean_rx_ring - Free Rx Buffers
1001 * @adapter: board private structure
1002 **/
1003
1004static void
1005ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1006{
1007 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1008 struct ixgb_buffer *buffer_info;
1009 struct pci_dev *pdev = adapter->pdev;
1010 unsigned long size;
1011 unsigned int i;
1012
1013 /* Free all the Rx ring sk_buffs */
1014
1015 for(i = 0; i < rx_ring->count; i++) {
1016 buffer_info = &rx_ring->buffer_info[i];
1017 if(buffer_info->skb) {
1018
1019 pci_unmap_single(pdev,
1020 buffer_info->dma,
1021 buffer_info->length,
1022 PCI_DMA_FROMDEVICE);
1023
1024 dev_kfree_skb(buffer_info->skb);
1025
1026 buffer_info->skb = NULL;
1027 }
1028 }
1029
1030 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1031 memset(rx_ring->buffer_info, 0, size);
1032
1033 /* Zero out the descriptor ring */
1034
1035 memset(rx_ring->desc, 0, rx_ring->size);
1036
1037 rx_ring->next_to_clean = 0;
1038 rx_ring->next_to_use = 0;
1039
1040 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1041 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1042}
1043
1044/**
1045 * ixgb_set_mac - Change the Ethernet Address of the NIC
1046 * @netdev: network interface device structure
1047 * @p: pointer to an address structure
1048 *
1049 * Returns 0 on success, negative on failure
1050 **/
1051
1052static int
1053ixgb_set_mac(struct net_device *netdev, void *p)
1054{
8908c6cd 1055 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1056 struct sockaddr *addr = p;
1057
1058 if(!is_valid_ether_addr(addr->sa_data))
1059 return -EADDRNOTAVAIL;
1060
1061 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1062
1063 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1064
1065 return 0;
1066}
1067
1068/**
1069 * ixgb_set_multi - Multicast and Promiscuous mode set
1070 * @netdev: network interface device structure
1071 *
1072 * The set_multi entry point is called whenever the multicast address
1073 * list or the network interface flags are updated. This routine is
1074 * responsible for configuring the hardware for proper multicast,
1075 * promiscuous mode, and all-multi behavior.
1076 **/
1077
1078static void
1079ixgb_set_multi(struct net_device *netdev)
1080{
8908c6cd 1081 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1082 struct ixgb_hw *hw = &adapter->hw;
1083 struct dev_mc_list *mc_ptr;
1084 uint32_t rctl;
1085 int i;
1086
1087 /* Check for Promiscuous and All Multicast modes */
1088
1089 rctl = IXGB_READ_REG(hw, RCTL);
1090
1091 if(netdev->flags & IFF_PROMISC) {
1092 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1093 } else if(netdev->flags & IFF_ALLMULTI) {
1094 rctl |= IXGB_RCTL_MPE;
1095 rctl &= ~IXGB_RCTL_UPE;
1096 } else {
1097 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1098 }
1099
1100 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1101 rctl |= IXGB_RCTL_MPE;
1102 IXGB_WRITE_REG(hw, RCTL, rctl);
1103 } else {
1104 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1105
1106 IXGB_WRITE_REG(hw, RCTL, rctl);
1107
1108 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1109 i++, mc_ptr = mc_ptr->next)
1110 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1111 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1112
1113 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1114 }
1115}
1116
1117/**
1118 * ixgb_watchdog - Timer Call-back
1119 * @data: pointer to netdev cast into an unsigned long
1120 **/
1121
1122static void
1123ixgb_watchdog(unsigned long data)
1124{
1125 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1126 struct net_device *netdev = adapter->netdev;
1127 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1128
1129 ixgb_check_for_link(&adapter->hw);
1130
1131 if (ixgb_check_for_bad_link(&adapter->hw)) {
1132 /* force the reset path */
1133 netif_stop_queue(netdev);
1134 }
1135
1136 if(adapter->hw.link_up) {
1137 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK
1138 DPRINTK(LINK, INFO,
1139 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT
1140 adapter->link_speed = 10000;
1141 adapter->link_duplex = FULL_DUPLEX;
1142 netif_carrier_on(netdev);
1143 netif_wake_queue(netdev);
1144 }
1145 } else {
1146 if(netif_carrier_ok(netdev)) {
1147 adapter->link_speed = 0;
1148 adapter->link_duplex = 0;
ec9c3f5d 1149 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT
1150 netif_carrier_off(netdev);
1151 netif_stop_queue(netdev);
1152
1153 }
1154 }
1155
1156 ixgb_update_stats(adapter);
1157
1158 if(!netif_carrier_ok(netdev)) {
1159 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1160 /* We've lost link, so the controller stops DMA,
1161 * but we've got queued Tx work that's never going
1162 * to get done, so reset controller to flush Tx.
1163 * (Do the reset outside of interrupt context). */
1164 schedule_work(&adapter->tx_timeout_task);
1165 }
1166 }
1167
1168 /* Force detection of hung controller every watchdog period */
1169 adapter->detect_tx_hung = TRUE;
1170
1171 /* generate an interrupt to force clean up of any stragglers */
1172 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1173
1174 /* Reset the timer */
1175 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1176}
1177
1178#define IXGB_TX_FLAGS_CSUM 0x00000001
1179#define IXGB_TX_FLAGS_VLAN 0x00000002
1180#define IXGB_TX_FLAGS_TSO 0x00000004
1181
1182static inline int
1183ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1184{
1185#ifdef NETIF_F_TSO
1186 struct ixgb_context_desc *context_desc;
1187 unsigned int i;
1188 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1189 uint16_t ipcse, tucse, mss;
1190 int err;
1191
1192 if(likely(skb_shinfo(skb)->tso_size)) {
1193 if (skb_header_cloned(skb)) {
1194 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1195 if (err)
1196 return err;
1197 }
1198
1199 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1200 mss = skb_shinfo(skb)->tso_size;
1201 skb->nh.iph->tot_len = 0;
1202 skb->nh.iph->check = 0;
1203 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1204 skb->nh.iph->daddr,
1205 0, IPPROTO_TCP, 0);
1206 ipcss = skb->nh.raw - skb->data;
1207 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1208 ipcse = skb->h.raw - skb->data - 1;
1209 tucss = skb->h.raw - skb->data;
1210 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1211 tucse = 0;
1212
1213 i = adapter->tx_ring.next_to_use;
1214 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1215
1216 context_desc->ipcss = ipcss;
1217 context_desc->ipcso = ipcso;
1218 context_desc->ipcse = cpu_to_le16(ipcse);
1219 context_desc->tucss = tucss;
1220 context_desc->tucso = tucso;
1221 context_desc->tucse = cpu_to_le16(tucse);
1222 context_desc->mss = cpu_to_le16(mss);
1223 context_desc->hdr_len = hdr_len;
1224 context_desc->status = 0;
1225 context_desc->cmd_type_len = cpu_to_le32(
1226 IXGB_CONTEXT_DESC_TYPE
1227 | IXGB_CONTEXT_DESC_CMD_TSE
1228 | IXGB_CONTEXT_DESC_CMD_IP
1229 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT
1230 | IXGB_CONTEXT_DESC_CMD_IDE
1231 | (skb->len - (hdr_len)));
1232
06c2f9ec 1233
1da177e4
LT
1234 if(++i == adapter->tx_ring.count) i = 0;
1235 adapter->tx_ring.next_to_use = i;
1236
1237 return 1;
1238 }
1239#endif
1240
1241 return 0;
1242}
1243
1244static inline boolean_t
1245ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1246{
1247 struct ixgb_context_desc *context_desc;
1248 unsigned int i;
1249 uint8_t css, cso;
1250
1251 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1252 css = skb->h.raw - skb->data;
1253 cso = (skb->h.raw + skb->csum) - skb->data;
1254
1255 i = adapter->tx_ring.next_to_use;
1256 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1257
1258 context_desc->tucss = css;
1259 context_desc->tucso = cso;
1260 context_desc->tucse = 0;
1261 /* zero out any previously existing data in one instruction */
1262 *(uint32_t *)&(context_desc->ipcss) = 0;
1263 context_desc->status = 0;
1264 context_desc->hdr_len = 0;
1265 context_desc->mss = 0;
1266 context_desc->cmd_type_len =
1267 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1268 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT
1269
1270 if(++i == adapter->tx_ring.count) i = 0;
1271 adapter->tx_ring.next_to_use = i;
1272
1273 return TRUE;
1274 }
1275
1276 return FALSE;
1277}
1278
1279#define IXGB_MAX_TXD_PWR 14
1280#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1281
1282static inline int
1283ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1284 unsigned int first)
1285{
1286 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1287 struct ixgb_buffer *buffer_info;
1288 int len = skb->len;
1289 unsigned int offset = 0, size, count = 0, i;
1290
1291 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1292 unsigned int f;
ac79c82e 1293
1da177e4
LT
1294 len -= skb->data_len;
1295
1296 i = tx_ring->next_to_use;
1297
1298 while(len) {
1299 buffer_info = &tx_ring->buffer_info[i];
1300 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1301 buffer_info->length = size;
1302 buffer_info->dma =
1303 pci_map_single(adapter->pdev,
1304 skb->data + offset,
1305 size,
1306 PCI_DMA_TODEVICE);
1307 buffer_info->time_stamp = jiffies;
1dfdd7df 1308 buffer_info->next_to_watch = 0;
1da177e4
LT
1309
1310 len -= size;
1311 offset += size;
1312 count++;
1313 if(++i == tx_ring->count) i = 0;
1314 }
1315
1316 for(f = 0; f < nr_frags; f++) {
1317 struct skb_frag_struct *frag;
1318
1319 frag = &skb_shinfo(skb)->frags[f];
1320 len = frag->size;
1321 offset = 0;
1322
1323 while(len) {
1324 buffer_info = &tx_ring->buffer_info[i];
1325 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1326 buffer_info->length = size;
1327 buffer_info->dma =
1328 pci_map_page(adapter->pdev,
1329 frag->page,
1330 frag->page_offset + offset,
1331 size,
1332 PCI_DMA_TODEVICE);
1333 buffer_info->time_stamp = jiffies;
1dfdd7df 1334 buffer_info->next_to_watch = 0;
1da177e4
LT
1335
1336 len -= size;
1337 offset += size;
1338 count++;
1339 if(++i == tx_ring->count) i = 0;
1340 }
1341 }
1342 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1343 tx_ring->buffer_info[i].skb = skb;
1344 tx_ring->buffer_info[first].next_to_watch = i;
1345
1346 return count;
1347}
1348
1349static inline void
1350ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1351{
1352 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1353 struct ixgb_tx_desc *tx_desc = NULL;
1354 struct ixgb_buffer *buffer_info;
1355 uint32_t cmd_type_len = adapter->tx_cmd_type;
1356 uint8_t status = 0;
1357 uint8_t popts = 0;
1358 unsigned int i;
1359
1360 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1361 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1362 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1363 }
1364
1365 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1366 popts |= IXGB_TX_DESC_POPTS_TXSM;
1367
1368 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1369 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1370 }
1371
1372 i = tx_ring->next_to_use;
1373
1374 while(count--) {
1375 buffer_info = &tx_ring->buffer_info[i];
1376 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1377 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1378 tx_desc->cmd_type_len =
1379 cpu_to_le32(cmd_type_len | buffer_info->length);
1380 tx_desc->status = status;
1381 tx_desc->popts = popts;
1382 tx_desc->vlan = cpu_to_le16(vlan_id);
1383
1384 if(++i == tx_ring->count) i = 0;
1385 }
1386
1387 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1388 | IXGB_TX_DESC_CMD_RS );
1389
1390 /* Force memory writes to complete before letting h/w
1391 * know there are new descriptors to fetch. (Only
1392 * applicable for weak-ordered memory model archs,
1393 * such as IA-64). */
1394 wmb();
1395
1396 tx_ring->next_to_use = i;
1397 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1398}
1399
1400/* Tx Descriptors needed, worst case */
1401#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1402 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1403#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
989316dd 1404 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
1da177e4
LT
1405
1406static int
1407ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1408{
8908c6cd 1409 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1410 unsigned int first;
1411 unsigned int tx_flags = 0;
1412 unsigned long flags;
1413 int vlan_id = 0;
1414 int tso;
1415
1416 if(skb->len <= 0) {
1417 dev_kfree_skb_any(skb);
1418 return 0;
1419 }
1420
f017f14b
AK
1421#ifdef NETIF_F_LLTX
1422 local_irq_save(flags);
1423 if (!spin_trylock(&adapter->tx_lock)) {
1424 /* Collision - tell upper layer to requeue */
1425 local_irq_restore(flags);
1426 return NETDEV_TX_LOCKED;
1427 }
1428#else
1da177e4 1429 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK
1430#endif
1431
1da177e4
LT
1432 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1433 netif_stop_queue(netdev);
1434 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1435 return NETDEV_TX_BUSY;
1da177e4 1436 }
f017f14b
AK
1437
1438#ifndef NETIF_F_LLTX
1da177e4 1439 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1440#endif
1da177e4
LT
1441
1442 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1443 tx_flags |= IXGB_TX_FLAGS_VLAN;
1444 vlan_id = vlan_tx_tag_get(skb);
1445 }
1446
1447 first = adapter->tx_ring.next_to_use;
1448
1449 tso = ixgb_tso(adapter, skb);
1450 if (tso < 0) {
1451 dev_kfree_skb_any(skb);
f017f14b
AK
1452#ifdef NETIF_F_LLTX
1453 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1454#endif
1da177e4
LT
1455 return NETDEV_TX_OK;
1456 }
1457
96f9c2e2 1458 if (likely(tso))
1da177e4
LT
1459 tx_flags |= IXGB_TX_FLAGS_TSO;
1460 else if(ixgb_tx_csum(adapter, skb))
1461 tx_flags |= IXGB_TX_FLAGS_CSUM;
1462
1463 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1464 tx_flags);
1465
1466 netdev->trans_start = jiffies;
1467
f017f14b
AK
1468#ifdef NETIF_F_LLTX
1469 /* Make sure there is space in the ring for the next send. */
1470 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1471 netif_stop_queue(netdev);
1472
1473 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1474
1475#endif
1476 return NETDEV_TX_OK;
1da177e4
LT
1477}
1478
1479/**
1480 * ixgb_tx_timeout - Respond to a Tx Hang
1481 * @netdev: network interface device structure
1482 **/
1483
1484static void
1485ixgb_tx_timeout(struct net_device *netdev)
1486{
8908c6cd 1487 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1488
1489 /* Do the reset outside of interrupt context */
1490 schedule_work(&adapter->tx_timeout_task);
1491}
1492
1493static void
1494ixgb_tx_timeout_task(struct net_device *netdev)
1495{
8908c6cd 1496 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4 1497
9b8118df 1498 adapter->tx_timeout_count++;
1da177e4
LT
1499 ixgb_down(adapter, TRUE);
1500 ixgb_up(adapter);
1501}
1502
1503/**
1504 * ixgb_get_stats - Get System Network Statistics
1505 * @netdev: network interface device structure
1506 *
1507 * Returns the address of the device statistics structure.
1508 * The statistics are actually updated from the timer callback.
1509 **/
1510
1511static struct net_device_stats *
1512ixgb_get_stats(struct net_device *netdev)
1513{
8908c6cd 1514 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1515
1516 return &adapter->net_stats;
1517}
1518
1519/**
1520 * ixgb_change_mtu - Change the Maximum Transfer Unit
1521 * @netdev: network interface device structure
1522 * @new_mtu: new value for maximum frame size
1523 *
1524 * Returns 0 on success, negative on failure
1525 **/
1526
1527static int
1528ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1529{
8908c6cd 1530 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1531 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1532 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1533
1534
1535 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1536 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1537 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT
1538 return -EINVAL;
1539 }
1540
3f3dc0dd 1541 adapter->rx_buffer_len = max_frame;
1da177e4
LT
1542
1543 netdev->mtu = new_mtu;
1544
3f3dc0dd 1545 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT
1546 ixgb_down(adapter, TRUE);
1547 ixgb_up(adapter);
1548 }
1549
1550 return 0;
1551}
1552
1553/**
1554 * ixgb_update_stats - Update the board statistics counters.
1555 * @adapter: board private structure
1556 **/
1557
1558void
1559ixgb_update_stats(struct ixgb_adapter *adapter)
1560{
5633684d
MC
1561 struct net_device *netdev = adapter->netdev;
1562
1563 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1564 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1565 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1566 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1567 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1568 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1569
1570 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1571 /* fix up multicast stats by removing broadcasts */
7b89178d
MC
1572 if(multi >= bcast)
1573 multi -= bcast;
5633684d
MC
1574
1575 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1576 adapter->stats.mprch += (multi >> 32);
1577 adapter->stats.bprcl += bcast_l;
1578 adapter->stats.bprch += bcast_h;
1579 } else {
1580 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1581 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1582 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1583 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1584 }
1da177e4
LT
1585 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1586 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1587 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1588 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT
1589 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1590 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1591 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1592 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1593 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1594 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1595 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1596 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1597 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1598 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1599 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1600 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1601 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1602 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1603 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1604 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1605 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1606 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1607 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1608 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1609 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1610 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1611 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1612 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1613 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1614 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1615 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1616 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1617 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1618 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1619 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1620 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1621 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1622 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1623 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1624 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1625 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1626 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1627 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1628 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1629 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1630 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1631 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1632 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1633 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1634 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1635 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1636 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1637 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1638 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1639 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1640 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1641
1642 /* Fill out the OS statistics structure */
1643
1644 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1645 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1646 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1647 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1648 adapter->net_stats.multicast = adapter->stats.mprcl;
1649 adapter->net_stats.collisions = 0;
1650
1651 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1652 * with a length in the type/len field */
1653 adapter->net_stats.rx_errors =
1654 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1655 adapter->stats.ruc +
1656 adapter->stats.roc /*+ adapter->stats.rlec */ +
1657 adapter->stats.icbc +
1658 adapter->stats.ecbc + adapter->stats.mpc;
1659
1da177e4
LT
1660 /* see above
1661 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1662 */
1663
1664 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1665 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1666 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1667 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1668
1669 adapter->net_stats.tx_errors = 0;
1670 adapter->net_stats.rx_frame_errors = 0;
1671 adapter->net_stats.tx_aborted_errors = 0;
1672 adapter->net_stats.tx_carrier_errors = 0;
1673 adapter->net_stats.tx_fifo_errors = 0;
1674 adapter->net_stats.tx_heartbeat_errors = 0;
1675 adapter->net_stats.tx_window_errors = 0;
1676}
1677
1678#define IXGB_MAX_INTR 10
1679/**
1680 * ixgb_intr - Interrupt Handler
1681 * @irq: interrupt number
1682 * @data: pointer to a network interface device structure
1683 * @pt_regs: CPU registers structure
1684 **/
1685
1686static irqreturn_t
1687ixgb_intr(int irq, void *data, struct pt_regs *regs)
1688{
1689 struct net_device *netdev = data;
8908c6cd 1690 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1691 struct ixgb_hw *hw = &adapter->hw;
1692 uint32_t icr = IXGB_READ_REG(hw, ICR);
1693#ifndef CONFIG_IXGB_NAPI
1694 unsigned int i;
1695#endif
1696
1697 if(unlikely(!icr))
1698 return IRQ_NONE; /* Not our interrupt */
1699
1700 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1701 mod_timer(&adapter->watchdog_timer, jiffies);
1702 }
1703
1704#ifdef CONFIG_IXGB_NAPI
1705 if(netif_rx_schedule_prep(netdev)) {
1706
1707 /* Disable interrupts and register for poll. The flush
1708 of the posted write is intentionally left out.
1709 */
1710
1711 atomic_inc(&adapter->irq_sem);
1712 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1713 __netif_rx_schedule(netdev);
1714 }
1715#else
1716 /* yes, that is actually a & and it is meant to make sure that
1717 * every pass through this for loop checks both receive and
1718 * transmit queues for completed descriptors, intended to
1719 * avoid starvation issues and assist tx/rx fairness. */
1720 for(i = 0; i < IXGB_MAX_INTR; i++)
1721 if(!ixgb_clean_rx_irq(adapter) &
1722 !ixgb_clean_tx_irq(adapter))
1723 break;
1724#endif
1725 return IRQ_HANDLED;
1726}
1727
1728#ifdef CONFIG_IXGB_NAPI
1729/**
1730 * ixgb_clean - NAPI Rx polling callback
1731 * @adapter: board private structure
1732 **/
1733
1734static int
1735ixgb_clean(struct net_device *netdev, int *budget)
1736{
8908c6cd 1737 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1738 int work_to_do = min(*budget, netdev->quota);
1739 int tx_cleaned;
1740 int work_done = 0;
1741
1742 tx_cleaned = ixgb_clean_tx_irq(adapter);
1743 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1744
1745 *budget -= work_done;
1746 netdev->quota -= work_done;
1747
1748 /* if no Tx and not enough Rx work done, exit the polling mode */
1749 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1750 netif_rx_complete(netdev);
1751 ixgb_irq_enable(adapter);
1752 return 0;
1753 }
1754
1755 return 1;
1756}
1757#endif
1758
1759/**
1760 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1761 * @adapter: board private structure
1762 **/
1763
1764static boolean_t
1765ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1766{
1767 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1768 struct net_device *netdev = adapter->netdev;
1769 struct ixgb_tx_desc *tx_desc, *eop_desc;
1770 struct ixgb_buffer *buffer_info;
1771 unsigned int i, eop;
1772 boolean_t cleaned = FALSE;
1773
1774 i = tx_ring->next_to_clean;
1775 eop = tx_ring->buffer_info[i].next_to_watch;
1776 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1777
1778 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1779
1780 for(cleaned = FALSE; !cleaned; ) {
1781 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1782 buffer_info = &tx_ring->buffer_info[i];
1783
1784 if (tx_desc->popts
1785 & (IXGB_TX_DESC_POPTS_TXSM |
1786 IXGB_TX_DESC_POPTS_IXSM))
1787 adapter->hw_csum_tx_good++;
1788
1789 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1790
1791 *(uint32_t *)&(tx_desc->status) = 0;
1792
1793 cleaned = (i == eop);
1794 if(++i == tx_ring->count) i = 0;
1795 }
1796
1797 eop = tx_ring->buffer_info[i].next_to_watch;
1798 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1799 }
1800
1801 tx_ring->next_to_clean = i;
1802
3352a3b2
AK
1803 if (unlikely(netif_queue_stopped(netdev))) {
1804 spin_lock(&adapter->tx_lock);
1805 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1806 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE))
1807 netif_wake_queue(netdev);
1808 spin_unlock(&adapter->tx_lock);
1da177e4 1809 }
1da177e4
LT
1810
1811 if(adapter->detect_tx_hung) {
1812 /* detect a transmit hang in hardware, this serializes the
1813 * check with the clearing of time_stamp and movement of i */
1814 adapter->detect_tx_hung = FALSE;
9b8118df
AK
1815 if (tx_ring->buffer_info[eop].dma &&
1816 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1817 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK
1818 IXGB_STATUS_TXOFF)) {
1819 /* detected Tx unit hang */
1820 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1821 " TDH <%x>\n"
1822 " TDT <%x>\n"
1823 " next_to_use <%x>\n"
1824 " next_to_clean <%x>\n"
1825 "buffer_info[next_to_clean]\n"
1826 " time_stamp <%lx>\n"
1827 " next_to_watch <%x>\n"
1828 " jiffies <%lx>\n"
1829 " next_to_watch.status <%x>\n",
1830 IXGB_READ_REG(&adapter->hw, TDH),
1831 IXGB_READ_REG(&adapter->hw, TDT),
1832 tx_ring->next_to_use,
1833 tx_ring->next_to_clean,
1834 tx_ring->buffer_info[eop].time_stamp,
1835 eop,
1836 jiffies,
1837 eop_desc->status);
1da177e4 1838 netif_stop_queue(netdev);
9b8118df 1839 }
1da177e4
LT
1840 }
1841
1842 return cleaned;
1843}
1844
1845/**
1846 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1847 * @adapter: board private structure
1848 * @rx_desc: receive descriptor
1849 * @sk_buff: socket buffer with received data
1850 **/
1851
1852static inline void
1853ixgb_rx_checksum(struct ixgb_adapter *adapter,
1854 struct ixgb_rx_desc *rx_desc,
1855 struct sk_buff *skb)
1856{
1857 /* Ignore Checksum bit is set OR
1858 * TCP Checksum has not been calculated
1859 */
1860 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1861 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1862 skb->ip_summed = CHECKSUM_NONE;
1863 return;
1864 }
1865
1866 /* At this point we know the hardware did the TCP checksum */
1867 /* now look at the TCP checksum error bit */
1868 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1869 /* let the stack verify checksum errors */
1870 skb->ip_summed = CHECKSUM_NONE;
1871 adapter->hw_csum_rx_error++;
1872 } else {
1873 /* TCP checksum is good */
1874 skb->ip_summed = CHECKSUM_UNNECESSARY;
1875 adapter->hw_csum_rx_good++;
1876 }
1877}
1878
1879/**
1880 * ixgb_clean_rx_irq - Send received data up the network stack,
1881 * @adapter: board private structure
1882 **/
1883
1884static boolean_t
1885#ifdef CONFIG_IXGB_NAPI
1886ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1887#else
1888ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1889#endif
1890{
1891 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1892 struct net_device *netdev = adapter->netdev;
1893 struct pci_dev *pdev = adapter->pdev;
1894 struct ixgb_rx_desc *rx_desc, *next_rxd;
1895 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT
1896 uint32_t length;
1897 unsigned int i, j;
1898 boolean_t cleaned = FALSE;
1899
1900 i = rx_ring->next_to_clean;
1901 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1902 buffer_info = &rx_ring->buffer_info[i];
1903
1904 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC
1905 struct sk_buff *skb, *next_skb;
1906 u8 status;
1da177e4
LT
1907
1908#ifdef CONFIG_IXGB_NAPI
1909 if(*work_done >= work_to_do)
1910 break;
1911
1912 (*work_done)++;
1913#endif
f404de1c 1914 status = rx_desc->status;
1da177e4 1915 skb = buffer_info->skb;
1dfdd7df 1916 buffer_info->skb = NULL;
f404de1c 1917
1da177e4
LT
1918 prefetch(skb->data);
1919
1920 if(++i == rx_ring->count) i = 0;
1921 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1922 prefetch(next_rxd);
1923
1924 if((j = i + 1) == rx_ring->count) j = 0;
1925 next2_buffer = &rx_ring->buffer_info[j];
1926 prefetch(next2_buffer);
1927
1928 next_buffer = &rx_ring->buffer_info[i];
1929 next_skb = next_buffer->skb;
1930 prefetch(next_skb);
1931
1da177e4
LT
1932 cleaned = TRUE;
1933
1934 pci_unmap_single(pdev,
1935 buffer_info->dma,
1936 buffer_info->length,
1937 PCI_DMA_FROMDEVICE);
1938
1939 length = le16_to_cpu(rx_desc->length);
1940
f404de1c 1941 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT
1942
1943 /* All receives must fit into a single buffer */
1944
1945 IXGB_DBG("Receive packet consumed multiple buffers "
1946 "length<%x>\n", length);
1947
1948 dev_kfree_skb_irq(skb);
f404de1c 1949 goto rxdesc_done;
1da177e4
LT
1950 }
1951
1952 if (unlikely(rx_desc->errors
1953 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1954 | IXGB_RX_DESC_ERRORS_P |
1955 IXGB_RX_DESC_ERRORS_RXE))) {
1956
1957 dev_kfree_skb_irq(skb);
f404de1c 1958 goto rxdesc_done;
1da177e4
LT
1959 }
1960
6b900bb4
AK
1961 /* code added for copybreak, this should improve
1962 * performance for small packets with large amounts
1963 * of reassembly being done in the stack */
1964#define IXGB_CB_LENGTH 256
1965 if (length < IXGB_CB_LENGTH) {
1966 struct sk_buff *new_skb =
1967 dev_alloc_skb(length + NET_IP_ALIGN);
1968 if (new_skb) {
1969 skb_reserve(new_skb, NET_IP_ALIGN);
1970 new_skb->dev = netdev;
1971 memcpy(new_skb->data - NET_IP_ALIGN,
1972 skb->data - NET_IP_ALIGN,
1973 length + NET_IP_ALIGN);
1974 /* save the skb in buffer_info as good */
1975 buffer_info->skb = skb;
1976 skb = new_skb;
1977 }
1978 }
1979 /* end copybreak code */
1980
1da177e4
LT
1981 /* Good Receive */
1982 skb_put(skb, length);
1983
1984 /* Receive Checksum Offload */
1985 ixgb_rx_checksum(adapter, rx_desc, skb);
1986
1987 skb->protocol = eth_type_trans(skb, netdev);
1988#ifdef CONFIG_IXGB_NAPI
f404de1c 1989 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
1990 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1991 le16_to_cpu(rx_desc->special) &
1992 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1993 } else {
1994 netif_receive_skb(skb);
1995 }
1996#else /* CONFIG_IXGB_NAPI */
f404de1c 1997 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
1998 vlan_hwaccel_rx(skb, adapter->vlgrp,
1999 le16_to_cpu(rx_desc->special) &
2000 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2001 } else {
2002 netif_rx(skb);
2003 }
2004#endif /* CONFIG_IXGB_NAPI */
2005 netdev->last_rx = jiffies;
2006
f404de1c
MC
2007rxdesc_done:
2008 /* clean up descriptor, might be written over by hw */
1da177e4 2009 rx_desc->status = 0;
1da177e4 2010
f404de1c 2011 /* use prefetched values */
1da177e4
LT
2012 rx_desc = next_rxd;
2013 buffer_info = next_buffer;
2014 }
2015
2016 rx_ring->next_to_clean = i;
2017
2018 ixgb_alloc_rx_buffers(adapter);
2019
2020 return cleaned;
2021}
2022
2023/**
2024 * ixgb_alloc_rx_buffers - Replace used receive buffers
2025 * @adapter: address of board private structure
2026 **/
2027
2028static void
2029ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2030{
2031 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2032 struct net_device *netdev = adapter->netdev;
2033 struct pci_dev *pdev = adapter->pdev;
2034 struct ixgb_rx_desc *rx_desc;
2035 struct ixgb_buffer *buffer_info;
2036 struct sk_buff *skb;
2037 unsigned int i;
2038 int num_group_tail_writes;
2039 long cleancount;
2040
2041 i = rx_ring->next_to_use;
2042 buffer_info = &rx_ring->buffer_info[i];
2043 cleancount = IXGB_DESC_UNUSED(rx_ring);
2044
2045 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2046
41639fed
MC
2047 /* leave three descriptors unused */
2048 while(--cleancount > 2) {
1dfdd7df
AK
2049 /* recycle! its good for you */
2050 if (!(skb = buffer_info->skb))
2051 skb = dev_alloc_skb(adapter->rx_buffer_len
2052 + NET_IP_ALIGN);
2053 else {
2054 skb_trim(skb, 0);
2055 goto map_skb;
2056 }
1da177e4 2057
1dfdd7df 2058 if (unlikely(!skb)) {
1da177e4 2059 /* Better luck next round */
1dfdd7df 2060 adapter->alloc_rx_buff_failed++;
1da177e4
LT
2061 break;
2062 }
2063
2064 /* Make buffer alignment 2 beyond a 16 byte boundary
2065 * this will result in a 16 byte aligned IP header after
2066 * the 14 byte MAC header is removed
2067 */
2068 skb_reserve(skb, NET_IP_ALIGN);
2069
2070 skb->dev = netdev;
2071
2072 buffer_info->skb = skb;
2073 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK
2074map_skb:
2075 buffer_info->dma = pci_map_single(pdev,
2076 skb->data,
2077 adapter->rx_buffer_len,
2078 PCI_DMA_FROMDEVICE);
1da177e4 2079
1dfdd7df 2080 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2081 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC
2082 /* guarantee DD bit not set now before h/w gets descriptor
2083 * this is the rest of the workaround for h/w double
2084 * writeback. */
2085 rx_desc->status = 0;
1da177e4 2086
1da177e4
LT
2087
2088 if(++i == rx_ring->count) i = 0;
2089 buffer_info = &rx_ring->buffer_info[i];
2090 }
2091
1dfdd7df
AK
2092 if (likely(rx_ring->next_to_use != i)) {
2093 rx_ring->next_to_use = i;
2094 if (unlikely(i-- == 0))
2095 i = (rx_ring->count - 1);
2096
2097 /* Force memory writes to complete before letting h/w
2098 * know there are new descriptors to fetch. (Only
2099 * applicable for weak-ordered memory model archs, such
2100 * as IA-64). */
2101 wmb();
2102 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2103 }
1da177e4
LT
2104}
2105
2106/**
2107 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2108 *
2109 * @param netdev network interface device structure
2110 * @param grp indicates to enable or disable tagging/stripping
2111 **/
2112static void
2113ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2114{
8908c6cd 2115 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2116 uint32_t ctrl, rctl;
2117
2118 ixgb_irq_disable(adapter);
2119 adapter->vlgrp = grp;
2120
2121 if(grp) {
2122 /* enable VLAN tag insert/strip */
2123 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2124 ctrl |= IXGB_CTRL0_VME;
2125 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2126
2127 /* enable VLAN receive filtering */
2128
2129 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2130 rctl |= IXGB_RCTL_VFE;
2131 rctl &= ~IXGB_RCTL_CFIEN;
2132 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2133 } else {
2134 /* disable VLAN tag insert/strip */
2135
2136 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2137 ctrl &= ~IXGB_CTRL0_VME;
2138 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2139
2140 /* disable VLAN filtering */
2141
2142 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2143 rctl &= ~IXGB_RCTL_VFE;
2144 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2145 }
2146
2147 ixgb_irq_enable(adapter);
2148}
2149
2150static void
2151ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2152{
8908c6cd 2153 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2154 uint32_t vfta, index;
2155
2156 /* add VID to filter table */
2157
2158 index = (vid >> 5) & 0x7F;
2159 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2160 vfta |= (1 << (vid & 0x1F));
2161 ixgb_write_vfta(&adapter->hw, index, vfta);
2162}
2163
2164static void
2165ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2166{
8908c6cd 2167 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2168 uint32_t vfta, index;
2169
2170 ixgb_irq_disable(adapter);
2171
2172 if(adapter->vlgrp)
2173 adapter->vlgrp->vlan_devices[vid] = NULL;
2174
2175 ixgb_irq_enable(adapter);
2176
2177 /* remove VID from filter table*/
2178
2179 index = (vid >> 5) & 0x7F;
2180 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2181 vfta &= ~(1 << (vid & 0x1F));
2182 ixgb_write_vfta(&adapter->hw, index, vfta);
2183}
2184
2185static void
2186ixgb_restore_vlan(struct ixgb_adapter *adapter)
2187{
2188 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2189
2190 if(adapter->vlgrp) {
2191 uint16_t vid;
2192 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2193 if(!adapter->vlgrp->vlan_devices[vid])
2194 continue;
2195 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2196 }
2197 }
2198}
2199
1da177e4
LT
2200#ifdef CONFIG_NET_POLL_CONTROLLER
2201/*
2202 * Polling 'interrupt' - used by things like netconsole to send skbs
2203 * without having to re-enable interrupts. It's not called while
2204 * the interrupt routine is executing.
2205 */
2206
2207static void ixgb_netpoll(struct net_device *dev)
2208{
2209 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2210
1da177e4
LT
2211 disable_irq(adapter->pdev->irq);
2212 ixgb_intr(adapter->pdev->irq, dev, NULL);
2213 enable_irq(adapter->pdev->irq);
2214}
2215#endif
2216
2217/* ixgb_main.c */