2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * Combiner irqchip for EXYNOS
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/irqdomain.h>
17 #include <linux/irqchip/chained_irq.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <asm/mach/irq.h>
22 #ifdef CONFIG_EXYNOS_ATAGS
28 #define COMBINER_ENABLE_SET 0x0
29 #define COMBINER_ENABLE_CLEAR 0x4
30 #define COMBINER_INT_STATUS 0xC
32 #define IRQ_IN_COMBINER 8
34 static DEFINE_SPINLOCK(irq_controller_lock
);
36 struct combiner_chip_data
{
37 unsigned int hwirq_offset
;
38 unsigned int irq_mask
;
40 unsigned int parent_irq
;
43 static struct irq_domain
*combiner_irq_domain
;
45 static inline void __iomem
*combiner_base(struct irq_data
*data
)
47 struct combiner_chip_data
*combiner_data
=
48 irq_data_get_irq_chip_data(data
);
50 return combiner_data
->base
;
53 static void combiner_mask_irq(struct irq_data
*data
)
55 u32 mask
= 1 << (data
->hwirq
% 32);
57 __raw_writel(mask
, combiner_base(data
) + COMBINER_ENABLE_CLEAR
);
60 static void combiner_unmask_irq(struct irq_data
*data
)
62 u32 mask
= 1 << (data
->hwirq
% 32);
64 __raw_writel(mask
, combiner_base(data
) + COMBINER_ENABLE_SET
);
67 static void combiner_handle_cascade_irq(unsigned int irq
, struct irq_desc
*desc
)
69 struct combiner_chip_data
*chip_data
= irq_get_handler_data(irq
);
70 struct irq_chip
*chip
= irq_get_chip(irq
);
71 unsigned int cascade_irq
, combiner_irq
;
74 chained_irq_enter(chip
, desc
);
76 spin_lock(&irq_controller_lock
);
77 status
= __raw_readl(chip_data
->base
+ COMBINER_INT_STATUS
);
78 spin_unlock(&irq_controller_lock
);
79 status
&= chip_data
->irq_mask
;
84 combiner_irq
= chip_data
->hwirq_offset
+ __ffs(status
);
85 cascade_irq
= irq_find_mapping(combiner_irq_domain
, combiner_irq
);
87 if (unlikely(!cascade_irq
))
88 do_bad_IRQ(irq
, desc
);
90 generic_handle_irq(cascade_irq
);
93 chained_irq_exit(chip
, desc
);
97 static int combiner_set_affinity(struct irq_data
*d
,
98 const struct cpumask
*mask_val
, bool force
)
100 struct combiner_chip_data
*chip_data
= irq_data_get_irq_chip_data(d
);
101 struct irq_chip
*chip
= irq_get_chip(chip_data
->parent_irq
);
102 struct irq_data
*data
= irq_get_irq_data(chip_data
->parent_irq
);
104 if (chip
&& chip
->irq_set_affinity
)
105 return chip
->irq_set_affinity(data
, mask_val
, force
);
111 static struct irq_chip combiner_chip
= {
113 .irq_mask
= combiner_mask_irq
,
114 .irq_unmask
= combiner_unmask_irq
,
116 .irq_set_affinity
= combiner_set_affinity
,
120 static void __init
combiner_cascade_irq(struct combiner_chip_data
*combiner_data
,
123 if (irq_set_handler_data(irq
, combiner_data
) != 0)
125 irq_set_chained_handler(irq
, combiner_handle_cascade_irq
);
128 static void __init
combiner_init_one(struct combiner_chip_data
*combiner_data
,
129 unsigned int combiner_nr
,
130 void __iomem
*base
, unsigned int irq
)
132 combiner_data
->base
= base
;
133 combiner_data
->hwirq_offset
= (combiner_nr
& ~3) * IRQ_IN_COMBINER
;
134 combiner_data
->irq_mask
= 0xff << ((combiner_nr
% 4) << 3);
135 combiner_data
->parent_irq
= irq
;
137 /* Disable all interrupts */
138 __raw_writel(combiner_data
->irq_mask
, base
+ COMBINER_ENABLE_CLEAR
);
142 static int combiner_irq_domain_xlate(struct irq_domain
*d
,
143 struct device_node
*controller
,
144 const u32
*intspec
, unsigned int intsize
,
145 unsigned long *out_hwirq
,
146 unsigned int *out_type
)
148 if (d
->of_node
!= controller
)
154 *out_hwirq
= intspec
[0] * IRQ_IN_COMBINER
+ intspec
[1];
160 static int combiner_irq_domain_xlate(struct irq_domain
*d
,
161 struct device_node
*controller
,
162 const u32
*intspec
, unsigned int intsize
,
163 unsigned long *out_hwirq
,
164 unsigned int *out_type
)
170 static int combiner_irq_domain_map(struct irq_domain
*d
, unsigned int irq
,
173 struct combiner_chip_data
*combiner_data
= d
->host_data
;
175 irq_set_chip_and_handler(irq
, &combiner_chip
, handle_level_irq
);
176 irq_set_chip_data(irq
, &combiner_data
[hw
>> 3]);
177 set_irq_flags(irq
, IRQF_VALID
| IRQF_PROBE
);
182 static struct irq_domain_ops combiner_irq_domain_ops
= {
183 .xlate
= combiner_irq_domain_xlate
,
184 .map
= combiner_irq_domain_map
,
187 static unsigned int combiner_lookup_irq(int group
)
189 #ifdef CONFIG_EXYNOS_ATAGS
190 if (group
< EXYNOS4210_MAX_COMBINER_NR
|| soc_is_exynos5250())
191 return IRQ_SPI(group
);
207 void __init
combiner_init(void __iomem
*combiner_base
,
208 struct device_node
*np
,
214 struct combiner_chip_data
*combiner_data
;
216 nr_irq
= max_nr
* IRQ_IN_COMBINER
;
218 combiner_data
= kcalloc(max_nr
, sizeof (*combiner_data
), GFP_KERNEL
);
219 if (!combiner_data
) {
220 pr_warning("%s: could not allocate combiner data\n", __func__
);
224 combiner_irq_domain
= irq_domain_add_simple(np
, nr_irq
, irq_base
,
225 &combiner_irq_domain_ops
, combiner_data
);
226 if (WARN_ON(!combiner_irq_domain
)) {
227 pr_warning("%s: irq domain init failed\n", __func__
);
231 for (i
= 0; i
< max_nr
; i
++) {
234 irq
= irq_of_parse_and_map(np
, i
);
237 irq
= combiner_lookup_irq(i
);
239 combiner_init_one(&combiner_data
[i
], i
,
240 combiner_base
+ (i
>> 2) * 0x10, irq
);
241 combiner_cascade_irq(&combiner_data
[i
], irq
);
246 static int __init
combiner_of_init(struct device_node
*np
,
247 struct device_node
*parent
)
249 void __iomem
*combiner_base
;
250 unsigned int max_nr
= 20;
253 combiner_base
= of_iomap(np
, 0);
254 if (!combiner_base
) {
255 pr_err("%s: failed to map combiner registers\n", __func__
);
259 if (of_property_read_u32(np
, "samsung,combiner-nr", &max_nr
)) {
260 pr_info("%s: number of combiners not specified, "
261 "setting default as %d.\n",
266 * FIXME: This is a hardwired COMBINER_IRQ(0,0). Once all devices
267 * get their IRQ from DT, remove this in order to get dynamic
272 combiner_init(combiner_base
, np
, max_nr
, irq_base
);
276 IRQCHIP_DECLARE(exynos4210_combiner
, "samsung,exynos4210-combiner",