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[SCSI] libsas: drop sata port multiplier infrastructure
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / mvsas / mv_sas.c
CommitLineData
b5762948 1/*
20b09c29
AY		 2 * Marvell 88SE64xx/88SE94xx main function
3 *
4 * Copyright 2007 Red Hat, Inc.
5 * Copyright 2008 Marvell. <kewei@marvell.com>
0b15fb1f 6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
20b09c29
AY		 7 *
8 * This file is licensed under GPLv2.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; version 2 of the
13 * License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
23 * USA
24*/
b5762948 25
dd4969a8 26#include "mv_sas.h"
b5762948 27
dd4969a8
JG		 28static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
29{
30 if (task->lldd_task) {
31 struct mvs_slot_info *slot;
f9da3be5 32 slot = task->lldd_task;
20b09c29 33 *tag = slot->slot_tag;
dd4969a8
JG		 34 return 1;
35 }
36 return 0;
37}
8f261aaf 38
20b09c29 39void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
dd4969a8 40{
b89e8f53 41 void *bitmap = mvi->tags;
dd4969a8
JG		 42 clear_bit(tag, bitmap);
43}
8f261aaf 44
20b09c29 45void mvs_tag_free(struct mvs_info *mvi, u32 tag)
dd4969a8
JG		 46{
47 mvs_tag_clear(mvi, tag);
48}
8f261aaf 49
20b09c29 50void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
dd4969a8 51{
b89e8f53 52 void *bitmap = mvi->tags;
dd4969a8
JG		 53 set_bit(tag, bitmap);
54}
8f261aaf 55
20b09c29 56inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
dd4969a8
JG		 57{
58 unsigned int index, tag;
b89e8f53 59 void *bitmap = mvi->tags;
b5762948 60
20b09c29 61 index = find_first_zero_bit(bitmap, mvi->tags_num);
dd4969a8 62 tag = index;
20b09c29 63 if (tag >= mvi->tags_num)
dd4969a8
JG		 64 return -SAS_QUEUE_FULL;
65 mvs_tag_set(mvi, tag);
66 *tag_out = tag;
67 return 0;
68}
b5762948 69
dd4969a8
JG		 70void mvs_tag_init(struct mvs_info *mvi)
71{
72 int i;
20b09c29 73 for (i = 0; i < mvi->tags_num; ++i)
dd4969a8
JG		 74 mvs_tag_clear(mvi, i);
75}
b5762948 76
20b09c29
AY		 77struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
78{
79 unsigned long i = 0, j = 0, hi = 0;
80 struct sas_ha_struct *sha = dev->port->ha;
81 struct mvs_info *mvi = NULL;
82 struct asd_sas_phy *phy;
83
84 while (sha->sas_port[i]) {
85 if (sha->sas_port[i] == dev->port) {
86 phy = container_of(sha->sas_port[i]->phy_list.next,
87 struct asd_sas_phy, port_phy_el);
88 j = 0;
89 while (sha->sas_phy[j]) {
90 if (sha->sas_phy[j] == phy)
91 break;
92 j++;
93 }
94 break;
95 }
96 i++;
97 }
98 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
99 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
8f261aaf 100
20b09c29 101 return mvi;
8f261aaf 102
20b09c29 103}
8f261aaf 104
20b09c29
AY		 105int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
106{
107 unsigned long i = 0, j = 0, n = 0, num = 0;
9870d9a2
AY		 108 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
109 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 110 struct sas_ha_struct *sha = dev->port->ha;
111
112 while (sha->sas_port[i]) {
113 if (sha->sas_port[i] == dev->port) {
114 struct asd_sas_phy *phy;
115 list_for_each_entry(phy,
116 &sha->sas_port[i]->phy_list, port_phy_el) {
117 j = 0;
118 while (sha->sas_phy[j]) {
119 if (sha->sas_phy[j] == phy)
120 break;
121 j++;
122 }
123 phyno[n] = (j >= mvi->chip->n_phy) ?
124 (j - mvi->chip->n_phy) : j;
125 num++;
126 n++;
dd4969a8 127 }
dd4969a8
JG		 128 break;
129 }
20b09c29
AY		 130 i++;
131 }
132 return num;
133}
134
534ff101
XY		 135struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
136 u8 reg_set)
137{
138 u32 dev_no;
139 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
140 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
141 continue;
142
143 if (mvi->devices[dev_no].taskfileset == reg_set)
144 return &mvi->devices[dev_no];
145 }
146 return NULL;
147}
148
20b09c29
AY		 149static inline void mvs_free_reg_set(struct mvs_info *mvi,
150 struct mvs_device *dev)
151{
152 if (!dev) {
153 mv_printk("device has been free.\n");
154 return;
155 }
20b09c29
AY		 156 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
157 return;
158 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
159}
160
161static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
162 struct mvs_device *dev)
163{
164 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
165 return 0;
166 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
167}
168
169void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
170{
171 u32 no;
172 for_each_phy(phy_mask, phy_mask, no) {
173 if (!(phy_mask & 1))
174 continue;
175 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
176 }
177}
178
20b09c29
AY		 179int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
180 void *funcdata)
181{
182 int rc = 0, phy_id = sas_phy->id;
183 u32 tmp, i = 0, hi;
184 struct sas_ha_struct *sha = sas_phy->ha;
185 struct mvs_info *mvi = NULL;
186
187 while (sha->sas_phy[i]) {
188 if (sha->sas_phy[i] == sas_phy)
189 break;
190 i++;
191 }
192 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
193 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
194
195 switch (func) {
196 case PHY_FUNC_SET_LINK_RATE:
197 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
198 break;
8f261aaf 199
dd4969a8 200 case PHY_FUNC_HARD_RESET:
20b09c29 201 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
dd4969a8
JG		 202 if (tmp & PHY_RST_HARD)
203 break;
a4632aae 204 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
dd4969a8 205 break;
b5762948 206
dd4969a8 207 case PHY_FUNC_LINK_RESET:
20b09c29 208 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
a4632aae 209 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
dd4969a8 210 break;
b5762948 211
dd4969a8 212 case PHY_FUNC_DISABLE:
20b09c29
AY		 213 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
214 break;
dd4969a8
JG		 215 case PHY_FUNC_RELEASE_SPINUP_HOLD:
216 default:
ac013ed1 217 rc = -ENOSYS;
b5762948 218 }
20b09c29 219 msleep(200);
b5762948
JG		 220 return rc;
221}
222
20b09c29
AY		 223void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id,
224 u32 off_lo, u32 off_hi, u64 sas_addr)
225{
226 u32 lo = (u32)sas_addr;
227 u32 hi = (u32)(sas_addr>>32);
228
229 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
230 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
231 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
232 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
233}
234
dd4969a8 235static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
ee1f1c2e 236{
dd4969a8 237 struct mvs_phy *phy = &mvi->phy[i];
20b09c29
AY		 238 struct asd_sas_phy *sas_phy = &phy->sas_phy;
239 struct sas_ha_struct *sas_ha;
dd4969a8
JG		 240 if (!phy->phy_attached)
241 return;
242
20b09c29
AY		 243 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
244 && phy->phy_type & PORT_TYPE_SAS) {
245 return;
246 }
247
248 sas_ha = mvi->sas;
249 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
250
dd4969a8
JG		 251 if (sas_phy->phy) {
252 struct sas_phy *sphy = sas_phy->phy;
253
254 sphy->negotiated_linkrate = sas_phy->linkrate;
255 sphy->minimum_linkrate = phy->minimum_linkrate;
256 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
257 sphy->maximum_linkrate = phy->maximum_linkrate;
20b09c29 258 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
ee1f1c2e 259 }
ee1f1c2e 260
dd4969a8
JG		 261 if (phy->phy_type & PORT_TYPE_SAS) {
262 struct sas_identify_frame *id;
b5762948 263
dd4969a8
JG		 264 id = (struct sas_identify_frame *)phy->frame_rcvd;
265 id->dev_type = phy->identify.device_type;
266 id->initiator_bits = SAS_PROTOCOL_ALL;
267 id->target_bits = phy->identify.target_port_protocols;
477f6d19
XY		 268
269 /* direct attached SAS device */
270 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
271 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
272 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
273 }
dd4969a8 274 } else if (phy->phy_type & PORT_TYPE_SATA) {
20b09c29 275 /*Nothing*/
dd4969a8 276 }
20b09c29
AY		 277 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
278
279 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
280
281 mvi->sas->notify_port_event(sas_phy,
dd4969a8 282 PORTE_BYTES_DMAED);
ee1f1c2e
KW		 283}
284
dd4969a8 285void mvs_scan_start(struct Scsi_Host *shost)
b5762948 286{
20b09c29
AY		 287 int i, j;
288 unsigned short core_nr;
289 struct mvs_info *mvi;
290 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
84fbd0ce 291 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
20b09c29
AY		 292
293 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
dd4969a8 294
20b09c29
AY		 295 for (j = 0; j < core_nr; j++) {
296 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
297 for (i = 0; i < mvi->chip->n_phy; ++i)
298 mvs_bytes_dmaed(mvi, i);
dd4969a8 299 }
84fbd0ce 300 mvs_prv->scan_finished = 1;
b5762948
JG		 301}
302
dd4969a8 303int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
b5762948 304{
84fbd0ce
XY		 305 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
306 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
307
308 if (mvs_prv->scan_finished == 0)
dd4969a8 309 return 0;
84fbd0ce 310
b1124cd3 311 sas_drain_work(sha);
dd4969a8 312 return 1;
b5762948
JG		 313}
314
dd4969a8
JG		 315static int mvs_task_prep_smp(struct mvs_info *mvi,
316 struct mvs_task_exec_info *tei)
b5762948 317{
dd4969a8
JG		 318 int elem, rc, i;
319 struct sas_task *task = tei->task;
320 struct mvs_cmd_hdr *hdr = tei->hdr;
20b09c29
AY		 321 struct domain_device *dev = task->dev;
322 struct asd_sas_port *sas_port = dev->port;
dd4969a8
JG		 323 struct scatterlist *sg_req, *sg_resp;
324 u32 req_len, resp_len, tag = tei->tag;
325 void *buf_tmp;
326 u8 *buf_oaf;
327 dma_addr_t buf_tmp_dma;
20b09c29 328 void *buf_prd;
dd4969a8 329 struct mvs_slot_info *slot = &mvi->slot_info[tag];
dd4969a8 330 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
b89e8f53 331
dd4969a8
JG		 332 /*
333 * DMA-map SMP request, response buffers
334 */
335 sg_req = &task->smp_task.smp_req;
20b09c29 336 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE);
dd4969a8
JG		 337 if (!elem)
338 return -ENOMEM;
339 req_len = sg_dma_len(sg_req);
b5762948 340
dd4969a8 341 sg_resp = &task->smp_task.smp_resp;
20b09c29 342 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
dd4969a8
JG		 343 if (!elem) {
344 rc = -ENOMEM;
345 goto err_out;
346 }
20b09c29 347 resp_len = SB_RFB_MAX;
b5762948 348
dd4969a8
JG		 349 /* must be in dwords */
350 if ((req_len & 0x3) || (resp_len & 0x3)) {
351 rc = -EINVAL;
352 goto err_out_2;
b5762948
JG		 353 }
354
dd4969a8
JG		 355 /*
356 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
357 */
b5762948 358
20b09c29 359 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
dd4969a8
JG		 360 buf_tmp = slot->buf;
361 buf_tmp_dma = slot->buf_dma;
b5762948 362
dd4969a8 363 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
b5762948 364
dd4969a8
JG		 365 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
366 buf_oaf = buf_tmp;
367 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
b5762948 368
dd4969a8
JG		 369 buf_tmp += MVS_OAF_SZ;
370 buf_tmp_dma += MVS_OAF_SZ;
b5762948 371
20b09c29 372 /* region 3: PRD table *********************************** */
dd4969a8
JG		 373 buf_prd = buf_tmp;
374 if (tei->n_elem)
375 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
376 else
377 hdr->prd_tbl = 0;
b5762948 378
20b09c29 379 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
dd4969a8
JG		 380 buf_tmp += i;
381 buf_tmp_dma += i;
b5762948 382
dd4969a8
JG		 383 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
384 slot->response = buf_tmp;
385 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 386 if (mvi->flags & MVF_FLAG_SOC)
387 hdr->reserved[0] = 0;
b5762948 388
dd4969a8
JG		 389 /*
390 * Fill in TX ring and command slot header
391 */
392 slot->tx = mvi->tx_prod;
393 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
394 TXQ_MODE_I | tag |
395 (sas_port->phy_mask << TXQ_PHY_SHIFT));
b5762948 396
dd4969a8
JG		 397 hdr->flags |= flags;
398 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
399 hdr->tags = cpu_to_le32(tag);
400 hdr->data_len = 0;
b5762948 401
dd4969a8 402 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 403 /* initiator, SMP, ftype 1h */
404 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
6ceae7c6 405 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
dd4969a8 406 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
20b09c29 407 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
dd4969a8
JG		 408
409 /* fill in PRD (scatter/gather) table, if any */
20b09c29 410 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
b5762948
JG		 411
412 return 0;
413
dd4969a8 414err_out_2:
20b09c29 415 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
dd4969a8 416 PCI_DMA_FROMDEVICE);
b5762948 417err_out:
20b09c29 418 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
dd4969a8 419 PCI_DMA_TODEVICE);
8f261aaf 420 return rc;
8f261aaf
KW		 421}
422
dd4969a8 423static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
8f261aaf 424{
dd4969a8 425 struct ata_queued_cmd *qc = task->uldd_task;
8f261aaf 426
dd4969a8
JG		 427 if (qc) {
428 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
429 qc->tf.command == ATA_CMD_FPDMA_READ) {
430 *tag = qc->tag;
431 return 1;
432 }
8f261aaf 433 }
8f261aaf 434
dd4969a8 435 return 0;
8f261aaf
KW		 436}
437
dd4969a8
JG		 438static int mvs_task_prep_ata(struct mvs_info *mvi,
439 struct mvs_task_exec_info *tei)
b5762948
JG		 440{
441 struct sas_task *task = tei->task;
442 struct domain_device *dev = task->dev;
f9da3be5 443 struct mvs_device *mvi_dev = dev->lldd_dev;
b5762948
JG		 444 struct mvs_cmd_hdr *hdr = tei->hdr;
445 struct asd_sas_port *sas_port = dev->port;
8f261aaf 446 struct mvs_slot_info *slot;
20b09c29
AY		 447 void *buf_prd;
448 u32 tag = tei->tag, hdr_tag;
449 u32 flags, del_q;
b5762948
JG		 450 void *buf_tmp;
451 u8 *buf_cmd, *buf_oaf;
452 dma_addr_t buf_tmp_dma;
8f261aaf
KW		 453 u32 i, req_len, resp_len;
454 const u32 max_resp_len = SB_RFB_MAX;
455
20b09c29
AY		 456 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
457 mv_dprintk("Have not enough regiset for dev %d.\n",
458 mvi_dev->device_id);
8f261aaf 459 return -EBUSY;
20b09c29 460 }
8f261aaf
KW		 461 slot = &mvi->slot_info[tag];
462 slot->tx = mvi->tx_prod;
20b09c29
AY		 463 del_q = TXQ_MODE_I | tag |
464 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
465 (sas_port->phy_mask << TXQ_PHY_SHIFT) |
466 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
467 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
468
20b09c29
AY		 469 if (task->data_dir == DMA_FROM_DEVICE)
470 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
471 else
472 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
8882f081 473
b5762948
JG		 474 if (task->ata_task.use_ncq)
475 flags |= MCH_FPDMA;
8f261aaf
KW		 476 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) {
477 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
478 flags |= MCH_ATAPI;
479 }
480
b5762948 481 hdr->flags = cpu_to_le32(flags);
8f261aaf 482
20b09c29
AY		 483 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
484 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
4e52fc0a 485 else
20b09c29
AY		 486 hdr_tag = tag;
487
488 hdr->tags = cpu_to_le32(hdr_tag);
489
b5762948
JG		 490 hdr->data_len = cpu_to_le32(task->total_xfer_len);
491
492 /*
493 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
494 */
b5762948 495
8f261aaf
KW		 496 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
497 buf_cmd = buf_tmp = slot->buf;
b5762948
JG		 498 buf_tmp_dma = slot->buf_dma;
499
500 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
501
502 buf_tmp += MVS_ATA_CMD_SZ;
503 buf_tmp_dma += MVS_ATA_CMD_SZ;
504
8f261aaf 505 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
b5762948
JG		 506 /* used for STP. unused for SATA? */
507 buf_oaf = buf_tmp;
508 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
509
510 buf_tmp += MVS_OAF_SZ;
511 buf_tmp_dma += MVS_OAF_SZ;
512
8f261aaf 513 /* region 3: PRD table ********************************************* */
b5762948 514 buf_prd = buf_tmp;
20b09c29 515
8f261aaf
KW		 516 if (tei->n_elem)
517 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
518 else
519 hdr->prd_tbl = 0;
20b09c29 520 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
b5762948 521
b5762948
JG		 522 buf_tmp += i;
523 buf_tmp_dma += i;
524
8f261aaf 525 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
b5762948
JG		 526 slot->response = buf_tmp;
527 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 528 if (mvi->flags & MVF_FLAG_SOC)
529 hdr->reserved[0] = 0;
b5762948 530
8f261aaf 531 req_len = sizeof(struct host_to_dev_fis);
b5762948 532 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
8f261aaf 533 sizeof(struct mvs_err_info) - i;
b5762948
JG		 534
535 /* request, response lengths */
8f261aaf 536 resp_len = min(resp_len, max_resp_len);
b5762948
JG		 537 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
538
20b09c29
AY		 539 if (likely(!task->ata_task.device_control_reg_update))
540 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
b5762948 541 /* fill in command FIS and ATAPI CDB */
8f261aaf
KW		 542 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
543 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET)
544 memcpy(buf_cmd + STP_ATAPI_CMD,
545 task->ata_task.atapi_packet, 16);
546
547 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 548 /* initiator, STP, ftype 1h */
549 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
6ceae7c6 550 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
20b09c29
AY		 551 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
552 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
b5762948
JG		 553
554 /* fill in PRD (scatter/gather) table, if any */
20b09c29 555 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
8882f081 556
20b09c29 557 if (task->data_dir == DMA_FROM_DEVICE)
8882f081 558 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
20b09c29 559 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
8882f081 560
b5762948
JG		 561 return 0;
562}
563
564static int mvs_task_prep_ssp(struct mvs_info *mvi,
20b09c29
AY		 565 struct mvs_task_exec_info *tei, int is_tmf,
566 struct mvs_tmf_task *tmf)
b5762948
JG		 567{
568 struct sas_task *task = tei->task;
b5762948 569 struct mvs_cmd_hdr *hdr = tei->hdr;
8f261aaf 570 struct mvs_port *port = tei->port;
20b09c29 571 struct domain_device *dev = task->dev;
f9da3be5 572 struct mvs_device *mvi_dev = dev->lldd_dev;
20b09c29 573 struct asd_sas_port *sas_port = dev->port;
b5762948 574 struct mvs_slot_info *slot;
20b09c29 575 void *buf_prd;
b5762948
JG		 576 struct ssp_frame_hdr *ssp_hdr;
577 void *buf_tmp;
578 u8 *buf_cmd, *buf_oaf, fburst = 0;
579 dma_addr_t buf_tmp_dma;
580 u32 flags;
8f261aaf
KW		 581 u32 resp_len, req_len, i, tag = tei->tag;
582 const u32 max_resp_len = SB_RFB_MAX;
20b09c29 583 u32 phy_mask;
b5762948
JG		 584
585 slot = &mvi->slot_info[tag];
586
20b09c29
AY		 587 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
588 sas_port->phy_mask) & TXQ_PHY_MASK;
589
8f261aaf
KW		 590 slot->tx = mvi->tx_prod;
591 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
592 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
4e52fc0a 593 (phy_mask << TXQ_PHY_SHIFT));
b5762948
JG		 594
595 flags = MCH_RETRY;
596 if (task->ssp_task.enable_first_burst) {
597 flags |= MCH_FBURST;
598 fburst = (1 << 7);
599 }
2b288133
AY		 600 if (is_tmf)
601 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
84fbd0ce
XY		 602 else
603 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
604
2b288133 605 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
b5762948
JG		 606 hdr->tags = cpu_to_le32(tag);
607 hdr->data_len = cpu_to_le32(task->total_xfer_len);
608
609 /*
610 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
611 */
b5762948 612
8f261aaf
KW		 613 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
614 buf_cmd = buf_tmp = slot->buf;
b5762948
JG		 615 buf_tmp_dma = slot->buf_dma;
616
617 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
618
619 buf_tmp += MVS_SSP_CMD_SZ;
620 buf_tmp_dma += MVS_SSP_CMD_SZ;
621
8f261aaf 622 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
b5762948
JG		 623 buf_oaf = buf_tmp;
624 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
625
626 buf_tmp += MVS_OAF_SZ;
627 buf_tmp_dma += MVS_OAF_SZ;
628
8f261aaf 629 /* region 3: PRD table ********************************************* */
b5762948 630 buf_prd = buf_tmp;
8f261aaf
KW		 631 if (tei->n_elem)
632 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
633 else
634 hdr->prd_tbl = 0;
b5762948 635
20b09c29 636 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
b5762948
JG		 637 buf_tmp += i;
638 buf_tmp_dma += i;
639
8f261aaf 640 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
b5762948
JG		 641 slot->response = buf_tmp;
642 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 643 if (mvi->flags & MVF_FLAG_SOC)
644 hdr->reserved[0] = 0;
b5762948 645
b5762948 646 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
8f261aaf
KW		 647 sizeof(struct mvs_err_info) - i;
648 resp_len = min(resp_len, max_resp_len);
649
650 req_len = sizeof(struct ssp_frame_hdr) + 28;
b5762948
JG		 651
652 /* request, response lengths */
653 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
654
655 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 656 /* initiator, SSP, ftype 1h */
657 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
6ceae7c6 658 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
20b09c29
AY		 659 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
660 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
b5762948 661
8f261aaf
KW		 662 /* fill in SSP frame header (Command Table.SSP frame header) */
663 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
20b09c29
AY		 664
665 if (is_tmf)
666 ssp_hdr->frame_type = SSP_TASK;
667 else
668 ssp_hdr->frame_type = SSP_COMMAND;
669
670 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
b5762948
JG		 671 HASHED_SAS_ADDR_SIZE);
672 memcpy(ssp_hdr->hashed_src_addr,
20b09c29 673 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
b5762948
JG		 674 ssp_hdr->tag = cpu_to_be16(tag);
675
20b09c29 676 /* fill in IU for TASK and Command Frame */
b5762948
JG		 677 buf_cmd += sizeof(*ssp_hdr);
678 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
b5762948 679
20b09c29
AY		 680 if (ssp_hdr->frame_type != SSP_TASK) {
681 buf_cmd[9] = fburst | task->ssp_task.task_attr |
682 (task->ssp_task.task_prio << 3);
683 memcpy(buf_cmd + 12, &task->ssp_task.cdb, 16);
684 } else{
685 buf_cmd[10] = tmf->tmf;
686 switch (tmf->tmf) {
687 case TMF_ABORT_TASK:
688 case TMF_QUERY_TASK:
689 buf_cmd[12] =
690 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
691 buf_cmd[13] =
692 tmf->tag_of_task_to_be_managed & 0xff;
693 break;
694 default:
695 break;
696 }
b5762948 697 }
20b09c29
AY		 698 /* fill in PRD (scatter/gather) table, if any */
699 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
b5762948
JG		 700 return 0;
701}
702
20b09c29 703#define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == NO_DEVICE)))
0b15fb1f
XY		 704static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
705 struct mvs_tmf_task *tmf, int *pass)
b5762948 706{
8f261aaf 707 struct domain_device *dev = task->dev;
0b15fb1f 708 struct mvs_device *mvi_dev = dev->lldd_dev;
b5762948 709 struct mvs_task_exec_info tei;
4e52fc0a 710 struct mvs_slot_info *slot;
0b15fb1f
XY		 711 u32 tag = 0xdeadbeef, n_elem = 0;
712 int rc = 0;
b5762948 713
20b09c29 714 if (!dev->port) {
0b15fb1f 715 struct task_status_struct *tsm = &task->task_status;
20b09c29
AY		 716
717 tsm->resp = SAS_TASK_UNDELIVERED;
718 tsm->stat = SAS_PHY_DOWN;
0b15fb1f
XY		 719 /*
720 * libsas will use dev->port, should
721 * not call task_done for sata
722 */
9dc9fd94 723 if (dev->dev_type != SATA_DEV)
0b15fb1f
XY		 724 task->task_done(task);
725 return rc;
20b09c29
AY		 726 }
727
0b15fb1f
XY		 728 if (DEV_IS_GONE(mvi_dev)) {
729 if (mvi_dev)
730 mv_dprintk("device %d not ready.\n",
731 mvi_dev->device_id);
732 else
733 mv_dprintk("device %016llx not ready.\n",
734 SAS_ADDR(dev->sas_addr));
20b09c29
AY		 735
736 rc = SAS_PHY_DOWN;
0b15fb1f
XY		 737 return rc;
738 }
739 tei.port = dev->port->lldd_port;
740 if (tei.port && !tei.port->port_attached && !tmf) {
741 if (sas_protocol_ata(task->task_proto)) {
742 struct task_status_struct *ts = &task->task_status;
743 mv_dprintk("SATA/STP port %d does not attach"
744 "device.\n", dev->port->id);
745 ts->resp = SAS_TASK_COMPLETE;
746 ts->stat = SAS_PHY_DOWN;
20b09c29 747
0b15fb1f 748 task->task_done(task);
dd4969a8 749
dd4969a8 750 } else {
0b15fb1f
XY		 751 struct task_status_struct *ts = &task->task_status;
752 mv_dprintk("SAS port %d does not attach"
753 "device.\n", dev->port->id);
754 ts->resp = SAS_TASK_UNDELIVERED;
755 ts->stat = SAS_PHY_DOWN;
756 task->task_done(task);
dd4969a8 757 }
0b15fb1f
XY		 758 return rc;
759 }
dd4969a8 760
0b15fb1f
XY		 761 if (!sas_protocol_ata(task->task_proto)) {
762 if (task->num_scatter) {
763 n_elem = dma_map_sg(mvi->dev,
764 task->scatter,
765 task->num_scatter,
766 task->data_dir);
767 if (!n_elem) {
768 rc = -ENOMEM;
769 goto prep_out;
770 }
771 }
772 } else {
773 n_elem = task->num_scatter;
774 }
20b09c29 775
0b15fb1f
XY		 776 rc = mvs_tag_alloc(mvi, &tag);
777 if (rc)
778 goto err_out;
20b09c29 779
0b15fb1f 780 slot = &mvi->slot_info[tag];
20b09c29 781
0b15fb1f
XY		 782 task->lldd_task = NULL;
783 slot->n_elem = n_elem;
784 slot->slot_tag = tag;
785
786 slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
787 if (!slot->buf)
788 goto err_out_tag;
789 memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
790
791 tei.task = task;
792 tei.hdr = &mvi->slot[tag];
793 tei.tag = tag;
794 tei.n_elem = n_elem;
795 switch (task->task_proto) {
796 case SAS_PROTOCOL_SMP:
797 rc = mvs_task_prep_smp(mvi, &tei);
798 break;
799 case SAS_PROTOCOL_SSP:
800 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
801 break;
802 case SAS_PROTOCOL_SATA:
803 case SAS_PROTOCOL_STP:
804 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
805 rc = mvs_task_prep_ata(mvi, &tei);
806 break;
807 default:
808 dev_printk(KERN_ERR, mvi->dev,
809 "unknown sas_task proto: 0x%x\n",
810 task->task_proto);
811 rc = -EINVAL;
812 break;
813 }
dd4969a8 814
0b15fb1f
XY		 815 if (rc) {
816 mv_dprintk("rc is %x\n", rc);
817 goto err_out_slot_buf;
818 }
819 slot->task = task;
820 slot->port = tei.port;
821 task->lldd_task = slot;
822 list_add_tail(&slot->entry, &tei.port->list);
823 spin_lock(&task->task_state_lock);
824 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
825 spin_unlock(&task->task_state_lock);
826
0b15fb1f
XY		 827 mvi_dev->running_req++;
828 ++(*pass);
829 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
9dc9fd94 830
0b15fb1f 831 return rc;
dd4969a8 832
0b15fb1f
XY		 833err_out_slot_buf:
834 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
dd4969a8
JG		 835err_out_tag:
836 mvs_tag_free(mvi, tag);
837err_out:
20b09c29 838
0b15fb1f
XY		 839 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
840 if (!sas_protocol_ata(task->task_proto))
dd4969a8 841 if (n_elem)
0b15fb1f
XY		 842 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
843 task->data_dir);
844prep_out:
845 return rc;
846}
847
848static struct mvs_task_list *mvs_task_alloc_list(int *num, gfp_t gfp_flags)
849{
850 struct mvs_task_list *first = NULL;
851
852 for (; *num > 0; --*num) {
853 struct mvs_task_list *mvs_list = kmem_cache_zalloc(mvs_task_list_cache, gfp_flags);
854
855 if (!mvs_list)
856 break;
857
858 INIT_LIST_HEAD(&mvs_list->list);
859 if (!first)
860 first = mvs_list;
861 else
862 list_add_tail(&mvs_list->list, &first->list);
863
864 }
865
866 return first;
867}
868
869static inline void mvs_task_free_list(struct mvs_task_list *mvs_list)
870{
871 LIST_HEAD(list);
872 struct list_head *pos, *a;
873 struct mvs_task_list *mlist = NULL;
874
875 __list_add(&list, mvs_list->list.prev, &mvs_list->list);
876
877 list_for_each_safe(pos, a, &list) {
878 list_del_init(pos);
879 mlist = list_entry(pos, struct mvs_task_list, list);
880 kmem_cache_free(mvs_task_list_cache, mlist);
881 }
882}
883
884static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
885 struct completion *completion, int is_tmf,
886 struct mvs_tmf_task *tmf)
887{
888 struct domain_device *dev = task->dev;
889 struct mvs_info *mvi = NULL;
890 u32 rc = 0;
891 u32 pass = 0;
892 unsigned long flags = 0;
893
894 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
895
0b15fb1f
XY		 896 spin_lock_irqsave(&mvi->lock, flags);
897 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
898 if (rc)
899 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
900
901 if (likely(pass))
902 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
903 (MVS_CHIP_SLOT_SZ - 1));
0b84b709 904 spin_unlock_irqrestore(&mvi->lock, flags);
0b15fb1f 905
0b15fb1f
XY		 906 return rc;
907}
908
909static int mvs_collector_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
910 struct completion *completion, int is_tmf,
911 struct mvs_tmf_task *tmf)
912{
913 struct domain_device *dev = task->dev;
914 struct mvs_prv_info *mpi = dev->port->ha->lldd_ha;
915 struct mvs_info *mvi = NULL;
916 struct sas_task *t = task;
917 struct mvs_task_list *mvs_list = NULL, *a;
918 LIST_HEAD(q);
919 int pass[2] = {0};
920 u32 rc = 0;
921 u32 n = num;
922 unsigned long flags = 0;
923
924 mvs_list = mvs_task_alloc_list(&n, gfp_flags);
925 if (n) {
926 printk(KERN_ERR "%s: mvs alloc list failed.\n", __func__);
927 rc = -ENOMEM;
928 goto free_list;
929 }
930
931 __list_add(&q, mvs_list->list.prev, &mvs_list->list);
932
933 list_for_each_entry(a, &q, list) {
934 a->task = t;
935 t = list_entry(t->list.next, struct sas_task, list);
936 }
937
938 list_for_each_entry(a, &q , list) {
939
940 t = a->task;
941 mvi = ((struct mvs_device *)t->dev->lldd_dev)->mvi_info;
942
943 spin_lock_irqsave(&mvi->lock, flags);
944 rc = mvs_task_prep(t, mvi, is_tmf, tmf, &pass[mvi->id]);
945 if (rc)
946 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
947 spin_unlock_irqrestore(&mvi->lock, flags);
948 }
949
950 if (likely(pass[0]))
951 MVS_CHIP_DISP->start_delivery(mpi->mvi[0],
952 (mpi->mvi[0]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
953
954 if (likely(pass[1]))
955 MVS_CHIP_DISP->start_delivery(mpi->mvi[1],
956 (mpi->mvi[1]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
957
958 list_del_init(&q);
959
960free_list:
961 if (mvs_list)
962 mvs_task_free_list(mvs_list);
963
dd4969a8
JG		 964 return rc;
965}
966
20b09c29
AY		 967int mvs_queue_command(struct sas_task *task, const int num,
968 gfp_t gfp_flags)
969{
0b15fb1f
XY		 970 struct mvs_device *mvi_dev = task->dev->lldd_dev;
971 struct sas_ha_struct *sas = mvi_dev->mvi_info->sas;
972
973 if (sas->lldd_max_execute_num < 2)
974 return mvs_task_exec(task, num, gfp_flags, NULL, 0, NULL);
975 else
976 return mvs_collector_task_exec(task, num, gfp_flags, NULL, 0, NULL);
20b09c29
AY		 977}
978
dd4969a8
JG		 979static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
980{
981 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
982 mvs_tag_clear(mvi, slot_idx);
983}
984
985static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
986 struct mvs_slot_info *slot, u32 slot_idx)
987{
20b09c29
AY		 988 if (!slot->task)
989 return;
dd4969a8
JG		 990 if (!sas_protocol_ata(task->task_proto))
991 if (slot->n_elem)
20b09c29 992 dma_unmap_sg(mvi->dev, task->scatter,
dd4969a8
JG		 993 slot->n_elem, task->data_dir);
994
995 switch (task->task_proto) {
996 case SAS_PROTOCOL_SMP:
20b09c29 997 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
dd4969a8 998 PCI_DMA_FROMDEVICE);
20b09c29 999 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
dd4969a8
JG		 1000 PCI_DMA_TODEVICE);
1001 break;
1002
1003 case SAS_PROTOCOL_SATA:
1004 case SAS_PROTOCOL_STP:
1005 case SAS_PROTOCOL_SSP:
1006 default:
1007 /* do nothing */
1008 break;
1009 }
0b15fb1f
XY		 1010
1011 if (slot->buf) {
1012 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
1013 slot->buf = NULL;
1014 }
20b09c29 1015 list_del_init(&slot->entry);
dd4969a8
JG		 1016 task->lldd_task = NULL;
1017 slot->task = NULL;
1018 slot->port = NULL;
20b09c29
AY		 1019 slot->slot_tag = 0xFFFFFFFF;
1020 mvs_slot_free(mvi, slot_idx);
dd4969a8
JG		 1021}
1022
84fbd0ce 1023static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
dd4969a8 1024{
84fbd0ce 1025 struct mvs_phy *phy = &mvi->phy[phy_no];
dd4969a8
JG		 1026 struct mvs_port *port = phy->port;
1027 int j, no;
1028
20b09c29
AY		 1029 for_each_phy(port->wide_port_phymap, j, no) {
1030 if (j & 1) {
1031 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1032 PHYR_WIDE_PORT);
1033 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
dd4969a8
JG		 1034 port->wide_port_phymap);
1035 } else {
20b09c29
AY		 1036 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1037 PHYR_WIDE_PORT);
1038 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1039 0);
dd4969a8 1040 }
20b09c29 1041 }
dd4969a8
JG		 1042}
1043
1044static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
1045{
1046 u32 tmp;
1047 struct mvs_phy *phy = &mvi->phy[i];
20b09c29 1048 struct mvs_port *port = phy->port;
dd4969a8 1049
20b09c29 1050 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
dd4969a8
JG		 1051 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
1052 if (!port)
1053 phy->phy_attached = 1;
1054 return tmp;
1055 }
1056
1057 if (port) {
1058 if (phy->phy_type & PORT_TYPE_SAS) {
1059 port->wide_port_phymap &= ~(1U << i);
1060 if (!port->wide_port_phymap)
1061 port->port_attached = 0;
1062 mvs_update_wideport(mvi, i);
1063 } else if (phy->phy_type & PORT_TYPE_SATA)
1064 port->port_attached = 0;
dd4969a8
JG		 1065 phy->port = NULL;
1066 phy->phy_attached = 0;
1067 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
1068 }
1069 return 0;
1070}
1071
1072static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
1073{
1074 u32 *s = (u32 *) buf;
1075
1076 if (!s)
1077 return NULL;
1078
20b09c29 1079 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
84fbd0ce 1080 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 1081
20b09c29 1082 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
84fbd0ce 1083 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 1084
20b09c29 1085 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
84fbd0ce 1086 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 1087
20b09c29 1088 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
84fbd0ce 1089 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
20b09c29 1090
20b09c29
AY		 1091 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
1092 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
dd4969a8 1093
f9da3be5 1094 return s;
dd4969a8
JG		 1095}
1096
1097static u32 mvs_is_sig_fis_received(u32 irq_status)
1098{
1099 return irq_status & PHYEV_SIG_FIS;
1100}
1101
8882f081
XY		 1102static void mvs_sig_remove_timer(struct mvs_phy *phy)
1103{
1104 if (phy->timer.function)
1105 del_timer(&phy->timer);
1106 phy->timer.function = NULL;
1107}
1108
20b09c29 1109void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
dd4969a8
JG		 1110{
1111 struct mvs_phy *phy = &mvi->phy[i];
20b09c29 1112 struct sas_identify_frame *id;
b5762948 1113
20b09c29 1114 id = (struct sas_identify_frame *)phy->frame_rcvd;
b5762948 1115
dd4969a8 1116 if (get_st) {
20b09c29 1117 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
dd4969a8
JG		 1118 phy->phy_status = mvs_is_phy_ready(mvi, i);
1119 }
8f261aaf 1120
dd4969a8 1121 if (phy->phy_status) {
20b09c29
AY		 1122 int oob_done = 0;
1123 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
b5762948 1124
20b09c29
AY		 1125 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1126
1127 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1128 if (phy->phy_type & PORT_TYPE_SATA) {
1129 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1130 if (mvs_is_sig_fis_received(phy->irq_status)) {
8882f081 1131 mvs_sig_remove_timer(phy);
20b09c29
AY		 1132 phy->phy_attached = 1;
1133 phy->att_dev_sas_addr =
1134 i + mvi->id * mvi->chip->n_phy;
1135 if (oob_done)
1136 sas_phy->oob_mode = SATA_OOB_MODE;
1137 phy->frame_rcvd_size =
1138 sizeof(struct dev_to_host_fis);
f9da3be5 1139 mvs_get_d2h_reg(mvi, i, id);
20b09c29
AY		 1140 } else {
1141 u32 tmp;
1142 dev_printk(KERN_DEBUG, mvi->dev,
1143 "Phy%d : No sig fis\n", i);
1144 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1145 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1146 tmp | PHYEV_SIG_FIS);
1147 phy->phy_attached = 0;
1148 phy->phy_type &= ~PORT_TYPE_SATA;
20b09c29
AY		 1149 goto out_done;
1150 }
9dc9fd94 1151 } else if (phy->phy_type & PORT_TYPE_SAS
20b09c29
AY		 1152 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1153 phy->phy_attached = 1;
dd4969a8 1154 phy->identify.device_type =
20b09c29 1155 phy->att_dev_info & PORT_DEV_TYPE_MASK;
b5762948 1156
dd4969a8
JG		 1157 if (phy->identify.device_type == SAS_END_DEV)
1158 phy->identify.target_port_protocols =
1159 SAS_PROTOCOL_SSP;
1160 else if (phy->identify.device_type != NO_DEVICE)
1161 phy->identify.target_port_protocols =
1162 SAS_PROTOCOL_SMP;
20b09c29 1163 if (oob_done)
dd4969a8
JG		 1164 sas_phy->oob_mode = SAS_OOB_MODE;
1165 phy->frame_rcvd_size =
1166 sizeof(struct sas_identify_frame);
dd4969a8 1167 }
20b09c29
AY		 1168 memcpy(sas_phy->attached_sas_addr,
1169 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
b5762948 1170
20b09c29
AY		 1171 if (MVS_CHIP_DISP->phy_work_around)
1172 MVS_CHIP_DISP->phy_work_around(mvi, i);
dd4969a8 1173 }
84fbd0ce 1174 mv_dprintk("phy %d attach dev info is %x\n",
20b09c29 1175 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
84fbd0ce 1176 mv_dprintk("phy %d attach sas addr is %llx\n",
20b09c29 1177 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
4e52fc0a 1178out_done:
dd4969a8 1179 if (get_st)
20b09c29 1180 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
b5762948
JG		 1181}
1182
20b09c29 1183static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
8f261aaf 1184{
dd4969a8 1185 struct sas_ha_struct *sas_ha = sas_phy->ha;
20b09c29 1186 struct mvs_info *mvi = NULL; int i = 0, hi;
dd4969a8 1187 struct mvs_phy *phy = sas_phy->lldd_phy;
20b09c29
AY		 1188 struct asd_sas_port *sas_port = sas_phy->port;
1189 struct mvs_port *port;
1190 unsigned long flags = 0;
1191 if (!sas_port)
1192 return;
8f261aaf 1193
20b09c29
AY		 1194 while (sas_ha->sas_phy[i]) {
1195 if (sas_ha->sas_phy[i] == sas_phy)
1196 break;
1197 i++;
1198 }
1199 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1200 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
84fbd0ce
XY		 1201 if (i >= mvi->chip->n_phy)
1202 port = &mvi->port[i - mvi->chip->n_phy];
20b09c29 1203 else
84fbd0ce 1204 port = &mvi->port[i];
20b09c29
AY		 1205 if (lock)
1206 spin_lock_irqsave(&mvi->lock, flags);
dd4969a8
JG		 1207 port->port_attached = 1;
1208 phy->port = port;
0b15fb1f 1209 sas_port->lldd_port = port;
dd4969a8
JG		 1210 if (phy->phy_type & PORT_TYPE_SAS) {
1211 port->wide_port_phymap = sas_port->phy_mask;
20b09c29 1212 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
dd4969a8 1213 mvs_update_wideport(mvi, sas_phy->id);
477f6d19
XY		 1214
1215 /* direct attached SAS device */
1216 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1217 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1218 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1219 }
8f261aaf 1220 }
20b09c29
AY		 1221 if (lock)
1222 spin_unlock_irqrestore(&mvi->lock, flags);
dd4969a8
JG		 1223}
1224
20b09c29 1225static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
dd4969a8 1226{
9dc9fd94
S		 1227 struct domain_device *dev;
1228 struct mvs_phy *phy = sas_phy->lldd_phy;
1229 struct mvs_info *mvi = phy->mvi;
1230 struct asd_sas_port *port = sas_phy->port;
1231 int phy_no = 0;
1232
1233 while (phy != &mvi->phy[phy_no]) {
1234 phy_no++;
1235 if (phy_no >= MVS_MAX_PHYS)
1236 return;
1237 }
1238 list_for_each_entry(dev, &port->dev_list, dev_list_node)
84fbd0ce 1239 mvs_do_release_task(phy->mvi, phy_no, dev);
9dc9fd94 1240
dd4969a8
JG		 1241}
1242
dd4969a8 1243
20b09c29
AY		 1244void mvs_port_formed(struct asd_sas_phy *sas_phy)
1245{
1246 mvs_port_notify_formed(sas_phy, 1);
dd4969a8
JG		 1247}
1248
20b09c29 1249void mvs_port_deformed(struct asd_sas_phy *sas_phy)
dd4969a8 1250{
20b09c29
AY		 1251 mvs_port_notify_deformed(sas_phy, 1);
1252}
8f261aaf 1253
20b09c29
AY		 1254struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1255{
1256 u32 dev;
1257 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1258 if (mvi->devices[dev].dev_type == NO_DEVICE) {
1259 mvi->devices[dev].device_id = dev;
1260 return &mvi->devices[dev];
1261 }
8f261aaf 1262 }
8121ed42 1263
20b09c29
AY		 1264 if (dev == MVS_MAX_DEVICES)
1265 mv_printk("max support %d devices, ignore ..\n",
1266 MVS_MAX_DEVICES);
1267
1268 return NULL;
8f261aaf
KW		 1269}
1270
20b09c29 1271void mvs_free_dev(struct mvs_device *mvi_dev)
b5762948 1272{
20b09c29
AY		 1273 u32 id = mvi_dev->device_id;
1274 memset(mvi_dev, 0, sizeof(*mvi_dev));
1275 mvi_dev->device_id = id;
1276 mvi_dev->dev_type = NO_DEVICE;
1277 mvi_dev->dev_status = MVS_DEV_NORMAL;
1278 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1279}
b5762948 1280
20b09c29
AY		 1281int mvs_dev_found_notify(struct domain_device *dev, int lock)
1282{
1283 unsigned long flags = 0;
1284 int res = 0;
1285 struct mvs_info *mvi = NULL;
1286 struct domain_device *parent_dev = dev->parent;
1287 struct mvs_device *mvi_device;
b5762948 1288
20b09c29 1289 mvi = mvs_find_dev_mvi(dev);
b5762948 1290
20b09c29
AY		 1291 if (lock)
1292 spin_lock_irqsave(&mvi->lock, flags);
1293
1294 mvi_device = mvs_alloc_dev(mvi);
1295 if (!mvi_device) {
1296 res = -1;
1297 goto found_out;
b5762948 1298 }
f9da3be5 1299 dev->lldd_dev = mvi_device;
9dc9fd94 1300 mvi_device->dev_status = MVS_DEV_NORMAL;
20b09c29 1301 mvi_device->dev_type = dev->dev_type;
9870d9a2 1302 mvi_device->mvi_info = mvi;
84fbd0ce 1303 mvi_device->sas_device = dev;
20b09c29
AY		 1304 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
1305 int phy_id;
1306 u8 phy_num = parent_dev->ex_dev.num_phys;
1307 struct ex_phy *phy;
1308 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1309 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1310 if (SAS_ADDR(phy->attached_sas_addr) ==
1311 SAS_ADDR(dev->sas_addr)) {
1312 mvi_device->attached_phy = phy_id;
1313 break;
1314 }
1315 }
b5762948 1316
20b09c29
AY		 1317 if (phy_id == phy_num) {
1318 mv_printk("Error: no attached dev:%016llx"
1319 "at ex:%016llx.\n",
1320 SAS_ADDR(dev->sas_addr),
1321 SAS_ADDR(parent_dev->sas_addr));
1322 res = -1;
1323 }
dd4969a8 1324 }
b5762948 1325
20b09c29
AY		 1326found_out:
1327 if (lock)
1328 spin_unlock_irqrestore(&mvi->lock, flags);
1329 return res;
1330}
b5762948 1331
20b09c29
AY		 1332int mvs_dev_found(struct domain_device *dev)
1333{
1334 return mvs_dev_found_notify(dev, 1);
1335}
b5762948 1336
9dc9fd94 1337void mvs_dev_gone_notify(struct domain_device *dev)
20b09c29
AY		 1338{
1339 unsigned long flags = 0;
f9da3be5 1340 struct mvs_device *mvi_dev = dev->lldd_dev;
9870d9a2 1341 struct mvs_info *mvi = mvi_dev->mvi_info;
b5762948 1342
9dc9fd94 1343 spin_lock_irqsave(&mvi->lock, flags);
b5762948 1344
20b09c29
AY		 1345 if (mvi_dev) {
1346 mv_dprintk("found dev[%d:%x] is gone.\n",
1347 mvi_dev->device_id, mvi_dev->dev_type);
9dc9fd94 1348 mvs_release_task(mvi, dev);
20b09c29
AY		 1349 mvs_free_reg_set(mvi, mvi_dev);
1350 mvs_free_dev(mvi_dev);
1351 } else {
1352 mv_dprintk("found dev has gone.\n");
b5762948 1353 }
20b09c29 1354 dev->lldd_dev = NULL;
84fbd0ce 1355 mvi_dev->sas_device = NULL;
b5762948 1356
9dc9fd94 1357 spin_unlock_irqrestore(&mvi->lock, flags);
b5762948
JG		 1358}
1359
b5762948 1360
20b09c29
AY		 1361void mvs_dev_gone(struct domain_device *dev)
1362{
9dc9fd94 1363 mvs_dev_gone_notify(dev);
20b09c29 1364}
b5762948 1365
20b09c29
AY		 1366static void mvs_task_done(struct sas_task *task)
1367{
1368 if (!del_timer(&task->timer))
1369 return;
1370 complete(&task->completion);
b5762948 1371}
b5762948 1372
20b09c29 1373static void mvs_tmf_timedout(unsigned long data)
b5762948 1374{
20b09c29 1375 struct sas_task *task = (struct sas_task *)data;
8f261aaf 1376
20b09c29
AY		 1377 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1378 complete(&task->completion);
1379}
8f261aaf 1380
20b09c29
AY		 1381#define MVS_TASK_TIMEOUT 20
1382static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1383 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1384{
1385 int res, retry;
1386 struct sas_task *task = NULL;
8f261aaf 1387
20b09c29 1388 for (retry = 0; retry < 3; retry++) {
4fcf812c 1389 task = sas_alloc_task(GFP_KERNEL);
20b09c29
AY		 1390 if (!task)
1391 return -ENOMEM;
8f261aaf 1392
20b09c29
AY		 1393 task->dev = dev;
1394 task->task_proto = dev->tproto;
8f261aaf 1395
20b09c29
AY		 1396 memcpy(&task->ssp_task, parameter, para_len);
1397 task->task_done = mvs_task_done;
8f261aaf 1398
20b09c29
AY		 1399 task->timer.data = (unsigned long) task;
1400 task->timer.function = mvs_tmf_timedout;
1401 task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1402 add_timer(&task->timer);
8f261aaf 1403
0b84b709 1404 res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 1, tmf);
8f261aaf 1405
20b09c29
AY		 1406 if (res) {
1407 del_timer(&task->timer);
1408 mv_printk("executing internel task failed:%d\n", res);
1409 goto ex_err;
1410 }
8f261aaf 1411
20b09c29 1412 wait_for_completion(&task->completion);
84fbd0ce 1413 res = TMF_RESP_FUNC_FAILED;
20b09c29
AY		 1414 /* Even TMF timed out, return direct. */
1415 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1416 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1417 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1418 goto ex_err;
1419 }
1420 }
8f261aaf 1421
20b09c29 1422 if (task->task_status.resp == SAS_TASK_COMPLETE &&
df64d3ca 1423 task->task_status.stat == SAM_STAT_GOOD) {
20b09c29
AY		 1424 res = TMF_RESP_FUNC_COMPLETE;
1425 break;
1426 }
b5762948 1427
20b09c29
AY		 1428 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1429 task->task_status.stat == SAS_DATA_UNDERRUN) {
1430 /* no error, but return the number of bytes of
1431 * underrun */
1432 res = task->task_status.residual;
1433 break;
1434 }
b5762948 1435
20b09c29
AY		 1436 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1437 task->task_status.stat == SAS_DATA_OVERRUN) {
1438 mv_dprintk("blocked task error.\n");
1439 res = -EMSGSIZE;
1440 break;
1441 } else {
1442 mv_dprintk(" task to dev %016llx response: 0x%x "
1443 "status 0x%x\n",
1444 SAS_ADDR(dev->sas_addr),
1445 task->task_status.resp,
1446 task->task_status.stat);
4fcf812c 1447 sas_free_task(task);
20b09c29 1448 task = NULL;
b5762948 1449
dd4969a8 1450 }
dd4969a8 1451 }
20b09c29
AY		 1452ex_err:
1453 BUG_ON(retry == 3 && task != NULL);
4fcf812c 1454 sas_free_task(task);
20b09c29 1455 return res;
dd4969a8 1456}
b5762948 1457
20b09c29
AY		 1458static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1459 u8 *lun, struct mvs_tmf_task *tmf)
dd4969a8 1460{
20b09c29 1461 struct sas_ssp_task ssp_task;
20b09c29
AY		 1462 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1463 return TMF_RESP_FUNC_ESUPP;
b5762948 1464
84fbd0ce 1465 memcpy(ssp_task.LUN, lun, 8);
b5762948 1466
20b09c29
AY		 1467 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1468 sizeof(ssp_task), tmf);
1469}
8f261aaf 1470
8f261aaf 1471
20b09c29
AY		 1472/* Standard mandates link reset for ATA (type 0)
1473 and hard reset for SSP (type 1) , only for RECOVERY */
1474static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1475{
1476 int rc;
f41a0c44 1477 struct sas_phy *phy = sas_get_local_phy(dev);
20b09c29
AY		 1478 int reset_type = (dev->dev_type == SATA_DEV ||
1479 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1480 rc = sas_phy_reset(phy, reset_type);
f41a0c44 1481 sas_put_local_phy(phy);
20b09c29
AY		 1482 msleep(2000);
1483 return rc;
1484}
8f261aaf 1485
20b09c29
AY		 1486/* mandatory SAM-3 */
1487int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1488{
1489 unsigned long flags;
84fbd0ce 1490 int rc = TMF_RESP_FUNC_FAILED;
20b09c29 1491 struct mvs_tmf_task tmf_task;
f9da3be5 1492 struct mvs_device * mvi_dev = dev->lldd_dev;
9870d9a2 1493 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1494
1495 tmf_task.tmf = TMF_LU_RESET;
1496 mvi_dev->dev_status = MVS_DEV_EH;
1497 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1498 if (rc == TMF_RESP_FUNC_COMPLETE) {
20b09c29 1499 spin_lock_irqsave(&mvi->lock, flags);
84fbd0ce 1500 mvs_release_task(mvi, dev);
20b09c29 1501 spin_unlock_irqrestore(&mvi->lock, flags);
dd4969a8 1502 }
20b09c29
AY		 1503 /* If failed, fall-through I_T_Nexus reset */
1504 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1505 mvi_dev->device_id, rc);
1506 return rc;
1507}
8f261aaf 1508
20b09c29
AY		 1509int mvs_I_T_nexus_reset(struct domain_device *dev)
1510{
1511 unsigned long flags;
9dc9fd94
S		 1512 int rc = TMF_RESP_FUNC_FAILED;
1513 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev;
9870d9a2 1514 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1515
1516 if (mvi_dev->dev_status != MVS_DEV_EH)
1517 return TMF_RESP_FUNC_COMPLETE;
84fbd0ce
XY		 1518 else
1519 mvi_dev->dev_status = MVS_DEV_NORMAL;
20b09c29
AY		 1520 rc = mvs_debug_I_T_nexus_reset(dev);
1521 mv_printk("%s for device[%x]:rc= %d\n",
1522 __func__, mvi_dev->device_id, rc);
1523
20b09c29 1524 spin_lock_irqsave(&mvi->lock, flags);
9dc9fd94 1525 mvs_release_task(mvi, dev);
20b09c29
AY		 1526 spin_unlock_irqrestore(&mvi->lock, flags);
1527
1528 return rc;
1529}
1530/* optional SAM-3 */
1531int mvs_query_task(struct sas_task *task)
1532{
1533 u32 tag;
1534 struct scsi_lun lun;
1535 struct mvs_tmf_task tmf_task;
1536 int rc = TMF_RESP_FUNC_FAILED;
1537
1538 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1539 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1540 struct domain_device *dev = task->dev;
9870d9a2
AY		 1541 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1542 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1543
1544 int_to_scsilun(cmnd->device->lun, &lun);
1545 rc = mvs_find_tag(mvi, task, &tag);
1546 if (rc == 0) {
1547 rc = TMF_RESP_FUNC_FAILED;
dd4969a8 1548 return rc;
20b09c29 1549 }
8f261aaf 1550
20b09c29
AY		 1551 tmf_task.tmf = TMF_QUERY_TASK;
1552 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
8f261aaf 1553
20b09c29
AY		 1554 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1555 switch (rc) {
1556 /* The task is still in Lun, release it then */
1557 case TMF_RESP_FUNC_SUCC:
1558 /* The task is not in Lun or failed, reset the phy */
1559 case TMF_RESP_FUNC_FAILED:
1560 case TMF_RESP_FUNC_COMPLETE:
1561 break;
1562 }
dd4969a8 1563 }
20b09c29
AY		 1564 mv_printk("%s:rc= %d\n", __func__, rc);
1565 return rc;
8f261aaf
KW		 1566}
1567
20b09c29
AY		 1568/* mandatory SAM-3, still need free task/slot info */
1569int mvs_abort_task(struct sas_task *task)
8f261aaf 1570{
20b09c29
AY		 1571 struct scsi_lun lun;
1572 struct mvs_tmf_task tmf_task;
1573 struct domain_device *dev = task->dev;
9870d9a2 1574 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
24ae163e 1575 struct mvs_info *mvi;
20b09c29
AY		 1576 int rc = TMF_RESP_FUNC_FAILED;
1577 unsigned long flags;
1578 u32 tag;
9870d9a2 1579
9dc9fd94 1580 if (!mvi_dev) {
84fbd0ce
XY		 1581 mv_printk("Device has removed\n");
1582 return TMF_RESP_FUNC_FAILED;
9dc9fd94
S		 1583 }
1584
24ae163e
JS		 1585 mvi = mvi_dev->mvi_info;
1586
20b09c29
AY		 1587 spin_lock_irqsave(&task->task_state_lock, flags);
1588 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1589 spin_unlock_irqrestore(&task->task_state_lock, flags);
1590 rc = TMF_RESP_FUNC_COMPLETE;
1591 goto out;
dd4969a8 1592 }
20b09c29 1593 spin_unlock_irqrestore(&task->task_state_lock, flags);
9dc9fd94 1594 mvi_dev->dev_status = MVS_DEV_EH;
20b09c29
AY		 1595 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1596 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1597
1598 int_to_scsilun(cmnd->device->lun, &lun);
1599 rc = mvs_find_tag(mvi, task, &tag);
1600 if (rc == 0) {
1601 mv_printk("No such tag in %s\n", __func__);
1602 rc = TMF_RESP_FUNC_FAILED;
1603 return rc;
1604 }
8f261aaf 1605
20b09c29
AY		 1606 tmf_task.tmf = TMF_ABORT_TASK;
1607 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
8f261aaf 1608
20b09c29 1609 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
8f261aaf 1610
20b09c29
AY		 1611 /* if successful, clear the task and callback forwards.*/
1612 if (rc == TMF_RESP_FUNC_COMPLETE) {
1613 u32 slot_no;
1614 struct mvs_slot_info *slot;
8f261aaf 1615
20b09c29 1616 if (task->lldd_task) {
f9da3be5 1617 slot = task->lldd_task;
20b09c29 1618 slot_no = (u32) (slot - mvi->slot_info);
9dc9fd94 1619 spin_lock_irqsave(&mvi->lock, flags);
20b09c29 1620 mvs_slot_complete(mvi, slot_no, 1);
9dc9fd94 1621 spin_unlock_irqrestore(&mvi->lock, flags);
20b09c29
AY		 1622 }
1623 }
9dc9fd94 1624
20b09c29
AY		 1625 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1626 task->task_proto & SAS_PROTOCOL_STP) {
9dc9fd94
S		 1627 if (SATA_DEV == dev->dev_type) {
1628 struct mvs_slot_info *slot = task->lldd_task;
9dc9fd94 1629 u32 slot_idx = (u32)(slot - mvi->slot_info);
84fbd0ce 1630 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
9dc9fd94
S		 1631 "slot=%p slot_idx=x%x\n",
1632 mvi, task, slot, slot_idx);
84fbd0ce 1633 mvs_tmf_timedout((unsigned long)task);
9dc9fd94 1634 mvs_slot_task_free(mvi, task, slot, slot_idx);
84fbd0ce
XY		 1635 rc = TMF_RESP_FUNC_COMPLETE;
1636 goto out;
9dc9fd94 1637 }
8f261aaf 1638
20b09c29
AY		 1639 }
1640out:
1641 if (rc != TMF_RESP_FUNC_COMPLETE)
1642 mv_printk("%s:rc= %d\n", __func__, rc);
dd4969a8 1643 return rc;
8f261aaf
KW		 1644}
1645
20b09c29 1646int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
8f261aaf 1647{
20b09c29
AY		 1648 int rc = TMF_RESP_FUNC_FAILED;
1649 struct mvs_tmf_task tmf_task;
8f261aaf 1650
20b09c29
AY		 1651 tmf_task.tmf = TMF_ABORT_TASK_SET;
1652 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
dd4969a8 1653
20b09c29 1654 return rc;
8f261aaf
KW		 1655}
1656
20b09c29 1657int mvs_clear_aca(struct domain_device *dev, u8 *lun)
8f261aaf 1658{
20b09c29
AY		 1659 int rc = TMF_RESP_FUNC_FAILED;
1660 struct mvs_tmf_task tmf_task;
8f261aaf 1661
20b09c29
AY		 1662 tmf_task.tmf = TMF_CLEAR_ACA;
1663 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
8f261aaf 1664
20b09c29
AY		 1665 return rc;
1666}
8f261aaf 1667
20b09c29
AY		 1668int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1669{
1670 int rc = TMF_RESP_FUNC_FAILED;
1671 struct mvs_tmf_task tmf_task;
8f261aaf 1672
20b09c29
AY		 1673 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1674 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
8f261aaf 1675
20b09c29 1676 return rc;
dd4969a8 1677}
8f261aaf 1678
20b09c29
AY		 1679static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1680 u32 slot_idx, int err)
dd4969a8 1681{
f9da3be5 1682 struct mvs_device *mvi_dev = task->dev->lldd_dev;
20b09c29
AY		 1683 struct task_status_struct *tstat = &task->task_status;
1684 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
df64d3ca 1685 int stat = SAM_STAT_GOOD;
e9ff91b6 1686
8f261aaf 1687
20b09c29
AY		 1688 resp->frame_len = sizeof(struct dev_to_host_fis);
1689 memcpy(&resp->ending_fis[0],
1690 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1691 sizeof(struct dev_to_host_fis));
1692 tstat->buf_valid_size = sizeof(*resp);
9dc9fd94
S		 1693 if (unlikely(err)) {
1694 if (unlikely(err & CMD_ISS_STPD))
1695 stat = SAS_OPEN_REJECT;
1696 else
1697 stat = SAS_PROTO_RESPONSE;
1698 }
1699
20b09c29 1700 return stat;
8f261aaf
KW		 1701}
1702
a4632aae
XY		 1703void mvs_set_sense(u8 *buffer, int len, int d_sense,
1704 int key, int asc, int ascq)
1705{
1706 memset(buffer, 0, len);
1707
1708 if (d_sense) {
1709 /* Descriptor format */
1710 if (len < 4) {
1711 mv_printk("Length %d of sense buffer too small to "
1712 "fit sense %x:%x:%x", len, key, asc, ascq);
1713 }
1714
1715 buffer[0] = 0x72; /* Response Code */
1716 if (len > 1)
1717 buffer[1] = key; /* Sense Key */
1718 if (len > 2)
1719 buffer[2] = asc; /* ASC */
1720 if (len > 3)
1721 buffer[3] = ascq; /* ASCQ */
1722 } else {
1723 if (len < 14) {
1724 mv_printk("Length %d of sense buffer too small to "
1725 "fit sense %x:%x:%x", len, key, asc, ascq);
1726 }
1727
1728 buffer[0] = 0x70; /* Response Code */
1729 if (len > 2)
1730 buffer[2] = key; /* Sense Key */
1731 if (len > 7)
1732 buffer[7] = 0x0a; /* Additional Sense Length */
1733 if (len > 12)
1734 buffer[12] = asc; /* ASC */
1735 if (len > 13)
1736 buffer[13] = ascq; /* ASCQ */
1737 }
1738
1739 return;
1740}
1741
1742void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1743 u8 key, u8 asc, u8 asc_q)
1744{
1745 iu->datapres = 2;
1746 iu->response_data_len = 0;
1747 iu->sense_data_len = 17;
1748 iu->status = 02;
1749 mvs_set_sense(iu->sense_data, 17, 0,
1750 key, asc, asc_q);
1751}
1752
20b09c29
AY		 1753static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1754 u32 slot_idx)
8f261aaf 1755{
20b09c29
AY		 1756 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1757 int stat;
84fbd0ce 1758 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
a4632aae 1759 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
20b09c29
AY		 1760 u32 tfs = 0;
1761 enum mvs_port_type type = PORT_TYPE_SAS;
8f261aaf 1762
20b09c29
AY		 1763 if (err_dw0 & CMD_ISS_STPD)
1764 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1765
1766 MVS_CHIP_DISP->command_active(mvi, slot_idx);
b5762948 1767
df64d3ca 1768 stat = SAM_STAT_CHECK_CONDITION;
dd4969a8 1769 switch (task->task_proto) {
dd4969a8 1770 case SAS_PROTOCOL_SSP:
a4632aae 1771 {
20b09c29 1772 stat = SAS_ABORTED_TASK;
a4632aae
XY		 1773 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1774 struct ssp_response_iu *iu = slot->response +
1775 sizeof(struct mvs_err_info);
1776 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1777 sas_ssp_task_response(mvi->dev, task, iu);
1778 stat = SAM_STAT_CHECK_CONDITION;
1779 }
1780 if (err_dw1 & bit(31))
1781 mv_printk("reuse same slot, retry command.\n");
20b09c29 1782 break;
a4632aae 1783 }
20b09c29 1784 case SAS_PROTOCOL_SMP:
df64d3ca 1785 stat = SAM_STAT_CHECK_CONDITION;
dd4969a8 1786 break;
20b09c29 1787
dd4969a8
JG		 1788 case SAS_PROTOCOL_SATA:
1789 case SAS_PROTOCOL_STP:
20b09c29
AY		 1790 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1791 {
20b09c29 1792 task->ata_task.use_ncq = 0;
84fbd0ce 1793 stat = SAS_PROTO_RESPONSE;
9dc9fd94 1794 mvs_sata_done(mvi, task, slot_idx, err_dw0);
dd4969a8 1795 }
20b09c29 1796 break;
dd4969a8
JG		 1797 default:
1798 break;
1799 }
1800
20b09c29 1801 return stat;
e9ff91b6
KW		 1802}
1803
20b09c29 1804int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
b5762948 1805{
20b09c29
AY		 1806 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1807 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1808 struct sas_task *task = slot->task;
1809 struct mvs_device *mvi_dev = NULL;
1810 struct task_status_struct *tstat;
9dc9fd94
S		 1811 struct domain_device *dev;
1812 u32 aborted;
20b09c29 1813
20b09c29
AY		 1814 void *to;
1815 enum exec_status sts;
1816
9dc9fd94 1817 if (unlikely(!task || !task->lldd_task || !task->dev))
20b09c29
AY		 1818 return -1;
1819
1820 tstat = &task->task_status;
9dc9fd94
S		 1821 dev = task->dev;
1822 mvi_dev = dev->lldd_dev;
b5762948 1823
20b09c29
AY		 1824 spin_lock(&task->task_state_lock);
1825 task->task_state_flags &=
1826 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1827 task->task_state_flags |= SAS_TASK_STATE_DONE;
1828 /* race condition*/
1829 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1830 spin_unlock(&task->task_state_lock);
1831
1832 memset(tstat, 0, sizeof(*tstat));
1833 tstat->resp = SAS_TASK_COMPLETE;
1834
1835 if (unlikely(aborted)) {
1836 tstat->stat = SAS_ABORTED_TASK;
9dc9fd94
S		 1837 if (mvi_dev && mvi_dev->running_req)
1838 mvi_dev->running_req--;
20b09c29
AY		 1839 if (sas_protocol_ata(task->task_proto))
1840 mvs_free_reg_set(mvi, mvi_dev);
1841
1842 mvs_slot_task_free(mvi, task, slot, slot_idx);
1843 return -1;
b5762948
JG		 1844 }
1845
e144f7ef 1846 /* when no device attaching, go ahead and complete by error handling*/
9dc9fd94
S		 1847 if (unlikely(!mvi_dev || flags)) {
1848 if (!mvi_dev)
1849 mv_dprintk("port has not device.\n");
20b09c29
AY		 1850 tstat->stat = SAS_PHY_DOWN;
1851 goto out;
1852 }
b5762948 1853
20b09c29
AY		 1854 /* error info record present */
1855 if (unlikely((rx_desc & RXQ_ERR) && (*(u64 *) slot->response))) {
84fbd0ce
XY		 1856 mv_dprintk("port %d slot %d rx_desc %X has error info"
1857 "%016llX.\n", slot->port->sas_port.id, slot_idx,
1858 rx_desc, (u64)(*(u64 *)slot->response));
20b09c29 1859 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
9dc9fd94 1860 tstat->resp = SAS_TASK_COMPLETE;
20b09c29 1861 goto out;
b5762948
JG		 1862 }
1863
20b09c29
AY		 1864 switch (task->task_proto) {
1865 case SAS_PROTOCOL_SSP:
1866 /* hw says status == 0, datapres == 0 */
1867 if (rx_desc & RXQ_GOOD) {
df64d3ca 1868 tstat->stat = SAM_STAT_GOOD;
20b09c29
AY		 1869 tstat->resp = SAS_TASK_COMPLETE;
1870 }
1871 /* response frame present */
1872 else if (rx_desc & RXQ_RSP) {
1873 struct ssp_response_iu *iu = slot->response +
1874 sizeof(struct mvs_err_info);
1875 sas_ssp_task_response(mvi->dev, task, iu);
1876 } else
df64d3ca 1877 tstat->stat = SAM_STAT_CHECK_CONDITION;
20b09c29 1878 break;
b5762948 1879
20b09c29
AY		 1880 case SAS_PROTOCOL_SMP: {
1881 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
df64d3ca 1882 tstat->stat = SAM_STAT_GOOD;
77dfce07 1883 to = kmap_atomic(sg_page(sg_resp));
20b09c29
AY		 1884 memcpy(to + sg_resp->offset,
1885 slot->response + sizeof(struct mvs_err_info),
1886 sg_dma_len(sg_resp));
77dfce07 1887 kunmap_atomic(to);
20b09c29
AY		 1888 break;
1889 }
8f261aaf 1890
20b09c29
AY		 1891 case SAS_PROTOCOL_SATA:
1892 case SAS_PROTOCOL_STP:
1893 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1894 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1895 break;
1896 }
b5762948 1897
20b09c29 1898 default:
df64d3ca 1899 tstat->stat = SAM_STAT_CHECK_CONDITION;
20b09c29
AY		 1900 break;
1901 }
9dc9fd94
S		 1902 if (!slot->port->port_attached) {
1903 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1904 tstat->stat = SAS_PHY_DOWN;
1905 }
1906
b5762948 1907
20b09c29 1908out:
9dc9fd94
S		 1909 if (mvi_dev && mvi_dev->running_req) {
1910 mvi_dev->running_req--;
1911 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
0f980a87
AY		 1912 mvs_free_reg_set(mvi, mvi_dev);
1913 }
20b09c29
AY		 1914 mvs_slot_task_free(mvi, task, slot, slot_idx);
1915 sts = tstat->stat;
8f261aaf 1916
20b09c29
AY		 1917 spin_unlock(&mvi->lock);
1918 if (task->task_done)
1919 task->task_done(task);
84fbd0ce 1920
20b09c29 1921 spin_lock(&mvi->lock);
b5762948 1922
20b09c29
AY		 1923 return sts;
1924}
b5762948 1925
9dc9fd94 1926void mvs_do_release_task(struct mvs_info *mvi,
20b09c29
AY		 1927 int phy_no, struct domain_device *dev)
1928{
9dc9fd94 1929 u32 slot_idx;
20b09c29
AY		 1930 struct mvs_phy *phy;
1931 struct mvs_port *port;
1932 struct mvs_slot_info *slot, *slot2;
b5762948 1933
20b09c29
AY		 1934 phy = &mvi->phy[phy_no];
1935 port = phy->port;
1936 if (!port)
1937 return;
9dc9fd94
S		 1938 /* clean cmpl queue in case request is already finished */
1939 mvs_int_rx(mvi, false);
1940
1941
b5762948 1942
20b09c29
AY		 1943 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1944 struct sas_task *task;
1945 slot_idx = (u32) (slot - mvi->slot_info);
1946 task = slot->task;
b5762948 1947
20b09c29
AY		 1948 if (dev && task->dev != dev)
1949 continue;
8f261aaf 1950
20b09c29
AY		 1951 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1952 slot_idx, slot->slot_tag, task);
9dc9fd94 1953 MVS_CHIP_DISP->command_active(mvi, slot_idx);
b5762948 1954
20b09c29 1955 mvs_slot_complete(mvi, slot_idx, 1);
b5762948 1956 }
20b09c29 1957}
b5762948 1958
9dc9fd94
S		 1959void mvs_release_task(struct mvs_info *mvi,
1960 struct domain_device *dev)
1961{
1962 int i, phyno[WIDE_PORT_MAX_PHY], num;
9dc9fd94
S		 1963 num = mvs_find_dev_phyno(dev, phyno);
1964 for (i = 0; i < num; i++)
1965 mvs_do_release_task(mvi, phyno[i], dev);
1966}
1967
20b09c29
AY		 1968static void mvs_phy_disconnected(struct mvs_phy *phy)
1969{
1970 phy->phy_attached = 0;
1971 phy->att_dev_info = 0;
1972 phy->att_dev_sas_addr = 0;
1973}
1974
1975static void mvs_work_queue(struct work_struct *work)
1976{
1977 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1978 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1979 struct mvs_info *mvi = mwq->mvi;
1980 unsigned long flags;
a4632aae
XY		 1981 u32 phy_no = (unsigned long) mwq->data;
1982 struct sas_ha_struct *sas_ha = mvi->sas;
1983 struct mvs_phy *phy = &mvi->phy[phy_no];
1984 struct asd_sas_phy *sas_phy = &phy->sas_phy;
b5762948 1985
20b09c29
AY		 1986 spin_lock_irqsave(&mvi->lock, flags);
1987 if (mwq->handler & PHY_PLUG_EVENT) {
20b09c29
AY		 1988
1989 if (phy->phy_event & PHY_PLUG_OUT) {
1990 u32 tmp;
1991 struct sas_identify_frame *id;
1992 id = (struct sas_identify_frame *)phy->frame_rcvd;
1993 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1994 phy->phy_event &= ~PHY_PLUG_OUT;
1995 if (!(tmp & PHY_READY_MASK)) {
1996 sas_phy_disconnected(sas_phy);
1997 mvs_phy_disconnected(phy);
1998 sas_ha->notify_phy_event(sas_phy,
1999 PHYE_LOSS_OF_SIGNAL);
2000 mv_dprintk("phy%d Removed Device\n", phy_no);
2001 } else {
2002 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2003 mvs_update_phyinfo(mvi, phy_no, 1);
2004 mvs_bytes_dmaed(mvi, phy_no);
2005 mvs_port_notify_formed(sas_phy, 0);
2006 mv_dprintk("phy%d Attached Device\n", phy_no);
2007 }
2008 }
a4632aae
XY		 2009 } else if (mwq->handler & EXP_BRCT_CHG) {
2010 phy->phy_event &= ~EXP_BRCT_CHG;
2011 sas_ha->notify_port_event(sas_phy,
2012 PORTE_BROADCAST_RCVD);
2013 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
20b09c29
AY		 2014 }
2015 list_del(&mwq->entry);
2016 spin_unlock_irqrestore(&mvi->lock, flags);
2017 kfree(mwq);
2018}
8f261aaf 2019
20b09c29
AY		 2020static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
2021{
2022 struct mvs_wq *mwq;
2023 int ret = 0;
2024
2025 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
2026 if (mwq) {
2027 mwq->mvi = mvi;
2028 mwq->data = data;
2029 mwq->handler = handler;
2030 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
2031 list_add_tail(&mwq->entry, &mvi->wq_list);
2032 schedule_delayed_work(&mwq->work_q, HZ * 2);
2033 } else
2034 ret = -ENOMEM;
2035
2036 return ret;
2037}
b5762948 2038
20b09c29
AY		 2039static void mvs_sig_time_out(unsigned long tphy)
2040{
2041 struct mvs_phy *phy = (struct mvs_phy *)tphy;
2042 struct mvs_info *mvi = phy->mvi;
2043 u8 phy_no;
2044
2045 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
2046 if (&mvi->phy[phy_no] == phy) {
2047 mv_dprintk("Get signature time out, reset phy %d\n",
2048 phy_no+mvi->id*mvi->chip->n_phy);
a4632aae 2049 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
20b09c29 2050 }
b5762948 2051 }
20b09c29 2052}
b5762948 2053
20b09c29
AY		 2054void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
2055{
2056 u32 tmp;
20b09c29 2057 struct mvs_phy *phy = &mvi->phy[phy_no];
8f261aaf 2058
20b09c29 2059 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
84fbd0ce
XY		 2060 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
2061 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
20b09c29 2062 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
84fbd0ce 2063 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
20b09c29 2064 phy->irq_status);
8f261aaf 2065
20b09c29
AY		 2066 /*
2067 * events is port event now ,
2068 * we need check the interrupt status which belongs to per port.
2069 */
b5762948 2070
9dc9fd94 2071 if (phy->irq_status & PHYEV_DCDR_ERR) {
84fbd0ce 2072 mv_dprintk("phy %d STP decoding error.\n",
9dc9fd94
S		 2073 phy_no + mvi->id*mvi->chip->n_phy);
2074 }
20b09c29
AY		 2075
2076 if (phy->irq_status & PHYEV_POOF) {
84fbd0ce 2077 mdelay(500);
20b09c29
AY		 2078 if (!(phy->phy_event & PHY_PLUG_OUT)) {
2079 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
2080 int ready;
9dc9fd94 2081 mvs_do_release_task(mvi, phy_no, NULL);
20b09c29 2082 phy->phy_event |= PHY_PLUG_OUT;
9dc9fd94 2083 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
20b09c29
AY		 2084 mvs_handle_event(mvi,
2085 (void *)(unsigned long)phy_no,
2086 PHY_PLUG_EVENT);
2087 ready = mvs_is_phy_ready(mvi, phy_no);
20b09c29
AY		 2088 if (ready || dev_sata) {
2089 if (MVS_CHIP_DISP->stp_reset)
2090 MVS_CHIP_DISP->stp_reset(mvi,
2091 phy_no);
2092 else
2093 MVS_CHIP_DISP->phy_reset(mvi,
a4632aae 2094 phy_no, MVS_SOFT_RESET);
20b09c29
AY		 2095 return;
2096 }
2097 }
2098 }
b5762948 2099
20b09c29
AY		 2100 if (phy->irq_status & PHYEV_COMWAKE) {
2101 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2102 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2103 tmp | PHYEV_SIG_FIS);
2104 if (phy->timer.function == NULL) {
2105 phy->timer.data = (unsigned long)phy;
2106 phy->timer.function = mvs_sig_time_out;
84fbd0ce 2107 phy->timer.expires = jiffies + 5*HZ;
20b09c29
AY		 2108 add_timer(&phy->timer);
2109 }
2110 }
2111 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2112 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
20b09c29
AY		 2113 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2114 if (phy->phy_status) {
2115 mdelay(10);
2116 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2117 if (phy->phy_type & PORT_TYPE_SATA) {
2118 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2119 mvi, phy_no);
2120 tmp &= ~PHYEV_SIG_FIS;
2121 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2122 phy_no, tmp);
2123 }
2124 mvs_update_phyinfo(mvi, phy_no, 0);
9dc9fd94 2125 if (phy->phy_type & PORT_TYPE_SAS) {
a4632aae 2126 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
9dc9fd94
S		 2127 mdelay(10);
2128 }
2129
20b09c29
AY		 2130 mvs_bytes_dmaed(mvi, phy_no);
2131 /* whether driver is going to handle hot plug */
2132 if (phy->phy_event & PHY_PLUG_OUT) {
a4632aae 2133 mvs_port_notify_formed(&phy->sas_phy, 0);
20b09c29
AY		 2134 phy->phy_event &= ~PHY_PLUG_OUT;
2135 }
2136 } else {
2137 mv_dprintk("plugin interrupt but phy%d is gone\n",
2138 phy_no + mvi->id*mvi->chip->n_phy);
2139 }
2140 } else if (phy->irq_status & PHYEV_BROAD_CH) {
84fbd0ce 2141 mv_dprintk("phy %d broadcast change.\n",
20b09c29 2142 phy_no + mvi->id*mvi->chip->n_phy);
a4632aae
XY		 2143 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2144 EXP_BRCT_CHG);
20b09c29 2145 }
b5762948
JG		 2146}
2147
20b09c29 2148int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
b5762948 2149{
20b09c29
AY		 2150 u32 rx_prod_idx, rx_desc;
2151 bool attn = false;
b5762948 2152
20b09c29
AY		 2153 /* the first dword in the RX ring is special: it contains
2154 * a mirror of the hardware's RX producer index, so that
2155 * we don't have to stall the CPU reading that register.
2156 * The actual RX ring is offset by one dword, due to this.
2157 */
2158 rx_prod_idx = mvi->rx_cons;
2159 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2160 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2161 return 0;
b5762948 2162
20b09c29
AY		 2163 /* The CMPL_Q may come late, read from register and try again
2164 * note: if coalescing is enabled,
2165 * it will need to read from register every time for sure
2166 */
2167 if (unlikely(mvi->rx_cons == rx_prod_idx))
2168 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2169
2170 if (mvi->rx_cons == rx_prod_idx)
2171 return 0;
2172
2173 while (mvi->rx_cons != rx_prod_idx) {
2174 /* increment our internal RX consumer pointer */
2175 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2176 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2177
2178 if (likely(rx_desc & RXQ_DONE))
2179 mvs_slot_complete(mvi, rx_desc, 0);
2180 if (rx_desc & RXQ_ATTN) {
2181 attn = true;
2182 } else if (rx_desc & RXQ_ERR) {
2183 if (!(rx_desc & RXQ_DONE))
2184 mvs_slot_complete(mvi, rx_desc, 0);
2185 } else if (rx_desc & RXQ_SLOT_RESET) {
2186 mvs_slot_free(mvi, rx_desc);
2187 }
2188 }
2189
2190 if (attn && self_clear)
2191 MVS_CHIP_DISP->int_full(mvi);
2192 return 0;
b5762948
JG		 2193}
2194
kernel source for telekom puls (alcatel/mediatek)