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[SCSI] bfa: Added support to obtain SFP info.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / bfa / bfa_ioc.h
CommitLineData
7725ccfd 1/*
a36c61f9 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
7725ccfd
JH		 3 * All rights reserved
4 * www.brocade.com
5 *
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#ifndef __BFA_IOC_H__
19#define __BFA_IOC_H__
20
f16a1750 21#include "bfad_drv.h"
a36c61f9
KG		 22#include "bfa_cs.h"
23#include "bfi.h"
24
f7f73812
MZ		 25#define BFA_DBG_FWTRC_ENTS (BFI_IOC_TRC_ENTS)
26#define BFA_DBG_FWTRC_LEN \
27 (BFA_DBG_FWTRC_ENTS * sizeof(struct bfa_trc_s) + \
28 (sizeof(struct bfa_trc_mod_s) - \
29 BFA_TRC_MAX * sizeof(struct bfa_trc_s)))
acdc79a6 30/*
a36c61f9
KG		 31 * BFA timer declarations
32 */
33typedef void (*bfa_timer_cbfn_t)(void *);
34
acdc79a6 35/*
a36c61f9
KG		 36 * BFA timer data structure
37 */
38struct bfa_timer_s {
39 struct list_head qe;
40 bfa_timer_cbfn_t timercb;
41 void *arg;
acdc79a6 42 int timeout; /* in millisecs */
a36c61f9
KG		 43};
44
acdc79a6 45/*
a36c61f9
KG		 46 * Timer module structure
47 */
48struct bfa_timer_mod_s {
49 struct list_head timer_q;
50};
51
acdc79a6 52#define BFA_TIMER_FREQ 200 /* specified in millisecs */
a36c61f9
KG		 53
54void bfa_timer_beat(struct bfa_timer_mod_s *mod);
a36c61f9
KG		 55void bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
56 bfa_timer_cbfn_t timercb, void *arg,
57 unsigned int timeout);
58void bfa_timer_stop(struct bfa_timer_s *timer);
59
acdc79a6 60/*
a36c61f9
KG		 61 * Generic Scatter Gather Element used by driver
62 */
63struct bfa_sge_s {
64 u32 sg_len;
65 void *sg_addr;
66};
67
68#define bfa_sge_word_swap(__sge) do { \
53440260
JH		 69 ((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]); \
70 ((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]); \
71 ((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]); \
a36c61f9
KG		 72} while (0)
73
74#define bfa_swap_words(_x) ( \
75 ((_x) << 32) | ((_x) >> 32))
76
f16a1750 77#ifdef __BIG_ENDIAN
a36c61f9
KG		 78#define bfa_sge_to_be(_x)
79#define bfa_sge_to_le(_x) bfa_sge_word_swap(_x)
80#define bfa_sgaddr_le(_x) bfa_swap_words(_x)
81#else
82#define bfa_sge_to_be(_x) bfa_sge_word_swap(_x)
83#define bfa_sge_to_le(_x)
84#define bfa_sgaddr_le(_x) (_x)
85#endif
7725ccfd 86
4507025d
KG		 87/*
88 * BFA memory resources
89 */
90struct bfa_mem_dma_s {
91 struct list_head qe; /* Queue of DMA elements */
92 u32 mem_len; /* Total Length in Bytes */
93 u8 *kva; /* kernel virtual address */
94 u64 dma; /* dma address if DMA memory */
95 u8 *kva_curp; /* kva allocation cursor */
96 u64 dma_curp; /* dma allocation cursor */
97};
98#define bfa_mem_dma_t struct bfa_mem_dma_s
99
100struct bfa_mem_kva_s {
101 struct list_head qe; /* Queue of KVA elements */
102 u32 mem_len; /* Total Length in Bytes */
103 u8 *kva; /* kernel virtual address */
104 u8 *kva_curp; /* kva allocation cursor */
105};
106#define bfa_mem_kva_t struct bfa_mem_kva_s
107
108struct bfa_meminfo_s {
109 struct bfa_mem_dma_s dma_info;
110 struct bfa_mem_kva_s kva_info;
111};
112
113/* BFA memory segment setup macros */
114#define bfa_mem_dma_setup(_meminfo, _dm_ptr, _seg_sz) do { \
115 ((bfa_mem_dma_t *)(_dm_ptr))->mem_len = (_seg_sz); \
116 if (_seg_sz) \
117 list_add_tail(&((bfa_mem_dma_t *)_dm_ptr)->qe, \
118 &(_meminfo)->dma_info.qe); \
119} while (0)
120
121#define bfa_mem_kva_setup(_meminfo, _kva_ptr, _seg_sz) do { \
122 ((bfa_mem_kva_t *)(_kva_ptr))->mem_len = (_seg_sz); \
123 if (_seg_sz) \
124 list_add_tail(&((bfa_mem_kva_t *)_kva_ptr)->qe, \
125 &(_meminfo)->kva_info.qe); \
126} while (0)
127
128/* BFA dma memory segments iterator */
129#define bfa_mem_dma_sptr(_mod, _i) (&(_mod)->dma_seg[(_i)])
130#define bfa_mem_dma_seg_iter(_mod, _sptr, _nr, _i) \
131 for (_i = 0, _sptr = bfa_mem_dma_sptr(_mod, _i); _i < (_nr); \
132 _i++, _sptr = bfa_mem_dma_sptr(_mod, _i))
133
134#define bfa_mem_kva_curp(_mod) ((_mod)->kva_seg.kva_curp)
135#define bfa_mem_dma_virt(_sptr) ((_sptr)->kva_curp)
136#define bfa_mem_dma_phys(_sptr) ((_sptr)->dma_curp)
137#define bfa_mem_dma_len(_sptr) ((_sptr)->mem_len)
138
139/* Get the corresponding dma buf kva for a req - from the tag */
140#define bfa_mem_get_dmabuf_kva(_mod, _tag, _rqsz) \
141 (((u8 *)(_mod)->dma_seg[BFI_MEM_SEG_FROM_TAG(_tag, _rqsz)].kva_curp) +\
142 BFI_MEM_SEG_REQ_OFFSET(_tag, _rqsz) * (_rqsz))
143
144/* Get the corresponding dma buf pa for a req - from the tag */
145#define bfa_mem_get_dmabuf_pa(_mod, _tag, _rqsz) \
146 ((_mod)->dma_seg[BFI_MEM_SEG_FROM_TAG(_tag, _rqsz)].dma_curp + \
147 BFI_MEM_SEG_REQ_OFFSET(_tag, _rqsz) * (_rqsz))
148
acdc79a6 149/*
7725ccfd
JH		 150 * PCI device information required by IOC
151 */
152struct bfa_pcidev_s {
a36c61f9
KG		 153 int pci_slot;
154 u8 pci_func;
acdc79a6 155 u16 device_id;
1a4d8e1b 156 u16 ssid;
acdc79a6 157 void __iomem *pci_bar_kva;
7725ccfd
JH		 158};
159
acdc79a6 160/*
7725ccfd
JH		 161 * Structure used to remember the DMA-able memory block's KVA and Physical
162 * Address
163 */
164struct bfa_dma_s {
a36c61f9
KG		 165 void *kva; /* ! Kernel virtual address */
166 u64 pa; /* ! Physical address */
7725ccfd
JH		 167};
168
169#define BFA_DMA_ALIGN_SZ 256
170#define BFA_ROUNDUP(_l, _s) (((_l) + ((_s) - 1)) & ~((_s) - 1))
171
acdc79a6 172/*
a36c61f9
KG		 173 * smem size for Crossbow and Catapult
174 */
175#define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
176#define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
7725ccfd 177
7725ccfd
JH		 178#define bfa_dma_be_addr_set(dma_addr, pa) \
179 __bfa_dma_be_addr_set(&dma_addr, (u64)pa)
180static inline void
181__bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
182{
50444a34 183 dma_addr->a32.addr_lo = cpu_to_be32(pa);
f16a1750 184 dma_addr->a32.addr_hi = cpu_to_be32(pa >> 32);
7725ccfd
JH		 185}
186
85ce928d
KG		 187#define bfa_alen_set(__alen, __len, __pa) \
188 __bfa_alen_set(__alen, __len, (u64)__pa)
189
190static inline void
191__bfa_alen_set(struct bfi_alen_s *alen, u32 len, u64 pa)
192{
193 alen->al_len = cpu_to_be32(len);
194 bfa_dma_be_addr_set(alen->al_addr, pa);
195}
196
7725ccfd 197struct bfa_ioc_regs_s {
53440260
JH		 198 void __iomem *hfn_mbox_cmd;
199 void __iomem *hfn_mbox;
200 void __iomem *lpu_mbox_cmd;
201 void __iomem *lpu_mbox;
8b070b4a 202 void __iomem *lpu_read_stat;
53440260
JH		 203 void __iomem *pss_ctl_reg;
204 void __iomem *pss_err_status_reg;
205 void __iomem *app_pll_fast_ctl_reg;
206 void __iomem *app_pll_slow_ctl_reg;
207 void __iomem *ioc_sem_reg;
208 void __iomem *ioc_usage_sem_reg;
209 void __iomem *ioc_init_sem_reg;
210 void __iomem *ioc_usage_reg;
211 void __iomem *host_page_num_fn;
212 void __iomem *heartbeat;
213 void __iomem *ioc_fwstate;
f1d584d7 214 void __iomem *alt_ioc_fwstate;
53440260 215 void __iomem *ll_halt;
f1d584d7 216 void __iomem *alt_ll_halt;
53440260 217 void __iomem *err_set;
f1d584d7 218 void __iomem *ioc_fail_sync;
53440260
JH		 219 void __iomem *shirq_isr_next;
220 void __iomem *shirq_msk_next;
221 void __iomem *smem_page_start;
7725ccfd
JH		 222 u32 smem_pg0;
223};
224
53440260 225#define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
7725ccfd 226#define bfa_mem_write(_raddr, _off, _val) \
53440260 227 writel(swab32((_val)), ((_raddr) + (_off)))
acdc79a6 228/*
7725ccfd
JH		 229 * IOC Mailbox structures
230 */
231struct bfa_mbox_cmd_s {
a36c61f9 232 struct list_head qe;
7725ccfd
JH		 233 u32 msg[BFI_IOC_MSGSZ];
234};
235
acdc79a6 236/*
7725ccfd
JH		 237 * IOC mailbox module
238 */
239typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg_s *m);
240struct bfa_ioc_mbox_mod_s {
a36c61f9
KG		 241 struct list_head cmd_q; /* pending mbox queue */
242 int nmclass; /* number of handlers */
7725ccfd
JH		 243 struct {
244 bfa_ioc_mbox_mcfunc_t cbfn; /* message handlers */
245 void *cbarg;
246 } mbhdlr[BFI_MC_MAX];
247};
248
acdc79a6 249/*
7725ccfd
JH		 250 * IOC callback function interfaces
251 */
252typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
253typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
254typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
255typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
256struct bfa_ioc_cbfn_s {
257 bfa_ioc_enable_cbfn_t enable_cbfn;
258 bfa_ioc_disable_cbfn_t disable_cbfn;
259 bfa_ioc_hbfail_cbfn_t hbfail_cbfn;
260 bfa_ioc_reset_cbfn_t reset_cbfn;
261};
262
acdc79a6 263/*
d37779f8 264 * IOC event notification mechanism.
7725ccfd 265 */
d37779f8
KG		 266enum bfa_ioc_event_e {
267 BFA_IOC_E_ENABLED = 1,
268 BFA_IOC_E_DISABLED = 2,
269 BFA_IOC_E_FAILED = 3,
270};
271
272typedef void (*bfa_ioc_notify_cbfn_t)(void *, enum bfa_ioc_event_e);
273
274struct bfa_ioc_notify_s {
7725ccfd 275 struct list_head qe;
d37779f8 276 bfa_ioc_notify_cbfn_t cbfn;
7725ccfd
JH		 277 void *cbarg;
278};
279
acdc79a6 280/*
d37779f8 281 * Initialize a IOC event notification structure
7725ccfd 282 */
d37779f8 283#define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \
7725ccfd
JH		 284 (__notify)->cbfn = (__cbfn); \
285 (__notify)->cbarg = (__cbarg); \
286} while (0)
287
a36c61f9
KG		 288struct bfa_iocpf_s {
289 bfa_fsm_t fsm;
290 struct bfa_ioc_s *ioc;
775c7742 291 bfa_boolean_t fw_mismatch_notified;
a36c61f9 292 bfa_boolean_t auto_recover;
775c7742 293 u32 poll_time;
a36c61f9
KG		 294};
295
7725ccfd
JH		 296struct bfa_ioc_s {
297 bfa_fsm_t fsm;
298 struct bfa_s *bfa;
299 struct bfa_pcidev_s pcidev;
a36c61f9
KG		 300 struct bfa_timer_mod_s *timer_mod;
301 struct bfa_timer_s ioc_timer;
302 struct bfa_timer_s sem_timer;
303 struct bfa_timer_s hb_timer;
7725ccfd 304 u32 hb_count;
d37779f8 305 struct list_head notify_q;
7725ccfd
JH		 306 void *dbg_fwsave;
307 int dbg_fwsave_len;
308 bfa_boolean_t dbg_fwsave_once;
d37779f8 309 enum bfi_pcifn_class clscode;
a36c61f9 310 struct bfa_ioc_regs_s ioc_regs;
7725ccfd 311 struct bfa_trc_mod_s *trcmod;
7725ccfd 312 struct bfa_ioc_drv_stats_s stats;
7725ccfd 313 bfa_boolean_t fcmode;
7725ccfd 314 bfa_boolean_t pllinit;
a36c61f9 315 bfa_boolean_t stats_busy; /* outstanding stats */
7725ccfd 316 u8 port_id;
7725ccfd
JH		 317 struct bfa_dma_s attr_dma;
318 struct bfi_ioc_attr_s *attr;
319 struct bfa_ioc_cbfn_s *cbfn;
320 struct bfa_ioc_mbox_mod_s mbox_mod;
a36c61f9
KG		 321 struct bfa_ioc_hwif_s *ioc_hwif;
322 struct bfa_iocpf_s iocpf;
11189208
KG		 323 enum bfi_asic_gen asic_gen;
324 enum bfi_asic_mode asic_mode;
325 enum bfi_port_mode port0_mode;
326 enum bfi_port_mode port1_mode;
1a4d8e1b
KG		 327 enum bfa_mode_s port_mode;
328 u8 ad_cap_bm; /* adapter cap bit mask */
329 u8 port_mode_cfg; /* config port mode */
0a20de44
KG		 330};
331
332struct bfa_ioc_hwif_s {
11189208 333 bfa_status_t (*ioc_pll_init) (void __iomem *rb, enum bfi_asic_mode m);
a36c61f9
KG		 334 bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc);
335 void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc);
336 void (*ioc_reg_init) (struct bfa_ioc_s *ioc);
337 void (*ioc_map_port) (struct bfa_ioc_s *ioc);
338 void (*ioc_isr_mode_set) (struct bfa_ioc_s *ioc,
339 bfa_boolean_t msix);
f1d584d7 340 void (*ioc_notify_fail) (struct bfa_ioc_s *ioc);
a36c61f9 341 void (*ioc_ownership_reset) (struct bfa_ioc_s *ioc);
45d7f0cc 342 bfa_boolean_t (*ioc_sync_start) (struct bfa_ioc_s *ioc);
f1d584d7
KG		 343 void (*ioc_sync_join) (struct bfa_ioc_s *ioc);
344 void (*ioc_sync_leave) (struct bfa_ioc_s *ioc);
345 void (*ioc_sync_ack) (struct bfa_ioc_s *ioc);
346 bfa_boolean_t (*ioc_sync_complete) (struct bfa_ioc_s *ioc);
8b070b4a 347 bfa_boolean_t (*ioc_lpu_read_stat) (struct bfa_ioc_s *ioc);
7725ccfd
JH		 348};
349
1a4d8e1b
KG		 350/*
351 * ASIC block configurtion related
352 */
353
354typedef void (*bfa_ablk_cbfn_t)(void *, enum bfa_status);
355
356struct bfa_ablk_s {
357 struct bfa_ioc_s *ioc;
358 struct bfa_ablk_cfg_s *cfg;
359 u16 *pcifn;
360 struct bfa_dma_s dma_addr;
361 bfa_boolean_t busy;
362 struct bfa_mbox_cmd_s mb;
363 bfa_ablk_cbfn_t cbfn;
364 void *cbarg;
365 struct bfa_ioc_notify_s ioc_notify;
4507025d 366 struct bfa_mem_dma_s ablk_dma;
1a4d8e1b 367};
4507025d 368#define BFA_MEM_ABLK_DMA(__bfa) (&((__bfa)->modules.ablk.ablk_dma))
1a4d8e1b 369
51e569aa
KG		 370/*
371 * SFP module specific
372 */
373typedef void (*bfa_cb_sfp_t) (void *cbarg, bfa_status_t status);
374
375struct bfa_sfp_s {
376 void *dev;
377 struct bfa_ioc_s *ioc;
378 struct bfa_trc_mod_s *trcmod;
379 struct sfp_mem_s *sfpmem;
380 bfa_cb_sfp_t cbfn;
381 void *cbarg;
382 enum bfi_sfp_mem_e memtype; /* mem access type */
383 u32 status;
384 struct bfa_mbox_cmd_s mbcmd;
385 u8 *dbuf_kva; /* dma buf virtual address */
386 u64 dbuf_pa; /* dma buf physical address */
387 struct bfa_ioc_notify_s ioc_notify;
388 enum bfa_defs_sfp_media_e *media;
389 enum bfa_port_speed portspeed;
390 bfa_cb_sfp_t state_query_cbfn;
391 void *state_query_cbarg;
392 u8 lock;
393 u8 data_valid; /* data in dbuf is valid */
394 u8 state; /* sfp state */
395 u8 state_query_lock;
396 struct bfa_mem_dma_s sfp_dma;
397 u8 is_elb; /* eloopback */
398};
399
400#define BFA_SFP_MOD(__bfa) (&(__bfa)->modules.sfp)
401#define BFA_MEM_SFP_DMA(__bfa) (&(BFA_SFP_MOD(__bfa)->sfp_dma))
402
403u32 bfa_sfp_meminfo(void);
404
405void bfa_sfp_attach(struct bfa_sfp_s *sfp, struct bfa_ioc_s *ioc,
406 void *dev, struct bfa_trc_mod_s *trcmod);
407
408void bfa_sfp_memclaim(struct bfa_sfp_s *diag, u8 *dm_kva, u64 dm_pa);
409void bfa_sfp_intr(void *bfaarg, struct bfi_mbmsg_s *msg);
410
411bfa_status_t bfa_sfp_show(struct bfa_sfp_s *sfp, struct sfp_mem_s *sfpmem,
412 bfa_cb_sfp_t cbfn, void *cbarg);
413
414bfa_status_t bfa_sfp_media(struct bfa_sfp_s *sfp,
415 enum bfa_defs_sfp_media_e *media,
416 bfa_cb_sfp_t cbfn, void *cbarg);
417
418bfa_status_t bfa_sfp_speed(struct bfa_sfp_s *sfp,
419 enum bfa_port_speed portspeed,
420 bfa_cb_sfp_t cbfn, void *cbarg);
421
f8ceafde
JH		 422#define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
423#define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id)
424#define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva)
7725ccfd 425#define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
11189208
KG		 426#define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen)
427#define bfa_ioc_is_cna(__ioc) \
75332a70
KG		 428 ((bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_FCoE) || \
429 (bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_LL))
7725ccfd 430#define bfa_ioc_fetch_stats(__ioc, __stats) \
f8ceafde 431 (((__stats)->drv_stats) = (__ioc)->stats)
7725ccfd 432#define bfa_ioc_clr_stats(__ioc) \
6a18b167 433 memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
f8ceafde
JH		 434#define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
435#define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
7725ccfd
JH		 436#define bfa_ioc_speed_sup(__ioc) \
437 BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
a36c61f9 438#define bfa_ioc_get_nports(__ioc) \
0a20de44
KG		 439 BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
440
a36c61f9
KG		 441#define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++)
442#define BFA_IOC_FWIMG_MINSZ (16 * 1024)
11189208
KG		 443#define BFA_IOC_FW_SMEM_SIZE(__ioc) \
444 ((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \
445 ? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
a36c61f9
KG		 446#define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS)
447#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
0a20de44 448#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
7725ccfd 449
acdc79a6 450/*
7725ccfd
JH		 451 * IOC mailbox interface
452 */
453void bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd);
454void bfa_ioc_mbox_register(struct bfa_ioc_s *ioc,
455 bfa_ioc_mbox_mcfunc_t *mcfuncs);
456void bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc);
457void bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len);
11189208 458bfa_boolean_t bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg);
7725ccfd
JH		 459void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
460 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
461
acdc79a6 462/*
7725ccfd
JH		 463 * IOC interfaces
464 */
a36c61f9
KG		 465
466#define bfa_ioc_pll_init_asic(__ioc) \
467 ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
11189208 468 (__ioc)->asic_mode))
a36c61f9
KG		 469
470bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc);
11189208
KG		 471bfa_status_t bfa_ioc_cb_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
472bfa_status_t bfa_ioc_ct_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
473bfa_status_t bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
a36c61f9 474
11189208
KG		 475#define bfa_ioc_isr_mode_set(__ioc, __msix) do { \
476 if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \
477 ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \
478} while (0)
a36c61f9 479#define bfa_ioc_ownership_reset(__ioc) \
0a20de44 480 ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
10a07379 481#define bfa_ioc_get_fcmode(__ioc) ((__ioc)->fcmode)
8b070b4a
KG		 482#define bfa_ioc_lpu_read_stat(__ioc) do { \
483 if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \
484 ((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \
485} while (0)
a36c61f9 486
0a20de44 487void bfa_ioc_set_cb_hwif(struct bfa_ioc_s *ioc);
11189208
KG		 488void bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc);
489void bfa_ioc_set_ct2_hwif(struct bfa_ioc_s *ioc);
490void bfa_ioc_ct2_poweron(struct bfa_ioc_s *ioc);
a36c61f9 491
7725ccfd 492void bfa_ioc_attach(struct bfa_ioc_s *ioc, void *bfa,
a36c61f9
KG		 493 struct bfa_ioc_cbfn_s *cbfn, struct bfa_timer_mod_s *timer_mod);
494void bfa_ioc_auto_recover(bfa_boolean_t auto_recover);
7725ccfd
JH		 495void bfa_ioc_detach(struct bfa_ioc_s *ioc);
496void bfa_ioc_pci_init(struct bfa_ioc_s *ioc, struct bfa_pcidev_s *pcidev,
d37779f8 497 enum bfi_pcifn_class clscode);
7725ccfd
JH		 498void bfa_ioc_mem_claim(struct bfa_ioc_s *ioc, u8 *dm_kva, u64 dm_pa);
499void bfa_ioc_enable(struct bfa_ioc_s *ioc);
500void bfa_ioc_disable(struct bfa_ioc_s *ioc);
501bfa_boolean_t bfa_ioc_intx_claim(struct bfa_ioc_s *ioc);
502
a36c61f9 503void bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type,
11189208 504 u32 boot_env);
7725ccfd
JH		 505void bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *msg);
506void bfa_ioc_error_isr(struct bfa_ioc_s *ioc);
7725ccfd 507bfa_boolean_t bfa_ioc_is_operational(struct bfa_ioc_s *ioc);
a36c61f9 508bfa_boolean_t bfa_ioc_is_initialized(struct bfa_ioc_s *ioc);
7725ccfd 509bfa_boolean_t bfa_ioc_is_disabled(struct bfa_ioc_s *ioc);
a714134a 510bfa_boolean_t bfa_ioc_is_acq_addr(struct bfa_ioc_s *ioc);
7725ccfd
JH		 511bfa_boolean_t bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc);
512bfa_boolean_t bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc);
f1d584d7 513void bfa_ioc_reset_fwstate(struct bfa_ioc_s *ioc);
0a4b1fc0
KG		 514enum bfa_ioc_type_e bfa_ioc_get_type(struct bfa_ioc_s *ioc);
515void bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s *ioc, char *serial_num);
516void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s *ioc, char *fw_ver);
517void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s *ioc, char *optrom_ver);
518void bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model);
519void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s *ioc,
a36c61f9 520 char *manufacturer);
0a4b1fc0
KG		 521void bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s *ioc, char *chip_rev);
522enum bfa_ioc_state bfa_ioc_get_state(struct bfa_ioc_s *ioc);
523
7725ccfd
JH		 524void bfa_ioc_get_attr(struct bfa_ioc_s *ioc, struct bfa_ioc_attr_s *ioc_attr);
525void bfa_ioc_get_adapter_attr(struct bfa_ioc_s *ioc,
526 struct bfa_adapter_attr_s *ad_attr);
7725ccfd
JH		 527void bfa_ioc_debug_memclaim(struct bfa_ioc_s *ioc, void *dbg_fwsave);
528bfa_status_t bfa_ioc_debug_fwsave(struct bfa_ioc_s *ioc, void *trcdata,
529 int *trclen);
530bfa_status_t bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata,
531 int *trclen);
a36c61f9
KG		 532bfa_status_t bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf,
533 u32 *offset, int *buflen);
53440260 534bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg);
0a20de44
KG		 535void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc,
536 struct bfi_ioc_image_hdr_s *fwhdr);
537bfa_boolean_t bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc,
538 struct bfi_ioc_image_hdr_s *fwhdr);
a36c61f9
KG		 539bfa_status_t bfa_ioc_fw_stats_get(struct bfa_ioc_s *ioc, void *stats);
540bfa_status_t bfa_ioc_fw_stats_clear(struct bfa_ioc_s *ioc);
7725ccfd 541
1a4d8e1b
KG		 542/*
543 * asic block configuration related APIs
544 */
545u32 bfa_ablk_meminfo(void);
546void bfa_ablk_memclaim(struct bfa_ablk_s *ablk, u8 *dma_kva, u64 dma_pa);
547void bfa_ablk_attach(struct bfa_ablk_s *ablk, struct bfa_ioc_s *ioc);
548bfa_status_t bfa_ablk_query(struct bfa_ablk_s *ablk,
549 struct bfa_ablk_cfg_s *ablk_cfg,
550 bfa_ablk_cbfn_t cbfn, void *cbarg);
551bfa_status_t bfa_ablk_adapter_config(struct bfa_ablk_s *ablk,
552 enum bfa_mode_s mode, int max_pf, int max_vf,
553 bfa_ablk_cbfn_t cbfn, void *cbarg);
554bfa_status_t bfa_ablk_port_config(struct bfa_ablk_s *ablk, int port,
555 enum bfa_mode_s mode, int max_pf, int max_vf,
556 bfa_ablk_cbfn_t cbfn, void *cbarg);
557bfa_status_t bfa_ablk_pf_create(struct bfa_ablk_s *ablk, u16 *pcifn,
558 u8 port, enum bfi_pcifn_class personality, int bw,
559 bfa_ablk_cbfn_t cbfn, void *cbarg);
560bfa_status_t bfa_ablk_pf_delete(struct bfa_ablk_s *ablk, int pcifn,
561 bfa_ablk_cbfn_t cbfn, void *cbarg);
562bfa_status_t bfa_ablk_pf_update(struct bfa_ablk_s *ablk, int pcifn, int bw,
563 bfa_ablk_cbfn_t cbfn, void *cbarg);
564bfa_status_t bfa_ablk_optrom_en(struct bfa_ablk_s *ablk,
565 bfa_ablk_cbfn_t cbfn, void *cbarg);
566bfa_status_t bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk,
567 bfa_ablk_cbfn_t cbfn, void *cbarg);
568
7725ccfd
JH		 569/*
570 * bfa mfg wwn API functions
571 */
7725ccfd 572mac_t bfa_ioc_get_mac(struct bfa_ioc_s *ioc);
15b64a83 573mac_t bfa_ioc_get_mfg_mac(struct bfa_ioc_s *ioc);
7725ccfd 574
a36c61f9
KG		 575/*
576 * F/W Image Size & Chunk
577 */
11189208
KG		 578extern u32 bfi_image_cb_size;
579extern u32 bfi_image_ct_size;
580extern u32 bfi_image_ct2_size;
581extern u32 *bfi_image_cb;
582extern u32 *bfi_image_ct;
583extern u32 *bfi_image_ct2;
a36c61f9
KG		 584
585static inline u32 *
11189208
KG		 586bfi_image_cb_get_chunk(u32 off)
587{
588 return (u32 *)(bfi_image_cb + off);
589}
a36c61f9
KG		 590
591static inline u32 *
11189208
KG		 592bfi_image_ct_get_chunk(u32 off)
593{
594 return (u32 *)(bfi_image_ct + off);
595}
7725ccfd 596
a36c61f9 597static inline u32 *
11189208
KG		 598bfi_image_ct2_get_chunk(u32 off)
599{
600 return (u32 *)(bfi_image_ct2 + off);
601}
a36c61f9
KG		 602
603static inline u32*
11189208 604bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen, u32 off)
a36c61f9 605{
11189208
KG		 606 switch (asic_gen) {
607 case BFI_ASIC_GEN_CB:
608 return bfi_image_cb_get_chunk(off);
609 break;
610 case BFI_ASIC_GEN_CT:
611 return bfi_image_ct_get_chunk(off);
612 break;
613 case BFI_ASIC_GEN_CT2:
614 return bfi_image_ct2_get_chunk(off);
615 break;
616 default:
617 return NULL;
a36c61f9
KG		 618 }
619}
620
621static inline u32
11189208 622bfa_cb_image_get_size(enum bfi_asic_gen asic_gen)
a36c61f9 623{
11189208
KG		 624 switch (asic_gen) {
625 case BFI_ASIC_GEN_CB:
626 return bfi_image_cb_size;
627 break;
628 case BFI_ASIC_GEN_CT:
629 return bfi_image_ct_size;
630 break;
631 case BFI_ASIC_GEN_CT2:
632 return bfi_image_ct2_size;
633 break;
634 default:
635 return 0;
a36c61f9
KG		 636 }
637}
638
acdc79a6 639/*
a36c61f9
KG		 640 * CNA TRCMOD declaration
641 */
642/*
643 * !!! Only append to the enums defined here to avoid any versioning
644 * !!! needed between trace utility and driver version
645 */
646enum {
647 BFA_TRC_CNA_PORT = 1,
648 BFA_TRC_CNA_IOC = 2,
649 BFA_TRC_CNA_IOC_CB = 3,
650 BFA_TRC_CNA_IOC_CT = 4,
651};
652
653#endif /* __BFA_IOC_H__ */
kernel source for telekom puls (alcatel/mediatek)