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[SCSI] bfa: Added Fabric Assigned Address(FAA) support
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / bfa / bfa_ioc.h
CommitLineData
7725ccfd 1/*
a36c61f9 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
7725ccfd
JH		 3 * All rights reserved
4 * www.brocade.com
5 *
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#ifndef __BFA_IOC_H__
19#define __BFA_IOC_H__
20
f16a1750 21#include "bfad_drv.h"
a36c61f9
KG		 22#include "bfa_cs.h"
23#include "bfi.h"
24
f7f73812
MZ		 25#define BFA_DBG_FWTRC_ENTS (BFI_IOC_TRC_ENTS)
26#define BFA_DBG_FWTRC_LEN \
27 (BFA_DBG_FWTRC_ENTS * sizeof(struct bfa_trc_s) + \
28 (sizeof(struct bfa_trc_mod_s) - \
29 BFA_TRC_MAX * sizeof(struct bfa_trc_s)))
acdc79a6 30/*
a36c61f9
KG		 31 * BFA timer declarations
32 */
33typedef void (*bfa_timer_cbfn_t)(void *);
34
acdc79a6 35/*
a36c61f9
KG		 36 * BFA timer data structure
37 */
38struct bfa_timer_s {
39 struct list_head qe;
40 bfa_timer_cbfn_t timercb;
41 void *arg;
acdc79a6 42 int timeout; /* in millisecs */
a36c61f9
KG		 43};
44
acdc79a6 45/*
a36c61f9
KG		 46 * Timer module structure
47 */
48struct bfa_timer_mod_s {
49 struct list_head timer_q;
50};
51
acdc79a6 52#define BFA_TIMER_FREQ 200 /* specified in millisecs */
a36c61f9
KG		 53
54void bfa_timer_beat(struct bfa_timer_mod_s *mod);
a36c61f9
KG		 55void bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
56 bfa_timer_cbfn_t timercb, void *arg,
57 unsigned int timeout);
58void bfa_timer_stop(struct bfa_timer_s *timer);
59
acdc79a6 60/*
a36c61f9
KG		 61 * Generic Scatter Gather Element used by driver
62 */
63struct bfa_sge_s {
64 u32 sg_len;
65 void *sg_addr;
66};
67
68#define bfa_sge_word_swap(__sge) do { \
53440260
JH		 69 ((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]); \
70 ((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]); \
71 ((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]); \
a36c61f9
KG		 72} while (0)
73
74#define bfa_swap_words(_x) ( \
75 ((_x) << 32) | ((_x) >> 32))
76
f16a1750 77#ifdef __BIG_ENDIAN
a36c61f9
KG		 78#define bfa_sge_to_be(_x)
79#define bfa_sge_to_le(_x) bfa_sge_word_swap(_x)
80#define bfa_sgaddr_le(_x) bfa_swap_words(_x)
81#else
82#define bfa_sge_to_be(_x) bfa_sge_word_swap(_x)
83#define bfa_sge_to_le(_x)
84#define bfa_sgaddr_le(_x) (_x)
85#endif
7725ccfd 86
acdc79a6 87/*
7725ccfd
JH		 88 * PCI device information required by IOC
89 */
90struct bfa_pcidev_s {
a36c61f9
KG		 91 int pci_slot;
92 u8 pci_func;
acdc79a6 93 u16 device_id;
1a4d8e1b 94 u16 ssid;
acdc79a6 95 void __iomem *pci_bar_kva;
7725ccfd
JH		 96};
97
acdc79a6 98/*
7725ccfd
JH		 99 * Structure used to remember the DMA-able memory block's KVA and Physical
100 * Address
101 */
102struct bfa_dma_s {
a36c61f9
KG		 103 void *kva; /* ! Kernel virtual address */
104 u64 pa; /* ! Physical address */
7725ccfd
JH		 105};
106
107#define BFA_DMA_ALIGN_SZ 256
108#define BFA_ROUNDUP(_l, _s) (((_l) + ((_s) - 1)) & ~((_s) - 1))
109
acdc79a6 110/*
a36c61f9
KG		 111 * smem size for Crossbow and Catapult
112 */
113#define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
114#define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
7725ccfd 115
7725ccfd
JH		 116#define bfa_dma_be_addr_set(dma_addr, pa) \
117 __bfa_dma_be_addr_set(&dma_addr, (u64)pa)
118static inline void
119__bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
120{
50444a34 121 dma_addr->a32.addr_lo = cpu_to_be32(pa);
f16a1750 122 dma_addr->a32.addr_hi = cpu_to_be32(pa >> 32);
7725ccfd
JH		 123}
124
85ce928d
KG		 125#define bfa_alen_set(__alen, __len, __pa) \
126 __bfa_alen_set(__alen, __len, (u64)__pa)
127
128static inline void
129__bfa_alen_set(struct bfi_alen_s *alen, u32 len, u64 pa)
130{
131 alen->al_len = cpu_to_be32(len);
132 bfa_dma_be_addr_set(alen->al_addr, pa);
133}
134
7725ccfd 135struct bfa_ioc_regs_s {
53440260
JH		 136 void __iomem *hfn_mbox_cmd;
137 void __iomem *hfn_mbox;
138 void __iomem *lpu_mbox_cmd;
139 void __iomem *lpu_mbox;
8b070b4a 140 void __iomem *lpu_read_stat;
53440260
JH		 141 void __iomem *pss_ctl_reg;
142 void __iomem *pss_err_status_reg;
143 void __iomem *app_pll_fast_ctl_reg;
144 void __iomem *app_pll_slow_ctl_reg;
145 void __iomem *ioc_sem_reg;
146 void __iomem *ioc_usage_sem_reg;
147 void __iomem *ioc_init_sem_reg;
148 void __iomem *ioc_usage_reg;
149 void __iomem *host_page_num_fn;
150 void __iomem *heartbeat;
151 void __iomem *ioc_fwstate;
f1d584d7 152 void __iomem *alt_ioc_fwstate;
53440260 153 void __iomem *ll_halt;
f1d584d7 154 void __iomem *alt_ll_halt;
53440260 155 void __iomem *err_set;
f1d584d7 156 void __iomem *ioc_fail_sync;
53440260
JH		 157 void __iomem *shirq_isr_next;
158 void __iomem *shirq_msk_next;
159 void __iomem *smem_page_start;
7725ccfd
JH		 160 u32 smem_pg0;
161};
162
53440260 163#define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
7725ccfd 164#define bfa_mem_write(_raddr, _off, _val) \
53440260 165 writel(swab32((_val)), ((_raddr) + (_off)))
acdc79a6 166/*
7725ccfd
JH		 167 * IOC Mailbox structures
168 */
169struct bfa_mbox_cmd_s {
a36c61f9 170 struct list_head qe;
7725ccfd
JH		 171 u32 msg[BFI_IOC_MSGSZ];
172};
173
acdc79a6 174/*
7725ccfd
JH		 175 * IOC mailbox module
176 */
177typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg_s *m);
178struct bfa_ioc_mbox_mod_s {
a36c61f9
KG		 179 struct list_head cmd_q; /* pending mbox queue */
180 int nmclass; /* number of handlers */
7725ccfd
JH		 181 struct {
182 bfa_ioc_mbox_mcfunc_t cbfn; /* message handlers */
183 void *cbarg;
184 } mbhdlr[BFI_MC_MAX];
185};
186
acdc79a6 187/*
7725ccfd
JH		 188 * IOC callback function interfaces
189 */
190typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
191typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
192typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
193typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
194struct bfa_ioc_cbfn_s {
195 bfa_ioc_enable_cbfn_t enable_cbfn;
196 bfa_ioc_disable_cbfn_t disable_cbfn;
197 bfa_ioc_hbfail_cbfn_t hbfail_cbfn;
198 bfa_ioc_reset_cbfn_t reset_cbfn;
199};
200
acdc79a6 201/*
d37779f8 202 * IOC event notification mechanism.
7725ccfd 203 */
d37779f8
KG		 204enum bfa_ioc_event_e {
205 BFA_IOC_E_ENABLED = 1,
206 BFA_IOC_E_DISABLED = 2,
207 BFA_IOC_E_FAILED = 3,
208};
209
210typedef void (*bfa_ioc_notify_cbfn_t)(void *, enum bfa_ioc_event_e);
211
212struct bfa_ioc_notify_s {
7725ccfd 213 struct list_head qe;
d37779f8 214 bfa_ioc_notify_cbfn_t cbfn;
7725ccfd
JH		 215 void *cbarg;
216};
217
acdc79a6 218/*
d37779f8 219 * Initialize a IOC event notification structure
7725ccfd 220 */
d37779f8 221#define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \
7725ccfd
JH		 222 (__notify)->cbfn = (__cbfn); \
223 (__notify)->cbarg = (__cbarg); \
224} while (0)
225
a36c61f9
KG		 226struct bfa_iocpf_s {
227 bfa_fsm_t fsm;
228 struct bfa_ioc_s *ioc;
775c7742 229 bfa_boolean_t fw_mismatch_notified;
a36c61f9 230 bfa_boolean_t auto_recover;
775c7742 231 u32 poll_time;
a36c61f9
KG		 232};
233
7725ccfd
JH		 234struct bfa_ioc_s {
235 bfa_fsm_t fsm;
236 struct bfa_s *bfa;
237 struct bfa_pcidev_s pcidev;
a36c61f9
KG		 238 struct bfa_timer_mod_s *timer_mod;
239 struct bfa_timer_s ioc_timer;
240 struct bfa_timer_s sem_timer;
241 struct bfa_timer_s hb_timer;
7725ccfd 242 u32 hb_count;
d37779f8 243 struct list_head notify_q;
7725ccfd
JH		 244 void *dbg_fwsave;
245 int dbg_fwsave_len;
246 bfa_boolean_t dbg_fwsave_once;
d37779f8 247 enum bfi_pcifn_class clscode;
a36c61f9 248 struct bfa_ioc_regs_s ioc_regs;
7725ccfd 249 struct bfa_trc_mod_s *trcmod;
7725ccfd 250 struct bfa_ioc_drv_stats_s stats;
7725ccfd 251 bfa_boolean_t fcmode;
7725ccfd 252 bfa_boolean_t pllinit;
a36c61f9 253 bfa_boolean_t stats_busy; /* outstanding stats */
7725ccfd 254 u8 port_id;
7725ccfd
JH		 255 struct bfa_dma_s attr_dma;
256 struct bfi_ioc_attr_s *attr;
257 struct bfa_ioc_cbfn_s *cbfn;
258 struct bfa_ioc_mbox_mod_s mbox_mod;
a36c61f9
KG		 259 struct bfa_ioc_hwif_s *ioc_hwif;
260 struct bfa_iocpf_s iocpf;
11189208
KG		 261 enum bfi_asic_gen asic_gen;
262 enum bfi_asic_mode asic_mode;
263 enum bfi_port_mode port0_mode;
264 enum bfi_port_mode port1_mode;
1a4d8e1b
KG		 265 enum bfa_mode_s port_mode;
266 u8 ad_cap_bm; /* adapter cap bit mask */
267 u8 port_mode_cfg; /* config port mode */
0a20de44
KG		 268};
269
270struct bfa_ioc_hwif_s {
11189208 271 bfa_status_t (*ioc_pll_init) (void __iomem *rb, enum bfi_asic_mode m);
a36c61f9
KG		 272 bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc);
273 void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc);
274 void (*ioc_reg_init) (struct bfa_ioc_s *ioc);
275 void (*ioc_map_port) (struct bfa_ioc_s *ioc);
276 void (*ioc_isr_mode_set) (struct bfa_ioc_s *ioc,
277 bfa_boolean_t msix);
f1d584d7 278 void (*ioc_notify_fail) (struct bfa_ioc_s *ioc);
a36c61f9 279 void (*ioc_ownership_reset) (struct bfa_ioc_s *ioc);
45d7f0cc 280 bfa_boolean_t (*ioc_sync_start) (struct bfa_ioc_s *ioc);
f1d584d7
KG		 281 void (*ioc_sync_join) (struct bfa_ioc_s *ioc);
282 void (*ioc_sync_leave) (struct bfa_ioc_s *ioc);
283 void (*ioc_sync_ack) (struct bfa_ioc_s *ioc);
284 bfa_boolean_t (*ioc_sync_complete) (struct bfa_ioc_s *ioc);
8b070b4a 285 bfa_boolean_t (*ioc_lpu_read_stat) (struct bfa_ioc_s *ioc);
7725ccfd
JH		 286};
287
1a4d8e1b
KG		 288/*
289 * ASIC block configurtion related
290 */
291
292typedef void (*bfa_ablk_cbfn_t)(void *, enum bfa_status);
293
294struct bfa_ablk_s {
295 struct bfa_ioc_s *ioc;
296 struct bfa_ablk_cfg_s *cfg;
297 u16 *pcifn;
298 struct bfa_dma_s dma_addr;
299 bfa_boolean_t busy;
300 struct bfa_mbox_cmd_s mb;
301 bfa_ablk_cbfn_t cbfn;
302 void *cbarg;
303 struct bfa_ioc_notify_s ioc_notify;
304};
305
f8ceafde
JH		 306#define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
307#define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id)
308#define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva)
7725ccfd 309#define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
11189208
KG		 310#define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen)
311#define bfa_ioc_is_cna(__ioc) \
75332a70
KG		 312 ((bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_FCoE) || \
313 (bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_LL))
7725ccfd 314#define bfa_ioc_fetch_stats(__ioc, __stats) \
f8ceafde 315 (((__stats)->drv_stats) = (__ioc)->stats)
7725ccfd 316#define bfa_ioc_clr_stats(__ioc) \
6a18b167 317 memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
f8ceafde
JH		 318#define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
319#define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
7725ccfd
JH		 320#define bfa_ioc_speed_sup(__ioc) \
321 BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
a36c61f9 322#define bfa_ioc_get_nports(__ioc) \
0a20de44
KG		 323 BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
324
a36c61f9
KG		 325#define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++)
326#define BFA_IOC_FWIMG_MINSZ (16 * 1024)
11189208
KG		 327#define BFA_IOC_FW_SMEM_SIZE(__ioc) \
328 ((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \
329 ? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
a36c61f9
KG		 330#define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS)
331#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
0a20de44 332#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
7725ccfd 333
acdc79a6 334/*
7725ccfd
JH		 335 * IOC mailbox interface
336 */
337void bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd);
338void bfa_ioc_mbox_register(struct bfa_ioc_s *ioc,
339 bfa_ioc_mbox_mcfunc_t *mcfuncs);
340void bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc);
341void bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len);
11189208 342bfa_boolean_t bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg);
7725ccfd
JH		 343void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
344 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
345
acdc79a6 346/*
7725ccfd
JH		 347 * IOC interfaces
348 */
a36c61f9
KG		 349
350#define bfa_ioc_pll_init_asic(__ioc) \
351 ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
11189208 352 (__ioc)->asic_mode))
a36c61f9
KG		 353
354bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc);
11189208
KG		 355bfa_status_t bfa_ioc_cb_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
356bfa_status_t bfa_ioc_ct_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
357bfa_status_t bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
a36c61f9 358
11189208
KG		 359#define bfa_ioc_isr_mode_set(__ioc, __msix) do { \
360 if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \
361 ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \
362} while (0)
a36c61f9 363#define bfa_ioc_ownership_reset(__ioc) \
0a20de44 364 ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
8b070b4a
KG		 365#define bfa_ioc_lpu_read_stat(__ioc) do { \
366 if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \
367 ((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \
368} while (0)
a36c61f9 369
0a20de44 370void bfa_ioc_set_cb_hwif(struct bfa_ioc_s *ioc);
11189208
KG		 371void bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc);
372void bfa_ioc_set_ct2_hwif(struct bfa_ioc_s *ioc);
373void bfa_ioc_ct2_poweron(struct bfa_ioc_s *ioc);
a36c61f9 374
7725ccfd 375void bfa_ioc_attach(struct bfa_ioc_s *ioc, void *bfa,
a36c61f9
KG		 376 struct bfa_ioc_cbfn_s *cbfn, struct bfa_timer_mod_s *timer_mod);
377void bfa_ioc_auto_recover(bfa_boolean_t auto_recover);
7725ccfd
JH		 378void bfa_ioc_detach(struct bfa_ioc_s *ioc);
379void bfa_ioc_pci_init(struct bfa_ioc_s *ioc, struct bfa_pcidev_s *pcidev,
d37779f8 380 enum bfi_pcifn_class clscode);
7725ccfd
JH		 381void bfa_ioc_mem_claim(struct bfa_ioc_s *ioc, u8 *dm_kva, u64 dm_pa);
382void bfa_ioc_enable(struct bfa_ioc_s *ioc);
383void bfa_ioc_disable(struct bfa_ioc_s *ioc);
384bfa_boolean_t bfa_ioc_intx_claim(struct bfa_ioc_s *ioc);
385
a36c61f9 386void bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type,
11189208 387 u32 boot_env);
7725ccfd
JH		 388void bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *msg);
389void bfa_ioc_error_isr(struct bfa_ioc_s *ioc);
7725ccfd 390bfa_boolean_t bfa_ioc_is_operational(struct bfa_ioc_s *ioc);
a36c61f9 391bfa_boolean_t bfa_ioc_is_initialized(struct bfa_ioc_s *ioc);
7725ccfd 392bfa_boolean_t bfa_ioc_is_disabled(struct bfa_ioc_s *ioc);
a714134a 393bfa_boolean_t bfa_ioc_is_acq_addr(struct bfa_ioc_s *ioc);
7725ccfd
JH		 394bfa_boolean_t bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc);
395bfa_boolean_t bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc);
f1d584d7 396void bfa_ioc_reset_fwstate(struct bfa_ioc_s *ioc);
0a4b1fc0
KG		 397enum bfa_ioc_type_e bfa_ioc_get_type(struct bfa_ioc_s *ioc);
398void bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s *ioc, char *serial_num);
399void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s *ioc, char *fw_ver);
400void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s *ioc, char *optrom_ver);
401void bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model);
402void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s *ioc,
a36c61f9 403 char *manufacturer);
0a4b1fc0
KG		 404void bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s *ioc, char *chip_rev);
405enum bfa_ioc_state bfa_ioc_get_state(struct bfa_ioc_s *ioc);
406
7725ccfd
JH		 407void bfa_ioc_get_attr(struct bfa_ioc_s *ioc, struct bfa_ioc_attr_s *ioc_attr);
408void bfa_ioc_get_adapter_attr(struct bfa_ioc_s *ioc,
409 struct bfa_adapter_attr_s *ad_attr);
7725ccfd
JH		 410void bfa_ioc_debug_memclaim(struct bfa_ioc_s *ioc, void *dbg_fwsave);
411bfa_status_t bfa_ioc_debug_fwsave(struct bfa_ioc_s *ioc, void *trcdata,
412 int *trclen);
413bfa_status_t bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata,
414 int *trclen);
a36c61f9
KG		 415bfa_status_t bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf,
416 u32 *offset, int *buflen);
7725ccfd
JH		 417void bfa_ioc_set_fcmode(struct bfa_ioc_s *ioc);
418bfa_boolean_t bfa_ioc_get_fcmode(struct bfa_ioc_s *ioc);
53440260 419bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg);
0a20de44
KG		 420void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc,
421 struct bfi_ioc_image_hdr_s *fwhdr);
422bfa_boolean_t bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc,
423 struct bfi_ioc_image_hdr_s *fwhdr);
a36c61f9
KG		 424bfa_status_t bfa_ioc_fw_stats_get(struct bfa_ioc_s *ioc, void *stats);
425bfa_status_t bfa_ioc_fw_stats_clear(struct bfa_ioc_s *ioc);
7725ccfd 426
1a4d8e1b
KG		 427/*
428 * asic block configuration related APIs
429 */
430u32 bfa_ablk_meminfo(void);
431void bfa_ablk_memclaim(struct bfa_ablk_s *ablk, u8 *dma_kva, u64 dma_pa);
432void bfa_ablk_attach(struct bfa_ablk_s *ablk, struct bfa_ioc_s *ioc);
433bfa_status_t bfa_ablk_query(struct bfa_ablk_s *ablk,
434 struct bfa_ablk_cfg_s *ablk_cfg,
435 bfa_ablk_cbfn_t cbfn, void *cbarg);
436bfa_status_t bfa_ablk_adapter_config(struct bfa_ablk_s *ablk,
437 enum bfa_mode_s mode, int max_pf, int max_vf,
438 bfa_ablk_cbfn_t cbfn, void *cbarg);
439bfa_status_t bfa_ablk_port_config(struct bfa_ablk_s *ablk, int port,
440 enum bfa_mode_s mode, int max_pf, int max_vf,
441 bfa_ablk_cbfn_t cbfn, void *cbarg);
442bfa_status_t bfa_ablk_pf_create(struct bfa_ablk_s *ablk, u16 *pcifn,
443 u8 port, enum bfi_pcifn_class personality, int bw,
444 bfa_ablk_cbfn_t cbfn, void *cbarg);
445bfa_status_t bfa_ablk_pf_delete(struct bfa_ablk_s *ablk, int pcifn,
446 bfa_ablk_cbfn_t cbfn, void *cbarg);
447bfa_status_t bfa_ablk_pf_update(struct bfa_ablk_s *ablk, int pcifn, int bw,
448 bfa_ablk_cbfn_t cbfn, void *cbarg);
449bfa_status_t bfa_ablk_optrom_en(struct bfa_ablk_s *ablk,
450 bfa_ablk_cbfn_t cbfn, void *cbarg);
451bfa_status_t bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk,
452 bfa_ablk_cbfn_t cbfn, void *cbarg);
453
7725ccfd
JH		 454/*
455 * bfa mfg wwn API functions
456 */
7725ccfd 457mac_t bfa_ioc_get_mac(struct bfa_ioc_s *ioc);
15b64a83 458mac_t bfa_ioc_get_mfg_mac(struct bfa_ioc_s *ioc);
7725ccfd 459
a36c61f9
KG		 460/*
461 * F/W Image Size & Chunk
462 */
11189208
KG		 463extern u32 bfi_image_cb_size;
464extern u32 bfi_image_ct_size;
465extern u32 bfi_image_ct2_size;
466extern u32 *bfi_image_cb;
467extern u32 *bfi_image_ct;
468extern u32 *bfi_image_ct2;
a36c61f9
KG		 469
470static inline u32 *
11189208
KG		 471bfi_image_cb_get_chunk(u32 off)
472{
473 return (u32 *)(bfi_image_cb + off);
474}
a36c61f9
KG		 475
476static inline u32 *
11189208
KG		 477bfi_image_ct_get_chunk(u32 off)
478{
479 return (u32 *)(bfi_image_ct + off);
480}
7725ccfd 481
a36c61f9 482static inline u32 *
11189208
KG		 483bfi_image_ct2_get_chunk(u32 off)
484{
485 return (u32 *)(bfi_image_ct2 + off);
486}
a36c61f9
KG		 487
488static inline u32*
11189208 489bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen, u32 off)
a36c61f9 490{
11189208
KG		 491 switch (asic_gen) {
492 case BFI_ASIC_GEN_CB:
493 return bfi_image_cb_get_chunk(off);
494 break;
495 case BFI_ASIC_GEN_CT:
496 return bfi_image_ct_get_chunk(off);
497 break;
498 case BFI_ASIC_GEN_CT2:
499 return bfi_image_ct2_get_chunk(off);
500 break;
501 default:
502 return NULL;
a36c61f9
KG		 503 }
504}
505
506static inline u32
11189208 507bfa_cb_image_get_size(enum bfi_asic_gen asic_gen)
a36c61f9 508{
11189208
KG		 509 switch (asic_gen) {
510 case BFI_ASIC_GEN_CB:
511 return bfi_image_cb_size;
512 break;
513 case BFI_ASIC_GEN_CT:
514 return bfi_image_ct_size;
515 break;
516 case BFI_ASIC_GEN_CT2:
517 return bfi_image_ct2_size;
518 break;
519 default:
520 return 0;
a36c61f9
KG		 521 }
522}
523
acdc79a6 524/*
a36c61f9
KG		 525 * CNA TRCMOD declaration
526 */
527/*
528 * !!! Only append to the enums defined here to avoid any versioning
529 * !!! needed between trace utility and driver version
530 */
531enum {
532 BFA_TRC_CNA_PORT = 1,
533 BFA_TRC_CNA_IOC = 2,
534 BFA_TRC_CNA_IOC_CB = 3,
535 BFA_TRC_CNA_IOC_CT = 4,
536};
537
538#endif /* __BFA_IOC_H__ */
kernel source for telekom puls (alcatel/mediatek)