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Fix common misspellings
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / w83793.c
CommitLineData
6800c3d0
RM		 1/*
2 w83793.c - Linux kernel driver for hardware monitoring
3 Copyright (C) 2006 Winbond Electronics Corp.
4 Yuan Mu
5 Rudolf Marek <r.marek@assembler.cz>
5852f960
SA		 6 Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG.
7 Watchdog driver part
8 (Based partially on fschmd driver,
9 Copyright 2007-2008 by Hans de Goede)
6800c3d0
RM		 10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation - version 2.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 02110-1301 USA.
24*/
25
26/*
27 Supports following chips:
28
29 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
30 w83793 10 12 8 6 0x7b 0x5ca3 yes no
31*/
32
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/i2c.h>
37#include <linux/hwmon.h>
38#include <linux/hwmon-vid.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
41#include <linux/mutex.h>
5852f960
SA		 42#include <linux/fs.h>
43#include <linux/watchdog.h>
44#include <linux/miscdevice.h>
45#include <linux/uaccess.h>
46#include <linux/kref.h>
47#include <linux/notifier.h>
48#include <linux/reboot.h>
49
50/* Default values */
51#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 52
53/* Addresses to scan */
25e9c86d
MH		 54static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
55 I2C_CLIENT_END };
6800c3d0
RM		 56
57/* Insmod parameters */
3aed198c
JD		 58
59static unsigned short force_subclients[4];
60module_param_array(force_subclients, short, NULL, 0);
61MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
6800c3d0
RM		 62 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
63
64static int reset;
65module_param(reset, bool, 0);
66MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
67
5852f960
SA		 68static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
69module_param(timeout, int, 0);
70MODULE_PARM_DESC(timeout,
71 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
72 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
73
74static int nowayout = WATCHDOG_NOWAYOUT;
75module_param(nowayout, int, 0);
76MODULE_PARM_DESC(nowayout,
77 "Watchdog cannot be stopped once started (default="
78 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
79
6800c3d0
RM		 80/*
81 Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
82 as ID, Bank Select registers
83*/
84#define W83793_REG_BANKSEL 0x00
85#define W83793_REG_VENDORID 0x0d
86#define W83793_REG_CHIPID 0x0e
87#define W83793_REG_DEVICEID 0x0f
88
89#define W83793_REG_CONFIG 0x40
90#define W83793_REG_MFC 0x58
91#define W83793_REG_FANIN_CTRL 0x5c
92#define W83793_REG_FANIN_SEL 0x5d
93#define W83793_REG_I2C_ADDR 0x0b
94#define W83793_REG_I2C_SUBADDR 0x0c
95#define W83793_REG_VID_INA 0x05
96#define W83793_REG_VID_INB 0x06
97#define W83793_REG_VID_LATCHA 0x07
98#define W83793_REG_VID_LATCHB 0x08
99#define W83793_REG_VID_CTRL 0x59
100
5852f960
SA		 101#define W83793_REG_WDT_LOCK 0x01
102#define W83793_REG_WDT_ENABLE 0x02
103#define W83793_REG_WDT_STATUS 0x03
104#define W83793_REG_WDT_TIMEOUT 0x04
105
6800c3d0
RM		 106static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
107
108#define TEMP_READ 0
109#define TEMP_CRIT 1
110#define TEMP_CRIT_HYST 2
111#define TEMP_WARN 3
112#define TEMP_WARN_HYST 4
113/* only crit and crit_hyst affect real-time alarm status
114 current crit crit_hyst warn warn_hyst */
115static u16 W83793_REG_TEMP[][5] = {
116 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
117 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
118 {0x1e, 0x80, 0x81, 0x82, 0x83},
119 {0x1f, 0x84, 0x85, 0x86, 0x87},
120 {0x20, 0x88, 0x89, 0x8a, 0x8b},
121 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
122};
123
124#define W83793_REG_TEMP_LOW_BITS 0x22
125
126#define W83793_REG_BEEP(index) (0x53 + (index))
127#define W83793_REG_ALARM(index) (0x4b + (index))
128
129#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
130#define W83793_REG_IRQ_CTRL 0x50
131#define W83793_REG_OVT_CTRL 0x51
132#define W83793_REG_OVT_BEEP 0x52
133
134#define IN_READ 0
135#define IN_MAX 1
136#define IN_LOW 2
137static const u16 W83793_REG_IN[][3] = {
138 /* Current, High, Low */
139 {0x10, 0x60, 0x61}, /* Vcore A */
140 {0x11, 0x62, 0x63}, /* Vcore B */
141 {0x12, 0x64, 0x65}, /* Vtt */
142 {0x14, 0x6a, 0x6b}, /* VSEN1 */
143 {0x15, 0x6c, 0x6d}, /* VSEN2 */
144 {0x16, 0x6e, 0x6f}, /* +3VSEN */
145 {0x17, 0x70, 0x71}, /* +12VSEN */
146 {0x18, 0x72, 0x73}, /* 5VDD */
147 {0x19, 0x74, 0x75}, /* 5VSB */
148 {0x1a, 0x76, 0x77}, /* VBAT */
149};
150
151/* Low Bits of Vcore A/B Vtt Read/High/Low */
152static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
153static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 154static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 155
156#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
157#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
158
159#define W83793_REG_PWM_DEFAULT 0xb2
160#define W83793_REG_PWM_ENABLE 0x207
161#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
162#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
163#define W83793_REG_TEMP_CRITICAL 0xc5
164
165#define PWM_DUTY 0
166#define PWM_START 1
167#define PWM_NONSTOP 2
5aebefb0 168#define PWM_STOP_TIME 3
6800c3d0
RM		 169#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
170 (nr) == 1 ? 0x220 : 0x218) + (index))
171
172/* bit field, fan1 is bit0, fan2 is bit1 ... */
173#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
174#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
175#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
176#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
177#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
178#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
179
180static inline unsigned long FAN_FROM_REG(u16 val)
181{
182 if ((val >= 0xfff) || (val == 0))
183 return 0;
184 return (1350000UL / val);
185}
186
187static inline u16 FAN_TO_REG(long rpm)
188{
189 if (rpm <= 0)
190 return 0x0fff;
191 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
192}
193
194static inline unsigned long TIME_FROM_REG(u8 reg)
195{
196 return (reg * 100);
197}
198
199static inline u8 TIME_TO_REG(unsigned long val)
200{
201 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
202}
203
204static inline long TEMP_FROM_REG(s8 reg)
205{
206 return (reg * 1000);
207}
208
209static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
210{
211 return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max);
212}
213
214struct w83793_data {
6800c3d0 215 struct i2c_client *lm75[2];
1beeffe4 216 struct device *hwmon_dev;
6800c3d0
RM		 217 struct mutex update_lock;
218 char valid; /* !=0 if following fields are valid */
219 unsigned long last_updated; /* In jiffies */
220 unsigned long last_nonvolatile; /* In jiffies, last time we update the
221 nonvolatile registers */
222
223 u8 bank;
224 u8 vrm;
225 u8 vid[2];
226 u8 in[10][3]; /* Register value, read/high/low */
227 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
228
229 u16 has_fan; /* Only fan1- fan5 has own pins */
230 u16 fan[12]; /* Register value combine */
231 u16 fan_min[12]; /* Register value combine */
232
233 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
234 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
235 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
236 byte 1: Temp R1,R2 mode, each has 1 bit */
237 u8 temp_critical; /* If reached all fan will be at full speed */
238 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
239
240 u8 has_pwm;
46bed4df 241 u8 has_temp;
c70a8c34 242 u8 has_vid;
6800c3d0
RM		 243 u8 pwm_enable; /* Register value, each Temp has 1 bit */
244 u8 pwm_uptime; /* Register value */
245 u8 pwm_downtime; /* Register value */
246 u8 pwm_default; /* All fan default pwm, next poweron valid */
247 u8 pwm[8][3]; /* Register value */
248 u8 pwm_stop_time[8];
249 u8 temp_cruise[6];
250
251 u8 alarms[5]; /* realtime status registers */
252 u8 beeps[5];
253 u8 beep_enable;
254 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
255 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
256 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 257
258 /* watchdog */
259 struct i2c_client *client;
260 struct mutex watchdog_lock;
261 struct list_head list; /* member of the watchdog_data_list */
262 struct kref kref;
263 struct miscdevice watchdog_miscdev;
264 unsigned long watchdog_is_open;
265 char watchdog_expect_close;
266 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
267 unsigned int watchdog_caused_reboot;
268 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 269};
270
5852f960
SA		 271/* Somewhat ugly :( global data pointer list with all devices, so that
272 we can find our device data as when using misc_register. There is no
273 other method to get to one's device data from the open file-op and
274 for usage in the reboot notifier callback. */
275static LIST_HEAD(watchdog_data_list);
276
277/* Note this lock not only protect list access, but also data.kref access */
278static DEFINE_MUTEX(watchdog_data_mutex);
279
280/* Release our data struct when we're detached from the i2c client *and* all
281 references to our watchdog device are released */
282static void w83793_release_resources(struct kref *ref)
283{
284 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
285 kfree(data);
286}
287
6800c3d0
RM		 288static u8 w83793_read_value(struct i2c_client *client, u16 reg);
289static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 290static int w83793_probe(struct i2c_client *client,
291 const struct i2c_device_id *id);
310ec792 292static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 293 struct i2c_board_info *info);
294static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 295static void w83793_init_client(struct i2c_client *client);
296static void w83793_update_nonvolatile(struct device *dev);
297static struct w83793_data *w83793_update_device(struct device *dev);
298
a7f13a6e 299static const struct i2c_device_id w83793_id[] = {
1f86df49 300 { "w83793", 0 },
a7f13a6e
JD		 301 { }
302};
303MODULE_DEVICE_TABLE(i2c, w83793_id);
304
6800c3d0 305static struct i2c_driver w83793_driver = {
a7f13a6e 306 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 307 .driver = {
308 .name = "w83793",
309 },
a7f13a6e
JD		 310 .probe = w83793_probe,
311 .remove = w83793_remove,
312 .id_table = w83793_id,
313 .detect = w83793_detect,
c3813d6a 314 .address_list = normal_i2c,
6800c3d0
RM		 315};
316
317static ssize_t
318show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
319{
8f74efe8 320 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 321 return sprintf(buf, "%d\n", data->vrm);
322}
323
324static ssize_t
325show_vid(struct device *dev, struct device_attribute *attr, char *buf)
326{
327 struct w83793_data *data = w83793_update_device(dev);
328 struct sensor_device_attribute_2 *sensor_attr =
329 to_sensor_dev_attr_2(attr);
330 int index = sensor_attr->index;
331
332 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
333}
334
335static ssize_t
336store_vrm(struct device *dev, struct device_attribute *attr,
337 const char *buf, size_t count)
338{
8f74efe8 339 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 340 data->vrm = simple_strtoul(buf, NULL, 10);
341 return count;
342}
343
344#define ALARM_STATUS 0
345#define BEEP_ENABLE 1
346static ssize_t
347show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
348{
349 struct w83793_data *data = w83793_update_device(dev);
350 struct sensor_device_attribute_2 *sensor_attr =
351 to_sensor_dev_attr_2(attr);
352 int nr = sensor_attr->nr;
353 int index = sensor_attr->index >> 3;
354 int bit = sensor_attr->index & 0x07;
355 u8 val;
356
357 if (ALARM_STATUS == nr) {
358 val = (data->alarms[index] >> (bit)) & 1;
359 } else { /* BEEP_ENABLE */
360 val = (data->beeps[index] >> (bit)) & 1;
361 }
362
363 return sprintf(buf, "%u\n", val);
364}
365
366static ssize_t
367store_beep(struct device *dev, struct device_attribute *attr,
368 const char *buf, size_t count)
369{
370 struct i2c_client *client = to_i2c_client(dev);
371 struct w83793_data *data = i2c_get_clientdata(client);
372 struct sensor_device_attribute_2 *sensor_attr =
373 to_sensor_dev_attr_2(attr);
374 int index = sensor_attr->index >> 3;
375 int shift = sensor_attr->index & 0x07;
376 u8 beep_bit = 1 << shift;
377 u8 val;
378
379 val = simple_strtoul(buf, NULL, 10);
380 if (val != 0 && val != 1)
381 return -EINVAL;
382
383 mutex_lock(&data->update_lock);
384 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
385 data->beeps[index] &= ~beep_bit;
386 data->beeps[index] |= val << shift;
387 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
388 mutex_unlock(&data->update_lock);
389
390 return count;
391}
392
393static ssize_t
394show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
395{
396 struct w83793_data *data = w83793_update_device(dev);
397 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
398}
399
400static ssize_t
401store_beep_enable(struct device *dev, struct device_attribute *attr,
402 const char *buf, size_t count)
403{
404 struct i2c_client *client = to_i2c_client(dev);
405 struct w83793_data *data = i2c_get_clientdata(client);
406 u8 val = simple_strtoul(buf, NULL, 10);
407
408 if (val != 0 && val != 1)
409 return -EINVAL;
410
411 mutex_lock(&data->update_lock);
412 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
413 & 0xfd;
414 data->beep_enable |= val << 1;
415 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
416 mutex_unlock(&data->update_lock);
417
418 return count;
419}
420
421/* Write any value to clear chassis alarm */
422static ssize_t
a516dc3e
JD		 423store_chassis_clear_legacy(struct device *dev,
424 struct device_attribute *attr, const char *buf,
425 size_t count)
6800c3d0
RM		 426{
427 struct i2c_client *client = to_i2c_client(dev);
428 struct w83793_data *data = i2c_get_clientdata(client);
429 u8 val;
430
a516dc3e
JD		 431 dev_warn(dev, "Attribute chassis is deprecated, "
432 "use intrusion0_alarm instead\n");
433
6800c3d0
RM		 434 mutex_lock(&data->update_lock);
435 val = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
436 val |= 0x80;
437 w83793_write_value(client, W83793_REG_CLR_CHASSIS, val);
438 mutex_unlock(&data->update_lock);
439 return count;
440}
441
a516dc3e
JD		 442/* Write 0 to clear chassis alarm */
443static ssize_t
444store_chassis_clear(struct device *dev,
445 struct device_attribute *attr, const char *buf,
446 size_t count)
447{
448 struct i2c_client *client = to_i2c_client(dev);
449 struct w83793_data *data = i2c_get_clientdata(client);
450 unsigned long val;
451 u8 reg;
452
453 if (strict_strtoul(buf, 10, &val) || val != 0)
454 return -EINVAL;
455
456 mutex_lock(&data->update_lock);
457 reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
458 w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80);
459 data->valid = 0; /* Force cache refresh */
460 mutex_unlock(&data->update_lock);
461 return count;
462}
463
6800c3d0
RM		 464#define FAN_INPUT 0
465#define FAN_MIN 1
466static ssize_t
467show_fan(struct device *dev, struct device_attribute *attr, char *buf)
468{
469 struct sensor_device_attribute_2 *sensor_attr =
470 to_sensor_dev_attr_2(attr);
471 int nr = sensor_attr->nr;
472 int index = sensor_attr->index;
473 struct w83793_data *data = w83793_update_device(dev);
474 u16 val;
475
476 if (FAN_INPUT == nr) {
477 val = data->fan[index] & 0x0fff;
478 } else {
479 val = data->fan_min[index] & 0x0fff;
480 }
481
482 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
483}
484
485static ssize_t
486store_fan_min(struct device *dev, struct device_attribute *attr,
487 const char *buf, size_t count)
488{
489 struct sensor_device_attribute_2 *sensor_attr =
490 to_sensor_dev_attr_2(attr);
491 int index = sensor_attr->index;
492 struct i2c_client *client = to_i2c_client(dev);
493 struct w83793_data *data = i2c_get_clientdata(client);
494 u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10));
495
496 mutex_lock(&data->update_lock);
497 data->fan_min[index] = val;
498 w83793_write_value(client, W83793_REG_FAN_MIN(index),
499 (val >> 8) & 0xff);
500 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
501 mutex_unlock(&data->update_lock);
502
503 return count;
504}
505
6800c3d0
RM		 506static ssize_t
507show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
508{
509 struct sensor_device_attribute_2 *sensor_attr =
510 to_sensor_dev_attr_2(attr);
511 struct w83793_data *data = w83793_update_device(dev);
512 u16 val;
513 int nr = sensor_attr->nr;
514 int index = sensor_attr->index;
515
516 if (PWM_STOP_TIME == nr)
517 val = TIME_FROM_REG(data->pwm_stop_time[index]);
518 else
519 val = (data->pwm[index][nr] & 0x3f) << 2;
520
521 return sprintf(buf, "%d\n", val);
522}
523
524static ssize_t
525store_pwm(struct device *dev, struct device_attribute *attr,
526 const char *buf, size_t count)
527{
528 struct i2c_client *client = to_i2c_client(dev);
529 struct w83793_data *data = i2c_get_clientdata(client);
530 struct sensor_device_attribute_2 *sensor_attr =
531 to_sensor_dev_attr_2(attr);
532 int nr = sensor_attr->nr;
533 int index = sensor_attr->index;
534 u8 val;
535
536 mutex_lock(&data->update_lock);
537 if (PWM_STOP_TIME == nr) {
538 val = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
539 data->pwm_stop_time[index] = val;
540 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
541 val);
542 } else {
543 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff)
544 >> 2;
545 data->pwm[index][nr] =
546 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
547 data->pwm[index][nr] |= val;
548 w83793_write_value(client, W83793_REG_PWM(index, nr),
549 data->pwm[index][nr]);
550 }
551
552 mutex_unlock(&data->update_lock);
553 return count;
554}
555
556static ssize_t
557show_temp(struct device *dev, struct device_attribute *attr, char *buf)
558{
559 struct sensor_device_attribute_2 *sensor_attr =
560 to_sensor_dev_attr_2(attr);
561 int nr = sensor_attr->nr;
562 int index = sensor_attr->index;
563 struct w83793_data *data = w83793_update_device(dev);
564 long temp = TEMP_FROM_REG(data->temp[index][nr]);
565
566 if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */
567 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
568 temp += temp > 0 ? low : -low;
569 }
570 return sprintf(buf, "%ld\n", temp);
571}
572
573static ssize_t
574store_temp(struct device *dev, struct device_attribute *attr,
575 const char *buf, size_t count)
576{
577 struct sensor_device_attribute_2 *sensor_attr =
578 to_sensor_dev_attr_2(attr);
579 int nr = sensor_attr->nr;
580 int index = sensor_attr->index;
581 struct i2c_client *client = to_i2c_client(dev);
582 struct w83793_data *data = i2c_get_clientdata(client);
583 long tmp = simple_strtol(buf, NULL, 10);
584
585 mutex_lock(&data->update_lock);
586 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
587 w83793_write_value(client, W83793_REG_TEMP[index][nr],
588 data->temp[index][nr]);
589 mutex_unlock(&data->update_lock);
590 return count;
591}
592
593/*
594 TD1-TD4
595 each has 4 mode:(2 bits)
596 0: Stop monitor
597 1: Use internal temp sensor(default)
ddca933b 598 2: Reserved
6800c3d0
RM		 599 3: Use sensor in Intel CPU and get result by PECI
600
601 TR1-TR2
602 each has 2 mode:(1 bit)
603 0: Disable temp sensor monitor
604 1: To enable temp sensors monitor
605*/
606
ddca933b
GJ		 607/* 0 disable, 6 PECI */
608static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 609
610static ssize_t
611show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
612{
613 struct w83793_data *data = w83793_update_device(dev);
614 struct sensor_device_attribute_2 *sensor_attr =
615 to_sensor_dev_attr_2(attr);
616 int index = sensor_attr->index;
617 u8 mask = (index < 4) ? 0x03 : 0x01;
618 u8 shift = (index < 4) ? (2 * index) : (index - 4);
619 u8 tmp;
620 index = (index < 4) ? 0 : 1;
621
622 tmp = (data->temp_mode[index] >> shift) & mask;
623
624 /* for the internal sensor, found out if diode or thermistor */
625 if (tmp == 1) {
626 tmp = index == 0 ? 3 : 4;
627 } else {
628 tmp = TO_TEMP_MODE[tmp];
629 }
630
631 return sprintf(buf, "%d\n", tmp);
632}
633
634static ssize_t
635store_temp_mode(struct device *dev, struct device_attribute *attr,
636 const char *buf, size_t count)
637{
638 struct i2c_client *client = to_i2c_client(dev);
639 struct w83793_data *data = i2c_get_clientdata(client);
640 struct sensor_device_attribute_2 *sensor_attr =
641 to_sensor_dev_attr_2(attr);
642 int index = sensor_attr->index;
643 u8 mask = (index < 4) ? 0x03 : 0x01;
644 u8 shift = (index < 4) ? (2 * index) : (index - 4);
645 u8 val = simple_strtoul(buf, NULL, 10);
646
647 /* transform the sysfs interface values into table above */
ddca933b 648 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 649 val -= 3;
650 } else if ((val == 3 && index < 4)
46bed4df 651 || (val == 4 && index >= 4)) {
6800c3d0
RM		 652 /* transform diode or thermistor into internal enable */
653 val = !!val;
654 } else {
655 return -EINVAL;
656 }
657
658 index = (index < 4) ? 0 : 1;
659 mutex_lock(&data->update_lock);
660 data->temp_mode[index] =
661 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
662 data->temp_mode[index] &= ~(mask << shift);
663 data->temp_mode[index] |= val << shift;
664 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
665 data->temp_mode[index]);
666 mutex_unlock(&data->update_lock);
667
668 return count;
669}
670
671#define SETUP_PWM_DEFAULT 0
672#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
673#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
674#define SETUP_TEMP_CRITICAL 3
675static ssize_t
676show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
677{
678 struct sensor_device_attribute_2 *sensor_attr =
679 to_sensor_dev_attr_2(attr);
680 int nr = sensor_attr->nr;
681 struct w83793_data *data = w83793_update_device(dev);
682 u32 val = 0;
683
684 if (SETUP_PWM_DEFAULT == nr) {
685 val = (data->pwm_default & 0x3f) << 2;
686 } else if (SETUP_PWM_UPTIME == nr) {
687 val = TIME_FROM_REG(data->pwm_uptime);
688 } else if (SETUP_PWM_DOWNTIME == nr) {
689 val = TIME_FROM_REG(data->pwm_downtime);
690 } else if (SETUP_TEMP_CRITICAL == nr) {
691 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
692 }
693
694 return sprintf(buf, "%d\n", val);
695}
696
697static ssize_t
698store_sf_setup(struct device *dev, struct device_attribute *attr,
699 const char *buf, size_t count)
700{
701 struct sensor_device_attribute_2 *sensor_attr =
702 to_sensor_dev_attr_2(attr);
703 int nr = sensor_attr->nr;
704 struct i2c_client *client = to_i2c_client(dev);
705 struct w83793_data *data = i2c_get_clientdata(client);
706
707 mutex_lock(&data->update_lock);
708 if (SETUP_PWM_DEFAULT == nr) {
709 data->pwm_default =
710 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
711 data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL,
712 10),
713 0, 0xff) >> 2;
714 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
715 data->pwm_default);
716 } else if (SETUP_PWM_UPTIME == nr) {
717 data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
718 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
719 w83793_write_value(client, W83793_REG_PWM_UPTIME,
720 data->pwm_uptime);
721 } else if (SETUP_PWM_DOWNTIME == nr) {
722 data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
723 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
724 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
725 data->pwm_downtime);
726 } else { /* SETUP_TEMP_CRITICAL */
727 data->temp_critical =
728 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
729 data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10),
730 0, 0x7f);
731 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
732 data->temp_critical);
733 }
734
735 mutex_unlock(&data->update_lock);
736 return count;
737}
738
739/*
740 Temp SmartFan control
741 TEMP_FAN_MAP
742 Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
743 It's possible two or more temp channels control the same fan, w83793
744 always prefers to pick the most critical request and applies it to
745 the related Fan.
746 It's possible one fan is not in any mapping of 6 temp channels, this
747 means the fan is manual mode
748
749 TEMP_PWM_ENABLE
750 Each temp channel has its own SmartFan mode, and temp channel
751 control fans that are set by TEMP_FAN_MAP
752 0: SmartFanII mode
753 1: Thermal Cruise Mode
754
755 TEMP_CRUISE
756 Target temperature in thermal cruise mode, w83793 will try to turn
757 fan speed to keep the temperature of target device around this
758 temperature.
759
760 TEMP_TOLERANCE
761 If Temp higher or lower than target with this tolerance, w83793
762 will take actions to speed up or slow down the fan to keep the
763 temperature within the tolerance range.
764*/
765
766#define TEMP_FAN_MAP 0
767#define TEMP_PWM_ENABLE 1
768#define TEMP_CRUISE 2
769#define TEMP_TOLERANCE 3
770static ssize_t
771show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
772{
773 struct sensor_device_attribute_2 *sensor_attr =
774 to_sensor_dev_attr_2(attr);
775 int nr = sensor_attr->nr;
776 int index = sensor_attr->index;
777 struct w83793_data *data = w83793_update_device(dev);
778 u32 val;
779
780 if (TEMP_FAN_MAP == nr) {
781 val = data->temp_fan_map[index];
782 } else if (TEMP_PWM_ENABLE == nr) {
783 /* +2 to transfrom into 2 and 3 to conform with sysfs intf */
784 val = ((data->pwm_enable >> index) & 0x01) + 2;
785 } else if (TEMP_CRUISE == nr) {
786 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
787 } else { /* TEMP_TOLERANCE */
788 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
789 val = TEMP_FROM_REG(val & 0x0f);
790 }
791 return sprintf(buf, "%d\n", val);
792}
793
794static ssize_t
795store_sf_ctrl(struct device *dev, struct device_attribute *attr,
796 const char *buf, size_t count)
797{
798 struct sensor_device_attribute_2 *sensor_attr =
799 to_sensor_dev_attr_2(attr);
800 int nr = sensor_attr->nr;
801 int index = sensor_attr->index;
802 struct i2c_client *client = to_i2c_client(dev);
803 struct w83793_data *data = i2c_get_clientdata(client);
804 u32 val;
805
806 mutex_lock(&data->update_lock);
807 if (TEMP_FAN_MAP == nr) {
808 val = simple_strtoul(buf, NULL, 10) & 0xff;
809 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
810 data->temp_fan_map[index] = val;
811 } else if (TEMP_PWM_ENABLE == nr) {
812 val = simple_strtoul(buf, NULL, 10);
813 if (2 == val || 3 == val) {
814 data->pwm_enable =
815 w83793_read_value(client, W83793_REG_PWM_ENABLE);
816 if (val - 2)
817 data->pwm_enable |= 1 << index;
818 else
819 data->pwm_enable &= ~(1 << index);
820 w83793_write_value(client, W83793_REG_PWM_ENABLE,
821 data->pwm_enable);
822 } else {
823 mutex_unlock(&data->update_lock);
824 return -EINVAL;
825 }
826 } else if (TEMP_CRUISE == nr) {
827 data->temp_cruise[index] =
828 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
829 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
830 data->temp_cruise[index] &= 0x80;
831 data->temp_cruise[index] |= val;
832
833 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
834 data->temp_cruise[index]);
835 } else { /* TEMP_TOLERANCE */
836 int i = index >> 1;
837 u8 shift = (index & 0x01) ? 4 : 0;
838 data->tolerance[i] =
839 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
840
841 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f);
842 data->tolerance[i] &= ~(0x0f << shift);
843 data->tolerance[i] |= val << shift;
844 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
845 data->tolerance[i]);
846 }
847
848 mutex_unlock(&data->update_lock);
849 return count;
850}
851
852static ssize_t
853show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
854{
855 struct sensor_device_attribute_2 *sensor_attr =
856 to_sensor_dev_attr_2(attr);
857 int nr = sensor_attr->nr;
858 int index = sensor_attr->index;
859 struct w83793_data *data = w83793_update_device(dev);
860
861 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
862}
863
864static ssize_t
865store_sf2_pwm(struct device *dev, struct device_attribute *attr,
866 const char *buf, size_t count)
867{
868 struct i2c_client *client = to_i2c_client(dev);
869 struct w83793_data *data = i2c_get_clientdata(client);
870 struct sensor_device_attribute_2 *sensor_attr =
871 to_sensor_dev_attr_2(attr);
872 int nr = sensor_attr->nr;
873 int index = sensor_attr->index;
874 u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2;
875
876 mutex_lock(&data->update_lock);
877 data->sf2_pwm[index][nr] =
878 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
879 data->sf2_pwm[index][nr] |= val;
880 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
881 data->sf2_pwm[index][nr]);
882 mutex_unlock(&data->update_lock);
883 return count;
884}
885
886static ssize_t
887show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
888{
889 struct sensor_device_attribute_2 *sensor_attr =
890 to_sensor_dev_attr_2(attr);
891 int nr = sensor_attr->nr;
892 int index = sensor_attr->index;
893 struct w83793_data *data = w83793_update_device(dev);
894
895 return sprintf(buf, "%ld\n",
896 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
897}
898
899static ssize_t
900store_sf2_temp(struct device *dev, struct device_attribute *attr,
901 const char *buf, size_t count)
902{
903 struct i2c_client *client = to_i2c_client(dev);
904 struct w83793_data *data = i2c_get_clientdata(client);
905 struct sensor_device_attribute_2 *sensor_attr =
906 to_sensor_dev_attr_2(attr);
907 int nr = sensor_attr->nr;
908 int index = sensor_attr->index;
909 u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
910
911 mutex_lock(&data->update_lock);
912 data->sf2_temp[index][nr] =
913 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
914 data->sf2_temp[index][nr] |= val;
915 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
916 data->sf2_temp[index][nr]);
917 mutex_unlock(&data->update_lock);
918 return count;
919}
920
921/* only Vcore A/B and Vtt have additional 2 bits precision */
922static ssize_t
923show_in(struct device *dev, struct device_attribute *attr, char *buf)
924{
925 struct sensor_device_attribute_2 *sensor_attr =
926 to_sensor_dev_attr_2(attr);
927 int nr = sensor_attr->nr;
928 int index = sensor_attr->index;
929 struct w83793_data *data = w83793_update_device(dev);
930 u16 val = data->in[index][nr];
931
932 if (index < 3) {
933 val <<= 2;
934 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
935 }
ddca933b
GJ		 936 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
937 val = val * scale_in[index] + scale_in_add[index];
938 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 939}
940
941static ssize_t
942store_in(struct device *dev, struct device_attribute *attr,
943 const char *buf, size_t count)
944{
945 struct sensor_device_attribute_2 *sensor_attr =
946 to_sensor_dev_attr_2(attr);
947 int nr = sensor_attr->nr;
948 int index = sensor_attr->index;
949 struct i2c_client *client = to_i2c_client(dev);
950 struct w83793_data *data = i2c_get_clientdata(client);
951 u32 val;
952
953 val =
954 (simple_strtoul(buf, NULL, 10) +
955 scale_in[index] / 2) / scale_in[index];
956 mutex_lock(&data->update_lock);
957 if (index > 2) {
ddca933b
GJ		 958 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
959 if (1 == nr || 2 == nr) {
960 val -= scale_in_add[index] / scale_in[index];
961 }
6800c3d0
RM		 962 val = SENSORS_LIMIT(val, 0, 255);
963 } else {
964 val = SENSORS_LIMIT(val, 0, 0x3FF);
965 data->in_low_bits[nr] =
966 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
967 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
968 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
969 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
970 data->in_low_bits[nr]);
971 val >>= 2;
972 }
973 data->in[index][nr] = val;
974 w83793_write_value(client, W83793_REG_IN[index][nr],
975 data->in[index][nr]);
976 mutex_unlock(&data->update_lock);
977 return count;
978}
979
980#define NOT_USED -1
981
982#define SENSOR_ATTR_IN(index) \
983 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
984 IN_READ, index), \
985 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
986 store_in, IN_MAX, index), \
987 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
988 store_in, IN_LOW, index), \
989 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
990 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
991 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
992 show_alarm_beep, store_beep, BEEP_ENABLE, \
993 index + ((index > 2) ? 1 : 0))
994
995#define SENSOR_ATTR_FAN(index) \
996 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
997 NULL, ALARM_STATUS, index + 17), \
998 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
999 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
1000 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1001 NULL, FAN_INPUT, index - 1), \
1002 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1003 show_fan, store_fan_min, FAN_MIN, index - 1)
1004
1005#define SENSOR_ATTR_PWM(index) \
1006 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1007 store_pwm, PWM_DUTY, index - 1), \
1008 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1009 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1010 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1011 show_pwm, store_pwm, PWM_START, index - 1), \
1012 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1013 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
1014
1015#define SENSOR_ATTR_TEMP(index) \
1016 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1017 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1018 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1019 NULL, TEMP_READ, index - 1), \
1020 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1021 store_temp, TEMP_CRIT, index - 1), \
1022 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1023 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1024 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1025 store_temp, TEMP_WARN, index - 1), \
1026 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1027 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1028 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1029 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1030 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1031 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1032 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1033 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1034 TEMP_FAN_MAP, index - 1), \
1035 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1036 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1037 index - 1), \
1038 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1039 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1040 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1041 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1042 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1043 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1044 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1045 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1046 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1047 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1048 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1049 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1050 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1051 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1052 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1053 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1054 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1055 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1056 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1057 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1058 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1059 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1060 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1061 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1062 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1063 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1064 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1065 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1066 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1067 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1068 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1069 show_sf2_temp, store_sf2_temp, 6, index - 1)
1070
1071static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1072 SENSOR_ATTR_IN(0),
1073 SENSOR_ATTR_IN(1),
1074 SENSOR_ATTR_IN(2),
1075 SENSOR_ATTR_IN(3),
1076 SENSOR_ATTR_IN(4),
1077 SENSOR_ATTR_IN(5),
1078 SENSOR_ATTR_IN(6),
1079 SENSOR_ATTR_IN(7),
1080 SENSOR_ATTR_IN(8),
1081 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1082 SENSOR_ATTR_FAN(1),
1083 SENSOR_ATTR_FAN(2),
1084 SENSOR_ATTR_FAN(3),
1085 SENSOR_ATTR_FAN(4),
1086 SENSOR_ATTR_FAN(5),
1087 SENSOR_ATTR_PWM(1),
1088 SENSOR_ATTR_PWM(2),
1089 SENSOR_ATTR_PWM(3),
1090};
1091
46bed4df
GJ		 1092static struct sensor_device_attribute_2 w83793_temp[] = {
1093 SENSOR_ATTR_TEMP(1),
1094 SENSOR_ATTR_TEMP(2),
1095 SENSOR_ATTR_TEMP(3),
1096 SENSOR_ATTR_TEMP(4),
1097 SENSOR_ATTR_TEMP(5),
1098 SENSOR_ATTR_TEMP(6),
1099};
1100
6800c3d0
RM		 1101/* Fan6-Fan12 */
1102static struct sensor_device_attribute_2 w83793_left_fan[] = {
1103 SENSOR_ATTR_FAN(6),
1104 SENSOR_ATTR_FAN(7),
1105 SENSOR_ATTR_FAN(8),
1106 SENSOR_ATTR_FAN(9),
1107 SENSOR_ATTR_FAN(10),
1108 SENSOR_ATTR_FAN(11),
1109 SENSOR_ATTR_FAN(12),
1110};
1111
1112/* Pwm4-Pwm8 */
1113static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1114 SENSOR_ATTR_PWM(4),
1115 SENSOR_ATTR_PWM(5),
1116 SENSOR_ATTR_PWM(6),
1117 SENSOR_ATTR_PWM(7),
1118 SENSOR_ATTR_PWM(8),
1119};
1120
c70a8c34 1121static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1122 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1123 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1124};
93c75a4a 1125static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
c70a8c34
GJ		 1126
1127static struct sensor_device_attribute_2 sda_single_files[] = {
6800c3d0 1128 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
a516dc3e
JD		 1129 store_chassis_clear_legacy, ALARM_STATUS, 30),
1130 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
6800c3d0
RM		 1131 store_chassis_clear, ALARM_STATUS, 30),
1132 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1133 store_beep_enable, NOT_USED, NOT_USED),
1134 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1135 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1136 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1137 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1138 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1139 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1140 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1141 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1142};
1143
1144static void w83793_init_client(struct i2c_client *client)
1145{
1146 if (reset) {
1147 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
1148 }
1149
1150 /* Start monitoring */
1151 w83793_write_value(client, W83793_REG_CONFIG,
1152 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1153}
1154
1155/*
1156 * Watchdog routines
1157 */
1158
1159static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1160{
1161 int ret, mtimeout;
1162
1163 mtimeout = DIV_ROUND_UP(timeout, 60);
1164
1165 if (mtimeout > 255)
1166 return -EINVAL;
1167
1168 mutex_lock(&data->watchdog_lock);
1169 if (!data->client) {
1170 ret = -ENODEV;
1171 goto leave;
1172 }
1173
1174 data->watchdog_timeout = mtimeout;
1175
1176 /* Set Timeout value (in Minutes) */
1177 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1178 data->watchdog_timeout);
1179
1180 ret = mtimeout * 60;
1181
1182leave:
1183 mutex_unlock(&data->watchdog_lock);
1184 return ret;
1185}
1186
1187static int watchdog_get_timeout(struct w83793_data *data)
1188{
1189 int timeout;
1190
1191 mutex_lock(&data->watchdog_lock);
1192 timeout = data->watchdog_timeout * 60;
1193 mutex_unlock(&data->watchdog_lock);
1194
1195 return timeout;
1196}
1197
1198static int watchdog_trigger(struct w83793_data *data)
1199{
1200 int ret = 0;
1201
1202 mutex_lock(&data->watchdog_lock);
1203 if (!data->client) {
1204 ret = -ENODEV;
1205 goto leave;
1206 }
1207
1208 /* Set Timeout value (in Minutes) */
1209 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1210 data->watchdog_timeout);
1211
1212leave:
1213 mutex_unlock(&data->watchdog_lock);
1214 return ret;
1215}
1216
1217static int watchdog_enable(struct w83793_data *data)
1218{
1219 int ret = 0;
1220
1221 mutex_lock(&data->watchdog_lock);
1222 if (!data->client) {
1223 ret = -ENODEV;
1224 goto leave;
1225 }
1226
1227 /* Set initial timeout */
1228 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1229 data->watchdog_timeout);
1230
1231 /* Enable Soft Watchdog */
1232 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1233
1234leave:
1235 mutex_unlock(&data->watchdog_lock);
1236 return ret;
1237}
1238
1239static int watchdog_disable(struct w83793_data *data)
1240{
1241 int ret = 0;
1242
1243 mutex_lock(&data->watchdog_lock);
1244 if (!data->client) {
1245 ret = -ENODEV;
1246 goto leave;
1247 }
1248
1249 /* Disable Soft Watchdog */
1250 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1251
1252leave:
1253 mutex_unlock(&data->watchdog_lock);
1254 return ret;
1255}
1256
1257static int watchdog_open(struct inode *inode, struct file *filp)
1258{
1259 struct w83793_data *pos, *data = NULL;
1260 int watchdog_is_open;
1261
1262 /* We get called from drivers/char/misc.c with misc_mtx hold, and we
1263 call misc_register() from w83793_probe() with watchdog_data_mutex
1264 hold, as misc_register() takes the misc_mtx lock, this is a possible
1265 deadlock, so we use mutex_trylock here. */
1266 if (!mutex_trylock(&watchdog_data_mutex))
1267 return -ERESTARTSYS;
1268 list_for_each_entry(pos, &watchdog_data_list, list) {
1269 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1270 data = pos;
1271 break;
1272 }
1273 }
1274
1275 /* Check, if device is already open */
1276 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1277
1278 /* Increase data reference counter (if not already done).
1279 Note we can never not have found data, so we don't check for this */
1280 if (!watchdog_is_open)
1281 kref_get(&data->kref);
1282
1283 mutex_unlock(&watchdog_data_mutex);
1284
1285 /* Check, if device is already open and possibly issue error */
1286 if (watchdog_is_open)
1287 return -EBUSY;
1288
1289 /* Enable Soft Watchdog */
1290 watchdog_enable(data);
1291
1292 /* Store pointer to data into filp's private data */
1293 filp->private_data = data;
1294
1295 return nonseekable_open(inode, filp);
1296}
1297
1298static int watchdog_close(struct inode *inode, struct file *filp)
1299{
1300 struct w83793_data *data = filp->private_data;
6800c3d0 1301
5852f960
SA		 1302 if (data->watchdog_expect_close) {
1303 watchdog_disable(data);
1304 data->watchdog_expect_close = 0;
1305 } else {
1306 watchdog_trigger(data);
1307 dev_crit(&data->client->dev,
1308 "unexpected close, not stopping watchdog!\n");
1309 }
1310
1311 clear_bit(0, &data->watchdog_is_open);
1312
1313 /* Decrease data reference counter */
1314 mutex_lock(&watchdog_data_mutex);
1315 kref_put(&data->kref, w83793_release_resources);
1316 mutex_unlock(&watchdog_data_mutex);
1317
1318 return 0;
1319}
1320
1321static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1322 size_t count, loff_t *offset)
1323{
3f7cd7ea 1324 ssize_t ret;
5852f960
SA		 1325 struct w83793_data *data = filp->private_data;
1326
1327 if (count) {
1328 if (!nowayout) {
1329 size_t i;
1330
1331 /* Clear it in case it was set with a previous write */
1332 data->watchdog_expect_close = 0;
1333
1334 for (i = 0; i != count; i++) {
1335 char c;
1336 if (get_user(c, buf + i))
1337 return -EFAULT;
1338 if (c == 'V')
1339 data->watchdog_expect_close = 1;
1340 }
1341 }
1342 ret = watchdog_trigger(data);
1343 if (ret < 0)
1344 return ret;
1345 }
1346 return count;
1347}
1348
55929332
AB		 1349static long watchdog_ioctl(struct file *filp, unsigned int cmd,
1350 unsigned long arg)
5852f960 1351{
36c7fe13 1352 struct watchdog_info ident = {
5852f960
SA		 1353 .options = WDIOF_KEEPALIVEPING |
1354 WDIOF_SETTIMEOUT |
1355 WDIOF_CARDRESET,
1356 .identity = "w83793 watchdog"
1357 };
1358
1359 int val, ret = 0;
1360 struct w83793_data *data = filp->private_data;
1361
1362 switch (cmd) {
1363 case WDIOC_GETSUPPORT:
1364 if (!nowayout)
1365 ident.options |= WDIOF_MAGICCLOSE;
1366 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1367 ret = -EFAULT;
1368 break;
1369
1370 case WDIOC_GETSTATUS:
1371 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1372 ret = put_user(val, (int __user *)arg);
1373 break;
1374
1375 case WDIOC_GETBOOTSTATUS:
1376 ret = put_user(0, (int __user *)arg);
1377 break;
1378
1379 case WDIOC_KEEPALIVE:
1380 ret = watchdog_trigger(data);
1381 break;
1382
1383 case WDIOC_GETTIMEOUT:
1384 val = watchdog_get_timeout(data);
1385 ret = put_user(val, (int __user *)arg);
1386 break;
1387
1388 case WDIOC_SETTIMEOUT:
1389 if (get_user(val, (int __user *)arg)) {
1390 ret = -EFAULT;
1391 break;
1392 }
1393 ret = watchdog_set_timeout(data, val);
1394 if (ret > 0)
1395 ret = put_user(ret, (int __user *)arg);
1396 break;
1397
1398 case WDIOC_SETOPTIONS:
1399 if (get_user(val, (int __user *)arg)) {
1400 ret = -EFAULT;
1401 break;
1402 }
1403
1404 if (val & WDIOS_DISABLECARD)
1405 ret = watchdog_disable(data);
1406 else if (val & WDIOS_ENABLECARD)
1407 ret = watchdog_enable(data);
1408 else
1409 ret = -EINVAL;
1410
1411 break;
1412 default:
1413 ret = -ENOTTY;
1414 }
5852f960
SA		 1415 return ret;
1416}
1417
1418static const struct file_operations watchdog_fops = {
1419 .owner = THIS_MODULE,
1420 .llseek = no_llseek,
1421 .open = watchdog_open,
1422 .release = watchdog_close,
1423 .write = watchdog_write,
55929332 1424 .unlocked_ioctl = watchdog_ioctl,
5852f960
SA		 1425};
1426
1427/*
1428 * Notifier for system down
1429 */
1430
1431static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1432 void *unused)
1433{
1434 struct w83793_data *data = NULL;
1435
1436 if (code == SYS_DOWN || code == SYS_HALT) {
1437
1438 /* Disable each registered watchdog */
1439 mutex_lock(&watchdog_data_mutex);
1440 list_for_each_entry(data, &watchdog_data_list, list) {
1441 if (data->watchdog_miscdev.minor)
1442 watchdog_disable(data);
1443 }
1444 mutex_unlock(&watchdog_data_mutex);
1445 }
1446
1447 return NOTIFY_DONE;
6800c3d0
RM		 1448}
1449
5852f960
SA		 1450/*
1451 * The WDT needs to learn about soft shutdowns in order to
1452 * turn the timebomb registers off.
1453 */
1454
1455static struct notifier_block watchdog_notifier = {
1456 .notifier_call = watchdog_notify_sys,
1457};
1458
1459/*
1460 * Init / remove routines
1461 */
1462
a7f13a6e 1463static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1464{
1465 struct w83793_data *data = i2c_get_clientdata(client);
1466 struct device *dev = &client->dev;
5852f960
SA		 1467 int i, tmp;
1468
1469 /* Unregister the watchdog (if registered) */
1470 if (data->watchdog_miscdev.minor) {
1471 misc_deregister(&data->watchdog_miscdev);
1472
1473 if (data->watchdog_is_open) {
1474 dev_warn(&client->dev,
1475 "i2c client detached with watchdog open! "
1476 "Stopping watchdog.\n");
1477 watchdog_disable(data);
1478 }
1479
1480 mutex_lock(&watchdog_data_mutex);
1481 list_del(&data->list);
1482 mutex_unlock(&watchdog_data_mutex);
1483
1484 /* Tell the watchdog code the client is gone */
1485 mutex_lock(&data->watchdog_lock);
1486 data->client = NULL;
1487 mutex_unlock(&data->watchdog_lock);
1488 }
1489
1490 /* Reset Configuration Register to Disable Watch Dog Registers */
1491 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1492 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1493
1494 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1495
a7f13a6e 1496 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1497
a7f13a6e
JD		 1498 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1499 device_remove_file(dev,
1500 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1501
a7f13a6e
JD		 1502 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1503 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1504
a7f13a6e
JD		 1505 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1506 device_remove_file(dev, &w83793_vid[i].dev_attr);
1507 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1508
a7f13a6e
JD		 1509 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1510 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1511
a7f13a6e
JD		 1512 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1513 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1514
a7f13a6e
JD		 1515 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1516 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1517
a7f13a6e
JD		 1518 if (data->lm75[0] != NULL)
1519 i2c_unregister_device(data->lm75[0]);
1520 if (data->lm75[1] != NULL)
1521 i2c_unregister_device(data->lm75[1]);
6800c3d0 1522
5852f960
SA		 1523 /* Decrease data reference counter */
1524 mutex_lock(&watchdog_data_mutex);
1525 kref_put(&data->kref, w83793_release_resources);
1526 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1527
1528 return 0;
1529}
1530
1531static int
a7f13a6e 1532w83793_detect_subclients(struct i2c_client *client)
6800c3d0
RM		 1533{
1534 int i, id, err;
a7f13a6e 1535 int address = client->addr;
6800c3d0 1536 u8 tmp;
a7f13a6e 1537 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1538 struct w83793_data *data = i2c_get_clientdata(client);
1539
1540 id = i2c_adapter_id(adapter);
1541 if (force_subclients[0] == id && force_subclients[1] == address) {
1542 for (i = 2; i <= 3; i++) {
1543 if (force_subclients[i] < 0x48
1544 || force_subclients[i] > 0x4f) {
1545 dev_err(&client->dev,
1546 "invalid subclient "
1547 "address %d; must be 0x48-0x4f\n",
1548 force_subclients[i]);
1549 err = -EINVAL;
1550 goto ERROR_SC_0;
1551 }
1552 }
1553 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1554 (force_subclients[2] & 0x07) |
1555 ((force_subclients[3] & 0x07) << 4));
1556 }
1557
1558 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
1559 if (!(tmp & 0x08)) {
a7f13a6e 1560 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
6800c3d0
RM		 1561 }
1562 if (!(tmp & 0x80)) {
1563 if ((data->lm75[0] != NULL)
1564 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1565 dev_err(&client->dev,
1566 "duplicate addresses 0x%x, "
1567 "use force_subclients\n", data->lm75[0]->addr);
1568 err = -ENODEV;
1569 goto ERROR_SC_1;
1570 }
a7f13a6e
JD		 1571 data->lm75[1] = i2c_new_dummy(adapter,
1572 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1573 }
1574
1575 return 0;
1576
1577 /* Undo inits in case of errors */
1578
1579ERROR_SC_1:
a7f13a6e
JD		 1580 if (data->lm75[0] != NULL)
1581 i2c_unregister_device(data->lm75[0]);
6800c3d0
RM		 1582ERROR_SC_0:
1583 return err;
1584}
1585
a7f13a6e 1586/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1587static int w83793_detect(struct i2c_client *client,
a7f13a6e 1588 struct i2c_board_info *info)
6800c3d0 1589{
52df6440 1590 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1591 struct i2c_adapter *adapter = client->adapter;
1592 unsigned short address = client->addr;
6800c3d0
RM		 1593
1594 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
a7f13a6e 1595 return -ENODEV;
6800c3d0
RM		 1596 }
1597
a7f13a6e 1598 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1599
52df6440
JD		 1600 tmp = bank & 0x80 ? 0x5c : 0xa3;
1601 /* Check Winbond vendor ID */
1602 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1603 pr_debug("w83793: Detection failed at check vendor id\n");
1604 return -ENODEV;
6800c3d0
RM		 1605 }
1606
52df6440
JD		 1607 /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1608 should match */
1609 if ((bank & 0x07) == 0
1610 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1611 (address << 1)) {
1612 pr_debug("w83793: Detection failed at check i2c addr\n");
1613 return -ENODEV;
6800c3d0
RM		 1614 }
1615
52df6440
JD		 1616 /* Determine the chip type now */
1617 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1618 if (chip_id != 0x7b)
1619 return -ENODEV;
1620
a7f13a6e
JD		 1621 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1622
1623 return 0;
1624}
6800c3d0 1625
a7f13a6e
JD		 1626static int w83793_probe(struct i2c_client *client,
1627 const struct i2c_device_id *id)
1628{
1629 struct device *dev = &client->dev;
5852f960 1630 const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
a7f13a6e
JD		 1631 struct w83793_data *data;
1632 int i, tmp, val, err;
1633 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1634 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1635 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1636
1637 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1638 if (!data) {
1639 err = -ENOMEM;
1640 goto exit;
1641 }
1642
1643 i2c_set_clientdata(client, data);
1644 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1645 mutex_init(&data->update_lock);
5852f960
SA		 1646 mutex_init(&data->watchdog_lock);
1647 INIT_LIST_HEAD(&data->list);
1648 kref_init(&data->kref);
1649
1650 /* Store client pointer in our data struct for watchdog usage
1651 (where the client is found through a data ptr instead of the
1652 otherway around) */
1653 data->client = client;
6800c3d0 1654
a7f13a6e
JD		 1655 err = w83793_detect_subclients(client);
1656 if (err)
6800c3d0
RM		 1657 goto free_mem;
1658
6800c3d0
RM		 1659 /* Initialize the chip */
1660 w83793_init_client(client);
1661
6800c3d0
RM		 1662 /*
1663 Only fan 1-5 has their own input pins,
1664 Pwm 1-3 has their own pins
1665 */
1666 data->has_fan = 0x1f;
1667 data->has_pwm = 0x07;
1668 tmp = w83793_read_value(client, W83793_REG_MFC);
1669 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1670
1671 /* check the function of pins 49-56 */
93c75a4a
JD		 1672 if (tmp & 0x80) {
1673 data->has_vid |= 0x2; /* has VIDB */
1674 } else {
6800c3d0
RM		 1675 data->has_pwm |= 0x18; /* pwm 4,5 */
1676 if (val & 0x01) { /* fan 6 */
1677 data->has_fan |= 0x20;
1678 data->has_pwm |= 0x20;
1679 }
1680 if (val & 0x02) { /* fan 7 */
1681 data->has_fan |= 0x40;
1682 data->has_pwm |= 0x40;
1683 }
1684 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1685 data->has_fan |= 0x80;
1686 data->has_pwm |= 0x80;
1687 }
1688 }
1689
93c75a4a
JD		 1690 /* check the function of pins 37-40 */
1691 if (!(tmp & 0x29))
1692 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1693 if (0x08 == (tmp & 0x0c)) {
1694 if (val & 0x08) /* fan 9 */
1695 data->has_fan |= 0x100;
1696 if (val & 0x10) /* fan 10 */
1697 data->has_fan |= 0x200;
1698 }
6800c3d0
RM		 1699 if (0x20 == (tmp & 0x30)) {
1700 if (val & 0x20) /* fan 11 */
1701 data->has_fan |= 0x400;
1702 if (val & 0x40) /* fan 12 */
1703 data->has_fan |= 0x800;
1704 }
1705
1706 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1707 data->has_fan |= 0x80;
1708 data->has_pwm |= 0x80;
1709 }
1710
c9294315
RM		 1711 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1712 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1713 data->has_fan |= 0x100;
1714 }
1715 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1716 data->has_fan |= 0x200;
1717 }
1718 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1719 data->has_fan |= 0x400;
1720 }
1721 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1722 data->has_fan |= 0x800;
1723 }
1724
46bed4df
GJ		 1725 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
1726 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]);
1727 if (tmp & 0x01)
1728 data->has_temp |= 0x01;
1729 if (tmp & 0x04)
1730 data->has_temp |= 0x02;
1731 if (tmp & 0x10)
1732 data->has_temp |= 0x04;
1733 if (tmp & 0x40)
1734 data->has_temp |= 0x08;
1735
1736 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]);
1737 if (tmp & 0x01)
1738 data->has_temp |= 0x10;
1739 if (tmp & 0x02)
1740 data->has_temp |= 0x20;
1741
6800c3d0
RM		 1742 /* Register sysfs hooks */
1743 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1744 err = device_create_file(dev,
1745 &w83793_sensor_attr_2[i].dev_attr);
1746 if (err)
1747 goto exit_remove;
1748 }
1749
c70a8c34
GJ		 1750 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1751 if (!(data->has_vid & (1 << i)))
1752 continue;
1753 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1754 if (err)
1755 goto exit_remove;
1756 }
93c75a4a
JD		 1757 if (data->has_vid) {
1758 data->vrm = vid_which_vrm();
1759 err = device_create_file(dev, &dev_attr_vrm);
1760 if (err)
1761 goto exit_remove;
1762 }
c70a8c34 1763
6800c3d0
RM		 1764 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1765 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1766 if (err)
1767 goto exit_remove;
1768
1769 }
1770
46bed4df
GJ		 1771 for (i = 0; i < 6; i++) {
1772 int j;
1773 if (!(data->has_temp & (1 << i)))
1774 continue;
1775 for (j = 0; j < files_temp; j++) {
1776 err = device_create_file(dev,
1777 &w83793_temp[(i) * files_temp
1778 + j].dev_attr);
1779 if (err)
1780 goto exit_remove;
1781 }
1782 }
1783
6800c3d0
RM		 1784 for (i = 5; i < 12; i++) {
1785 int j;
1786 if (!(data->has_fan & (1 << i)))
1787 continue;
1788 for (j = 0; j < files_fan; j++) {
1789 err = device_create_file(dev,
1790 &w83793_left_fan[(i - 5) * files_fan
1791 + j].dev_attr);
1792 if (err)
1793 goto exit_remove;
1794 }
1795 }
1796
1797 for (i = 3; i < 8; i++) {
1798 int j;
1799 if (!(data->has_pwm & (1 << i)))
1800 continue;
1801 for (j = 0; j < files_pwm; j++) {
1802 err = device_create_file(dev,
1803 &w83793_left_pwm[(i - 3) * files_pwm
1804 + j].dev_attr);
1805 if (err)
1806 goto exit_remove;
1807 }
1808 }
1809
1beeffe4
TJ		 1810 data->hwmon_dev = hwmon_device_register(dev);
1811 if (IS_ERR(data->hwmon_dev)) {
1812 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1813 goto exit_remove;
1814 }
1815
5852f960
SA		 1816 /* Watchdog initialization */
1817
1818 /* Register boot notifier */
1819 err = register_reboot_notifier(&watchdog_notifier);
1820 if (err != 0) {
1821 dev_err(&client->dev,
1822 "cannot register reboot notifier (err=%d)\n", err);
1823 goto exit_devunreg;
1824 }
1825
1826 /* Enable Watchdog registers.
1827 Set Configuration Register to Enable Watch Dog Registers
1828 (Bit 2) = XXXX, X1XX. */
1829 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1830 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1831
1832 /* Set the default watchdog timeout */
1833 data->watchdog_timeout = timeout;
1834
1835 /* Check, if last reboot was caused by watchdog */
1836 data->watchdog_caused_reboot =
1837 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1838
1839 /* Disable Soft Watchdog during initialiation */
1840 watchdog_disable(data);
1841
1842 /* We take the data_mutex lock early so that watchdog_open() cannot
1843 run when misc_register() has completed, but we've not yet added
1844 our data to the watchdog_data_list (and set the default timeout) */
1845 mutex_lock(&watchdog_data_mutex);
1846 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1847 /* Register our watchdog part */
1848 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1849 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1850 data->watchdog_miscdev.name = data->watchdog_name;
1851 data->watchdog_miscdev.fops = &watchdog_fops;
1852 data->watchdog_miscdev.minor = watchdog_minors[i];
1853
1854 err = misc_register(&data->watchdog_miscdev);
1855 if (err == -EBUSY)
1856 continue;
1857 if (err) {
1858 data->watchdog_miscdev.minor = 0;
1859 dev_err(&client->dev,
1860 "Registering watchdog chardev: %d\n", err);
1861 break;
1862 }
1863
1864 list_add(&data->list, &watchdog_data_list);
1865
1866 dev_info(&client->dev,
1867 "Registered watchdog chardev major 10, minor: %d\n",
1868 watchdog_minors[i]);
1869 break;
1870 }
1871 if (i == ARRAY_SIZE(watchdog_minors)) {
1872 data->watchdog_miscdev.minor = 0;
1873 dev_warn(&client->dev, "Couldn't register watchdog chardev "
1874 "(due to no free minor)\n");
1875 }
1876
1877 mutex_unlock(&watchdog_data_mutex);
1878
6800c3d0
RM		 1879 return 0;
1880
5852f960
SA		 1881 /* Unregister hwmon device */
1882
1883exit_devunreg:
1884
1885 hwmon_device_unregister(data->hwmon_dev);
1886
6800c3d0
RM		 1887 /* Unregister sysfs hooks */
1888
1889exit_remove:
1890 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1891 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1892
1893 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1894 device_remove_file(dev, &sda_single_files[i].dev_attr);
1895
c70a8c34
GJ		 1896 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1897 device_remove_file(dev, &w83793_vid[i].dev_attr);
1898
6800c3d0
RM		 1899 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1900 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1901
1902 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1903 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1904
46bed4df
GJ		 1905 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1906 device_remove_file(dev, &w83793_temp[i].dev_attr);
1907
a7f13a6e
JD		 1908 if (data->lm75[0] != NULL)
1909 i2c_unregister_device(data->lm75[0]);
1910 if (data->lm75[1] != NULL)
1911 i2c_unregister_device(data->lm75[1]);
6800c3d0
RM		 1912free_mem:
1913 kfree(data);
1914exit:
1915 return err;
1916}
1917
1918static void w83793_update_nonvolatile(struct device *dev)
1919{
1920 struct i2c_client *client = to_i2c_client(dev);
1921 struct w83793_data *data = i2c_get_clientdata(client);
1922 int i, j;
1923 /*
25985edc 1924 They are somewhat "stable" registers, and to update them every time
6800c3d0
RM		 1925 takes so much time, it's just not worthy. Update them in a long
1926 interval to avoid exception.
1927 */
1928 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1929 || !data->valid))
1930 return;
1931 /* update voltage limits */
1932 for (i = 1; i < 3; i++) {
1933 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1934 data->in[j][i] =
1935 w83793_read_value(client, W83793_REG_IN[j][i]);
1936 }
1937 data->in_low_bits[i] =
1938 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1939 }
1940
1941 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1942 /* Update the Fan measured value and limits */
1943 if (!(data->has_fan & (1 << i))) {
1944 continue;
1945 }
1946 data->fan_min[i] =
1947 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
1948 data->fan_min[i] |=
1949 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
1950 }
1951
1952 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 1953 if (!(data->has_temp & (1 << i)))
1954 continue;
6800c3d0
RM		 1955 data->temp_fan_map[i] =
1956 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
1957 for (j = 1; j < 5; j++) {
1958 data->temp[i][j] =
1959 w83793_read_value(client, W83793_REG_TEMP[i][j]);
1960 }
1961 data->temp_cruise[i] =
1962 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
1963 for (j = 0; j < 7; j++) {
1964 data->sf2_pwm[i][j] =
1965 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
1966 data->sf2_temp[i][j] =
1967 w83793_read_value(client,
1968 W83793_REG_SF2_TEMP(i, j));
1969 }
1970 }
1971
1972 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
1973 data->temp_mode[i] =
1974 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
1975
1976 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
1977 data->tolerance[i] =
1978 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
1979 }
1980
1981 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
1982 if (!(data->has_pwm & (1 << i)))
1983 continue;
1984 data->pwm[i][PWM_NONSTOP] =
1985 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
1986 data->pwm[i][PWM_START] =
1987 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
1988 data->pwm_stop_time[i] =
1989 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
1990 }
1991
1992 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
1993 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
1994 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
1995 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
1996 data->temp_critical =
1997 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
1998 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
1999
2000 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) {
2001 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
2002 }
2003
2004 data->last_nonvolatile = jiffies;
2005}
2006
2007static struct w83793_data *w83793_update_device(struct device *dev)
2008{
2009 struct i2c_client *client = to_i2c_client(dev);
2010 struct w83793_data *data = i2c_get_clientdata(client);
2011 int i;
2012
2013 mutex_lock(&data->update_lock);
2014
2015 if (!(time_after(jiffies, data->last_updated + HZ * 2)
2016 || !data->valid))
2017 goto END;
2018
2019 /* Update the voltages measured value and limits */
2020 for (i = 0; i < ARRAY_SIZE(data->in); i++)
2021 data->in[i][IN_READ] =
2022 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
2023
2024 data->in_low_bits[IN_READ] =
2025 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2026
2027 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
2028 if (!(data->has_fan & (1 << i))) {
2029 continue;
2030 }
2031 data->fan[i] =
2032 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2033 data->fan[i] |=
2034 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2035 }
2036
46bed4df
GJ		 2037 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2038 if (!(data->has_temp & (1 << i)))
2039 continue;
6800c3d0
RM		 2040 data->temp[i][TEMP_READ] =
2041 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2042 }
6800c3d0
RM		 2043
2044 data->temp_low_bits =
2045 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2046
2047 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2048 if (data->has_pwm & (1 << i))
2049 data->pwm[i][PWM_DUTY] =
2050 w83793_read_value(client,
2051 W83793_REG_PWM(i, PWM_DUTY));
2052 }
2053
2054 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2055 data->alarms[i] =
2056 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2057 if (data->has_vid & 0x01)
2058 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2059 if (data->has_vid & 0x02)
2060 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2061 w83793_update_nonvolatile(dev);
2062 data->last_updated = jiffies;
2063 data->valid = 1;
2064
2065END:
2066 mutex_unlock(&data->update_lock);
2067 return data;
2068}
2069
2070/* Ignore the possibility that somebody change bank outside the driver
2071 Must be called with data->update_lock held, except during initialization */
2072static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2073{
2074 struct w83793_data *data = i2c_get_clientdata(client);
2075 u8 res = 0xff;
2076 u8 new_bank = reg >> 8;
2077
2078 new_bank |= data->bank & 0xfc;
2079 if (data->bank != new_bank) {
2080 if (i2c_smbus_write_byte_data
2081 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2082 data->bank = new_bank;
2083 else {
2084 dev_err(&client->dev,
2085 "set bank to %d failed, fall back "
2086 "to bank %d, read reg 0x%x error\n",
2087 new_bank, data->bank, reg);
2088 res = 0x0; /* read 0x0 from the chip */
2089 goto END;
2090 }
2091 }
2092 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2093END:
2094 return res;
2095}
2096
2097/* Must be called with data->update_lock held, except during initialization */
2098static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2099{
2100 struct w83793_data *data = i2c_get_clientdata(client);
2101 int res;
2102 u8 new_bank = reg >> 8;
2103
2104 new_bank |= data->bank & 0xfc;
2105 if (data->bank != new_bank) {
2106 if ((res = i2c_smbus_write_byte_data
2107 (client, W83793_REG_BANKSEL, new_bank)) >= 0)
2108 data->bank = new_bank;
2109 else {
2110 dev_err(&client->dev,
2111 "set bank to %d failed, fall back "
2112 "to bank %d, write reg 0x%x error\n",
2113 new_bank, data->bank, reg);
2114 goto END;
2115 }
2116 }
2117
2118 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2119END:
2120 return res;
2121}
2122
2123static int __init sensors_w83793_init(void)
2124{
2125 return i2c_add_driver(&w83793_driver);
2126}
2127
2128static void __exit sensors_w83793_exit(void)
2129{
2130 i2c_del_driver(&w83793_driver);
2131}
2132
5852f960 2133MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2134MODULE_DESCRIPTION("w83793 driver");
2135MODULE_LICENSE("GPL");
2136
2137module_init(sensors_w83793_init);
2138module_exit(sensors_w83793_exit);
kernel source for telekom puls (alcatel/mediatek)