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hwmon: (fschmd) Drop useless mutex
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / w83793.c
CommitLineData
6800c3d0
RM		 1/*
2 w83793.c - Linux kernel driver for hardware monitoring
3 Copyright (C) 2006 Winbond Electronics Corp.
4 Yuan Mu
5 Rudolf Marek <r.marek@assembler.cz>
5852f960
SA		 6 Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG.
7 Watchdog driver part
8 (Based partially on fschmd driver,
9 Copyright 2007-2008 by Hans de Goede)
6800c3d0
RM		 10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation - version 2.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 02110-1301 USA.
24*/
25
26/*
27 Supports following chips:
28
29 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
30 w83793 10 12 8 6 0x7b 0x5ca3 yes no
31*/
32
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/i2c.h>
37#include <linux/hwmon.h>
38#include <linux/hwmon-vid.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
41#include <linux/mutex.h>
5852f960
SA		 42#include <linux/fs.h>
43#include <linux/watchdog.h>
44#include <linux/miscdevice.h>
45#include <linux/uaccess.h>
46#include <linux/kref.h>
47#include <linux/notifier.h>
48#include <linux/reboot.h>
49
50/* Default values */
51#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 52
53/* Addresses to scan */
613655fa 54static DEFINE_MUTEX(watchdog_mutex);
25e9c86d
MH		 55static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
56 I2C_CLIENT_END };
6800c3d0
RM		 57
58/* Insmod parameters */
3aed198c
JD		 59
60static unsigned short force_subclients[4];
61module_param_array(force_subclients, short, NULL, 0);
62MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
6800c3d0
RM		 63 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
64
65static int reset;
66module_param(reset, bool, 0);
67MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
68
5852f960
SA		 69static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
70module_param(timeout, int, 0);
71MODULE_PARM_DESC(timeout,
72 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
73 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
74
75static int nowayout = WATCHDOG_NOWAYOUT;
76module_param(nowayout, int, 0);
77MODULE_PARM_DESC(nowayout,
78 "Watchdog cannot be stopped once started (default="
79 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
80
6800c3d0
RM		 81/*
82 Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
83 as ID, Bank Select registers
84*/
85#define W83793_REG_BANKSEL 0x00
86#define W83793_REG_VENDORID 0x0d
87#define W83793_REG_CHIPID 0x0e
88#define W83793_REG_DEVICEID 0x0f
89
90#define W83793_REG_CONFIG 0x40
91#define W83793_REG_MFC 0x58
92#define W83793_REG_FANIN_CTRL 0x5c
93#define W83793_REG_FANIN_SEL 0x5d
94#define W83793_REG_I2C_ADDR 0x0b
95#define W83793_REG_I2C_SUBADDR 0x0c
96#define W83793_REG_VID_INA 0x05
97#define W83793_REG_VID_INB 0x06
98#define W83793_REG_VID_LATCHA 0x07
99#define W83793_REG_VID_LATCHB 0x08
100#define W83793_REG_VID_CTRL 0x59
101
5852f960
SA		 102#define W83793_REG_WDT_LOCK 0x01
103#define W83793_REG_WDT_ENABLE 0x02
104#define W83793_REG_WDT_STATUS 0x03
105#define W83793_REG_WDT_TIMEOUT 0x04
106
6800c3d0
RM		 107static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
108
109#define TEMP_READ 0
110#define TEMP_CRIT 1
111#define TEMP_CRIT_HYST 2
112#define TEMP_WARN 3
113#define TEMP_WARN_HYST 4
114/* only crit and crit_hyst affect real-time alarm status
115 current crit crit_hyst warn warn_hyst */
116static u16 W83793_REG_TEMP[][5] = {
117 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
118 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
119 {0x1e, 0x80, 0x81, 0x82, 0x83},
120 {0x1f, 0x84, 0x85, 0x86, 0x87},
121 {0x20, 0x88, 0x89, 0x8a, 0x8b},
122 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
123};
124
125#define W83793_REG_TEMP_LOW_BITS 0x22
126
127#define W83793_REG_BEEP(index) (0x53 + (index))
128#define W83793_REG_ALARM(index) (0x4b + (index))
129
130#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
131#define W83793_REG_IRQ_CTRL 0x50
132#define W83793_REG_OVT_CTRL 0x51
133#define W83793_REG_OVT_BEEP 0x52
134
135#define IN_READ 0
136#define IN_MAX 1
137#define IN_LOW 2
138static const u16 W83793_REG_IN[][3] = {
139 /* Current, High, Low */
140 {0x10, 0x60, 0x61}, /* Vcore A */
141 {0x11, 0x62, 0x63}, /* Vcore B */
142 {0x12, 0x64, 0x65}, /* Vtt */
143 {0x14, 0x6a, 0x6b}, /* VSEN1 */
144 {0x15, 0x6c, 0x6d}, /* VSEN2 */
145 {0x16, 0x6e, 0x6f}, /* +3VSEN */
146 {0x17, 0x70, 0x71}, /* +12VSEN */
147 {0x18, 0x72, 0x73}, /* 5VDD */
148 {0x19, 0x74, 0x75}, /* 5VSB */
149 {0x1a, 0x76, 0x77}, /* VBAT */
150};
151
152/* Low Bits of Vcore A/B Vtt Read/High/Low */
153static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
154static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 155static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 156
157#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
158#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
159
160#define W83793_REG_PWM_DEFAULT 0xb2
161#define W83793_REG_PWM_ENABLE 0x207
162#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
163#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
164#define W83793_REG_TEMP_CRITICAL 0xc5
165
166#define PWM_DUTY 0
167#define PWM_START 1
168#define PWM_NONSTOP 2
5aebefb0 169#define PWM_STOP_TIME 3
6800c3d0
RM		 170#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
171 (nr) == 1 ? 0x220 : 0x218) + (index))
172
173/* bit field, fan1 is bit0, fan2 is bit1 ... */
174#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
175#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
176#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
177#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
178#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
179#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
180
181static inline unsigned long FAN_FROM_REG(u16 val)
182{
183 if ((val >= 0xfff) || (val == 0))
184 return 0;
185 return (1350000UL / val);
186}
187
188static inline u16 FAN_TO_REG(long rpm)
189{
190 if (rpm <= 0)
191 return 0x0fff;
192 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
193}
194
195static inline unsigned long TIME_FROM_REG(u8 reg)
196{
197 return (reg * 100);
198}
199
200static inline u8 TIME_TO_REG(unsigned long val)
201{
202 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
203}
204
205static inline long TEMP_FROM_REG(s8 reg)
206{
207 return (reg * 1000);
208}
209
210static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
211{
212 return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max);
213}
214
215struct w83793_data {
6800c3d0 216 struct i2c_client *lm75[2];
1beeffe4 217 struct device *hwmon_dev;
6800c3d0
RM		 218 struct mutex update_lock;
219 char valid; /* !=0 if following fields are valid */
220 unsigned long last_updated; /* In jiffies */
221 unsigned long last_nonvolatile; /* In jiffies, last time we update the
222 nonvolatile registers */
223
224 u8 bank;
225 u8 vrm;
226 u8 vid[2];
227 u8 in[10][3]; /* Register value, read/high/low */
228 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
229
230 u16 has_fan; /* Only fan1- fan5 has own pins */
231 u16 fan[12]; /* Register value combine */
232 u16 fan_min[12]; /* Register value combine */
233
234 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
235 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
236 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
237 byte 1: Temp R1,R2 mode, each has 1 bit */
238 u8 temp_critical; /* If reached all fan will be at full speed */
239 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
240
241 u8 has_pwm;
46bed4df 242 u8 has_temp;
c70a8c34 243 u8 has_vid;
6800c3d0
RM		 244 u8 pwm_enable; /* Register value, each Temp has 1 bit */
245 u8 pwm_uptime; /* Register value */
246 u8 pwm_downtime; /* Register value */
247 u8 pwm_default; /* All fan default pwm, next poweron valid */
248 u8 pwm[8][3]; /* Register value */
249 u8 pwm_stop_time[8];
250 u8 temp_cruise[6];
251
252 u8 alarms[5]; /* realtime status registers */
253 u8 beeps[5];
254 u8 beep_enable;
255 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
256 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
257 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 258
259 /* watchdog */
260 struct i2c_client *client;
261 struct mutex watchdog_lock;
262 struct list_head list; /* member of the watchdog_data_list */
263 struct kref kref;
264 struct miscdevice watchdog_miscdev;
265 unsigned long watchdog_is_open;
266 char watchdog_expect_close;
267 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
268 unsigned int watchdog_caused_reboot;
269 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 270};
271
5852f960
SA		 272/* Somewhat ugly :( global data pointer list with all devices, so that
273 we can find our device data as when using misc_register. There is no
274 other method to get to one's device data from the open file-op and
275 for usage in the reboot notifier callback. */
276static LIST_HEAD(watchdog_data_list);
277
278/* Note this lock not only protect list access, but also data.kref access */
279static DEFINE_MUTEX(watchdog_data_mutex);
280
281/* Release our data struct when we're detached from the i2c client *and* all
282 references to our watchdog device are released */
283static void w83793_release_resources(struct kref *ref)
284{
285 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
286 kfree(data);
287}
288
6800c3d0
RM		 289static u8 w83793_read_value(struct i2c_client *client, u16 reg);
290static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 291static int w83793_probe(struct i2c_client *client,
292 const struct i2c_device_id *id);
310ec792 293static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 294 struct i2c_board_info *info);
295static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 296static void w83793_init_client(struct i2c_client *client);
297static void w83793_update_nonvolatile(struct device *dev);
298static struct w83793_data *w83793_update_device(struct device *dev);
299
a7f13a6e 300static const struct i2c_device_id w83793_id[] = {
1f86df49 301 { "w83793", 0 },
a7f13a6e
JD		 302 { }
303};
304MODULE_DEVICE_TABLE(i2c, w83793_id);
305
6800c3d0 306static struct i2c_driver w83793_driver = {
a7f13a6e 307 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 308 .driver = {
309 .name = "w83793",
310 },
a7f13a6e
JD		 311 .probe = w83793_probe,
312 .remove = w83793_remove,
313 .id_table = w83793_id,
314 .detect = w83793_detect,
c3813d6a 315 .address_list = normal_i2c,
6800c3d0
RM		 316};
317
318static ssize_t
319show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
320{
8f74efe8 321 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 322 return sprintf(buf, "%d\n", data->vrm);
323}
324
325static ssize_t
326show_vid(struct device *dev, struct device_attribute *attr, char *buf)
327{
328 struct w83793_data *data = w83793_update_device(dev);
329 struct sensor_device_attribute_2 *sensor_attr =
330 to_sensor_dev_attr_2(attr);
331 int index = sensor_attr->index;
332
333 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
334}
335
336static ssize_t
337store_vrm(struct device *dev, struct device_attribute *attr,
338 const char *buf, size_t count)
339{
8f74efe8 340 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 341 data->vrm = simple_strtoul(buf, NULL, 10);
342 return count;
343}
344
345#define ALARM_STATUS 0
346#define BEEP_ENABLE 1
347static ssize_t
348show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
349{
350 struct w83793_data *data = w83793_update_device(dev);
351 struct sensor_device_attribute_2 *sensor_attr =
352 to_sensor_dev_attr_2(attr);
353 int nr = sensor_attr->nr;
354 int index = sensor_attr->index >> 3;
355 int bit = sensor_attr->index & 0x07;
356 u8 val;
357
358 if (ALARM_STATUS == nr) {
359 val = (data->alarms[index] >> (bit)) & 1;
360 } else { /* BEEP_ENABLE */
361 val = (data->beeps[index] >> (bit)) & 1;
362 }
363
364 return sprintf(buf, "%u\n", val);
365}
366
367static ssize_t
368store_beep(struct device *dev, struct device_attribute *attr,
369 const char *buf, size_t count)
370{
371 struct i2c_client *client = to_i2c_client(dev);
372 struct w83793_data *data = i2c_get_clientdata(client);
373 struct sensor_device_attribute_2 *sensor_attr =
374 to_sensor_dev_attr_2(attr);
375 int index = sensor_attr->index >> 3;
376 int shift = sensor_attr->index & 0x07;
377 u8 beep_bit = 1 << shift;
378 u8 val;
379
380 val = simple_strtoul(buf, NULL, 10);
381 if (val != 0 && val != 1)
382 return -EINVAL;
383
384 mutex_lock(&data->update_lock);
385 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
386 data->beeps[index] &= ~beep_bit;
387 data->beeps[index] |= val << shift;
388 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
389 mutex_unlock(&data->update_lock);
390
391 return count;
392}
393
394static ssize_t
395show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
396{
397 struct w83793_data *data = w83793_update_device(dev);
398 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
399}
400
401static ssize_t
402store_beep_enable(struct device *dev, struct device_attribute *attr,
403 const char *buf, size_t count)
404{
405 struct i2c_client *client = to_i2c_client(dev);
406 struct w83793_data *data = i2c_get_clientdata(client);
407 u8 val = simple_strtoul(buf, NULL, 10);
408
409 if (val != 0 && val != 1)
410 return -EINVAL;
411
412 mutex_lock(&data->update_lock);
413 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
414 & 0xfd;
415 data->beep_enable |= val << 1;
416 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
417 mutex_unlock(&data->update_lock);
418
419 return count;
420}
421
422/* Write any value to clear chassis alarm */
423static ssize_t
a516dc3e
JD		 424store_chassis_clear_legacy(struct device *dev,
425 struct device_attribute *attr, const char *buf,
426 size_t count)
6800c3d0
RM		 427{
428 struct i2c_client *client = to_i2c_client(dev);
429 struct w83793_data *data = i2c_get_clientdata(client);
430 u8 val;
431
a516dc3e
JD		 432 dev_warn(dev, "Attribute chassis is deprecated, "
433 "use intrusion0_alarm instead\n");
434
6800c3d0
RM		 435 mutex_lock(&data->update_lock);
436 val = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
437 val |= 0x80;
438 w83793_write_value(client, W83793_REG_CLR_CHASSIS, val);
439 mutex_unlock(&data->update_lock);
440 return count;
441}
442
a516dc3e
JD		 443/* Write 0 to clear chassis alarm */
444static ssize_t
445store_chassis_clear(struct device *dev,
446 struct device_attribute *attr, const char *buf,
447 size_t count)
448{
449 struct i2c_client *client = to_i2c_client(dev);
450 struct w83793_data *data = i2c_get_clientdata(client);
451 unsigned long val;
452 u8 reg;
453
454 if (strict_strtoul(buf, 10, &val) || val != 0)
455 return -EINVAL;
456
457 mutex_lock(&data->update_lock);
458 reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
459 w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80);
460 data->valid = 0; /* Force cache refresh */
461 mutex_unlock(&data->update_lock);
462 return count;
463}
464
6800c3d0
RM		 465#define FAN_INPUT 0
466#define FAN_MIN 1
467static ssize_t
468show_fan(struct device *dev, struct device_attribute *attr, char *buf)
469{
470 struct sensor_device_attribute_2 *sensor_attr =
471 to_sensor_dev_attr_2(attr);
472 int nr = sensor_attr->nr;
473 int index = sensor_attr->index;
474 struct w83793_data *data = w83793_update_device(dev);
475 u16 val;
476
477 if (FAN_INPUT == nr) {
478 val = data->fan[index] & 0x0fff;
479 } else {
480 val = data->fan_min[index] & 0x0fff;
481 }
482
483 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
484}
485
486static ssize_t
487store_fan_min(struct device *dev, struct device_attribute *attr,
488 const char *buf, size_t count)
489{
490 struct sensor_device_attribute_2 *sensor_attr =
491 to_sensor_dev_attr_2(attr);
492 int index = sensor_attr->index;
493 struct i2c_client *client = to_i2c_client(dev);
494 struct w83793_data *data = i2c_get_clientdata(client);
495 u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10));
496
497 mutex_lock(&data->update_lock);
498 data->fan_min[index] = val;
499 w83793_write_value(client, W83793_REG_FAN_MIN(index),
500 (val >> 8) & 0xff);
501 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
502 mutex_unlock(&data->update_lock);
503
504 return count;
505}
506
6800c3d0
RM		 507static ssize_t
508show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
509{
510 struct sensor_device_attribute_2 *sensor_attr =
511 to_sensor_dev_attr_2(attr);
512 struct w83793_data *data = w83793_update_device(dev);
513 u16 val;
514 int nr = sensor_attr->nr;
515 int index = sensor_attr->index;
516
517 if (PWM_STOP_TIME == nr)
518 val = TIME_FROM_REG(data->pwm_stop_time[index]);
519 else
520 val = (data->pwm[index][nr] & 0x3f) << 2;
521
522 return sprintf(buf, "%d\n", val);
523}
524
525static ssize_t
526store_pwm(struct device *dev, struct device_attribute *attr,
527 const char *buf, size_t count)
528{
529 struct i2c_client *client = to_i2c_client(dev);
530 struct w83793_data *data = i2c_get_clientdata(client);
531 struct sensor_device_attribute_2 *sensor_attr =
532 to_sensor_dev_attr_2(attr);
533 int nr = sensor_attr->nr;
534 int index = sensor_attr->index;
535 u8 val;
536
537 mutex_lock(&data->update_lock);
538 if (PWM_STOP_TIME == nr) {
539 val = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
540 data->pwm_stop_time[index] = val;
541 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
542 val);
543 } else {
544 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff)
545 >> 2;
546 data->pwm[index][nr] =
547 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
548 data->pwm[index][nr] |= val;
549 w83793_write_value(client, W83793_REG_PWM(index, nr),
550 data->pwm[index][nr]);
551 }
552
553 mutex_unlock(&data->update_lock);
554 return count;
555}
556
557static ssize_t
558show_temp(struct device *dev, struct device_attribute *attr, char *buf)
559{
560 struct sensor_device_attribute_2 *sensor_attr =
561 to_sensor_dev_attr_2(attr);
562 int nr = sensor_attr->nr;
563 int index = sensor_attr->index;
564 struct w83793_data *data = w83793_update_device(dev);
565 long temp = TEMP_FROM_REG(data->temp[index][nr]);
566
567 if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */
568 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
569 temp += temp > 0 ? low : -low;
570 }
571 return sprintf(buf, "%ld\n", temp);
572}
573
574static ssize_t
575store_temp(struct device *dev, struct device_attribute *attr,
576 const char *buf, size_t count)
577{
578 struct sensor_device_attribute_2 *sensor_attr =
579 to_sensor_dev_attr_2(attr);
580 int nr = sensor_attr->nr;
581 int index = sensor_attr->index;
582 struct i2c_client *client = to_i2c_client(dev);
583 struct w83793_data *data = i2c_get_clientdata(client);
584 long tmp = simple_strtol(buf, NULL, 10);
585
586 mutex_lock(&data->update_lock);
587 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
588 w83793_write_value(client, W83793_REG_TEMP[index][nr],
589 data->temp[index][nr]);
590 mutex_unlock(&data->update_lock);
591 return count;
592}
593
594/*
595 TD1-TD4
596 each has 4 mode:(2 bits)
597 0: Stop monitor
598 1: Use internal temp sensor(default)
ddca933b 599 2: Reserved
6800c3d0
RM		 600 3: Use sensor in Intel CPU and get result by PECI
601
602 TR1-TR2
603 each has 2 mode:(1 bit)
604 0: Disable temp sensor monitor
605 1: To enable temp sensors monitor
606*/
607
ddca933b
GJ		 608/* 0 disable, 6 PECI */
609static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 610
611static ssize_t
612show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
613{
614 struct w83793_data *data = w83793_update_device(dev);
615 struct sensor_device_attribute_2 *sensor_attr =
616 to_sensor_dev_attr_2(attr);
617 int index = sensor_attr->index;
618 u8 mask = (index < 4) ? 0x03 : 0x01;
619 u8 shift = (index < 4) ? (2 * index) : (index - 4);
620 u8 tmp;
621 index = (index < 4) ? 0 : 1;
622
623 tmp = (data->temp_mode[index] >> shift) & mask;
624
625 /* for the internal sensor, found out if diode or thermistor */
626 if (tmp == 1) {
627 tmp = index == 0 ? 3 : 4;
628 } else {
629 tmp = TO_TEMP_MODE[tmp];
630 }
631
632 return sprintf(buf, "%d\n", tmp);
633}
634
635static ssize_t
636store_temp_mode(struct device *dev, struct device_attribute *attr,
637 const char *buf, size_t count)
638{
639 struct i2c_client *client = to_i2c_client(dev);
640 struct w83793_data *data = i2c_get_clientdata(client);
641 struct sensor_device_attribute_2 *sensor_attr =
642 to_sensor_dev_attr_2(attr);
643 int index = sensor_attr->index;
644 u8 mask = (index < 4) ? 0x03 : 0x01;
645 u8 shift = (index < 4) ? (2 * index) : (index - 4);
646 u8 val = simple_strtoul(buf, NULL, 10);
647
648 /* transform the sysfs interface values into table above */
ddca933b 649 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 650 val -= 3;
651 } else if ((val == 3 && index < 4)
46bed4df 652 || (val == 4 && index >= 4)) {
6800c3d0
RM		 653 /* transform diode or thermistor into internal enable */
654 val = !!val;
655 } else {
656 return -EINVAL;
657 }
658
659 index = (index < 4) ? 0 : 1;
660 mutex_lock(&data->update_lock);
661 data->temp_mode[index] =
662 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
663 data->temp_mode[index] &= ~(mask << shift);
664 data->temp_mode[index] |= val << shift;
665 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
666 data->temp_mode[index]);
667 mutex_unlock(&data->update_lock);
668
669 return count;
670}
671
672#define SETUP_PWM_DEFAULT 0
673#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
674#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
675#define SETUP_TEMP_CRITICAL 3
676static ssize_t
677show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
678{
679 struct sensor_device_attribute_2 *sensor_attr =
680 to_sensor_dev_attr_2(attr);
681 int nr = sensor_attr->nr;
682 struct w83793_data *data = w83793_update_device(dev);
683 u32 val = 0;
684
685 if (SETUP_PWM_DEFAULT == nr) {
686 val = (data->pwm_default & 0x3f) << 2;
687 } else if (SETUP_PWM_UPTIME == nr) {
688 val = TIME_FROM_REG(data->pwm_uptime);
689 } else if (SETUP_PWM_DOWNTIME == nr) {
690 val = TIME_FROM_REG(data->pwm_downtime);
691 } else if (SETUP_TEMP_CRITICAL == nr) {
692 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
693 }
694
695 return sprintf(buf, "%d\n", val);
696}
697
698static ssize_t
699store_sf_setup(struct device *dev, struct device_attribute *attr,
700 const char *buf, size_t count)
701{
702 struct sensor_device_attribute_2 *sensor_attr =
703 to_sensor_dev_attr_2(attr);
704 int nr = sensor_attr->nr;
705 struct i2c_client *client = to_i2c_client(dev);
706 struct w83793_data *data = i2c_get_clientdata(client);
707
708 mutex_lock(&data->update_lock);
709 if (SETUP_PWM_DEFAULT == nr) {
710 data->pwm_default =
711 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
712 data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL,
713 10),
714 0, 0xff) >> 2;
715 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
716 data->pwm_default);
717 } else if (SETUP_PWM_UPTIME == nr) {
718 data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
719 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
720 w83793_write_value(client, W83793_REG_PWM_UPTIME,
721 data->pwm_uptime);
722 } else if (SETUP_PWM_DOWNTIME == nr) {
723 data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
724 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
725 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
726 data->pwm_downtime);
727 } else { /* SETUP_TEMP_CRITICAL */
728 data->temp_critical =
729 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
730 data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10),
731 0, 0x7f);
732 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
733 data->temp_critical);
734 }
735
736 mutex_unlock(&data->update_lock);
737 return count;
738}
739
740/*
741 Temp SmartFan control
742 TEMP_FAN_MAP
743 Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
744 It's possible two or more temp channels control the same fan, w83793
745 always prefers to pick the most critical request and applies it to
746 the related Fan.
747 It's possible one fan is not in any mapping of 6 temp channels, this
748 means the fan is manual mode
749
750 TEMP_PWM_ENABLE
751 Each temp channel has its own SmartFan mode, and temp channel
752 control fans that are set by TEMP_FAN_MAP
753 0: SmartFanII mode
754 1: Thermal Cruise Mode
755
756 TEMP_CRUISE
757 Target temperature in thermal cruise mode, w83793 will try to turn
758 fan speed to keep the temperature of target device around this
759 temperature.
760
761 TEMP_TOLERANCE
762 If Temp higher or lower than target with this tolerance, w83793
763 will take actions to speed up or slow down the fan to keep the
764 temperature within the tolerance range.
765*/
766
767#define TEMP_FAN_MAP 0
768#define TEMP_PWM_ENABLE 1
769#define TEMP_CRUISE 2
770#define TEMP_TOLERANCE 3
771static ssize_t
772show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
773{
774 struct sensor_device_attribute_2 *sensor_attr =
775 to_sensor_dev_attr_2(attr);
776 int nr = sensor_attr->nr;
777 int index = sensor_attr->index;
778 struct w83793_data *data = w83793_update_device(dev);
779 u32 val;
780
781 if (TEMP_FAN_MAP == nr) {
782 val = data->temp_fan_map[index];
783 } else if (TEMP_PWM_ENABLE == nr) {
784 /* +2 to transfrom into 2 and 3 to conform with sysfs intf */
785 val = ((data->pwm_enable >> index) & 0x01) + 2;
786 } else if (TEMP_CRUISE == nr) {
787 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
788 } else { /* TEMP_TOLERANCE */
789 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
790 val = TEMP_FROM_REG(val & 0x0f);
791 }
792 return sprintf(buf, "%d\n", val);
793}
794
795static ssize_t
796store_sf_ctrl(struct device *dev, struct device_attribute *attr,
797 const char *buf, size_t count)
798{
799 struct sensor_device_attribute_2 *sensor_attr =
800 to_sensor_dev_attr_2(attr);
801 int nr = sensor_attr->nr;
802 int index = sensor_attr->index;
803 struct i2c_client *client = to_i2c_client(dev);
804 struct w83793_data *data = i2c_get_clientdata(client);
805 u32 val;
806
807 mutex_lock(&data->update_lock);
808 if (TEMP_FAN_MAP == nr) {
809 val = simple_strtoul(buf, NULL, 10) & 0xff;
810 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
811 data->temp_fan_map[index] = val;
812 } else if (TEMP_PWM_ENABLE == nr) {
813 val = simple_strtoul(buf, NULL, 10);
814 if (2 == val || 3 == val) {
815 data->pwm_enable =
816 w83793_read_value(client, W83793_REG_PWM_ENABLE);
817 if (val - 2)
818 data->pwm_enable |= 1 << index;
819 else
820 data->pwm_enable &= ~(1 << index);
821 w83793_write_value(client, W83793_REG_PWM_ENABLE,
822 data->pwm_enable);
823 } else {
824 mutex_unlock(&data->update_lock);
825 return -EINVAL;
826 }
827 } else if (TEMP_CRUISE == nr) {
828 data->temp_cruise[index] =
829 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
830 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
831 data->temp_cruise[index] &= 0x80;
832 data->temp_cruise[index] |= val;
833
834 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
835 data->temp_cruise[index]);
836 } else { /* TEMP_TOLERANCE */
837 int i = index >> 1;
838 u8 shift = (index & 0x01) ? 4 : 0;
839 data->tolerance[i] =
840 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
841
842 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f);
843 data->tolerance[i] &= ~(0x0f << shift);
844 data->tolerance[i] |= val << shift;
845 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
846 data->tolerance[i]);
847 }
848
849 mutex_unlock(&data->update_lock);
850 return count;
851}
852
853static ssize_t
854show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
855{
856 struct sensor_device_attribute_2 *sensor_attr =
857 to_sensor_dev_attr_2(attr);
858 int nr = sensor_attr->nr;
859 int index = sensor_attr->index;
860 struct w83793_data *data = w83793_update_device(dev);
861
862 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
863}
864
865static ssize_t
866store_sf2_pwm(struct device *dev, struct device_attribute *attr,
867 const char *buf, size_t count)
868{
869 struct i2c_client *client = to_i2c_client(dev);
870 struct w83793_data *data = i2c_get_clientdata(client);
871 struct sensor_device_attribute_2 *sensor_attr =
872 to_sensor_dev_attr_2(attr);
873 int nr = sensor_attr->nr;
874 int index = sensor_attr->index;
875 u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2;
876
877 mutex_lock(&data->update_lock);
878 data->sf2_pwm[index][nr] =
879 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
880 data->sf2_pwm[index][nr] |= val;
881 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
882 data->sf2_pwm[index][nr]);
883 mutex_unlock(&data->update_lock);
884 return count;
885}
886
887static ssize_t
888show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
889{
890 struct sensor_device_attribute_2 *sensor_attr =
891 to_sensor_dev_attr_2(attr);
892 int nr = sensor_attr->nr;
893 int index = sensor_attr->index;
894 struct w83793_data *data = w83793_update_device(dev);
895
896 return sprintf(buf, "%ld\n",
897 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
898}
899
900static ssize_t
901store_sf2_temp(struct device *dev, struct device_attribute *attr,
902 const char *buf, size_t count)
903{
904 struct i2c_client *client = to_i2c_client(dev);
905 struct w83793_data *data = i2c_get_clientdata(client);
906 struct sensor_device_attribute_2 *sensor_attr =
907 to_sensor_dev_attr_2(attr);
908 int nr = sensor_attr->nr;
909 int index = sensor_attr->index;
910 u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
911
912 mutex_lock(&data->update_lock);
913 data->sf2_temp[index][nr] =
914 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
915 data->sf2_temp[index][nr] |= val;
916 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
917 data->sf2_temp[index][nr]);
918 mutex_unlock(&data->update_lock);
919 return count;
920}
921
922/* only Vcore A/B and Vtt have additional 2 bits precision */
923static ssize_t
924show_in(struct device *dev, struct device_attribute *attr, char *buf)
925{
926 struct sensor_device_attribute_2 *sensor_attr =
927 to_sensor_dev_attr_2(attr);
928 int nr = sensor_attr->nr;
929 int index = sensor_attr->index;
930 struct w83793_data *data = w83793_update_device(dev);
931 u16 val = data->in[index][nr];
932
933 if (index < 3) {
934 val <<= 2;
935 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
936 }
ddca933b
GJ		 937 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
938 val = val * scale_in[index] + scale_in_add[index];
939 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 940}
941
942static ssize_t
943store_in(struct device *dev, struct device_attribute *attr,
944 const char *buf, size_t count)
945{
946 struct sensor_device_attribute_2 *sensor_attr =
947 to_sensor_dev_attr_2(attr);
948 int nr = sensor_attr->nr;
949 int index = sensor_attr->index;
950 struct i2c_client *client = to_i2c_client(dev);
951 struct w83793_data *data = i2c_get_clientdata(client);
952 u32 val;
953
954 val =
955 (simple_strtoul(buf, NULL, 10) +
956 scale_in[index] / 2) / scale_in[index];
957 mutex_lock(&data->update_lock);
958 if (index > 2) {
ddca933b
GJ		 959 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
960 if (1 == nr || 2 == nr) {
961 val -= scale_in_add[index] / scale_in[index];
962 }
6800c3d0
RM		 963 val = SENSORS_LIMIT(val, 0, 255);
964 } else {
965 val = SENSORS_LIMIT(val, 0, 0x3FF);
966 data->in_low_bits[nr] =
967 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
968 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
969 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
970 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
971 data->in_low_bits[nr]);
972 val >>= 2;
973 }
974 data->in[index][nr] = val;
975 w83793_write_value(client, W83793_REG_IN[index][nr],
976 data->in[index][nr]);
977 mutex_unlock(&data->update_lock);
978 return count;
979}
980
981#define NOT_USED -1
982
983#define SENSOR_ATTR_IN(index) \
984 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
985 IN_READ, index), \
986 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
987 store_in, IN_MAX, index), \
988 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
989 store_in, IN_LOW, index), \
990 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
991 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
992 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
993 show_alarm_beep, store_beep, BEEP_ENABLE, \
994 index + ((index > 2) ? 1 : 0))
995
996#define SENSOR_ATTR_FAN(index) \
997 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
998 NULL, ALARM_STATUS, index + 17), \
999 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1000 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
1001 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1002 NULL, FAN_INPUT, index - 1), \
1003 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1004 show_fan, store_fan_min, FAN_MIN, index - 1)
1005
1006#define SENSOR_ATTR_PWM(index) \
1007 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1008 store_pwm, PWM_DUTY, index - 1), \
1009 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1010 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1011 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1012 show_pwm, store_pwm, PWM_START, index - 1), \
1013 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1014 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
1015
1016#define SENSOR_ATTR_TEMP(index) \
1017 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1018 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1019 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1020 NULL, TEMP_READ, index - 1), \
1021 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1022 store_temp, TEMP_CRIT, index - 1), \
1023 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1024 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1025 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1026 store_temp, TEMP_WARN, index - 1), \
1027 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1028 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1029 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1030 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1031 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1032 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1033 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1034 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1035 TEMP_FAN_MAP, index - 1), \
1036 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1037 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1038 index - 1), \
1039 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1040 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1041 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1042 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1043 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1044 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1045 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1046 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1047 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1048 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1049 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1050 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1051 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1052 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1053 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1054 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1055 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1056 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1057 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1058 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1059 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1060 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1061 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1062 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1063 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1064 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1065 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1066 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1067 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1068 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1069 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1070 show_sf2_temp, store_sf2_temp, 6, index - 1)
1071
1072static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1073 SENSOR_ATTR_IN(0),
1074 SENSOR_ATTR_IN(1),
1075 SENSOR_ATTR_IN(2),
1076 SENSOR_ATTR_IN(3),
1077 SENSOR_ATTR_IN(4),
1078 SENSOR_ATTR_IN(5),
1079 SENSOR_ATTR_IN(6),
1080 SENSOR_ATTR_IN(7),
1081 SENSOR_ATTR_IN(8),
1082 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1083 SENSOR_ATTR_FAN(1),
1084 SENSOR_ATTR_FAN(2),
1085 SENSOR_ATTR_FAN(3),
1086 SENSOR_ATTR_FAN(4),
1087 SENSOR_ATTR_FAN(5),
1088 SENSOR_ATTR_PWM(1),
1089 SENSOR_ATTR_PWM(2),
1090 SENSOR_ATTR_PWM(3),
1091};
1092
46bed4df
GJ		 1093static struct sensor_device_attribute_2 w83793_temp[] = {
1094 SENSOR_ATTR_TEMP(1),
1095 SENSOR_ATTR_TEMP(2),
1096 SENSOR_ATTR_TEMP(3),
1097 SENSOR_ATTR_TEMP(4),
1098 SENSOR_ATTR_TEMP(5),
1099 SENSOR_ATTR_TEMP(6),
1100};
1101
6800c3d0
RM		 1102/* Fan6-Fan12 */
1103static struct sensor_device_attribute_2 w83793_left_fan[] = {
1104 SENSOR_ATTR_FAN(6),
1105 SENSOR_ATTR_FAN(7),
1106 SENSOR_ATTR_FAN(8),
1107 SENSOR_ATTR_FAN(9),
1108 SENSOR_ATTR_FAN(10),
1109 SENSOR_ATTR_FAN(11),
1110 SENSOR_ATTR_FAN(12),
1111};
1112
1113/* Pwm4-Pwm8 */
1114static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1115 SENSOR_ATTR_PWM(4),
1116 SENSOR_ATTR_PWM(5),
1117 SENSOR_ATTR_PWM(6),
1118 SENSOR_ATTR_PWM(7),
1119 SENSOR_ATTR_PWM(8),
1120};
1121
c70a8c34 1122static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1123 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1124 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1125};
93c75a4a 1126static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
c70a8c34
GJ		 1127
1128static struct sensor_device_attribute_2 sda_single_files[] = {
6800c3d0 1129 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
a516dc3e
JD		 1130 store_chassis_clear_legacy, ALARM_STATUS, 30),
1131 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
6800c3d0
RM		 1132 store_chassis_clear, ALARM_STATUS, 30),
1133 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1134 store_beep_enable, NOT_USED, NOT_USED),
1135 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1136 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1137 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1138 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1139 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1140 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1141 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1142 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1143};
1144
1145static void w83793_init_client(struct i2c_client *client)
1146{
1147 if (reset) {
1148 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
1149 }
1150
1151 /* Start monitoring */
1152 w83793_write_value(client, W83793_REG_CONFIG,
1153 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1154}
1155
1156/*
1157 * Watchdog routines
1158 */
1159
1160static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1161{
1162 int ret, mtimeout;
1163
1164 mtimeout = DIV_ROUND_UP(timeout, 60);
1165
1166 if (mtimeout > 255)
1167 return -EINVAL;
1168
1169 mutex_lock(&data->watchdog_lock);
1170 if (!data->client) {
1171 ret = -ENODEV;
1172 goto leave;
1173 }
1174
1175 data->watchdog_timeout = mtimeout;
1176
1177 /* Set Timeout value (in Minutes) */
1178 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1179 data->watchdog_timeout);
1180
1181 ret = mtimeout * 60;
1182
1183leave:
1184 mutex_unlock(&data->watchdog_lock);
1185 return ret;
1186}
1187
1188static int watchdog_get_timeout(struct w83793_data *data)
1189{
1190 int timeout;
1191
1192 mutex_lock(&data->watchdog_lock);
1193 timeout = data->watchdog_timeout * 60;
1194 mutex_unlock(&data->watchdog_lock);
1195
1196 return timeout;
1197}
1198
1199static int watchdog_trigger(struct w83793_data *data)
1200{
1201 int ret = 0;
1202
1203 mutex_lock(&data->watchdog_lock);
1204 if (!data->client) {
1205 ret = -ENODEV;
1206 goto leave;
1207 }
1208
1209 /* Set Timeout value (in Minutes) */
1210 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1211 data->watchdog_timeout);
1212
1213leave:
1214 mutex_unlock(&data->watchdog_lock);
1215 return ret;
1216}
1217
1218static int watchdog_enable(struct w83793_data *data)
1219{
1220 int ret = 0;
1221
1222 mutex_lock(&data->watchdog_lock);
1223 if (!data->client) {
1224 ret = -ENODEV;
1225 goto leave;
1226 }
1227
1228 /* Set initial timeout */
1229 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1230 data->watchdog_timeout);
1231
1232 /* Enable Soft Watchdog */
1233 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1234
1235leave:
1236 mutex_unlock(&data->watchdog_lock);
1237 return ret;
1238}
1239
1240static int watchdog_disable(struct w83793_data *data)
1241{
1242 int ret = 0;
1243
1244 mutex_lock(&data->watchdog_lock);
1245 if (!data->client) {
1246 ret = -ENODEV;
1247 goto leave;
1248 }
1249
1250 /* Disable Soft Watchdog */
1251 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1252
1253leave:
1254 mutex_unlock(&data->watchdog_lock);
1255 return ret;
1256}
1257
1258static int watchdog_open(struct inode *inode, struct file *filp)
1259{
1260 struct w83793_data *pos, *data = NULL;
1261 int watchdog_is_open;
1262
1263 /* We get called from drivers/char/misc.c with misc_mtx hold, and we
1264 call misc_register() from w83793_probe() with watchdog_data_mutex
1265 hold, as misc_register() takes the misc_mtx lock, this is a possible
1266 deadlock, so we use mutex_trylock here. */
1267 if (!mutex_trylock(&watchdog_data_mutex))
1268 return -ERESTARTSYS;
1269 list_for_each_entry(pos, &watchdog_data_list, list) {
1270 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1271 data = pos;
1272 break;
1273 }
1274 }
1275
1276 /* Check, if device is already open */
1277 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1278
1279 /* Increase data reference counter (if not already done).
1280 Note we can never not have found data, so we don't check for this */
1281 if (!watchdog_is_open)
1282 kref_get(&data->kref);
1283
1284 mutex_unlock(&watchdog_data_mutex);
1285
1286 /* Check, if device is already open and possibly issue error */
1287 if (watchdog_is_open)
1288 return -EBUSY;
1289
1290 /* Enable Soft Watchdog */
1291 watchdog_enable(data);
1292
1293 /* Store pointer to data into filp's private data */
1294 filp->private_data = data;
1295
1296 return nonseekable_open(inode, filp);
1297}
1298
1299static int watchdog_close(struct inode *inode, struct file *filp)
1300{
1301 struct w83793_data *data = filp->private_data;
6800c3d0 1302
5852f960
SA		 1303 if (data->watchdog_expect_close) {
1304 watchdog_disable(data);
1305 data->watchdog_expect_close = 0;
1306 } else {
1307 watchdog_trigger(data);
1308 dev_crit(&data->client->dev,
1309 "unexpected close, not stopping watchdog!\n");
1310 }
1311
1312 clear_bit(0, &data->watchdog_is_open);
1313
1314 /* Decrease data reference counter */
1315 mutex_lock(&watchdog_data_mutex);
1316 kref_put(&data->kref, w83793_release_resources);
1317 mutex_unlock(&watchdog_data_mutex);
1318
1319 return 0;
1320}
1321
1322static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1323 size_t count, loff_t *offset)
1324{
3f7cd7ea 1325 ssize_t ret;
5852f960
SA		 1326 struct w83793_data *data = filp->private_data;
1327
1328 if (count) {
1329 if (!nowayout) {
1330 size_t i;
1331
1332 /* Clear it in case it was set with a previous write */
1333 data->watchdog_expect_close = 0;
1334
1335 for (i = 0; i != count; i++) {
1336 char c;
1337 if (get_user(c, buf + i))
1338 return -EFAULT;
1339 if (c == 'V')
1340 data->watchdog_expect_close = 1;
1341 }
1342 }
1343 ret = watchdog_trigger(data);
1344 if (ret < 0)
1345 return ret;
1346 }
1347 return count;
1348}
1349
55929332
AB		 1350static long watchdog_ioctl(struct file *filp, unsigned int cmd,
1351 unsigned long arg)
5852f960
SA		 1352{
1353 static struct watchdog_info ident = {
1354 .options = WDIOF_KEEPALIVEPING |
1355 WDIOF_SETTIMEOUT |
1356 WDIOF_CARDRESET,
1357 .identity = "w83793 watchdog"
1358 };
1359
1360 int val, ret = 0;
1361 struct w83793_data *data = filp->private_data;
1362
613655fa 1363 mutex_lock(&watchdog_mutex);
5852f960
SA		 1364 switch (cmd) {
1365 case WDIOC_GETSUPPORT:
1366 if (!nowayout)
1367 ident.options |= WDIOF_MAGICCLOSE;
1368 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1369 ret = -EFAULT;
1370 break;
1371
1372 case WDIOC_GETSTATUS:
1373 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1374 ret = put_user(val, (int __user *)arg);
1375 break;
1376
1377 case WDIOC_GETBOOTSTATUS:
1378 ret = put_user(0, (int __user *)arg);
1379 break;
1380
1381 case WDIOC_KEEPALIVE:
1382 ret = watchdog_trigger(data);
1383 break;
1384
1385 case WDIOC_GETTIMEOUT:
1386 val = watchdog_get_timeout(data);
1387 ret = put_user(val, (int __user *)arg);
1388 break;
1389
1390 case WDIOC_SETTIMEOUT:
1391 if (get_user(val, (int __user *)arg)) {
1392 ret = -EFAULT;
1393 break;
1394 }
1395 ret = watchdog_set_timeout(data, val);
1396 if (ret > 0)
1397 ret = put_user(ret, (int __user *)arg);
1398 break;
1399
1400 case WDIOC_SETOPTIONS:
1401 if (get_user(val, (int __user *)arg)) {
1402 ret = -EFAULT;
1403 break;
1404 }
1405
1406 if (val & WDIOS_DISABLECARD)
1407 ret = watchdog_disable(data);
1408 else if (val & WDIOS_ENABLECARD)
1409 ret = watchdog_enable(data);
1410 else
1411 ret = -EINVAL;
1412
1413 break;
1414 default:
1415 ret = -ENOTTY;
1416 }
613655fa 1417 mutex_unlock(&watchdog_mutex);
5852f960
SA		 1418 return ret;
1419}
1420
1421static const struct file_operations watchdog_fops = {
1422 .owner = THIS_MODULE,
1423 .llseek = no_llseek,
1424 .open = watchdog_open,
1425 .release = watchdog_close,
1426 .write = watchdog_write,
55929332 1427 .unlocked_ioctl = watchdog_ioctl,
5852f960
SA		 1428};
1429
1430/*
1431 * Notifier for system down
1432 */
1433
1434static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1435 void *unused)
1436{
1437 struct w83793_data *data = NULL;
1438
1439 if (code == SYS_DOWN || code == SYS_HALT) {
1440
1441 /* Disable each registered watchdog */
1442 mutex_lock(&watchdog_data_mutex);
1443 list_for_each_entry(data, &watchdog_data_list, list) {
1444 if (data->watchdog_miscdev.minor)
1445 watchdog_disable(data);
1446 }
1447 mutex_unlock(&watchdog_data_mutex);
1448 }
1449
1450 return NOTIFY_DONE;
6800c3d0
RM		 1451}
1452
5852f960
SA		 1453/*
1454 * The WDT needs to learn about soft shutdowns in order to
1455 * turn the timebomb registers off.
1456 */
1457
1458static struct notifier_block watchdog_notifier = {
1459 .notifier_call = watchdog_notify_sys,
1460};
1461
1462/*
1463 * Init / remove routines
1464 */
1465
a7f13a6e 1466static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1467{
1468 struct w83793_data *data = i2c_get_clientdata(client);
1469 struct device *dev = &client->dev;
5852f960
SA		 1470 int i, tmp;
1471
1472 /* Unregister the watchdog (if registered) */
1473 if (data->watchdog_miscdev.minor) {
1474 misc_deregister(&data->watchdog_miscdev);
1475
1476 if (data->watchdog_is_open) {
1477 dev_warn(&client->dev,
1478 "i2c client detached with watchdog open! "
1479 "Stopping watchdog.\n");
1480 watchdog_disable(data);
1481 }
1482
1483 mutex_lock(&watchdog_data_mutex);
1484 list_del(&data->list);
1485 mutex_unlock(&watchdog_data_mutex);
1486
1487 /* Tell the watchdog code the client is gone */
1488 mutex_lock(&data->watchdog_lock);
1489 data->client = NULL;
1490 mutex_unlock(&data->watchdog_lock);
1491 }
1492
1493 /* Reset Configuration Register to Disable Watch Dog Registers */
1494 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1495 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1496
1497 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1498
a7f13a6e 1499 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1500
a7f13a6e
JD		 1501 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1502 device_remove_file(dev,
1503 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1504
a7f13a6e
JD		 1505 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1506 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1507
a7f13a6e
JD		 1508 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1509 device_remove_file(dev, &w83793_vid[i].dev_attr);
1510 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1511
a7f13a6e
JD		 1512 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1513 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1514
a7f13a6e
JD		 1515 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1516 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1517
a7f13a6e
JD		 1518 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1519 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1520
a7f13a6e
JD		 1521 if (data->lm75[0] != NULL)
1522 i2c_unregister_device(data->lm75[0]);
1523 if (data->lm75[1] != NULL)
1524 i2c_unregister_device(data->lm75[1]);
6800c3d0 1525
5852f960
SA		 1526 /* Decrease data reference counter */
1527 mutex_lock(&watchdog_data_mutex);
1528 kref_put(&data->kref, w83793_release_resources);
1529 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1530
1531 return 0;
1532}
1533
1534static int
a7f13a6e 1535w83793_detect_subclients(struct i2c_client *client)
6800c3d0
RM		 1536{
1537 int i, id, err;
a7f13a6e 1538 int address = client->addr;
6800c3d0 1539 u8 tmp;
a7f13a6e 1540 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1541 struct w83793_data *data = i2c_get_clientdata(client);
1542
1543 id = i2c_adapter_id(adapter);
1544 if (force_subclients[0] == id && force_subclients[1] == address) {
1545 for (i = 2; i <= 3; i++) {
1546 if (force_subclients[i] < 0x48
1547 || force_subclients[i] > 0x4f) {
1548 dev_err(&client->dev,
1549 "invalid subclient "
1550 "address %d; must be 0x48-0x4f\n",
1551 force_subclients[i]);
1552 err = -EINVAL;
1553 goto ERROR_SC_0;
1554 }
1555 }
1556 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1557 (force_subclients[2] & 0x07) |
1558 ((force_subclients[3] & 0x07) << 4));
1559 }
1560
1561 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
1562 if (!(tmp & 0x08)) {
a7f13a6e 1563 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
6800c3d0
RM		 1564 }
1565 if (!(tmp & 0x80)) {
1566 if ((data->lm75[0] != NULL)
1567 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1568 dev_err(&client->dev,
1569 "duplicate addresses 0x%x, "
1570 "use force_subclients\n", data->lm75[0]->addr);
1571 err = -ENODEV;
1572 goto ERROR_SC_1;
1573 }
a7f13a6e
JD		 1574 data->lm75[1] = i2c_new_dummy(adapter,
1575 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1576 }
1577
1578 return 0;
1579
1580 /* Undo inits in case of errors */
1581
1582ERROR_SC_1:
a7f13a6e
JD		 1583 if (data->lm75[0] != NULL)
1584 i2c_unregister_device(data->lm75[0]);
6800c3d0
RM		 1585ERROR_SC_0:
1586 return err;
1587}
1588
a7f13a6e 1589/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1590static int w83793_detect(struct i2c_client *client,
a7f13a6e 1591 struct i2c_board_info *info)
6800c3d0 1592{
52df6440 1593 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1594 struct i2c_adapter *adapter = client->adapter;
1595 unsigned short address = client->addr;
6800c3d0
RM		 1596
1597 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
a7f13a6e 1598 return -ENODEV;
6800c3d0
RM		 1599 }
1600
a7f13a6e 1601 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1602
52df6440
JD		 1603 tmp = bank & 0x80 ? 0x5c : 0xa3;
1604 /* Check Winbond vendor ID */
1605 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1606 pr_debug("w83793: Detection failed at check vendor id\n");
1607 return -ENODEV;
6800c3d0
RM		 1608 }
1609
52df6440
JD		 1610 /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1611 should match */
1612 if ((bank & 0x07) == 0
1613 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1614 (address << 1)) {
1615 pr_debug("w83793: Detection failed at check i2c addr\n");
1616 return -ENODEV;
6800c3d0
RM		 1617 }
1618
52df6440
JD		 1619 /* Determine the chip type now */
1620 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1621 if (chip_id != 0x7b)
1622 return -ENODEV;
1623
a7f13a6e
JD		 1624 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1625
1626 return 0;
1627}
6800c3d0 1628
a7f13a6e
JD		 1629static int w83793_probe(struct i2c_client *client,
1630 const struct i2c_device_id *id)
1631{
1632 struct device *dev = &client->dev;
5852f960 1633 const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
a7f13a6e
JD		 1634 struct w83793_data *data;
1635 int i, tmp, val, err;
1636 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1637 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1638 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1639
1640 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1641 if (!data) {
1642 err = -ENOMEM;
1643 goto exit;
1644 }
1645
1646 i2c_set_clientdata(client, data);
1647 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1648 mutex_init(&data->update_lock);
5852f960
SA		 1649 mutex_init(&data->watchdog_lock);
1650 INIT_LIST_HEAD(&data->list);
1651 kref_init(&data->kref);
1652
1653 /* Store client pointer in our data struct for watchdog usage
1654 (where the client is found through a data ptr instead of the
1655 otherway around) */
1656 data->client = client;
6800c3d0 1657
a7f13a6e
JD		 1658 err = w83793_detect_subclients(client);
1659 if (err)
6800c3d0
RM		 1660 goto free_mem;
1661
6800c3d0
RM		 1662 /* Initialize the chip */
1663 w83793_init_client(client);
1664
6800c3d0
RM		 1665 /*
1666 Only fan 1-5 has their own input pins,
1667 Pwm 1-3 has their own pins
1668 */
1669 data->has_fan = 0x1f;
1670 data->has_pwm = 0x07;
1671 tmp = w83793_read_value(client, W83793_REG_MFC);
1672 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1673
1674 /* check the function of pins 49-56 */
93c75a4a
JD		 1675 if (tmp & 0x80) {
1676 data->has_vid |= 0x2; /* has VIDB */
1677 } else {
6800c3d0
RM		 1678 data->has_pwm |= 0x18; /* pwm 4,5 */
1679 if (val & 0x01) { /* fan 6 */
1680 data->has_fan |= 0x20;
1681 data->has_pwm |= 0x20;
1682 }
1683 if (val & 0x02) { /* fan 7 */
1684 data->has_fan |= 0x40;
1685 data->has_pwm |= 0x40;
1686 }
1687 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1688 data->has_fan |= 0x80;
1689 data->has_pwm |= 0x80;
1690 }
1691 }
1692
93c75a4a
JD		 1693 /* check the function of pins 37-40 */
1694 if (!(tmp & 0x29))
1695 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1696 if (0x08 == (tmp & 0x0c)) {
1697 if (val & 0x08) /* fan 9 */
1698 data->has_fan |= 0x100;
1699 if (val & 0x10) /* fan 10 */
1700 data->has_fan |= 0x200;
1701 }
6800c3d0
RM		 1702 if (0x20 == (tmp & 0x30)) {
1703 if (val & 0x20) /* fan 11 */
1704 data->has_fan |= 0x400;
1705 if (val & 0x40) /* fan 12 */
1706 data->has_fan |= 0x800;
1707 }
1708
1709 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1710 data->has_fan |= 0x80;
1711 data->has_pwm |= 0x80;
1712 }
1713
c9294315
RM		 1714 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1715 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1716 data->has_fan |= 0x100;
1717 }
1718 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1719 data->has_fan |= 0x200;
1720 }
1721 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1722 data->has_fan |= 0x400;
1723 }
1724 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1725 data->has_fan |= 0x800;
1726 }
1727
46bed4df
GJ		 1728 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
1729 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]);
1730 if (tmp & 0x01)
1731 data->has_temp |= 0x01;
1732 if (tmp & 0x04)
1733 data->has_temp |= 0x02;
1734 if (tmp & 0x10)
1735 data->has_temp |= 0x04;
1736 if (tmp & 0x40)
1737 data->has_temp |= 0x08;
1738
1739 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]);
1740 if (tmp & 0x01)
1741 data->has_temp |= 0x10;
1742 if (tmp & 0x02)
1743 data->has_temp |= 0x20;
1744
6800c3d0
RM		 1745 /* Register sysfs hooks */
1746 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1747 err = device_create_file(dev,
1748 &w83793_sensor_attr_2[i].dev_attr);
1749 if (err)
1750 goto exit_remove;
1751 }
1752
c70a8c34
GJ		 1753 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1754 if (!(data->has_vid & (1 << i)))
1755 continue;
1756 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1757 if (err)
1758 goto exit_remove;
1759 }
93c75a4a
JD		 1760 if (data->has_vid) {
1761 data->vrm = vid_which_vrm();
1762 err = device_create_file(dev, &dev_attr_vrm);
1763 if (err)
1764 goto exit_remove;
1765 }
c70a8c34 1766
6800c3d0
RM		 1767 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1768 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1769 if (err)
1770 goto exit_remove;
1771
1772 }
1773
46bed4df
GJ		 1774 for (i = 0; i < 6; i++) {
1775 int j;
1776 if (!(data->has_temp & (1 << i)))
1777 continue;
1778 for (j = 0; j < files_temp; j++) {
1779 err = device_create_file(dev,
1780 &w83793_temp[(i) * files_temp
1781 + j].dev_attr);
1782 if (err)
1783 goto exit_remove;
1784 }
1785 }
1786
6800c3d0
RM		 1787 for (i = 5; i < 12; i++) {
1788 int j;
1789 if (!(data->has_fan & (1 << i)))
1790 continue;
1791 for (j = 0; j < files_fan; j++) {
1792 err = device_create_file(dev,
1793 &w83793_left_fan[(i - 5) * files_fan
1794 + j].dev_attr);
1795 if (err)
1796 goto exit_remove;
1797 }
1798 }
1799
1800 for (i = 3; i < 8; i++) {
1801 int j;
1802 if (!(data->has_pwm & (1 << i)))
1803 continue;
1804 for (j = 0; j < files_pwm; j++) {
1805 err = device_create_file(dev,
1806 &w83793_left_pwm[(i - 3) * files_pwm
1807 + j].dev_attr);
1808 if (err)
1809 goto exit_remove;
1810 }
1811 }
1812
1beeffe4
TJ		 1813 data->hwmon_dev = hwmon_device_register(dev);
1814 if (IS_ERR(data->hwmon_dev)) {
1815 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1816 goto exit_remove;
1817 }
1818
5852f960
SA		 1819 /* Watchdog initialization */
1820
1821 /* Register boot notifier */
1822 err = register_reboot_notifier(&watchdog_notifier);
1823 if (err != 0) {
1824 dev_err(&client->dev,
1825 "cannot register reboot notifier (err=%d)\n", err);
1826 goto exit_devunreg;
1827 }
1828
1829 /* Enable Watchdog registers.
1830 Set Configuration Register to Enable Watch Dog Registers
1831 (Bit 2) = XXXX, X1XX. */
1832 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1833 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1834
1835 /* Set the default watchdog timeout */
1836 data->watchdog_timeout = timeout;
1837
1838 /* Check, if last reboot was caused by watchdog */
1839 data->watchdog_caused_reboot =
1840 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1841
1842 /* Disable Soft Watchdog during initialiation */
1843 watchdog_disable(data);
1844
1845 /* We take the data_mutex lock early so that watchdog_open() cannot
1846 run when misc_register() has completed, but we've not yet added
1847 our data to the watchdog_data_list (and set the default timeout) */
1848 mutex_lock(&watchdog_data_mutex);
1849 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1850 /* Register our watchdog part */
1851 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1852 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1853 data->watchdog_miscdev.name = data->watchdog_name;
1854 data->watchdog_miscdev.fops = &watchdog_fops;
1855 data->watchdog_miscdev.minor = watchdog_minors[i];
1856
1857 err = misc_register(&data->watchdog_miscdev);
1858 if (err == -EBUSY)
1859 continue;
1860 if (err) {
1861 data->watchdog_miscdev.minor = 0;
1862 dev_err(&client->dev,
1863 "Registering watchdog chardev: %d\n", err);
1864 break;
1865 }
1866
1867 list_add(&data->list, &watchdog_data_list);
1868
1869 dev_info(&client->dev,
1870 "Registered watchdog chardev major 10, minor: %d\n",
1871 watchdog_minors[i]);
1872 break;
1873 }
1874 if (i == ARRAY_SIZE(watchdog_minors)) {
1875 data->watchdog_miscdev.minor = 0;
1876 dev_warn(&client->dev, "Couldn't register watchdog chardev "
1877 "(due to no free minor)\n");
1878 }
1879
1880 mutex_unlock(&watchdog_data_mutex);
1881
6800c3d0
RM		 1882 return 0;
1883
5852f960
SA		 1884 /* Unregister hwmon device */
1885
1886exit_devunreg:
1887
1888 hwmon_device_unregister(data->hwmon_dev);
1889
6800c3d0
RM		 1890 /* Unregister sysfs hooks */
1891
1892exit_remove:
1893 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1894 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1895
1896 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1897 device_remove_file(dev, &sda_single_files[i].dev_attr);
1898
c70a8c34
GJ		 1899 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1900 device_remove_file(dev, &w83793_vid[i].dev_attr);
1901
6800c3d0
RM		 1902 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1903 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1904
1905 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1906 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1907
46bed4df
GJ		 1908 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1909 device_remove_file(dev, &w83793_temp[i].dev_attr);
1910
a7f13a6e
JD		 1911 if (data->lm75[0] != NULL)
1912 i2c_unregister_device(data->lm75[0]);
1913 if (data->lm75[1] != NULL)
1914 i2c_unregister_device(data->lm75[1]);
6800c3d0
RM		 1915free_mem:
1916 kfree(data);
1917exit:
1918 return err;
1919}
1920
1921static void w83793_update_nonvolatile(struct device *dev)
1922{
1923 struct i2c_client *client = to_i2c_client(dev);
1924 struct w83793_data *data = i2c_get_clientdata(client);
1925 int i, j;
1926 /*
1927 They are somewhat "stable" registers, and to update them everytime
1928 takes so much time, it's just not worthy. Update them in a long
1929 interval to avoid exception.
1930 */
1931 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1932 || !data->valid))
1933 return;
1934 /* update voltage limits */
1935 for (i = 1; i < 3; i++) {
1936 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1937 data->in[j][i] =
1938 w83793_read_value(client, W83793_REG_IN[j][i]);
1939 }
1940 data->in_low_bits[i] =
1941 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1942 }
1943
1944 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1945 /* Update the Fan measured value and limits */
1946 if (!(data->has_fan & (1 << i))) {
1947 continue;
1948 }
1949 data->fan_min[i] =
1950 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
1951 data->fan_min[i] |=
1952 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
1953 }
1954
1955 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 1956 if (!(data->has_temp & (1 << i)))
1957 continue;
6800c3d0
RM		 1958 data->temp_fan_map[i] =
1959 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
1960 for (j = 1; j < 5; j++) {
1961 data->temp[i][j] =
1962 w83793_read_value(client, W83793_REG_TEMP[i][j]);
1963 }
1964 data->temp_cruise[i] =
1965 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
1966 for (j = 0; j < 7; j++) {
1967 data->sf2_pwm[i][j] =
1968 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
1969 data->sf2_temp[i][j] =
1970 w83793_read_value(client,
1971 W83793_REG_SF2_TEMP(i, j));
1972 }
1973 }
1974
1975 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
1976 data->temp_mode[i] =
1977 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
1978
1979 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
1980 data->tolerance[i] =
1981 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
1982 }
1983
1984 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
1985 if (!(data->has_pwm & (1 << i)))
1986 continue;
1987 data->pwm[i][PWM_NONSTOP] =
1988 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
1989 data->pwm[i][PWM_START] =
1990 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
1991 data->pwm_stop_time[i] =
1992 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
1993 }
1994
1995 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
1996 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
1997 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
1998 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
1999 data->temp_critical =
2000 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
2001 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
2002
2003 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) {
2004 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
2005 }
2006
2007 data->last_nonvolatile = jiffies;
2008}
2009
2010static struct w83793_data *w83793_update_device(struct device *dev)
2011{
2012 struct i2c_client *client = to_i2c_client(dev);
2013 struct w83793_data *data = i2c_get_clientdata(client);
2014 int i;
2015
2016 mutex_lock(&data->update_lock);
2017
2018 if (!(time_after(jiffies, data->last_updated + HZ * 2)
2019 || !data->valid))
2020 goto END;
2021
2022 /* Update the voltages measured value and limits */
2023 for (i = 0; i < ARRAY_SIZE(data->in); i++)
2024 data->in[i][IN_READ] =
2025 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
2026
2027 data->in_low_bits[IN_READ] =
2028 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2029
2030 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
2031 if (!(data->has_fan & (1 << i))) {
2032 continue;
2033 }
2034 data->fan[i] =
2035 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2036 data->fan[i] |=
2037 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2038 }
2039
46bed4df
GJ		 2040 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2041 if (!(data->has_temp & (1 << i)))
2042 continue;
6800c3d0
RM		 2043 data->temp[i][TEMP_READ] =
2044 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2045 }
6800c3d0
RM		 2046
2047 data->temp_low_bits =
2048 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2049
2050 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2051 if (data->has_pwm & (1 << i))
2052 data->pwm[i][PWM_DUTY] =
2053 w83793_read_value(client,
2054 W83793_REG_PWM(i, PWM_DUTY));
2055 }
2056
2057 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2058 data->alarms[i] =
2059 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2060 if (data->has_vid & 0x01)
2061 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2062 if (data->has_vid & 0x02)
2063 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2064 w83793_update_nonvolatile(dev);
2065 data->last_updated = jiffies;
2066 data->valid = 1;
2067
2068END:
2069 mutex_unlock(&data->update_lock);
2070 return data;
2071}
2072
2073/* Ignore the possibility that somebody change bank outside the driver
2074 Must be called with data->update_lock held, except during initialization */
2075static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2076{
2077 struct w83793_data *data = i2c_get_clientdata(client);
2078 u8 res = 0xff;
2079 u8 new_bank = reg >> 8;
2080
2081 new_bank |= data->bank & 0xfc;
2082 if (data->bank != new_bank) {
2083 if (i2c_smbus_write_byte_data
2084 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2085 data->bank = new_bank;
2086 else {
2087 dev_err(&client->dev,
2088 "set bank to %d failed, fall back "
2089 "to bank %d, read reg 0x%x error\n",
2090 new_bank, data->bank, reg);
2091 res = 0x0; /* read 0x0 from the chip */
2092 goto END;
2093 }
2094 }
2095 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2096END:
2097 return res;
2098}
2099
2100/* Must be called with data->update_lock held, except during initialization */
2101static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2102{
2103 struct w83793_data *data = i2c_get_clientdata(client);
2104 int res;
2105 u8 new_bank = reg >> 8;
2106
2107 new_bank |= data->bank & 0xfc;
2108 if (data->bank != new_bank) {
2109 if ((res = i2c_smbus_write_byte_data
2110 (client, W83793_REG_BANKSEL, new_bank)) >= 0)
2111 data->bank = new_bank;
2112 else {
2113 dev_err(&client->dev,
2114 "set bank to %d failed, fall back "
2115 "to bank %d, write reg 0x%x error\n",
2116 new_bank, data->bank, reg);
2117 goto END;
2118 }
2119 }
2120
2121 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2122END:
2123 return res;
2124}
2125
2126static int __init sensors_w83793_init(void)
2127{
2128 return i2c_add_driver(&w83793_driver);
2129}
2130
2131static void __exit sensors_w83793_exit(void)
2132{
2133 i2c_del_driver(&w83793_driver);
2134}
2135
5852f960 2136MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2137MODULE_DESCRIPTION("w83793 driver");
2138MODULE_LICENSE("GPL");
2139
2140module_init(sensors_w83793_init);
2141module_exit(sensors_w83793_exit);
kernel source for telekom puls (alcatel/mediatek)