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[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / w83793.c
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6800c3d0
RM		 1/*
2 w83793.c - Linux kernel driver for hardware monitoring
3 Copyright (C) 2006 Winbond Electronics Corp.
4 Yuan Mu
5 Rudolf Marek <r.marek@assembler.cz>
5852f960
SA		 6 Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG.
7 Watchdog driver part
8 (Based partially on fschmd driver,
9 Copyright 2007-2008 by Hans de Goede)
6800c3d0
RM		 10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation - version 2.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 02110-1301 USA.
24*/
25
26/*
27 Supports following chips:
28
29 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
30 w83793 10 12 8 6 0x7b 0x5ca3 yes no
31*/
32
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/i2c.h>
37#include <linux/hwmon.h>
38#include <linux/hwmon-vid.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
41#include <linux/mutex.h>
5852f960
SA		 42#include <linux/fs.h>
43#include <linux/watchdog.h>
44#include <linux/miscdevice.h>
45#include <linux/uaccess.h>
46#include <linux/kref.h>
47#include <linux/notifier.h>
48#include <linux/reboot.h>
49
50/* Default values */
51#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 52
53/* Addresses to scan */
25e9c86d
MH		 54static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
55 I2C_CLIENT_END };
6800c3d0
RM		 56
57/* Insmod parameters */
3aed198c
JD		 58
59static unsigned short force_subclients[4];
60module_param_array(force_subclients, short, NULL, 0);
61MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
6800c3d0
RM		 62 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
63
64static int reset;
65module_param(reset, bool, 0);
66MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
67
5852f960
SA		 68static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
69module_param(timeout, int, 0);
70MODULE_PARM_DESC(timeout,
71 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
72 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
73
74static int nowayout = WATCHDOG_NOWAYOUT;
75module_param(nowayout, int, 0);
76MODULE_PARM_DESC(nowayout,
77 "Watchdog cannot be stopped once started (default="
78 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
79
6800c3d0
RM		 80/*
81 Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
82 as ID, Bank Select registers
83*/
84#define W83793_REG_BANKSEL 0x00
85#define W83793_REG_VENDORID 0x0d
86#define W83793_REG_CHIPID 0x0e
87#define W83793_REG_DEVICEID 0x0f
88
89#define W83793_REG_CONFIG 0x40
90#define W83793_REG_MFC 0x58
91#define W83793_REG_FANIN_CTRL 0x5c
92#define W83793_REG_FANIN_SEL 0x5d
93#define W83793_REG_I2C_ADDR 0x0b
94#define W83793_REG_I2C_SUBADDR 0x0c
95#define W83793_REG_VID_INA 0x05
96#define W83793_REG_VID_INB 0x06
97#define W83793_REG_VID_LATCHA 0x07
98#define W83793_REG_VID_LATCHB 0x08
99#define W83793_REG_VID_CTRL 0x59
100
5852f960
SA		 101#define W83793_REG_WDT_LOCK 0x01
102#define W83793_REG_WDT_ENABLE 0x02
103#define W83793_REG_WDT_STATUS 0x03
104#define W83793_REG_WDT_TIMEOUT 0x04
105
6800c3d0
RM		 106static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
107
108#define TEMP_READ 0
109#define TEMP_CRIT 1
110#define TEMP_CRIT_HYST 2
111#define TEMP_WARN 3
112#define TEMP_WARN_HYST 4
113/* only crit and crit_hyst affect real-time alarm status
114 current crit crit_hyst warn warn_hyst */
115static u16 W83793_REG_TEMP[][5] = {
116 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
117 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
118 {0x1e, 0x80, 0x81, 0x82, 0x83},
119 {0x1f, 0x84, 0x85, 0x86, 0x87},
120 {0x20, 0x88, 0x89, 0x8a, 0x8b},
121 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
122};
123
124#define W83793_REG_TEMP_LOW_BITS 0x22
125
126#define W83793_REG_BEEP(index) (0x53 + (index))
127#define W83793_REG_ALARM(index) (0x4b + (index))
128
129#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
130#define W83793_REG_IRQ_CTRL 0x50
131#define W83793_REG_OVT_CTRL 0x51
132#define W83793_REG_OVT_BEEP 0x52
133
134#define IN_READ 0
135#define IN_MAX 1
136#define IN_LOW 2
137static const u16 W83793_REG_IN[][3] = {
138 /* Current, High, Low */
139 {0x10, 0x60, 0x61}, /* Vcore A */
140 {0x11, 0x62, 0x63}, /* Vcore B */
141 {0x12, 0x64, 0x65}, /* Vtt */
142 {0x14, 0x6a, 0x6b}, /* VSEN1 */
143 {0x15, 0x6c, 0x6d}, /* VSEN2 */
144 {0x16, 0x6e, 0x6f}, /* +3VSEN */
145 {0x17, 0x70, 0x71}, /* +12VSEN */
146 {0x18, 0x72, 0x73}, /* 5VDD */
147 {0x19, 0x74, 0x75}, /* 5VSB */
148 {0x1a, 0x76, 0x77}, /* VBAT */
149};
150
151/* Low Bits of Vcore A/B Vtt Read/High/Low */
152static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
153static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 154static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 155
156#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
157#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
158
159#define W83793_REG_PWM_DEFAULT 0xb2
160#define W83793_REG_PWM_ENABLE 0x207
161#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
162#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
163#define W83793_REG_TEMP_CRITICAL 0xc5
164
165#define PWM_DUTY 0
166#define PWM_START 1
167#define PWM_NONSTOP 2
5aebefb0 168#define PWM_STOP_TIME 3
6800c3d0
RM		 169#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
170 (nr) == 1 ? 0x220 : 0x218) + (index))
171
172/* bit field, fan1 is bit0, fan2 is bit1 ... */
173#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
174#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
175#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
176#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
177#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
178#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
179
180static inline unsigned long FAN_FROM_REG(u16 val)
181{
182 if ((val >= 0xfff) || (val == 0))
183 return 0;
184 return (1350000UL / val);
185}
186
187static inline u16 FAN_TO_REG(long rpm)
188{
189 if (rpm <= 0)
190 return 0x0fff;
191 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
192}
193
194static inline unsigned long TIME_FROM_REG(u8 reg)
195{
196 return (reg * 100);
197}
198
199static inline u8 TIME_TO_REG(unsigned long val)
200{
201 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
202}
203
204static inline long TEMP_FROM_REG(s8 reg)
205{
206 return (reg * 1000);
207}
208
209static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
210{
211 return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max);
212}
213
214struct w83793_data {
6800c3d0 215 struct i2c_client *lm75[2];
1beeffe4 216 struct device *hwmon_dev;
6800c3d0
RM		 217 struct mutex update_lock;
218 char valid; /* !=0 if following fields are valid */
219 unsigned long last_updated; /* In jiffies */
220 unsigned long last_nonvolatile; /* In jiffies, last time we update the
221 nonvolatile registers */
222
223 u8 bank;
224 u8 vrm;
225 u8 vid[2];
226 u8 in[10][3]; /* Register value, read/high/low */
227 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
228
229 u16 has_fan; /* Only fan1- fan5 has own pins */
230 u16 fan[12]; /* Register value combine */
231 u16 fan_min[12]; /* Register value combine */
232
233 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
234 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
235 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
236 byte 1: Temp R1,R2 mode, each has 1 bit */
237 u8 temp_critical; /* If reached all fan will be at full speed */
238 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
239
240 u8 has_pwm;
46bed4df 241 u8 has_temp;
c70a8c34 242 u8 has_vid;
6800c3d0
RM		 243 u8 pwm_enable; /* Register value, each Temp has 1 bit */
244 u8 pwm_uptime; /* Register value */
245 u8 pwm_downtime; /* Register value */
246 u8 pwm_default; /* All fan default pwm, next poweron valid */
247 u8 pwm[8][3]; /* Register value */
248 u8 pwm_stop_time[8];
249 u8 temp_cruise[6];
250
251 u8 alarms[5]; /* realtime status registers */
252 u8 beeps[5];
253 u8 beep_enable;
254 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
255 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
256 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 257
258 /* watchdog */
259 struct i2c_client *client;
260 struct mutex watchdog_lock;
261 struct list_head list; /* member of the watchdog_data_list */
262 struct kref kref;
263 struct miscdevice watchdog_miscdev;
264 unsigned long watchdog_is_open;
265 char watchdog_expect_close;
266 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
267 unsigned int watchdog_caused_reboot;
268 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 269};
270
5852f960
SA		 271/* Somewhat ugly :( global data pointer list with all devices, so that
272 we can find our device data as when using misc_register. There is no
273 other method to get to one's device data from the open file-op and
274 for usage in the reboot notifier callback. */
275static LIST_HEAD(watchdog_data_list);
276
277/* Note this lock not only protect list access, but also data.kref access */
278static DEFINE_MUTEX(watchdog_data_mutex);
279
280/* Release our data struct when we're detached from the i2c client *and* all
281 references to our watchdog device are released */
282static void w83793_release_resources(struct kref *ref)
283{
284 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
285 kfree(data);
286}
287
6800c3d0
RM		 288static u8 w83793_read_value(struct i2c_client *client, u16 reg);
289static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 290static int w83793_probe(struct i2c_client *client,
291 const struct i2c_device_id *id);
310ec792 292static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 293 struct i2c_board_info *info);
294static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 295static void w83793_init_client(struct i2c_client *client);
296static void w83793_update_nonvolatile(struct device *dev);
297static struct w83793_data *w83793_update_device(struct device *dev);
298
a7f13a6e 299static const struct i2c_device_id w83793_id[] = {
1f86df49 300 { "w83793", 0 },
a7f13a6e
JD		 301 { }
302};
303MODULE_DEVICE_TABLE(i2c, w83793_id);
304
6800c3d0 305static struct i2c_driver w83793_driver = {
a7f13a6e 306 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 307 .driver = {
308 .name = "w83793",
309 },
a7f13a6e
JD		 310 .probe = w83793_probe,
311 .remove = w83793_remove,
312 .id_table = w83793_id,
313 .detect = w83793_detect,
c3813d6a 314 .address_list = normal_i2c,
6800c3d0
RM		 315};
316
317static ssize_t
318show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
319{
8f74efe8 320 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 321 return sprintf(buf, "%d\n", data->vrm);
322}
323
324static ssize_t
325show_vid(struct device *dev, struct device_attribute *attr, char *buf)
326{
327 struct w83793_data *data = w83793_update_device(dev);
328 struct sensor_device_attribute_2 *sensor_attr =
329 to_sensor_dev_attr_2(attr);
330 int index = sensor_attr->index;
331
332 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
333}
334
335static ssize_t
336store_vrm(struct device *dev, struct device_attribute *attr,
337 const char *buf, size_t count)
338{
8f74efe8 339 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 340 data->vrm = simple_strtoul(buf, NULL, 10);
341 return count;
342}
343
344#define ALARM_STATUS 0
345#define BEEP_ENABLE 1
346static ssize_t
347show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
348{
349 struct w83793_data *data = w83793_update_device(dev);
350 struct sensor_device_attribute_2 *sensor_attr =
351 to_sensor_dev_attr_2(attr);
352 int nr = sensor_attr->nr;
353 int index = sensor_attr->index >> 3;
354 int bit = sensor_attr->index & 0x07;
355 u8 val;
356
357 if (ALARM_STATUS == nr) {
358 val = (data->alarms[index] >> (bit)) & 1;
359 } else { /* BEEP_ENABLE */
360 val = (data->beeps[index] >> (bit)) & 1;
361 }
362
363 return sprintf(buf, "%u\n", val);
364}
365
366static ssize_t
367store_beep(struct device *dev, struct device_attribute *attr,
368 const char *buf, size_t count)
369{
370 struct i2c_client *client = to_i2c_client(dev);
371 struct w83793_data *data = i2c_get_clientdata(client);
372 struct sensor_device_attribute_2 *sensor_attr =
373 to_sensor_dev_attr_2(attr);
374 int index = sensor_attr->index >> 3;
375 int shift = sensor_attr->index & 0x07;
376 u8 beep_bit = 1 << shift;
377 u8 val;
378
379 val = simple_strtoul(buf, NULL, 10);
380 if (val != 0 && val != 1)
381 return -EINVAL;
382
383 mutex_lock(&data->update_lock);
384 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
385 data->beeps[index] &= ~beep_bit;
386 data->beeps[index] |= val << shift;
387 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
388 mutex_unlock(&data->update_lock);
389
390 return count;
391}
392
393static ssize_t
394show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
395{
396 struct w83793_data *data = w83793_update_device(dev);
397 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
398}
399
400static ssize_t
401store_beep_enable(struct device *dev, struct device_attribute *attr,
402 const char *buf, size_t count)
403{
404 struct i2c_client *client = to_i2c_client(dev);
405 struct w83793_data *data = i2c_get_clientdata(client);
406 u8 val = simple_strtoul(buf, NULL, 10);
407
408 if (val != 0 && val != 1)
409 return -EINVAL;
410
411 mutex_lock(&data->update_lock);
412 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
413 & 0xfd;
414 data->beep_enable |= val << 1;
415 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
416 mutex_unlock(&data->update_lock);
417
418 return count;
419}
420
421/* Write any value to clear chassis alarm */
422static ssize_t
423store_chassis_clear(struct device *dev,
424 struct device_attribute *attr, const char *buf,
425 size_t count)
426{
427 struct i2c_client *client = to_i2c_client(dev);
428 struct w83793_data *data = i2c_get_clientdata(client);
429 u8 val;
430
431 mutex_lock(&data->update_lock);
432 val = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
433 val |= 0x80;
434 w83793_write_value(client, W83793_REG_CLR_CHASSIS, val);
435 mutex_unlock(&data->update_lock);
436 return count;
437}
438
439#define FAN_INPUT 0
440#define FAN_MIN 1
441static ssize_t
442show_fan(struct device *dev, struct device_attribute *attr, char *buf)
443{
444 struct sensor_device_attribute_2 *sensor_attr =
445 to_sensor_dev_attr_2(attr);
446 int nr = sensor_attr->nr;
447 int index = sensor_attr->index;
448 struct w83793_data *data = w83793_update_device(dev);
449 u16 val;
450
451 if (FAN_INPUT == nr) {
452 val = data->fan[index] & 0x0fff;
453 } else {
454 val = data->fan_min[index] & 0x0fff;
455 }
456
457 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
458}
459
460static ssize_t
461store_fan_min(struct device *dev, struct device_attribute *attr,
462 const char *buf, size_t count)
463{
464 struct sensor_device_attribute_2 *sensor_attr =
465 to_sensor_dev_attr_2(attr);
466 int index = sensor_attr->index;
467 struct i2c_client *client = to_i2c_client(dev);
468 struct w83793_data *data = i2c_get_clientdata(client);
469 u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10));
470
471 mutex_lock(&data->update_lock);
472 data->fan_min[index] = val;
473 w83793_write_value(client, W83793_REG_FAN_MIN(index),
474 (val >> 8) & 0xff);
475 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
476 mutex_unlock(&data->update_lock);
477
478 return count;
479}
480
6800c3d0
RM		 481static ssize_t
482show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
483{
484 struct sensor_device_attribute_2 *sensor_attr =
485 to_sensor_dev_attr_2(attr);
486 struct w83793_data *data = w83793_update_device(dev);
487 u16 val;
488 int nr = sensor_attr->nr;
489 int index = sensor_attr->index;
490
491 if (PWM_STOP_TIME == nr)
492 val = TIME_FROM_REG(data->pwm_stop_time[index]);
493 else
494 val = (data->pwm[index][nr] & 0x3f) << 2;
495
496 return sprintf(buf, "%d\n", val);
497}
498
499static ssize_t
500store_pwm(struct device *dev, struct device_attribute *attr,
501 const char *buf, size_t count)
502{
503 struct i2c_client *client = to_i2c_client(dev);
504 struct w83793_data *data = i2c_get_clientdata(client);
505 struct sensor_device_attribute_2 *sensor_attr =
506 to_sensor_dev_attr_2(attr);
507 int nr = sensor_attr->nr;
508 int index = sensor_attr->index;
509 u8 val;
510
511 mutex_lock(&data->update_lock);
512 if (PWM_STOP_TIME == nr) {
513 val = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
514 data->pwm_stop_time[index] = val;
515 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
516 val);
517 } else {
518 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff)
519 >> 2;
520 data->pwm[index][nr] =
521 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
522 data->pwm[index][nr] |= val;
523 w83793_write_value(client, W83793_REG_PWM(index, nr),
524 data->pwm[index][nr]);
525 }
526
527 mutex_unlock(&data->update_lock);
528 return count;
529}
530
531static ssize_t
532show_temp(struct device *dev, struct device_attribute *attr, char *buf)
533{
534 struct sensor_device_attribute_2 *sensor_attr =
535 to_sensor_dev_attr_2(attr);
536 int nr = sensor_attr->nr;
537 int index = sensor_attr->index;
538 struct w83793_data *data = w83793_update_device(dev);
539 long temp = TEMP_FROM_REG(data->temp[index][nr]);
540
541 if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */
542 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
543 temp += temp > 0 ? low : -low;
544 }
545 return sprintf(buf, "%ld\n", temp);
546}
547
548static ssize_t
549store_temp(struct device *dev, struct device_attribute *attr,
550 const char *buf, size_t count)
551{
552 struct sensor_device_attribute_2 *sensor_attr =
553 to_sensor_dev_attr_2(attr);
554 int nr = sensor_attr->nr;
555 int index = sensor_attr->index;
556 struct i2c_client *client = to_i2c_client(dev);
557 struct w83793_data *data = i2c_get_clientdata(client);
558 long tmp = simple_strtol(buf, NULL, 10);
559
560 mutex_lock(&data->update_lock);
561 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
562 w83793_write_value(client, W83793_REG_TEMP[index][nr],
563 data->temp[index][nr]);
564 mutex_unlock(&data->update_lock);
565 return count;
566}
567
568/*
569 TD1-TD4
570 each has 4 mode:(2 bits)
571 0: Stop monitor
572 1: Use internal temp sensor(default)
ddca933b 573 2: Reserved
6800c3d0
RM		 574 3: Use sensor in Intel CPU and get result by PECI
575
576 TR1-TR2
577 each has 2 mode:(1 bit)
578 0: Disable temp sensor monitor
579 1: To enable temp sensors monitor
580*/
581
ddca933b
GJ		 582/* 0 disable, 6 PECI */
583static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 584
585static ssize_t
586show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
587{
588 struct w83793_data *data = w83793_update_device(dev);
589 struct sensor_device_attribute_2 *sensor_attr =
590 to_sensor_dev_attr_2(attr);
591 int index = sensor_attr->index;
592 u8 mask = (index < 4) ? 0x03 : 0x01;
593 u8 shift = (index < 4) ? (2 * index) : (index - 4);
594 u8 tmp;
595 index = (index < 4) ? 0 : 1;
596
597 tmp = (data->temp_mode[index] >> shift) & mask;
598
599 /* for the internal sensor, found out if diode or thermistor */
600 if (tmp == 1) {
601 tmp = index == 0 ? 3 : 4;
602 } else {
603 tmp = TO_TEMP_MODE[tmp];
604 }
605
606 return sprintf(buf, "%d\n", tmp);
607}
608
609static ssize_t
610store_temp_mode(struct device *dev, struct device_attribute *attr,
611 const char *buf, size_t count)
612{
613 struct i2c_client *client = to_i2c_client(dev);
614 struct w83793_data *data = i2c_get_clientdata(client);
615 struct sensor_device_attribute_2 *sensor_attr =
616 to_sensor_dev_attr_2(attr);
617 int index = sensor_attr->index;
618 u8 mask = (index < 4) ? 0x03 : 0x01;
619 u8 shift = (index < 4) ? (2 * index) : (index - 4);
620 u8 val = simple_strtoul(buf, NULL, 10);
621
622 /* transform the sysfs interface values into table above */
ddca933b 623 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 624 val -= 3;
625 } else if ((val == 3 && index < 4)
46bed4df 626 || (val == 4 && index >= 4)) {
6800c3d0
RM		 627 /* transform diode or thermistor into internal enable */
628 val = !!val;
629 } else {
630 return -EINVAL;
631 }
632
633 index = (index < 4) ? 0 : 1;
634 mutex_lock(&data->update_lock);
635 data->temp_mode[index] =
636 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
637 data->temp_mode[index] &= ~(mask << shift);
638 data->temp_mode[index] |= val << shift;
639 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
640 data->temp_mode[index]);
641 mutex_unlock(&data->update_lock);
642
643 return count;
644}
645
646#define SETUP_PWM_DEFAULT 0
647#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
648#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
649#define SETUP_TEMP_CRITICAL 3
650static ssize_t
651show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
652{
653 struct sensor_device_attribute_2 *sensor_attr =
654 to_sensor_dev_attr_2(attr);
655 int nr = sensor_attr->nr;
656 struct w83793_data *data = w83793_update_device(dev);
657 u32 val = 0;
658
659 if (SETUP_PWM_DEFAULT == nr) {
660 val = (data->pwm_default & 0x3f) << 2;
661 } else if (SETUP_PWM_UPTIME == nr) {
662 val = TIME_FROM_REG(data->pwm_uptime);
663 } else if (SETUP_PWM_DOWNTIME == nr) {
664 val = TIME_FROM_REG(data->pwm_downtime);
665 } else if (SETUP_TEMP_CRITICAL == nr) {
666 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
667 }
668
669 return sprintf(buf, "%d\n", val);
670}
671
672static ssize_t
673store_sf_setup(struct device *dev, struct device_attribute *attr,
674 const char *buf, size_t count)
675{
676 struct sensor_device_attribute_2 *sensor_attr =
677 to_sensor_dev_attr_2(attr);
678 int nr = sensor_attr->nr;
679 struct i2c_client *client = to_i2c_client(dev);
680 struct w83793_data *data = i2c_get_clientdata(client);
681
682 mutex_lock(&data->update_lock);
683 if (SETUP_PWM_DEFAULT == nr) {
684 data->pwm_default =
685 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
686 data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL,
687 10),
688 0, 0xff) >> 2;
689 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
690 data->pwm_default);
691 } else if (SETUP_PWM_UPTIME == nr) {
692 data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
693 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
694 w83793_write_value(client, W83793_REG_PWM_UPTIME,
695 data->pwm_uptime);
696 } else if (SETUP_PWM_DOWNTIME == nr) {
697 data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
698 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
699 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
700 data->pwm_downtime);
701 } else { /* SETUP_TEMP_CRITICAL */
702 data->temp_critical =
703 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
704 data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10),
705 0, 0x7f);
706 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
707 data->temp_critical);
708 }
709
710 mutex_unlock(&data->update_lock);
711 return count;
712}
713
714/*
715 Temp SmartFan control
716 TEMP_FAN_MAP
717 Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
718 It's possible two or more temp channels control the same fan, w83793
719 always prefers to pick the most critical request and applies it to
720 the related Fan.
721 It's possible one fan is not in any mapping of 6 temp channels, this
722 means the fan is manual mode
723
724 TEMP_PWM_ENABLE
725 Each temp channel has its own SmartFan mode, and temp channel
726 control fans that are set by TEMP_FAN_MAP
727 0: SmartFanII mode
728 1: Thermal Cruise Mode
729
730 TEMP_CRUISE
731 Target temperature in thermal cruise mode, w83793 will try to turn
732 fan speed to keep the temperature of target device around this
733 temperature.
734
735 TEMP_TOLERANCE
736 If Temp higher or lower than target with this tolerance, w83793
737 will take actions to speed up or slow down the fan to keep the
738 temperature within the tolerance range.
739*/
740
741#define TEMP_FAN_MAP 0
742#define TEMP_PWM_ENABLE 1
743#define TEMP_CRUISE 2
744#define TEMP_TOLERANCE 3
745static ssize_t
746show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
747{
748 struct sensor_device_attribute_2 *sensor_attr =
749 to_sensor_dev_attr_2(attr);
750 int nr = sensor_attr->nr;
751 int index = sensor_attr->index;
752 struct w83793_data *data = w83793_update_device(dev);
753 u32 val;
754
755 if (TEMP_FAN_MAP == nr) {
756 val = data->temp_fan_map[index];
757 } else if (TEMP_PWM_ENABLE == nr) {
758 /* +2 to transfrom into 2 and 3 to conform with sysfs intf */
759 val = ((data->pwm_enable >> index) & 0x01) + 2;
760 } else if (TEMP_CRUISE == nr) {
761 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
762 } else { /* TEMP_TOLERANCE */
763 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
764 val = TEMP_FROM_REG(val & 0x0f);
765 }
766 return sprintf(buf, "%d\n", val);
767}
768
769static ssize_t
770store_sf_ctrl(struct device *dev, struct device_attribute *attr,
771 const char *buf, size_t count)
772{
773 struct sensor_device_attribute_2 *sensor_attr =
774 to_sensor_dev_attr_2(attr);
775 int nr = sensor_attr->nr;
776 int index = sensor_attr->index;
777 struct i2c_client *client = to_i2c_client(dev);
778 struct w83793_data *data = i2c_get_clientdata(client);
779 u32 val;
780
781 mutex_lock(&data->update_lock);
782 if (TEMP_FAN_MAP == nr) {
783 val = simple_strtoul(buf, NULL, 10) & 0xff;
784 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
785 data->temp_fan_map[index] = val;
786 } else if (TEMP_PWM_ENABLE == nr) {
787 val = simple_strtoul(buf, NULL, 10);
788 if (2 == val || 3 == val) {
789 data->pwm_enable =
790 w83793_read_value(client, W83793_REG_PWM_ENABLE);
791 if (val - 2)
792 data->pwm_enable |= 1 << index;
793 else
794 data->pwm_enable &= ~(1 << index);
795 w83793_write_value(client, W83793_REG_PWM_ENABLE,
796 data->pwm_enable);
797 } else {
798 mutex_unlock(&data->update_lock);
799 return -EINVAL;
800 }
801 } else if (TEMP_CRUISE == nr) {
802 data->temp_cruise[index] =
803 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
804 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
805 data->temp_cruise[index] &= 0x80;
806 data->temp_cruise[index] |= val;
807
808 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
809 data->temp_cruise[index]);
810 } else { /* TEMP_TOLERANCE */
811 int i = index >> 1;
812 u8 shift = (index & 0x01) ? 4 : 0;
813 data->tolerance[i] =
814 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
815
816 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f);
817 data->tolerance[i] &= ~(0x0f << shift);
818 data->tolerance[i] |= val << shift;
819 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
820 data->tolerance[i]);
821 }
822
823 mutex_unlock(&data->update_lock);
824 return count;
825}
826
827static ssize_t
828show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
829{
830 struct sensor_device_attribute_2 *sensor_attr =
831 to_sensor_dev_attr_2(attr);
832 int nr = sensor_attr->nr;
833 int index = sensor_attr->index;
834 struct w83793_data *data = w83793_update_device(dev);
835
836 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
837}
838
839static ssize_t
840store_sf2_pwm(struct device *dev, struct device_attribute *attr,
841 const char *buf, size_t count)
842{
843 struct i2c_client *client = to_i2c_client(dev);
844 struct w83793_data *data = i2c_get_clientdata(client);
845 struct sensor_device_attribute_2 *sensor_attr =
846 to_sensor_dev_attr_2(attr);
847 int nr = sensor_attr->nr;
848 int index = sensor_attr->index;
849 u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2;
850
851 mutex_lock(&data->update_lock);
852 data->sf2_pwm[index][nr] =
853 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
854 data->sf2_pwm[index][nr] |= val;
855 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
856 data->sf2_pwm[index][nr]);
857 mutex_unlock(&data->update_lock);
858 return count;
859}
860
861static ssize_t
862show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
863{
864 struct sensor_device_attribute_2 *sensor_attr =
865 to_sensor_dev_attr_2(attr);
866 int nr = sensor_attr->nr;
867 int index = sensor_attr->index;
868 struct w83793_data *data = w83793_update_device(dev);
869
870 return sprintf(buf, "%ld\n",
871 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
872}
873
874static ssize_t
875store_sf2_temp(struct device *dev, struct device_attribute *attr,
876 const char *buf, size_t count)
877{
878 struct i2c_client *client = to_i2c_client(dev);
879 struct w83793_data *data = i2c_get_clientdata(client);
880 struct sensor_device_attribute_2 *sensor_attr =
881 to_sensor_dev_attr_2(attr);
882 int nr = sensor_attr->nr;
883 int index = sensor_attr->index;
884 u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
885
886 mutex_lock(&data->update_lock);
887 data->sf2_temp[index][nr] =
888 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
889 data->sf2_temp[index][nr] |= val;
890 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
891 data->sf2_temp[index][nr]);
892 mutex_unlock(&data->update_lock);
893 return count;
894}
895
896/* only Vcore A/B and Vtt have additional 2 bits precision */
897static ssize_t
898show_in(struct device *dev, struct device_attribute *attr, char *buf)
899{
900 struct sensor_device_attribute_2 *sensor_attr =
901 to_sensor_dev_attr_2(attr);
902 int nr = sensor_attr->nr;
903 int index = sensor_attr->index;
904 struct w83793_data *data = w83793_update_device(dev);
905 u16 val = data->in[index][nr];
906
907 if (index < 3) {
908 val <<= 2;
909 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
910 }
ddca933b
GJ		 911 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
912 val = val * scale_in[index] + scale_in_add[index];
913 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 914}
915
916static ssize_t
917store_in(struct device *dev, struct device_attribute *attr,
918 const char *buf, size_t count)
919{
920 struct sensor_device_attribute_2 *sensor_attr =
921 to_sensor_dev_attr_2(attr);
922 int nr = sensor_attr->nr;
923 int index = sensor_attr->index;
924 struct i2c_client *client = to_i2c_client(dev);
925 struct w83793_data *data = i2c_get_clientdata(client);
926 u32 val;
927
928 val =
929 (simple_strtoul(buf, NULL, 10) +
930 scale_in[index] / 2) / scale_in[index];
931 mutex_lock(&data->update_lock);
932 if (index > 2) {
ddca933b
GJ		 933 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
934 if (1 == nr || 2 == nr) {
935 val -= scale_in_add[index] / scale_in[index];
936 }
6800c3d0
RM		 937 val = SENSORS_LIMIT(val, 0, 255);
938 } else {
939 val = SENSORS_LIMIT(val, 0, 0x3FF);
940 data->in_low_bits[nr] =
941 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
942 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
943 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
944 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
945 data->in_low_bits[nr]);
946 val >>= 2;
947 }
948 data->in[index][nr] = val;
949 w83793_write_value(client, W83793_REG_IN[index][nr],
950 data->in[index][nr]);
951 mutex_unlock(&data->update_lock);
952 return count;
953}
954
955#define NOT_USED -1
956
957#define SENSOR_ATTR_IN(index) \
958 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
959 IN_READ, index), \
960 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
961 store_in, IN_MAX, index), \
962 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
963 store_in, IN_LOW, index), \
964 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
965 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
966 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
967 show_alarm_beep, store_beep, BEEP_ENABLE, \
968 index + ((index > 2) ? 1 : 0))
969
970#define SENSOR_ATTR_FAN(index) \
971 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
972 NULL, ALARM_STATUS, index + 17), \
973 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
974 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
975 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
976 NULL, FAN_INPUT, index - 1), \
977 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
978 show_fan, store_fan_min, FAN_MIN, index - 1)
979
980#define SENSOR_ATTR_PWM(index) \
981 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
982 store_pwm, PWM_DUTY, index - 1), \
983 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
984 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
985 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
986 show_pwm, store_pwm, PWM_START, index - 1), \
987 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
988 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
989
990#define SENSOR_ATTR_TEMP(index) \
991 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
992 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
993 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
994 NULL, TEMP_READ, index - 1), \
995 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
996 store_temp, TEMP_CRIT, index - 1), \
997 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
998 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
999 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1000 store_temp, TEMP_WARN, index - 1), \
1001 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1002 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1003 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1004 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1005 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1006 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1007 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1008 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1009 TEMP_FAN_MAP, index - 1), \
1010 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1011 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1012 index - 1), \
1013 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1014 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1015 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1016 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1017 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1018 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1019 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1020 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1021 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1022 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1023 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1024 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1025 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1026 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1027 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1028 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1029 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1030 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1031 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1032 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1033 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1034 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1035 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1036 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1037 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1038 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1039 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1040 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1041 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1042 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1043 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1044 show_sf2_temp, store_sf2_temp, 6, index - 1)
1045
1046static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1047 SENSOR_ATTR_IN(0),
1048 SENSOR_ATTR_IN(1),
1049 SENSOR_ATTR_IN(2),
1050 SENSOR_ATTR_IN(3),
1051 SENSOR_ATTR_IN(4),
1052 SENSOR_ATTR_IN(5),
1053 SENSOR_ATTR_IN(6),
1054 SENSOR_ATTR_IN(7),
1055 SENSOR_ATTR_IN(8),
1056 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1057 SENSOR_ATTR_FAN(1),
1058 SENSOR_ATTR_FAN(2),
1059 SENSOR_ATTR_FAN(3),
1060 SENSOR_ATTR_FAN(4),
1061 SENSOR_ATTR_FAN(5),
1062 SENSOR_ATTR_PWM(1),
1063 SENSOR_ATTR_PWM(2),
1064 SENSOR_ATTR_PWM(3),
1065};
1066
46bed4df
GJ		 1067static struct sensor_device_attribute_2 w83793_temp[] = {
1068 SENSOR_ATTR_TEMP(1),
1069 SENSOR_ATTR_TEMP(2),
1070 SENSOR_ATTR_TEMP(3),
1071 SENSOR_ATTR_TEMP(4),
1072 SENSOR_ATTR_TEMP(5),
1073 SENSOR_ATTR_TEMP(6),
1074};
1075
6800c3d0
RM		 1076/* Fan6-Fan12 */
1077static struct sensor_device_attribute_2 w83793_left_fan[] = {
1078 SENSOR_ATTR_FAN(6),
1079 SENSOR_ATTR_FAN(7),
1080 SENSOR_ATTR_FAN(8),
1081 SENSOR_ATTR_FAN(9),
1082 SENSOR_ATTR_FAN(10),
1083 SENSOR_ATTR_FAN(11),
1084 SENSOR_ATTR_FAN(12),
1085};
1086
1087/* Pwm4-Pwm8 */
1088static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1089 SENSOR_ATTR_PWM(4),
1090 SENSOR_ATTR_PWM(5),
1091 SENSOR_ATTR_PWM(6),
1092 SENSOR_ATTR_PWM(7),
1093 SENSOR_ATTR_PWM(8),
1094};
1095
c70a8c34 1096static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1097 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1098 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1099};
93c75a4a 1100static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
c70a8c34
GJ		 1101
1102static struct sensor_device_attribute_2 sda_single_files[] = {
6800c3d0
RM		 1103 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1104 store_chassis_clear, ALARM_STATUS, 30),
1105 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1106 store_beep_enable, NOT_USED, NOT_USED),
1107 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1108 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1109 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1110 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1111 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1112 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1113 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1114 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1115};
1116
1117static void w83793_init_client(struct i2c_client *client)
1118{
1119 if (reset) {
1120 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
1121 }
1122
1123 /* Start monitoring */
1124 w83793_write_value(client, W83793_REG_CONFIG,
1125 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1126}
1127
1128/*
1129 * Watchdog routines
1130 */
1131
1132static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1133{
1134 int ret, mtimeout;
1135
1136 mtimeout = DIV_ROUND_UP(timeout, 60);
1137
1138 if (mtimeout > 255)
1139 return -EINVAL;
1140
1141 mutex_lock(&data->watchdog_lock);
1142 if (!data->client) {
1143 ret = -ENODEV;
1144 goto leave;
1145 }
1146
1147 data->watchdog_timeout = mtimeout;
1148
1149 /* Set Timeout value (in Minutes) */
1150 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1151 data->watchdog_timeout);
1152
1153 ret = mtimeout * 60;
1154
1155leave:
1156 mutex_unlock(&data->watchdog_lock);
1157 return ret;
1158}
1159
1160static int watchdog_get_timeout(struct w83793_data *data)
1161{
1162 int timeout;
1163
1164 mutex_lock(&data->watchdog_lock);
1165 timeout = data->watchdog_timeout * 60;
1166 mutex_unlock(&data->watchdog_lock);
1167
1168 return timeout;
1169}
1170
1171static int watchdog_trigger(struct w83793_data *data)
1172{
1173 int ret = 0;
1174
1175 mutex_lock(&data->watchdog_lock);
1176 if (!data->client) {
1177 ret = -ENODEV;
1178 goto leave;
1179 }
1180
1181 /* Set Timeout value (in Minutes) */
1182 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1183 data->watchdog_timeout);
1184
1185leave:
1186 mutex_unlock(&data->watchdog_lock);
1187 return ret;
1188}
1189
1190static int watchdog_enable(struct w83793_data *data)
1191{
1192 int ret = 0;
1193
1194 mutex_lock(&data->watchdog_lock);
1195 if (!data->client) {
1196 ret = -ENODEV;
1197 goto leave;
1198 }
1199
1200 /* Set initial timeout */
1201 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1202 data->watchdog_timeout);
1203
1204 /* Enable Soft Watchdog */
1205 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1206
1207leave:
1208 mutex_unlock(&data->watchdog_lock);
1209 return ret;
1210}
1211
1212static int watchdog_disable(struct w83793_data *data)
1213{
1214 int ret = 0;
1215
1216 mutex_lock(&data->watchdog_lock);
1217 if (!data->client) {
1218 ret = -ENODEV;
1219 goto leave;
1220 }
1221
1222 /* Disable Soft Watchdog */
1223 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1224
1225leave:
1226 mutex_unlock(&data->watchdog_lock);
1227 return ret;
1228}
1229
1230static int watchdog_open(struct inode *inode, struct file *filp)
1231{
1232 struct w83793_data *pos, *data = NULL;
1233 int watchdog_is_open;
1234
1235 /* We get called from drivers/char/misc.c with misc_mtx hold, and we
1236 call misc_register() from w83793_probe() with watchdog_data_mutex
1237 hold, as misc_register() takes the misc_mtx lock, this is a possible
1238 deadlock, so we use mutex_trylock here. */
1239 if (!mutex_trylock(&watchdog_data_mutex))
1240 return -ERESTARTSYS;
1241 list_for_each_entry(pos, &watchdog_data_list, list) {
1242 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1243 data = pos;
1244 break;
1245 }
1246 }
1247
1248 /* Check, if device is already open */
1249 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1250
1251 /* Increase data reference counter (if not already done).
1252 Note we can never not have found data, so we don't check for this */
1253 if (!watchdog_is_open)
1254 kref_get(&data->kref);
1255
1256 mutex_unlock(&watchdog_data_mutex);
1257
1258 /* Check, if device is already open and possibly issue error */
1259 if (watchdog_is_open)
1260 return -EBUSY;
1261
1262 /* Enable Soft Watchdog */
1263 watchdog_enable(data);
1264
1265 /* Store pointer to data into filp's private data */
1266 filp->private_data = data;
1267
1268 return nonseekable_open(inode, filp);
1269}
1270
1271static int watchdog_close(struct inode *inode, struct file *filp)
1272{
1273 struct w83793_data *data = filp->private_data;
6800c3d0 1274
5852f960
SA		 1275 if (data->watchdog_expect_close) {
1276 watchdog_disable(data);
1277 data->watchdog_expect_close = 0;
1278 } else {
1279 watchdog_trigger(data);
1280 dev_crit(&data->client->dev,
1281 "unexpected close, not stopping watchdog!\n");
1282 }
1283
1284 clear_bit(0, &data->watchdog_is_open);
1285
1286 /* Decrease data reference counter */
1287 mutex_lock(&watchdog_data_mutex);
1288 kref_put(&data->kref, w83793_release_resources);
1289 mutex_unlock(&watchdog_data_mutex);
1290
1291 return 0;
1292}
1293
1294static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1295 size_t count, loff_t *offset)
1296{
3f7cd7ea 1297 ssize_t ret;
5852f960
SA		 1298 struct w83793_data *data = filp->private_data;
1299
1300 if (count) {
1301 if (!nowayout) {
1302 size_t i;
1303
1304 /* Clear it in case it was set with a previous write */
1305 data->watchdog_expect_close = 0;
1306
1307 for (i = 0; i != count; i++) {
1308 char c;
1309 if (get_user(c, buf + i))
1310 return -EFAULT;
1311 if (c == 'V')
1312 data->watchdog_expect_close = 1;
1313 }
1314 }
1315 ret = watchdog_trigger(data);
1316 if (ret < 0)
1317 return ret;
1318 }
1319 return count;
1320}
1321
1322static int watchdog_ioctl(struct inode *inode, struct file *filp,
1323 unsigned int cmd, unsigned long arg)
1324{
1325 static struct watchdog_info ident = {
1326 .options = WDIOF_KEEPALIVEPING |
1327 WDIOF_SETTIMEOUT |
1328 WDIOF_CARDRESET,
1329 .identity = "w83793 watchdog"
1330 };
1331
1332 int val, ret = 0;
1333 struct w83793_data *data = filp->private_data;
1334
1335 switch (cmd) {
1336 case WDIOC_GETSUPPORT:
1337 if (!nowayout)
1338 ident.options |= WDIOF_MAGICCLOSE;
1339 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1340 ret = -EFAULT;
1341 break;
1342
1343 case WDIOC_GETSTATUS:
1344 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1345 ret = put_user(val, (int __user *)arg);
1346 break;
1347
1348 case WDIOC_GETBOOTSTATUS:
1349 ret = put_user(0, (int __user *)arg);
1350 break;
1351
1352 case WDIOC_KEEPALIVE:
1353 ret = watchdog_trigger(data);
1354 break;
1355
1356 case WDIOC_GETTIMEOUT:
1357 val = watchdog_get_timeout(data);
1358 ret = put_user(val, (int __user *)arg);
1359 break;
1360
1361 case WDIOC_SETTIMEOUT:
1362 if (get_user(val, (int __user *)arg)) {
1363 ret = -EFAULT;
1364 break;
1365 }
1366 ret = watchdog_set_timeout(data, val);
1367 if (ret > 0)
1368 ret = put_user(ret, (int __user *)arg);
1369 break;
1370
1371 case WDIOC_SETOPTIONS:
1372 if (get_user(val, (int __user *)arg)) {
1373 ret = -EFAULT;
1374 break;
1375 }
1376
1377 if (val & WDIOS_DISABLECARD)
1378 ret = watchdog_disable(data);
1379 else if (val & WDIOS_ENABLECARD)
1380 ret = watchdog_enable(data);
1381 else
1382 ret = -EINVAL;
1383
1384 break;
1385 default:
1386 ret = -ENOTTY;
1387 }
1388
1389 return ret;
1390}
1391
1392static const struct file_operations watchdog_fops = {
1393 .owner = THIS_MODULE,
1394 .llseek = no_llseek,
1395 .open = watchdog_open,
1396 .release = watchdog_close,
1397 .write = watchdog_write,
1398 .ioctl = watchdog_ioctl,
1399};
1400
1401/*
1402 * Notifier for system down
1403 */
1404
1405static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1406 void *unused)
1407{
1408 struct w83793_data *data = NULL;
1409
1410 if (code == SYS_DOWN || code == SYS_HALT) {
1411
1412 /* Disable each registered watchdog */
1413 mutex_lock(&watchdog_data_mutex);
1414 list_for_each_entry(data, &watchdog_data_list, list) {
1415 if (data->watchdog_miscdev.minor)
1416 watchdog_disable(data);
1417 }
1418 mutex_unlock(&watchdog_data_mutex);
1419 }
1420
1421 return NOTIFY_DONE;
6800c3d0
RM		 1422}
1423
5852f960
SA		 1424/*
1425 * The WDT needs to learn about soft shutdowns in order to
1426 * turn the timebomb registers off.
1427 */
1428
1429static struct notifier_block watchdog_notifier = {
1430 .notifier_call = watchdog_notify_sys,
1431};
1432
1433/*
1434 * Init / remove routines
1435 */
1436
a7f13a6e 1437static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1438{
1439 struct w83793_data *data = i2c_get_clientdata(client);
1440 struct device *dev = &client->dev;
5852f960
SA		 1441 int i, tmp;
1442
1443 /* Unregister the watchdog (if registered) */
1444 if (data->watchdog_miscdev.minor) {
1445 misc_deregister(&data->watchdog_miscdev);
1446
1447 if (data->watchdog_is_open) {
1448 dev_warn(&client->dev,
1449 "i2c client detached with watchdog open! "
1450 "Stopping watchdog.\n");
1451 watchdog_disable(data);
1452 }
1453
1454 mutex_lock(&watchdog_data_mutex);
1455 list_del(&data->list);
1456 mutex_unlock(&watchdog_data_mutex);
1457
1458 /* Tell the watchdog code the client is gone */
1459 mutex_lock(&data->watchdog_lock);
1460 data->client = NULL;
1461 mutex_unlock(&data->watchdog_lock);
1462 }
1463
1464 /* Reset Configuration Register to Disable Watch Dog Registers */
1465 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1466 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1467
1468 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1469
a7f13a6e 1470 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1471
a7f13a6e
JD		 1472 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1473 device_remove_file(dev,
1474 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1475
a7f13a6e
JD		 1476 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1477 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1478
a7f13a6e
JD		 1479 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1480 device_remove_file(dev, &w83793_vid[i].dev_attr);
1481 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1482
a7f13a6e
JD		 1483 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1484 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1485
a7f13a6e
JD		 1486 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1487 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1488
a7f13a6e
JD		 1489 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1490 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1491
a7f13a6e
JD		 1492 if (data->lm75[0] != NULL)
1493 i2c_unregister_device(data->lm75[0]);
1494 if (data->lm75[1] != NULL)
1495 i2c_unregister_device(data->lm75[1]);
6800c3d0 1496
5852f960
SA		 1497 /* Decrease data reference counter */
1498 mutex_lock(&watchdog_data_mutex);
1499 kref_put(&data->kref, w83793_release_resources);
1500 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1501
1502 return 0;
1503}
1504
1505static int
a7f13a6e 1506w83793_detect_subclients(struct i2c_client *client)
6800c3d0
RM		 1507{
1508 int i, id, err;
a7f13a6e 1509 int address = client->addr;
6800c3d0 1510 u8 tmp;
a7f13a6e 1511 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1512 struct w83793_data *data = i2c_get_clientdata(client);
1513
1514 id = i2c_adapter_id(adapter);
1515 if (force_subclients[0] == id && force_subclients[1] == address) {
1516 for (i = 2; i <= 3; i++) {
1517 if (force_subclients[i] < 0x48
1518 || force_subclients[i] > 0x4f) {
1519 dev_err(&client->dev,
1520 "invalid subclient "
1521 "address %d; must be 0x48-0x4f\n",
1522 force_subclients[i]);
1523 err = -EINVAL;
1524 goto ERROR_SC_0;
1525 }
1526 }
1527 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1528 (force_subclients[2] & 0x07) |
1529 ((force_subclients[3] & 0x07) << 4));
1530 }
1531
1532 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
1533 if (!(tmp & 0x08)) {
a7f13a6e 1534 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
6800c3d0
RM		 1535 }
1536 if (!(tmp & 0x80)) {
1537 if ((data->lm75[0] != NULL)
1538 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1539 dev_err(&client->dev,
1540 "duplicate addresses 0x%x, "
1541 "use force_subclients\n", data->lm75[0]->addr);
1542 err = -ENODEV;
1543 goto ERROR_SC_1;
1544 }
a7f13a6e
JD		 1545 data->lm75[1] = i2c_new_dummy(adapter,
1546 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1547 }
1548
1549 return 0;
1550
1551 /* Undo inits in case of errors */
1552
1553ERROR_SC_1:
a7f13a6e
JD		 1554 if (data->lm75[0] != NULL)
1555 i2c_unregister_device(data->lm75[0]);
6800c3d0
RM		 1556ERROR_SC_0:
1557 return err;
1558}
1559
a7f13a6e 1560/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1561static int w83793_detect(struct i2c_client *client,
a7f13a6e 1562 struct i2c_board_info *info)
6800c3d0 1563{
52df6440 1564 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1565 struct i2c_adapter *adapter = client->adapter;
1566 unsigned short address = client->addr;
6800c3d0
RM		 1567
1568 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
a7f13a6e 1569 return -ENODEV;
6800c3d0
RM		 1570 }
1571
a7f13a6e 1572 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1573
52df6440
JD		 1574 tmp = bank & 0x80 ? 0x5c : 0xa3;
1575 /* Check Winbond vendor ID */
1576 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1577 pr_debug("w83793: Detection failed at check vendor id\n");
1578 return -ENODEV;
6800c3d0
RM		 1579 }
1580
52df6440
JD		 1581 /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1582 should match */
1583 if ((bank & 0x07) == 0
1584 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1585 (address << 1)) {
1586 pr_debug("w83793: Detection failed at check i2c addr\n");
1587 return -ENODEV;
6800c3d0
RM		 1588 }
1589
52df6440
JD		 1590 /* Determine the chip type now */
1591 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1592 if (chip_id != 0x7b)
1593 return -ENODEV;
1594
a7f13a6e
JD		 1595 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1596
1597 return 0;
1598}
6800c3d0 1599
a7f13a6e
JD		 1600static int w83793_probe(struct i2c_client *client,
1601 const struct i2c_device_id *id)
1602{
1603 struct device *dev = &client->dev;
5852f960 1604 const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
a7f13a6e
JD		 1605 struct w83793_data *data;
1606 int i, tmp, val, err;
1607 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1608 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1609 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1610
1611 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1612 if (!data) {
1613 err = -ENOMEM;
1614 goto exit;
1615 }
1616
1617 i2c_set_clientdata(client, data);
1618 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1619 mutex_init(&data->update_lock);
5852f960
SA		 1620 mutex_init(&data->watchdog_lock);
1621 INIT_LIST_HEAD(&data->list);
1622 kref_init(&data->kref);
1623
1624 /* Store client pointer in our data struct for watchdog usage
1625 (where the client is found through a data ptr instead of the
1626 otherway around) */
1627 data->client = client;
6800c3d0 1628
a7f13a6e
JD		 1629 err = w83793_detect_subclients(client);
1630 if (err)
6800c3d0
RM		 1631 goto free_mem;
1632
6800c3d0
RM		 1633 /* Initialize the chip */
1634 w83793_init_client(client);
1635
6800c3d0
RM		 1636 /*
1637 Only fan 1-5 has their own input pins,
1638 Pwm 1-3 has their own pins
1639 */
1640 data->has_fan = 0x1f;
1641 data->has_pwm = 0x07;
1642 tmp = w83793_read_value(client, W83793_REG_MFC);
1643 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1644
1645 /* check the function of pins 49-56 */
93c75a4a
JD		 1646 if (tmp & 0x80) {
1647 data->has_vid |= 0x2; /* has VIDB */
1648 } else {
6800c3d0
RM		 1649 data->has_pwm |= 0x18; /* pwm 4,5 */
1650 if (val & 0x01) { /* fan 6 */
1651 data->has_fan |= 0x20;
1652 data->has_pwm |= 0x20;
1653 }
1654 if (val & 0x02) { /* fan 7 */
1655 data->has_fan |= 0x40;
1656 data->has_pwm |= 0x40;
1657 }
1658 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1659 data->has_fan |= 0x80;
1660 data->has_pwm |= 0x80;
1661 }
1662 }
1663
93c75a4a
JD		 1664 /* check the function of pins 37-40 */
1665 if (!(tmp & 0x29))
1666 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1667 if (0x08 == (tmp & 0x0c)) {
1668 if (val & 0x08) /* fan 9 */
1669 data->has_fan |= 0x100;
1670 if (val & 0x10) /* fan 10 */
1671 data->has_fan |= 0x200;
1672 }
6800c3d0
RM		 1673 if (0x20 == (tmp & 0x30)) {
1674 if (val & 0x20) /* fan 11 */
1675 data->has_fan |= 0x400;
1676 if (val & 0x40) /* fan 12 */
1677 data->has_fan |= 0x800;
1678 }
1679
1680 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1681 data->has_fan |= 0x80;
1682 data->has_pwm |= 0x80;
1683 }
1684
c9294315
RM		 1685 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1686 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1687 data->has_fan |= 0x100;
1688 }
1689 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1690 data->has_fan |= 0x200;
1691 }
1692 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1693 data->has_fan |= 0x400;
1694 }
1695 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1696 data->has_fan |= 0x800;
1697 }
1698
46bed4df
GJ		 1699 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
1700 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]);
1701 if (tmp & 0x01)
1702 data->has_temp |= 0x01;
1703 if (tmp & 0x04)
1704 data->has_temp |= 0x02;
1705 if (tmp & 0x10)
1706 data->has_temp |= 0x04;
1707 if (tmp & 0x40)
1708 data->has_temp |= 0x08;
1709
1710 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]);
1711 if (tmp & 0x01)
1712 data->has_temp |= 0x10;
1713 if (tmp & 0x02)
1714 data->has_temp |= 0x20;
1715
6800c3d0
RM		 1716 /* Register sysfs hooks */
1717 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1718 err = device_create_file(dev,
1719 &w83793_sensor_attr_2[i].dev_attr);
1720 if (err)
1721 goto exit_remove;
1722 }
1723
c70a8c34
GJ		 1724 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1725 if (!(data->has_vid & (1 << i)))
1726 continue;
1727 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1728 if (err)
1729 goto exit_remove;
1730 }
93c75a4a
JD		 1731 if (data->has_vid) {
1732 data->vrm = vid_which_vrm();
1733 err = device_create_file(dev, &dev_attr_vrm);
1734 if (err)
1735 goto exit_remove;
1736 }
c70a8c34 1737
6800c3d0
RM		 1738 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1739 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1740 if (err)
1741 goto exit_remove;
1742
1743 }
1744
46bed4df
GJ		 1745 for (i = 0; i < 6; i++) {
1746 int j;
1747 if (!(data->has_temp & (1 << i)))
1748 continue;
1749 for (j = 0; j < files_temp; j++) {
1750 err = device_create_file(dev,
1751 &w83793_temp[(i) * files_temp
1752 + j].dev_attr);
1753 if (err)
1754 goto exit_remove;
1755 }
1756 }
1757
6800c3d0
RM		 1758 for (i = 5; i < 12; i++) {
1759 int j;
1760 if (!(data->has_fan & (1 << i)))
1761 continue;
1762 for (j = 0; j < files_fan; j++) {
1763 err = device_create_file(dev,
1764 &w83793_left_fan[(i - 5) * files_fan
1765 + j].dev_attr);
1766 if (err)
1767 goto exit_remove;
1768 }
1769 }
1770
1771 for (i = 3; i < 8; i++) {
1772 int j;
1773 if (!(data->has_pwm & (1 << i)))
1774 continue;
1775 for (j = 0; j < files_pwm; j++) {
1776 err = device_create_file(dev,
1777 &w83793_left_pwm[(i - 3) * files_pwm
1778 + j].dev_attr);
1779 if (err)
1780 goto exit_remove;
1781 }
1782 }
1783
1beeffe4
TJ		 1784 data->hwmon_dev = hwmon_device_register(dev);
1785 if (IS_ERR(data->hwmon_dev)) {
1786 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1787 goto exit_remove;
1788 }
1789
5852f960
SA		 1790 /* Watchdog initialization */
1791
1792 /* Register boot notifier */
1793 err = register_reboot_notifier(&watchdog_notifier);
1794 if (err != 0) {
1795 dev_err(&client->dev,
1796 "cannot register reboot notifier (err=%d)\n", err);
1797 goto exit_devunreg;
1798 }
1799
1800 /* Enable Watchdog registers.
1801 Set Configuration Register to Enable Watch Dog Registers
1802 (Bit 2) = XXXX, X1XX. */
1803 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1804 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1805
1806 /* Set the default watchdog timeout */
1807 data->watchdog_timeout = timeout;
1808
1809 /* Check, if last reboot was caused by watchdog */
1810 data->watchdog_caused_reboot =
1811 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1812
1813 /* Disable Soft Watchdog during initialiation */
1814 watchdog_disable(data);
1815
1816 /* We take the data_mutex lock early so that watchdog_open() cannot
1817 run when misc_register() has completed, but we've not yet added
1818 our data to the watchdog_data_list (and set the default timeout) */
1819 mutex_lock(&watchdog_data_mutex);
1820 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1821 /* Register our watchdog part */
1822 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1823 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1824 data->watchdog_miscdev.name = data->watchdog_name;
1825 data->watchdog_miscdev.fops = &watchdog_fops;
1826 data->watchdog_miscdev.minor = watchdog_minors[i];
1827
1828 err = misc_register(&data->watchdog_miscdev);
1829 if (err == -EBUSY)
1830 continue;
1831 if (err) {
1832 data->watchdog_miscdev.minor = 0;
1833 dev_err(&client->dev,
1834 "Registering watchdog chardev: %d\n", err);
1835 break;
1836 }
1837
1838 list_add(&data->list, &watchdog_data_list);
1839
1840 dev_info(&client->dev,
1841 "Registered watchdog chardev major 10, minor: %d\n",
1842 watchdog_minors[i]);
1843 break;
1844 }
1845 if (i == ARRAY_SIZE(watchdog_minors)) {
1846 data->watchdog_miscdev.minor = 0;
1847 dev_warn(&client->dev, "Couldn't register watchdog chardev "
1848 "(due to no free minor)\n");
1849 }
1850
1851 mutex_unlock(&watchdog_data_mutex);
1852
6800c3d0
RM		 1853 return 0;
1854
5852f960
SA		 1855 /* Unregister hwmon device */
1856
1857exit_devunreg:
1858
1859 hwmon_device_unregister(data->hwmon_dev);
1860
6800c3d0
RM		 1861 /* Unregister sysfs hooks */
1862
1863exit_remove:
1864 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1865 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1866
1867 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1868 device_remove_file(dev, &sda_single_files[i].dev_attr);
1869
c70a8c34
GJ		 1870 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1871 device_remove_file(dev, &w83793_vid[i].dev_attr);
1872
6800c3d0
RM		 1873 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1874 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1875
1876 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1877 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1878
46bed4df
GJ		 1879 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1880 device_remove_file(dev, &w83793_temp[i].dev_attr);
1881
a7f13a6e
JD		 1882 if (data->lm75[0] != NULL)
1883 i2c_unregister_device(data->lm75[0]);
1884 if (data->lm75[1] != NULL)
1885 i2c_unregister_device(data->lm75[1]);
6800c3d0
RM		 1886free_mem:
1887 kfree(data);
1888exit:
1889 return err;
1890}
1891
1892static void w83793_update_nonvolatile(struct device *dev)
1893{
1894 struct i2c_client *client = to_i2c_client(dev);
1895 struct w83793_data *data = i2c_get_clientdata(client);
1896 int i, j;
1897 /*
1898 They are somewhat "stable" registers, and to update them everytime
1899 takes so much time, it's just not worthy. Update them in a long
1900 interval to avoid exception.
1901 */
1902 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1903 || !data->valid))
1904 return;
1905 /* update voltage limits */
1906 for (i = 1; i < 3; i++) {
1907 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1908 data->in[j][i] =
1909 w83793_read_value(client, W83793_REG_IN[j][i]);
1910 }
1911 data->in_low_bits[i] =
1912 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1913 }
1914
1915 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1916 /* Update the Fan measured value and limits */
1917 if (!(data->has_fan & (1 << i))) {
1918 continue;
1919 }
1920 data->fan_min[i] =
1921 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
1922 data->fan_min[i] |=
1923 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
1924 }
1925
1926 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 1927 if (!(data->has_temp & (1 << i)))
1928 continue;
6800c3d0
RM		 1929 data->temp_fan_map[i] =
1930 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
1931 for (j = 1; j < 5; j++) {
1932 data->temp[i][j] =
1933 w83793_read_value(client, W83793_REG_TEMP[i][j]);
1934 }
1935 data->temp_cruise[i] =
1936 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
1937 for (j = 0; j < 7; j++) {
1938 data->sf2_pwm[i][j] =
1939 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
1940 data->sf2_temp[i][j] =
1941 w83793_read_value(client,
1942 W83793_REG_SF2_TEMP(i, j));
1943 }
1944 }
1945
1946 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
1947 data->temp_mode[i] =
1948 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
1949
1950 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
1951 data->tolerance[i] =
1952 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
1953 }
1954
1955 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
1956 if (!(data->has_pwm & (1 << i)))
1957 continue;
1958 data->pwm[i][PWM_NONSTOP] =
1959 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
1960 data->pwm[i][PWM_START] =
1961 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
1962 data->pwm_stop_time[i] =
1963 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
1964 }
1965
1966 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
1967 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
1968 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
1969 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
1970 data->temp_critical =
1971 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
1972 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
1973
1974 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) {
1975 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
1976 }
1977
1978 data->last_nonvolatile = jiffies;
1979}
1980
1981static struct w83793_data *w83793_update_device(struct device *dev)
1982{
1983 struct i2c_client *client = to_i2c_client(dev);
1984 struct w83793_data *data = i2c_get_clientdata(client);
1985 int i;
1986
1987 mutex_lock(&data->update_lock);
1988
1989 if (!(time_after(jiffies, data->last_updated + HZ * 2)
1990 || !data->valid))
1991 goto END;
1992
1993 /* Update the voltages measured value and limits */
1994 for (i = 0; i < ARRAY_SIZE(data->in); i++)
1995 data->in[i][IN_READ] =
1996 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
1997
1998 data->in_low_bits[IN_READ] =
1999 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2000
2001 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
2002 if (!(data->has_fan & (1 << i))) {
2003 continue;
2004 }
2005 data->fan[i] =
2006 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2007 data->fan[i] |=
2008 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2009 }
2010
46bed4df
GJ		 2011 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2012 if (!(data->has_temp & (1 << i)))
2013 continue;
6800c3d0
RM		 2014 data->temp[i][TEMP_READ] =
2015 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2016 }
6800c3d0
RM		 2017
2018 data->temp_low_bits =
2019 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2020
2021 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2022 if (data->has_pwm & (1 << i))
2023 data->pwm[i][PWM_DUTY] =
2024 w83793_read_value(client,
2025 W83793_REG_PWM(i, PWM_DUTY));
2026 }
2027
2028 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2029 data->alarms[i] =
2030 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2031 if (data->has_vid & 0x01)
2032 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2033 if (data->has_vid & 0x02)
2034 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2035 w83793_update_nonvolatile(dev);
2036 data->last_updated = jiffies;
2037 data->valid = 1;
2038
2039END:
2040 mutex_unlock(&data->update_lock);
2041 return data;
2042}
2043
2044/* Ignore the possibility that somebody change bank outside the driver
2045 Must be called with data->update_lock held, except during initialization */
2046static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2047{
2048 struct w83793_data *data = i2c_get_clientdata(client);
2049 u8 res = 0xff;
2050 u8 new_bank = reg >> 8;
2051
2052 new_bank |= data->bank & 0xfc;
2053 if (data->bank != new_bank) {
2054 if (i2c_smbus_write_byte_data
2055 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2056 data->bank = new_bank;
2057 else {
2058 dev_err(&client->dev,
2059 "set bank to %d failed, fall back "
2060 "to bank %d, read reg 0x%x error\n",
2061 new_bank, data->bank, reg);
2062 res = 0x0; /* read 0x0 from the chip */
2063 goto END;
2064 }
2065 }
2066 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2067END:
2068 return res;
2069}
2070
2071/* Must be called with data->update_lock held, except during initialization */
2072static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2073{
2074 struct w83793_data *data = i2c_get_clientdata(client);
2075 int res;
2076 u8 new_bank = reg >> 8;
2077
2078 new_bank |= data->bank & 0xfc;
2079 if (data->bank != new_bank) {
2080 if ((res = i2c_smbus_write_byte_data
2081 (client, W83793_REG_BANKSEL, new_bank)) >= 0)
2082 data->bank = new_bank;
2083 else {
2084 dev_err(&client->dev,
2085 "set bank to %d failed, fall back "
2086 "to bank %d, write reg 0x%x error\n",
2087 new_bank, data->bank, reg);
2088 goto END;
2089 }
2090 }
2091
2092 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2093END:
2094 return res;
2095}
2096
2097static int __init sensors_w83793_init(void)
2098{
2099 return i2c_add_driver(&w83793_driver);
2100}
2101
2102static void __exit sensors_w83793_exit(void)
2103{
2104 i2c_del_driver(&w83793_driver);
2105}
2106
5852f960 2107MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2108MODULE_DESCRIPTION("w83793 driver");
2109MODULE_LICENSE("GPL");
2110
2111module_init(sensors_w83793_init);
2112module_exit(sensors_w83793_exit);
kernel source for telekom puls (alcatel/mediatek)