Commit | Line | Data |
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4a776f0a HS |
1 | /* |
2 | * DMA Engine test module | |
3 | * | |
4 | * Copyright (C) 2007 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/delay.h> | |
b7f080cf | 11 | #include <linux/dma-mapping.h> |
4a776f0a | 12 | #include <linux/dmaengine.h> |
981ed70d | 13 | #include <linux/freezer.h> |
4a776f0a HS |
14 | #include <linux/init.h> |
15 | #include <linux/kthread.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/moduleparam.h> | |
18 | #include <linux/random.h> | |
5a0e3ad6 | 19 | #include <linux/slab.h> |
4a776f0a HS |
20 | #include <linux/wait.h> |
21 | ||
22 | static unsigned int test_buf_size = 16384; | |
23 | module_param(test_buf_size, uint, S_IRUGO); | |
24 | MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer"); | |
25 | ||
06190d84 | 26 | static char test_channel[20]; |
4a776f0a HS |
27 | module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO); |
28 | MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)"); | |
29 | ||
06190d84 | 30 | static char test_device[20]; |
4a776f0a HS |
31 | module_param_string(device, test_device, sizeof(test_device), S_IRUGO); |
32 | MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)"); | |
33 | ||
34 | static unsigned int threads_per_chan = 1; | |
35 | module_param(threads_per_chan, uint, S_IRUGO); | |
36 | MODULE_PARM_DESC(threads_per_chan, | |
37 | "Number of threads to start per channel (default: 1)"); | |
38 | ||
39 | static unsigned int max_channels; | |
40 | module_param(max_channels, uint, S_IRUGO); | |
33df8ca0 | 41 | MODULE_PARM_DESC(max_channels, |
4a776f0a HS |
42 | "Maximum number of channels to use (default: all)"); |
43 | ||
0a2ff57d NF |
44 | static unsigned int iterations; |
45 | module_param(iterations, uint, S_IRUGO); | |
46 | MODULE_PARM_DESC(iterations, | |
47 | "Iterations before stopping test (default: infinite)"); | |
48 | ||
b54d5cb9 DW |
49 | static unsigned int xor_sources = 3; |
50 | module_param(xor_sources, uint, S_IRUGO); | |
51 | MODULE_PARM_DESC(xor_sources, | |
52 | "Number of xor source buffers (default: 3)"); | |
53 | ||
58691d64 DW |
54 | static unsigned int pq_sources = 3; |
55 | module_param(pq_sources, uint, S_IRUGO); | |
56 | MODULE_PARM_DESC(pq_sources, | |
57 | "Number of p+q source buffers (default: 3)"); | |
58 | ||
d42efe6b VK |
59 | static int timeout = 3000; |
60 | module_param(timeout, uint, S_IRUGO); | |
85ee7a1d JP |
61 | MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), " |
62 | "Pass -1 for infinite timeout"); | |
d42efe6b | 63 | |
4a776f0a HS |
64 | /* |
65 | * Initialization patterns. All bytes in the source buffer has bit 7 | |
66 | * set, all bytes in the destination buffer has bit 7 cleared. | |
67 | * | |
68 | * Bit 6 is set for all bytes which are to be copied by the DMA | |
69 | * engine. Bit 5 is set for all bytes which are to be overwritten by | |
70 | * the DMA engine. | |
71 | * | |
72 | * The remaining bits are the inverse of a counter which increments by | |
73 | * one for each byte address. | |
74 | */ | |
75 | #define PATTERN_SRC 0x80 | |
76 | #define PATTERN_DST 0x00 | |
77 | #define PATTERN_COPY 0x40 | |
78 | #define PATTERN_OVERWRITE 0x20 | |
79 | #define PATTERN_COUNT_MASK 0x1f | |
80 | ||
e03e93a9 AS |
81 | struct dmatest_info; |
82 | ||
4a776f0a HS |
83 | struct dmatest_thread { |
84 | struct list_head node; | |
e03e93a9 | 85 | struct dmatest_info *info; |
4a776f0a HS |
86 | struct task_struct *task; |
87 | struct dma_chan *chan; | |
b54d5cb9 DW |
88 | u8 **srcs; |
89 | u8 **dsts; | |
90 | enum dma_transaction_type type; | |
4a776f0a HS |
91 | }; |
92 | ||
93 | struct dmatest_chan { | |
94 | struct list_head node; | |
95 | struct dma_chan *chan; | |
96 | struct list_head threads; | |
97 | }; | |
98 | ||
e03e93a9 | 99 | /** |
15b8a8ea | 100 | * struct dmatest_params - test parameters. |
e03e93a9 AS |
101 | * @buf_size: size of the memcpy test buffer |
102 | * @channel: bus ID of the channel to test | |
103 | * @device: bus ID of the DMA Engine to test | |
104 | * @threads_per_chan: number of threads to start per channel | |
105 | * @max_channels: maximum number of channels to use | |
106 | * @iterations: iterations before stopping test | |
107 | * @xor_sources: number of xor source buffers | |
108 | * @pq_sources: number of p+q source buffers | |
109 | * @timeout: transfer timeout in msec, -1 for infinite timeout | |
110 | */ | |
15b8a8ea | 111 | struct dmatest_params { |
e03e93a9 AS |
112 | unsigned int buf_size; |
113 | char channel[20]; | |
114 | char device[20]; | |
115 | unsigned int threads_per_chan; | |
116 | unsigned int max_channels; | |
117 | unsigned int iterations; | |
118 | unsigned int xor_sources; | |
119 | unsigned int pq_sources; | |
120 | int timeout; | |
15b8a8ea AS |
121 | }; |
122 | ||
123 | /** | |
124 | * struct dmatest_info - test information. | |
125 | * @params: test parameters | |
126 | */ | |
127 | struct dmatest_info { | |
128 | /* Test parameters */ | |
129 | struct dmatest_params params; | |
838cc704 AS |
130 | |
131 | /* Internal state */ | |
132 | struct list_head channels; | |
133 | unsigned int nr_channels; | |
e03e93a9 AS |
134 | }; |
135 | ||
136 | static struct dmatest_info test_info; | |
137 | ||
15b8a8ea | 138 | static bool dmatest_match_channel(struct dmatest_params *params, |
e03e93a9 | 139 | struct dma_chan *chan) |
4a776f0a | 140 | { |
15b8a8ea | 141 | if (params->channel[0] == '\0') |
4a776f0a | 142 | return true; |
15b8a8ea | 143 | return strcmp(dma_chan_name(chan), params->channel) == 0; |
4a776f0a HS |
144 | } |
145 | ||
15b8a8ea | 146 | static bool dmatest_match_device(struct dmatest_params *params, |
e03e93a9 | 147 | struct dma_device *device) |
4a776f0a | 148 | { |
15b8a8ea | 149 | if (params->device[0] == '\0') |
4a776f0a | 150 | return true; |
15b8a8ea | 151 | return strcmp(dev_name(device->dev), params->device) == 0; |
4a776f0a HS |
152 | } |
153 | ||
154 | static unsigned long dmatest_random(void) | |
155 | { | |
156 | unsigned long buf; | |
157 | ||
158 | get_random_bytes(&buf, sizeof(buf)); | |
159 | return buf; | |
160 | } | |
161 | ||
e03e93a9 AS |
162 | static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len, |
163 | unsigned int buf_size) | |
4a776f0a HS |
164 | { |
165 | unsigned int i; | |
b54d5cb9 DW |
166 | u8 *buf; |
167 | ||
168 | for (; (buf = *bufs); bufs++) { | |
169 | for (i = 0; i < start; i++) | |
170 | buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); | |
171 | for ( ; i < start + len; i++) | |
172 | buf[i] = PATTERN_SRC | PATTERN_COPY | |
c019894e | 173 | | (~i & PATTERN_COUNT_MASK); |
e03e93a9 | 174 | for ( ; i < buf_size; i++) |
b54d5cb9 DW |
175 | buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); |
176 | buf++; | |
177 | } | |
4a776f0a HS |
178 | } |
179 | ||
e03e93a9 AS |
180 | static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len, |
181 | unsigned int buf_size) | |
4a776f0a HS |
182 | { |
183 | unsigned int i; | |
b54d5cb9 DW |
184 | u8 *buf; |
185 | ||
186 | for (; (buf = *bufs); bufs++) { | |
187 | for (i = 0; i < start; i++) | |
188 | buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); | |
189 | for ( ; i < start + len; i++) | |
190 | buf[i] = PATTERN_DST | PATTERN_OVERWRITE | |
191 | | (~i & PATTERN_COUNT_MASK); | |
e03e93a9 | 192 | for ( ; i < buf_size; i++) |
b54d5cb9 DW |
193 | buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); |
194 | } | |
4a776f0a HS |
195 | } |
196 | ||
197 | static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index, | |
198 | unsigned int counter, bool is_srcbuf) | |
199 | { | |
200 | u8 diff = actual ^ pattern; | |
201 | u8 expected = pattern | (~counter & PATTERN_COUNT_MASK); | |
202 | const char *thread_name = current->comm; | |
203 | ||
204 | if (is_srcbuf) | |
205 | pr_warning("%s: srcbuf[0x%x] overwritten!" | |
206 | " Expected %02x, got %02x\n", | |
207 | thread_name, index, expected, actual); | |
208 | else if ((pattern & PATTERN_COPY) | |
209 | && (diff & (PATTERN_COPY | PATTERN_OVERWRITE))) | |
210 | pr_warning("%s: dstbuf[0x%x] not copied!" | |
211 | " Expected %02x, got %02x\n", | |
212 | thread_name, index, expected, actual); | |
213 | else if (diff & PATTERN_SRC) | |
214 | pr_warning("%s: dstbuf[0x%x] was copied!" | |
215 | " Expected %02x, got %02x\n", | |
216 | thread_name, index, expected, actual); | |
217 | else | |
218 | pr_warning("%s: dstbuf[0x%x] mismatch!" | |
219 | " Expected %02x, got %02x\n", | |
220 | thread_name, index, expected, actual); | |
221 | } | |
222 | ||
b54d5cb9 | 223 | static unsigned int dmatest_verify(u8 **bufs, unsigned int start, |
4a776f0a HS |
224 | unsigned int end, unsigned int counter, u8 pattern, |
225 | bool is_srcbuf) | |
226 | { | |
227 | unsigned int i; | |
228 | unsigned int error_count = 0; | |
229 | u8 actual; | |
b54d5cb9 DW |
230 | u8 expected; |
231 | u8 *buf; | |
232 | unsigned int counter_orig = counter; | |
233 | ||
234 | for (; (buf = *bufs); bufs++) { | |
235 | counter = counter_orig; | |
236 | for (i = start; i < end; i++) { | |
237 | actual = buf[i]; | |
238 | expected = pattern | (~counter & PATTERN_COUNT_MASK); | |
239 | if (actual != expected) { | |
240 | if (error_count < 32) | |
241 | dmatest_mismatch(actual, pattern, i, | |
242 | counter, is_srcbuf); | |
243 | error_count++; | |
244 | } | |
245 | counter++; | |
4a776f0a | 246 | } |
4a776f0a HS |
247 | } |
248 | ||
249 | if (error_count > 32) | |
250 | pr_warning("%s: %u errors suppressed\n", | |
251 | current->comm, error_count - 32); | |
252 | ||
253 | return error_count; | |
254 | } | |
255 | ||
adfa543e TH |
256 | /* poor man's completion - we want to use wait_event_freezable() on it */ |
257 | struct dmatest_done { | |
258 | bool done; | |
259 | wait_queue_head_t *wait; | |
260 | }; | |
261 | ||
262 | static void dmatest_callback(void *arg) | |
e44e0aa3 | 263 | { |
adfa543e TH |
264 | struct dmatest_done *done = arg; |
265 | ||
266 | done->done = true; | |
267 | wake_up_all(done->wait); | |
e44e0aa3 DW |
268 | } |
269 | ||
632fd283 AS |
270 | static inline void unmap_src(struct device *dev, dma_addr_t *addr, size_t len, |
271 | unsigned int count) | |
272 | { | |
273 | while (count--) | |
274 | dma_unmap_single(dev, addr[count], len, DMA_TO_DEVICE); | |
275 | } | |
276 | ||
277 | static inline void unmap_dst(struct device *dev, dma_addr_t *addr, size_t len, | |
278 | unsigned int count) | |
279 | { | |
280 | while (count--) | |
281 | dma_unmap_single(dev, addr[count], len, DMA_BIDIRECTIONAL); | |
282 | } | |
283 | ||
8be9e32b AM |
284 | static unsigned int min_odd(unsigned int x, unsigned int y) |
285 | { | |
286 | unsigned int val = min(x, y); | |
287 | ||
288 | return val % 2 ? val : val - 1; | |
289 | } | |
290 | ||
4a776f0a HS |
291 | /* |
292 | * This function repeatedly tests DMA transfers of various lengths and | |
b54d5cb9 DW |
293 | * offsets for a given operation type until it is told to exit by |
294 | * kthread_stop(). There may be multiple threads running this function | |
295 | * in parallel for a single channel, and there may be multiple channels | |
296 | * being tested in parallel. | |
4a776f0a HS |
297 | * |
298 | * Before each test, the source and destination buffer is initialized | |
299 | * with a known pattern. This pattern is different depending on | |
300 | * whether it's in an area which is supposed to be copied or | |
301 | * overwritten, and different in the source and destination buffers. | |
302 | * So if the DMA engine doesn't copy exactly what we tell it to copy, | |
303 | * we'll notice. | |
304 | */ | |
305 | static int dmatest_func(void *data) | |
306 | { | |
adfa543e | 307 | DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait); |
4a776f0a | 308 | struct dmatest_thread *thread = data; |
adfa543e | 309 | struct dmatest_done done = { .wait = &done_wait }; |
e03e93a9 | 310 | struct dmatest_info *info; |
15b8a8ea | 311 | struct dmatest_params *params; |
4a776f0a | 312 | struct dma_chan *chan; |
8be9e32b | 313 | struct dma_device *dev; |
4a776f0a HS |
314 | const char *thread_name; |
315 | unsigned int src_off, dst_off, len; | |
316 | unsigned int error_count; | |
317 | unsigned int failed_tests = 0; | |
318 | unsigned int total_tests = 0; | |
319 | dma_cookie_t cookie; | |
320 | enum dma_status status; | |
b54d5cb9 | 321 | enum dma_ctrl_flags flags; |
945b5af3 | 322 | u8 *pq_coefs = NULL; |
4a776f0a | 323 | int ret; |
b54d5cb9 DW |
324 | int src_cnt; |
325 | int dst_cnt; | |
326 | int i; | |
4a776f0a HS |
327 | |
328 | thread_name = current->comm; | |
adfa543e | 329 | set_freezable(); |
4a776f0a HS |
330 | |
331 | ret = -ENOMEM; | |
4a776f0a HS |
332 | |
333 | smp_rmb(); | |
e03e93a9 | 334 | info = thread->info; |
15b8a8ea | 335 | params = &info->params; |
4a776f0a | 336 | chan = thread->chan; |
8be9e32b | 337 | dev = chan->device; |
b54d5cb9 DW |
338 | if (thread->type == DMA_MEMCPY) |
339 | src_cnt = dst_cnt = 1; | |
340 | else if (thread->type == DMA_XOR) { | |
8be9e32b | 341 | /* force odd to ensure dst = src */ |
15b8a8ea | 342 | src_cnt = min_odd(params->xor_sources | 1, dev->max_xor); |
b54d5cb9 | 343 | dst_cnt = 1; |
58691d64 | 344 | } else if (thread->type == DMA_PQ) { |
8be9e32b | 345 | /* force odd to ensure dst = src */ |
15b8a8ea | 346 | src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0)); |
58691d64 | 347 | dst_cnt = 2; |
945b5af3 | 348 | |
15b8a8ea | 349 | pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL); |
945b5af3 AS |
350 | if (!pq_coefs) |
351 | goto err_thread_type; | |
352 | ||
94de648d | 353 | for (i = 0; i < src_cnt; i++) |
58691d64 | 354 | pq_coefs[i] = 1; |
b54d5cb9 | 355 | } else |
945b5af3 | 356 | goto err_thread_type; |
b54d5cb9 DW |
357 | |
358 | thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL); | |
359 | if (!thread->srcs) | |
360 | goto err_srcs; | |
361 | for (i = 0; i < src_cnt; i++) { | |
15b8a8ea | 362 | thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL); |
b54d5cb9 DW |
363 | if (!thread->srcs[i]) |
364 | goto err_srcbuf; | |
365 | } | |
366 | thread->srcs[i] = NULL; | |
367 | ||
368 | thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL); | |
369 | if (!thread->dsts) | |
370 | goto err_dsts; | |
371 | for (i = 0; i < dst_cnt; i++) { | |
15b8a8ea | 372 | thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL); |
b54d5cb9 DW |
373 | if (!thread->dsts[i]) |
374 | goto err_dstbuf; | |
375 | } | |
376 | thread->dsts[i] = NULL; | |
377 | ||
e44e0aa3 DW |
378 | set_user_nice(current, 10); |
379 | ||
b203bd3f IS |
380 | /* |
381 | * src buffers are freed by the DMAEngine code with dma_unmap_single() | |
382 | * dst buffers are freed by ourselves below | |
383 | */ | |
384 | flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT | |
385 | | DMA_COMPL_SKIP_DEST_UNMAP | DMA_COMPL_SRC_UNMAP_SINGLE; | |
4a776f0a | 386 | |
0a2ff57d | 387 | while (!kthread_should_stop() |
15b8a8ea | 388 | && !(params->iterations && total_tests >= params->iterations)) { |
b54d5cb9 DW |
389 | struct dma_async_tx_descriptor *tx = NULL; |
390 | dma_addr_t dma_srcs[src_cnt]; | |
391 | dma_addr_t dma_dsts[dst_cnt]; | |
83544ae9 | 392 | u8 align = 0; |
d86be86e | 393 | |
4a776f0a HS |
394 | total_tests++; |
395 | ||
83544ae9 DW |
396 | /* honor alignment restrictions */ |
397 | if (thread->type == DMA_MEMCPY) | |
398 | align = dev->copy_align; | |
399 | else if (thread->type == DMA_XOR) | |
400 | align = dev->xor_align; | |
401 | else if (thread->type == DMA_PQ) | |
402 | align = dev->pq_align; | |
403 | ||
15b8a8ea | 404 | if (1 << align > params->buf_size) { |
cfe4f275 | 405 | pr_err("%u-byte buffer too small for %d-byte alignment\n", |
15b8a8ea | 406 | params->buf_size, 1 << align); |
cfe4f275 GL |
407 | break; |
408 | } | |
409 | ||
15b8a8ea | 410 | len = dmatest_random() % params->buf_size + 1; |
83544ae9 | 411 | len = (len >> align) << align; |
cfe4f275 GL |
412 | if (!len) |
413 | len = 1 << align; | |
15b8a8ea AS |
414 | src_off = dmatest_random() % (params->buf_size - len + 1); |
415 | dst_off = dmatest_random() % (params->buf_size - len + 1); | |
cfe4f275 | 416 | |
83544ae9 DW |
417 | src_off = (src_off >> align) << align; |
418 | dst_off = (dst_off >> align) << align; | |
419 | ||
15b8a8ea AS |
420 | dmatest_init_srcs(thread->srcs, src_off, len, params->buf_size); |
421 | dmatest_init_dsts(thread->dsts, dst_off, len, params->buf_size); | |
4a776f0a | 422 | |
b54d5cb9 DW |
423 | for (i = 0; i < src_cnt; i++) { |
424 | u8 *buf = thread->srcs[i] + src_off; | |
425 | ||
426 | dma_srcs[i] = dma_map_single(dev->dev, buf, len, | |
427 | DMA_TO_DEVICE); | |
afde3be1 AS |
428 | ret = dma_mapping_error(dev->dev, dma_srcs[i]); |
429 | if (ret) { | |
430 | unmap_src(dev->dev, dma_srcs, len, i); | |
431 | pr_warn("%s: #%u: mapping error %d with " | |
432 | "src_off=0x%x len=0x%x\n", | |
433 | thread_name, total_tests - 1, ret, | |
434 | src_off, len); | |
435 | failed_tests++; | |
436 | continue; | |
437 | } | |
b54d5cb9 | 438 | } |
d86be86e | 439 | /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */ |
b54d5cb9 DW |
440 | for (i = 0; i < dst_cnt; i++) { |
441 | dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i], | |
15b8a8ea | 442 | params->buf_size, |
b54d5cb9 | 443 | DMA_BIDIRECTIONAL); |
afde3be1 AS |
444 | ret = dma_mapping_error(dev->dev, dma_dsts[i]); |
445 | if (ret) { | |
446 | unmap_src(dev->dev, dma_srcs, len, src_cnt); | |
15b8a8ea AS |
447 | unmap_dst(dev->dev, dma_dsts, params->buf_size, |
448 | i); | |
afde3be1 AS |
449 | pr_warn("%s: #%u: mapping error %d with " |
450 | "dst_off=0x%x len=0x%x\n", | |
451 | thread_name, total_tests - 1, ret, | |
15b8a8ea | 452 | dst_off, params->buf_size); |
afde3be1 AS |
453 | failed_tests++; |
454 | continue; | |
455 | } | |
b54d5cb9 DW |
456 | } |
457 | ||
458 | if (thread->type == DMA_MEMCPY) | |
459 | tx = dev->device_prep_dma_memcpy(chan, | |
460 | dma_dsts[0] + dst_off, | |
461 | dma_srcs[0], len, | |
462 | flags); | |
463 | else if (thread->type == DMA_XOR) | |
464 | tx = dev->device_prep_dma_xor(chan, | |
465 | dma_dsts[0] + dst_off, | |
67b9124f | 466 | dma_srcs, src_cnt, |
b54d5cb9 | 467 | len, flags); |
58691d64 DW |
468 | else if (thread->type == DMA_PQ) { |
469 | dma_addr_t dma_pq[dst_cnt]; | |
470 | ||
471 | for (i = 0; i < dst_cnt; i++) | |
472 | dma_pq[i] = dma_dsts[i] + dst_off; | |
473 | tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs, | |
94de648d | 474 | src_cnt, pq_coefs, |
58691d64 DW |
475 | len, flags); |
476 | } | |
d86be86e | 477 | |
d86be86e | 478 | if (!tx) { |
632fd283 | 479 | unmap_src(dev->dev, dma_srcs, len, src_cnt); |
15b8a8ea AS |
480 | unmap_dst(dev->dev, dma_dsts, params->buf_size, |
481 | dst_cnt); | |
d86be86e AN |
482 | pr_warning("%s: #%u: prep error with src_off=0x%x " |
483 | "dst_off=0x%x len=0x%x\n", | |
484 | thread_name, total_tests - 1, | |
485 | src_off, dst_off, len); | |
486 | msleep(100); | |
487 | failed_tests++; | |
488 | continue; | |
489 | } | |
e44e0aa3 | 490 | |
adfa543e | 491 | done.done = false; |
e44e0aa3 | 492 | tx->callback = dmatest_callback; |
adfa543e | 493 | tx->callback_param = &done; |
d86be86e AN |
494 | cookie = tx->tx_submit(tx); |
495 | ||
4a776f0a HS |
496 | if (dma_submit_error(cookie)) { |
497 | pr_warning("%s: #%u: submit error %d with src_off=0x%x " | |
498 | "dst_off=0x%x len=0x%x\n", | |
499 | thread_name, total_tests - 1, cookie, | |
500 | src_off, dst_off, len); | |
501 | msleep(100); | |
502 | failed_tests++; | |
503 | continue; | |
504 | } | |
b54d5cb9 | 505 | dma_async_issue_pending(chan); |
4a776f0a | 506 | |
77101ce5 AS |
507 | wait_event_freezable_timeout(done_wait, |
508 | done.done || kthread_should_stop(), | |
15b8a8ea | 509 | msecs_to_jiffies(params->timeout)); |
981ed70d | 510 | |
e44e0aa3 | 511 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
4a776f0a | 512 | |
adfa543e TH |
513 | if (!done.done) { |
514 | /* | |
515 | * We're leaving the timed out dma operation with | |
516 | * dangling pointer to done_wait. To make this | |
517 | * correct, we'll need to allocate wait_done for | |
518 | * each test iteration and perform "who's gonna | |
519 | * free it this time?" dancing. For now, just | |
520 | * leave it dangling. | |
521 | */ | |
e44e0aa3 DW |
522 | pr_warning("%s: #%u: test timed out\n", |
523 | thread_name, total_tests - 1); | |
524 | failed_tests++; | |
525 | continue; | |
526 | } else if (status != DMA_SUCCESS) { | |
527 | pr_warning("%s: #%u: got completion callback," | |
528 | " but status is \'%s\'\n", | |
529 | thread_name, total_tests - 1, | |
530 | status == DMA_ERROR ? "error" : "in progress"); | |
4a776f0a HS |
531 | failed_tests++; |
532 | continue; | |
533 | } | |
e44e0aa3 | 534 | |
d86be86e | 535 | /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */ |
15b8a8ea | 536 | unmap_dst(dev->dev, dma_dsts, params->buf_size, dst_cnt); |
4a776f0a HS |
537 | |
538 | error_count = 0; | |
539 | ||
540 | pr_debug("%s: verifying source buffer...\n", thread_name); | |
b54d5cb9 | 541 | error_count += dmatest_verify(thread->srcs, 0, src_off, |
4a776f0a | 542 | 0, PATTERN_SRC, true); |
b54d5cb9 | 543 | error_count += dmatest_verify(thread->srcs, src_off, |
4a776f0a HS |
544 | src_off + len, src_off, |
545 | PATTERN_SRC | PATTERN_COPY, true); | |
b54d5cb9 | 546 | error_count += dmatest_verify(thread->srcs, src_off + len, |
15b8a8ea | 547 | params->buf_size, src_off + len, |
4a776f0a HS |
548 | PATTERN_SRC, true); |
549 | ||
550 | pr_debug("%s: verifying dest buffer...\n", | |
551 | thread->task->comm); | |
b54d5cb9 | 552 | error_count += dmatest_verify(thread->dsts, 0, dst_off, |
4a776f0a | 553 | 0, PATTERN_DST, false); |
b54d5cb9 | 554 | error_count += dmatest_verify(thread->dsts, dst_off, |
4a776f0a HS |
555 | dst_off + len, src_off, |
556 | PATTERN_SRC | PATTERN_COPY, false); | |
b54d5cb9 | 557 | error_count += dmatest_verify(thread->dsts, dst_off + len, |
15b8a8ea | 558 | params->buf_size, dst_off + len, |
4a776f0a HS |
559 | PATTERN_DST, false); |
560 | ||
561 | if (error_count) { | |
562 | pr_warning("%s: #%u: %u errors with " | |
563 | "src_off=0x%x dst_off=0x%x len=0x%x\n", | |
564 | thread_name, total_tests - 1, error_count, | |
565 | src_off, dst_off, len); | |
566 | failed_tests++; | |
567 | } else { | |
568 | pr_debug("%s: #%u: No errors with " | |
569 | "src_off=0x%x dst_off=0x%x len=0x%x\n", | |
570 | thread_name, total_tests - 1, | |
571 | src_off, dst_off, len); | |
572 | } | |
573 | } | |
574 | ||
575 | ret = 0; | |
b54d5cb9 DW |
576 | for (i = 0; thread->dsts[i]; i++) |
577 | kfree(thread->dsts[i]); | |
4a776f0a | 578 | err_dstbuf: |
b54d5cb9 DW |
579 | kfree(thread->dsts); |
580 | err_dsts: | |
581 | for (i = 0; thread->srcs[i]; i++) | |
582 | kfree(thread->srcs[i]); | |
4a776f0a | 583 | err_srcbuf: |
b54d5cb9 DW |
584 | kfree(thread->srcs); |
585 | err_srcs: | |
945b5af3 AS |
586 | kfree(pq_coefs); |
587 | err_thread_type: | |
4a776f0a HS |
588 | pr_notice("%s: terminating after %u tests, %u failures (status %d)\n", |
589 | thread_name, total_tests, failed_tests, ret); | |
0a2ff57d | 590 | |
9704efaa | 591 | /* terminate all transfers on specified channels */ |
5e034f7b SH |
592 | if (ret) |
593 | dmaengine_terminate_all(chan); | |
594 | ||
15b8a8ea | 595 | if (params->iterations > 0) |
0a2ff57d | 596 | while (!kthread_should_stop()) { |
b953df7c | 597 | DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit); |
0a2ff57d NF |
598 | interruptible_sleep_on(&wait_dmatest_exit); |
599 | } | |
600 | ||
4a776f0a HS |
601 | return ret; |
602 | } | |
603 | ||
604 | static void dmatest_cleanup_channel(struct dmatest_chan *dtc) | |
605 | { | |
606 | struct dmatest_thread *thread; | |
607 | struct dmatest_thread *_thread; | |
608 | int ret; | |
609 | ||
610 | list_for_each_entry_safe(thread, _thread, &dtc->threads, node) { | |
611 | ret = kthread_stop(thread->task); | |
612 | pr_debug("dmatest: thread %s exited with status %d\n", | |
613 | thread->task->comm, ret); | |
614 | list_del(&thread->node); | |
615 | kfree(thread); | |
616 | } | |
9704efaa VK |
617 | |
618 | /* terminate all transfers on specified channels */ | |
944ea4dd | 619 | dmaengine_terminate_all(dtc->chan); |
9704efaa | 620 | |
4a776f0a HS |
621 | kfree(dtc); |
622 | } | |
623 | ||
e03e93a9 AS |
624 | static int dmatest_add_threads(struct dmatest_info *info, |
625 | struct dmatest_chan *dtc, enum dma_transaction_type type) | |
4a776f0a | 626 | { |
15b8a8ea | 627 | struct dmatest_params *params = &info->params; |
b54d5cb9 DW |
628 | struct dmatest_thread *thread; |
629 | struct dma_chan *chan = dtc->chan; | |
630 | char *op; | |
631 | unsigned int i; | |
4a776f0a | 632 | |
b54d5cb9 DW |
633 | if (type == DMA_MEMCPY) |
634 | op = "copy"; | |
635 | else if (type == DMA_XOR) | |
636 | op = "xor"; | |
58691d64 DW |
637 | else if (type == DMA_PQ) |
638 | op = "pq"; | |
b54d5cb9 DW |
639 | else |
640 | return -EINVAL; | |
4a776f0a | 641 | |
15b8a8ea | 642 | for (i = 0; i < params->threads_per_chan; i++) { |
4a776f0a HS |
643 | thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL); |
644 | if (!thread) { | |
b54d5cb9 DW |
645 | pr_warning("dmatest: No memory for %s-%s%u\n", |
646 | dma_chan_name(chan), op, i); | |
647 | ||
4a776f0a HS |
648 | break; |
649 | } | |
e03e93a9 | 650 | thread->info = info; |
4a776f0a | 651 | thread->chan = dtc->chan; |
b54d5cb9 | 652 | thread->type = type; |
4a776f0a | 653 | smp_wmb(); |
b54d5cb9 DW |
654 | thread->task = kthread_run(dmatest_func, thread, "%s-%s%u", |
655 | dma_chan_name(chan), op, i); | |
4a776f0a | 656 | if (IS_ERR(thread->task)) { |
b54d5cb9 DW |
657 | pr_warning("dmatest: Failed to run thread %s-%s%u\n", |
658 | dma_chan_name(chan), op, i); | |
4a776f0a HS |
659 | kfree(thread); |
660 | break; | |
661 | } | |
662 | ||
663 | /* srcbuf and dstbuf are allocated by the thread itself */ | |
664 | ||
665 | list_add_tail(&thread->node, &dtc->threads); | |
666 | } | |
667 | ||
b54d5cb9 DW |
668 | return i; |
669 | } | |
670 | ||
e03e93a9 AS |
671 | static int dmatest_add_channel(struct dmatest_info *info, |
672 | struct dma_chan *chan) | |
b54d5cb9 DW |
673 | { |
674 | struct dmatest_chan *dtc; | |
675 | struct dma_device *dma_dev = chan->device; | |
676 | unsigned int thread_count = 0; | |
b9033e68 | 677 | int cnt; |
b54d5cb9 DW |
678 | |
679 | dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); | |
680 | if (!dtc) { | |
681 | pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan)); | |
682 | return -ENOMEM; | |
683 | } | |
684 | ||
685 | dtc->chan = chan; | |
686 | INIT_LIST_HEAD(&dtc->threads); | |
687 | ||
688 | if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { | |
e03e93a9 | 689 | cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); |
f1aef8b6 | 690 | thread_count += cnt > 0 ? cnt : 0; |
b54d5cb9 DW |
691 | } |
692 | if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { | |
e03e93a9 | 693 | cnt = dmatest_add_threads(info, dtc, DMA_XOR); |
f1aef8b6 | 694 | thread_count += cnt > 0 ? cnt : 0; |
b54d5cb9 | 695 | } |
58691d64 | 696 | if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) { |
e03e93a9 | 697 | cnt = dmatest_add_threads(info, dtc, DMA_PQ); |
d07a74a5 | 698 | thread_count += cnt > 0 ? cnt : 0; |
58691d64 | 699 | } |
b54d5cb9 DW |
700 | |
701 | pr_info("dmatest: Started %u threads using %s\n", | |
702 | thread_count, dma_chan_name(chan)); | |
4a776f0a | 703 | |
838cc704 AS |
704 | list_add_tail(&dtc->node, &info->channels); |
705 | info->nr_channels++; | |
4a776f0a | 706 | |
33df8ca0 | 707 | return 0; |
4a776f0a HS |
708 | } |
709 | ||
7dd60251 | 710 | static bool filter(struct dma_chan *chan, void *param) |
4a776f0a | 711 | { |
15b8a8ea | 712 | struct dmatest_params *params = param; |
e03e93a9 | 713 | |
15b8a8ea AS |
714 | if (!dmatest_match_channel(params, chan) || |
715 | !dmatest_match_device(params, chan->device)) | |
7dd60251 | 716 | return false; |
33df8ca0 | 717 | else |
7dd60251 | 718 | return true; |
4a776f0a HS |
719 | } |
720 | ||
e03e93a9 | 721 | static int run_threaded_test(struct dmatest_info *info) |
4a776f0a | 722 | { |
33df8ca0 DW |
723 | dma_cap_mask_t mask; |
724 | struct dma_chan *chan; | |
15b8a8ea | 725 | struct dmatest_params *params = &info->params; |
33df8ca0 DW |
726 | int err = 0; |
727 | ||
728 | dma_cap_zero(mask); | |
729 | dma_cap_set(DMA_MEMCPY, mask); | |
730 | for (;;) { | |
15b8a8ea | 731 | chan = dma_request_channel(mask, filter, params); |
33df8ca0 | 732 | if (chan) { |
e03e93a9 | 733 | err = dmatest_add_channel(info, chan); |
c56c81ab | 734 | if (err) { |
33df8ca0 DW |
735 | dma_release_channel(chan); |
736 | break; /* add_channel failed, punt */ | |
737 | } | |
738 | } else | |
739 | break; /* no more channels available */ | |
15b8a8ea AS |
740 | if (params->max_channels && |
741 | info->nr_channels >= params->max_channels) | |
33df8ca0 DW |
742 | break; /* we have all we need */ |
743 | } | |
33df8ca0 | 744 | return err; |
4a776f0a | 745 | } |
4a776f0a | 746 | |
e03e93a9 | 747 | static void stop_threaded_test(struct dmatest_info *info) |
4a776f0a | 748 | { |
33df8ca0 | 749 | struct dmatest_chan *dtc, *_dtc; |
7cbd4877 | 750 | struct dma_chan *chan; |
33df8ca0 | 751 | |
838cc704 | 752 | list_for_each_entry_safe(dtc, _dtc, &info->channels, node) { |
33df8ca0 | 753 | list_del(&dtc->node); |
7cbd4877 | 754 | chan = dtc->chan; |
33df8ca0 | 755 | dmatest_cleanup_channel(dtc); |
838cc704 | 756 | pr_debug("dmatest: dropped channel %s\n", dma_chan_name(chan)); |
7cbd4877 | 757 | dma_release_channel(chan); |
33df8ca0 | 758 | } |
838cc704 AS |
759 | |
760 | info->nr_channels = 0; | |
4a776f0a | 761 | } |
e03e93a9 AS |
762 | |
763 | static int __init dmatest_init(void) | |
764 | { | |
765 | struct dmatest_info *info = &test_info; | |
15b8a8ea | 766 | struct dmatest_params *params = &info->params; |
e03e93a9 AS |
767 | |
768 | memset(info, 0, sizeof(*info)); | |
769 | ||
838cc704 AS |
770 | INIT_LIST_HEAD(&info->channels); |
771 | ||
772 | /* Set default parameters */ | |
15b8a8ea AS |
773 | params->buf_size = test_buf_size; |
774 | strlcpy(params->channel, test_channel, sizeof(params->channel)); | |
775 | strlcpy(params->device, test_device, sizeof(params->device)); | |
776 | params->threads_per_chan = threads_per_chan; | |
777 | params->max_channels = max_channels; | |
778 | params->iterations = iterations; | |
779 | params->xor_sources = xor_sources; | |
780 | params->pq_sources = pq_sources; | |
781 | params->timeout = timeout; | |
e03e93a9 AS |
782 | |
783 | return run_threaded_test(info); | |
784 | } | |
785 | /* when compiled-in wait for drivers to load first */ | |
786 | late_initcall(dmatest_init); | |
787 | ||
788 | static void __exit dmatest_exit(void) | |
789 | { | |
790 | struct dmatest_info *info = &test_info; | |
791 | ||
792 | stop_threaded_test(info); | |
793 | } | |
4a776f0a HS |
794 | module_exit(dmatest_exit); |
795 | ||
e05503ef | 796 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
4a776f0a | 797 | MODULE_LICENSE("GPL v2"); |