s3c2410fb: remove lcdcon3 register from s3c2410fb_display
authorKrzysztof Helt <krzysztof.h1@wp.pl>
Tue, 16 Oct 2007 08:28:58 +0000 (01:28 -0700)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Tue, 16 Oct 2007 16:43:16 +0000 (09:43 -0700)
This patch removes unused lcdcon3 register from the
s3c2410fb_display structure.

Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
arch/arm/mach-s3c2410/mach-amlm5900.c
arch/arm/mach-s3c2410/mach-bast.c
arch/arm/mach-s3c2410/mach-h1940.c
arch/arm/mach-s3c2410/mach-qt2410.c
arch/arm/mach-s3c2440/mach-rx3715.c
arch/arm/mach-s3c2440/mach-smdk2440.c
drivers/video/s3c2410fb.c
include/asm-arm/arch-s3c2410/fb.h

index e96b413a114d8c1913009df3aac353a79c0ff7bd..74801ce022c16b1760a0a6aec7a134e4cfd026ad 100644 (file)
@@ -180,13 +180,10 @@ static struct s3c2410fb_display __initdata amlm5900_lcd_info = {
        .left_margin    = 1 << (4 + 3),
        .right_margin   = 8 << 3,
 
-       .regs           = {
-               .lcdcon1        = 0x00008225,
-               .lcdcon2        = 0x0027c000,
-               .lcdcon3        = 0x00182708,
-               .lcdcon4        = 0x00000002,
-               .lcdcon5        = 0x00000001,
-       }
+       .lcdcon1        = 0x00008225,
+       .lcdcon2        = 0x0027c000,
+       .lcdcon4        = 0x00000002,
+       .lcdcon5        = 0x00000001,
 };
 
 static struct s3c2410fb_mach_info __initdata amlm5900_fb_info = {
index 1b4f9f922c8aeec9466a3c8dd2405f4546aa1384..6e46c20b648c733aa483872f1134b58a7b87e034 100644 (file)
@@ -479,13 +479,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
 
                .bpp            = 4,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -498,13 +495,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -517,13 +511,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -536,13 +527,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -555,13 +543,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -574,13 +559,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -593,13 +575,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -612,13 +591,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
        {
                .type           = S3C2410_LCDCON1_TFT,
@@ -631,13 +607,10 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
                .left_margin    = 40,
                .right_margin   = 20,
 
-               .regs           = {
-                       .lcdcon1        = 0x00000176,
-                       .lcdcon2        = 0x1d77c7c2,
-                       .lcdcon3        = 0x013a7f13,
-                       .lcdcon4        = 0x00000057,
-                       .lcdcon5        = 0x00014b02,
-               }
+               .lcdcon1        = 0x00000176,
+               .lcdcon2        = 0x1d77c7c2,
+               .lcdcon4        = 0x00000057,
+               .lcdcon5        = 0x00014b02,
        },
 };
 
index 372caa289f2b58ca6b96c1a8d411ea2a1b9b9a41..52d7685180c494f538c5373d1d2c00d025b09b88 100644 (file)
@@ -134,27 +134,21 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = {
  * Set lcd on or off
  **/
 static struct s3c2410fb_display h1940_lcd __initdata = {
-       .regs={
-               .lcdcon1=       S3C2410_LCDCON1_TFT16BPP | \
-                               S3C2410_LCDCON1_TFT | \
-                               S3C2410_LCDCON1_CLKVAL(0x0C),
-
-               .lcdcon2=       S3C2410_LCDCON2_VBPD(7) | \
-                               S3C2410_LCDCON2_LINEVAL(319) | \
-                               S3C2410_LCDCON2_VFPD(6) | \
-                               S3C2410_LCDCON2_VSPW(0),
-
-               .lcdcon3=       S3C2410_LCDCON3_HBPD(19) | \
-                               S3C2410_LCDCON3_HOZVAL(239) | \
-                               S3C2410_LCDCON3_HFPD(7),
-
-               .lcdcon4=       S3C2410_LCDCON4_MVAL(0) | \
-                               S3C2410_LCDCON4_HSPW(3),
-
-               .lcdcon5=       S3C2410_LCDCON5_FRM565 | \
-                               S3C2410_LCDCON5_INVVLINE | \
-                               S3C2410_LCDCON5_HWSWP,
-       },
+       .lcdcon1=       S3C2410_LCDCON1_TFT16BPP | \
+                       S3C2410_LCDCON1_TFT | \
+                       S3C2410_LCDCON1_CLKVAL(0x0C),
+
+       .lcdcon2=       S3C2410_LCDCON2_VBPD(7) | \
+                       S3C2410_LCDCON2_LINEVAL(319) | \
+                       S3C2410_LCDCON2_VFPD(6) | \
+                       S3C2410_LCDCON2_VSPW(0),
+
+       .lcdcon4=       S3C2410_LCDCON4_MVAL(0) | \
+                       S3C2410_LCDCON4_HSPW(3),
+
+       .lcdcon5=       S3C2410_LCDCON5_FRM565 | \
+                       S3C2410_LCDCON5_INVVLINE | \
+                       S3C2410_LCDCON5_HWSWP,
 
        .type =         S3C2410_LCDCON1_TFT,
        .width =        240,
index 0c1ff0a41a998ba963f6f97185f8ca9a5eb37821..0a746f7f639fc11f236d8513991b1d0ca9085bda 100644 (file)
@@ -98,30 +98,23 @@ static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
        {
                /* Configuration for 640x480 SHARP LQ080V3DG01 */
-               .regs   = {
+               .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
+                          S3C2410_LCDCON1_TFT |
+                          S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 
-                       .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
-                                  S3C2410_LCDCON1_TFT |
-                                  S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
+               .lcdcon2 = S3C2410_LCDCON2_VBPD(18) |   /* 19 */
+                          S3C2410_LCDCON2_LINEVAL(479) |
+                          S3C2410_LCDCON2_VFPD(10) |   /* 11 */
+                          S3C2410_LCDCON2_VSPW(14),    /* 15 */
 
-                       .lcdcon2 = S3C2410_LCDCON2_VBPD(18) |   /* 19 */
-                                  S3C2410_LCDCON2_LINEVAL(479) |
-                                  S3C2410_LCDCON2_VFPD(10) |   /* 11 */
-                                  S3C2410_LCDCON2_VSPW(14),    /* 15 */
+               .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
+                          S3C2410_LCDCON4_HSPW(95),    /* 96 */
 
-                       .lcdcon3 = S3C2410_LCDCON3_HBPD(43) |   /* 44 */
-                                  S3C2410_LCDCON3_HOZVAL(639) | /* 640 */
-                                  S3C2410_LCDCON3_HFPD(115),   /* 116 */
-
-                       .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
-                                  S3C2410_LCDCON4_HSPW(95),    /* 96 */
-
-                       .lcdcon5 = S3C2410_LCDCON5_FRM565 |
-                                  S3C2410_LCDCON5_INVVLINE |
-                                  S3C2410_LCDCON5_INVVFRAME |
-                                  S3C2410_LCDCON5_PWREN |
-                                  S3C2410_LCDCON5_HWSWP,
-               },
+               .lcdcon5 = S3C2410_LCDCON5_FRM565 |
+                          S3C2410_LCDCON5_INVVLINE |
+                          S3C2410_LCDCON5_INVVFRAME |
+                          S3C2410_LCDCON5_PWREN |
+                          S3C2410_LCDCON5_HWSWP,
 
                .type           = S3C2410_LCDCON1_TFT,
                .width          = 640,
@@ -135,30 +128,23 @@ static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
        },
        {
                /* Configuration for 480x640 toppoly TD028TTEC1 */
-               .regs   = {
-
-                       .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
-                                  S3C2410_LCDCON1_TFT |
-                                  S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
-
-                       .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |    /* 2 */
-                                  S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
-                                  S3C2410_LCDCON2_VFPD(3) |    /* 4 */
-                                  S3C2410_LCDCON2_VSPW(1),     /* 2 */
+               .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
+                          S3C2410_LCDCON1_TFT |
+                          S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 
-                       .lcdcon3 = S3C2410_LCDCON3_HBPD(7) |    /* 8 */
-                                  S3C2410_LCDCON3_HOZVAL(479) | /* 479 */
-                                  S3C2410_LCDCON3_HFPD(23),    /* 24 */
+               .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |    /* 2 */
+                          S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
+                          S3C2410_LCDCON2_VFPD(3) |    /* 4 */
+                          S3C2410_LCDCON2_VSPW(1),     /* 2 */
 
-                       .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
-                                  S3C2410_LCDCON4_HSPW(7),     /* 8 */
+               .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
+                          S3C2410_LCDCON4_HSPW(7),     /* 8 */
 
-                       .lcdcon5 = S3C2410_LCDCON5_FRM565 |
-                                  S3C2410_LCDCON5_INVVLINE |
-                                  S3C2410_LCDCON5_INVVFRAME |
-                                  S3C2410_LCDCON5_PWREN |
-                                  S3C2410_LCDCON5_HWSWP,
-               },
+               .lcdcon5 = S3C2410_LCDCON5_FRM565 |
+                          S3C2410_LCDCON5_INVVLINE |
+                          S3C2410_LCDCON5_INVVFRAME |
+                          S3C2410_LCDCON5_PWREN |
+                          S3C2410_LCDCON5_HWSWP,
 
                .type           = S3C2410_LCDCON1_TFT,
                .width          = 480,
@@ -171,30 +157,23 @@ static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
        },
        {
                /* Config for 240x320 LCD */
-               .regs   = {
-
-                       .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
-                                  S3C2410_LCDCON1_TFT |
-                                  S3C2410_LCDCON1_CLKVAL(0x04),
-
-                       .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
-                                  S3C2410_LCDCON2_LINEVAL(319) |
-                                  S3C2410_LCDCON2_VFPD(6) |
-                                  S3C2410_LCDCON2_VSPW(3),
-
-                       .lcdcon3 = S3C2410_LCDCON3_HBPD(12) |
-                                  S3C2410_LCDCON3_HOZVAL(239) |
-                                  S3C2410_LCDCON3_HFPD(7),
-
-                       .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
-                                  S3C2410_LCDCON4_HSPW(3),
-
-                       .lcdcon5 = S3C2410_LCDCON5_FRM565 |
-                                  S3C2410_LCDCON5_INVVLINE |
-                                  S3C2410_LCDCON5_INVVFRAME |
-                                  S3C2410_LCDCON5_PWREN |
-                                  S3C2410_LCDCON5_HWSWP,
-               },
+               .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
+                          S3C2410_LCDCON1_TFT |
+                          S3C2410_LCDCON1_CLKVAL(0x04),
+
+               .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
+                          S3C2410_LCDCON2_LINEVAL(319) |
+                          S3C2410_LCDCON2_VFPD(6) |
+                          S3C2410_LCDCON2_VSPW(3),
+
+               .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
+                          S3C2410_LCDCON4_HSPW(3),
+
+               .lcdcon5 = S3C2410_LCDCON5_FRM565 |
+                          S3C2410_LCDCON5_INVVLINE |
+                          S3C2410_LCDCON5_INVVFRAME |
+                          S3C2410_LCDCON5_PWREN |
+                          S3C2410_LCDCON5_HWSWP,
 
                .type           = S3C2410_LCDCON1_TFT,
                .width          = 240,
index dab8e7b474d8ed58ec7543e5a784daa2948b39eb..305827242beca4f25a5a1369610b261e37d292a4 100644 (file)
@@ -111,27 +111,21 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
 /* framebuffer lcd controller information */
 
 static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
-       .regs   = {
-               .lcdcon1 =      S3C2410_LCDCON1_TFT16BPP | \
-                               S3C2410_LCDCON1_TFT | \
-                               S3C2410_LCDCON1_CLKVAL(0x0C),
-
-               .lcdcon2 =      S3C2410_LCDCON2_VBPD(5) | \
-                               S3C2410_LCDCON2_LINEVAL(319) | \
-                               S3C2410_LCDCON2_VFPD(6) | \
-                               S3C2410_LCDCON2_VSPW(2),
-
-               .lcdcon3 =      S3C2410_LCDCON3_HBPD(35) | \
-                               S3C2410_LCDCON3_HOZVAL(239) | \
-                               S3C2410_LCDCON3_HFPD(35),
-
-               .lcdcon4 =      S3C2410_LCDCON4_MVAL(0) | \
-                               S3C2410_LCDCON4_HSPW(7),
-
-               .lcdcon5 =      S3C2410_LCDCON5_INVVLINE |
-                               S3C2410_LCDCON5_FRM565 |
-                               S3C2410_LCDCON5_HWSWP,
-       },
+       .lcdcon1 =      S3C2410_LCDCON1_TFT16BPP | \
+                       S3C2410_LCDCON1_TFT | \
+                       S3C2410_LCDCON1_CLKVAL(0x0C),
+
+       .lcdcon2 =      S3C2410_LCDCON2_VBPD(5) | \
+                       S3C2410_LCDCON2_LINEVAL(319) | \
+                       S3C2410_LCDCON2_VFPD(6) | \
+                       S3C2410_LCDCON2_VSPW(2),
+
+       .lcdcon4 =      S3C2410_LCDCON4_MVAL(0) | \
+                       S3C2410_LCDCON4_HSPW(7),
+
+       .lcdcon5 =      S3C2410_LCDCON5_INVVLINE |
+                       S3C2410_LCDCON5_FRM565 |
+                       S3C2410_LCDCON5_HWSWP,
 
        .type           = S3C2410_LCDCON1_TFT,
        .width          = 240,
index 5930f1708027f149d8c7eebe82b2f376c2cdf8d6..33b364476c1861035df905d7edc4d9e510f061cd 100644 (file)
@@ -104,30 +104,24 @@ static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
 /* LCD driver info */
 
 static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
-       .regs   = {
 
-               .lcdcon1        = S3C2410_LCDCON1_TFT16BPP |
-                                 S3C2410_LCDCON1_TFT |
-                                 S3C2410_LCDCON1_CLKVAL(0x04),
+       .lcdcon1        = S3C2410_LCDCON1_TFT16BPP |
+                         S3C2410_LCDCON1_TFT |
+                         S3C2410_LCDCON1_CLKVAL(0x04),
 
-               .lcdcon2        = S3C2410_LCDCON2_VBPD(7) |
-                                 S3C2410_LCDCON2_LINEVAL(319) |
-                                 S3C2410_LCDCON2_VFPD(6) |
-                                 S3C2410_LCDCON2_VSPW(3),
+       .lcdcon2        = S3C2410_LCDCON2_VBPD(7) |
+                         S3C2410_LCDCON2_LINEVAL(319) |
+                         S3C2410_LCDCON2_VFPD(6) |
+                         S3C2410_LCDCON2_VSPW(3),
 
-               .lcdcon3        = S3C2410_LCDCON3_HBPD(19) |
-                                 S3C2410_LCDCON3_HOZVAL(239) |
-                                 S3C2410_LCDCON3_HFPD(7),
+       .lcdcon4        = S3C2410_LCDCON4_MVAL(0) |
+                         S3C2410_LCDCON4_HSPW(3),
 
-               .lcdcon4        = S3C2410_LCDCON4_MVAL(0) |
-                                 S3C2410_LCDCON4_HSPW(3),
-
-               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
-                                 S3C2410_LCDCON5_INVVLINE |
-                                 S3C2410_LCDCON5_INVVFRAME |
-                                 S3C2410_LCDCON5_PWREN |
-                                 S3C2410_LCDCON5_HWSWP,
-       },
+       .lcdcon5        = S3C2410_LCDCON5_FRM565 |
+                         S3C2410_LCDCON5_INVVLINE |
+                         S3C2410_LCDCON5_INVVFRAME |
+                         S3C2410_LCDCON5_PWREN |
+                         S3C2410_LCDCON5_HWSWP,
 
        .type           = S3C2410_LCDCON1_TFT16BPP,
 
index 04e9d7a482fab5409ae6532a637aa68219ec89d2..27528caa5a48fd44ae420418285bbd9809d4bde4 100644 (file)
@@ -245,7 +245,7 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var,
 
        default:
        case 16:
-               if (display->regs.lcdcon5 & S3C2410_LCDCON5_FRM565) {
+               if (display->lcdcon5 & S3C2410_LCDCON5_FRM565) {
                        /* 16 bpp, 565 format */
                        var->red.offset         = 11;
                        var->green.offset       = 5;
@@ -796,7 +796,6 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
        struct s3c2410fb_info *info;
        struct s3c2410fb_display *display;
        struct fb_info *fbinfo;
-       struct s3c2410fb_hw *mregs;
        struct resource *res;
        int ret;
        int irq;
@@ -812,7 +811,6 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
        }
 
        display = mach_info->displays + mach_info->default_display;
-       mregs = &display->regs;
 
        irq = platform_get_irq(pdev, 0);
        if (irq < 0) {
@@ -855,7 +853,10 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
 
        strcpy(fbinfo->fix.id, driver_name);
 
-       memcpy(&info->regs, &display->regs, sizeof(info->regs));
+       info->regs.lcdcon1 = display->lcdcon1;
+       info->regs.lcdcon2 = display->lcdcon2;
+       info->regs.lcdcon4 = display->lcdcon4;
+       info->regs.lcdcon5 = display->lcdcon5;
 
        /* Stop the video and unset ENVID if set */
        info->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;
@@ -892,14 +893,14 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
        fbinfo->var.right_margin    = display->right_margin;
 
        fbinfo->var.upper_margin    =
-                               S3C2410_LCDCON2_GET_VBPD(mregs->lcdcon2) + 1;
+                               S3C2410_LCDCON2_GET_VBPD(display->lcdcon2) + 1;
        fbinfo->var.lower_margin    =
-                               S3C2410_LCDCON2_GET_VFPD(mregs->lcdcon2) + 1;
+                               S3C2410_LCDCON2_GET_VFPD(display->lcdcon2) + 1;
        fbinfo->var.vsync_len       =
-                               S3C2410_LCDCON2_GET_VSPW(mregs->lcdcon2) + 1;
+                               S3C2410_LCDCON2_GET_VSPW(display->lcdcon2) + 1;
 
        fbinfo->var.hsync_len       =
-                               S3C2410_LCDCON4_GET_HSPW(mregs->lcdcon4) + 1;
+                               S3C2410_LCDCON4_GET_HSPW(display->lcdcon4) + 1;
 
        fbinfo->var.red.offset      = 11;
        fbinfo->var.green.offset    = 5;
index a76585ae651dbbc3bbea32c3d707144d724043ec..8a7fa1be5177301d9be86e790d43fdedf3e4bbae 100644 (file)
@@ -44,7 +44,10 @@ struct s3c2410fb_display {
        unsigned short vsync_len;       /* value in lines (TFT) or 0 (STN) */
 
        /* lcd configuration registers */
-       struct s3c2410fb_hw  regs;
+       unsigned long   lcdcon1;
+       unsigned long   lcdcon2;
+       unsigned long   lcdcon4;
+       unsigned long   lcdcon5;
 };
 
 struct s3c2410fb_mach_info {