Merge tag 'imx-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt

From Shawn Guo:
The imx device tree changes for 3.10:

* The huge diff stat is introduced by the pinctrl changes.  With DTC
  macro support ready, we're moving those huge mount of data about pins
  out of pinctrl driver.
* Device tree source updates for GPI, LDB, SRC, cpufreq-cpu0.
* Initial imx6dl device tree support
* Board level DTS changes for some imx27 and imx51 platforms.

* tag 'imx-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (605 commits)
  ARM: dts: imx6dl-wandboard: Add USB Host support
  ARM: dts: imx51 cpu node
  ARM: dts: Add missing imx27-phytec-phycore dtb target
  ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module
  ARM: i.MX51: Add PATA support
  ARM: dts: Add initial support for Wandboard Dual-Lite
  ARM: dts: imx: add initial imx6dl-sabreauto support
  ARM: dts: imx: add initial imx6dl-sabresd support
  ARM: dts: imx: make sabreauto and sabresd common
  pinctrl: add pinctrl driver for imx6sl
  pinctrl: add pinctrl driver for imx6dl
  ARM: dts: imx53: fix SD2_DATA1 pad AUDMUX_AUD4 configuration
  ARM: dts: MicroSys sbc6x support (i.MX6)
  ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53
  ARM i.MX5: Add system reset controller (SRC) to i.MX51 and i.MX53 device tree
  ARM i.MX6q: Link system reset controller (SRC) to IPU in DT
  ARM i.MX6q: Add LDB device to device tree
  ARM: imx5 DT init cpufreq-cpu0 device
  ARM: imx27 DT init cpufreq-cpu0 device
  ARM i.MX53: Add LDB device to device tree
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

diff --combined arch/arm/boot/dts/Makefile
index b07f1620119a0fa4a6f626c0c85a562fa3514ad7,2498cba723d419f9e829e3004dd14c6133183190..2be254709dcbce9981d14da4a86fac35d54f6125
--- 1/arch/arm/boot/dts/Makefile
--- 2/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@@ -3,7 -3,6 +3,7 @@@ ifeq ($(CONFIG_OF),y
  # Keep at91 dtb files sorted alphabetically for each SoC
  # rm9200
  dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += mpa1600.dtb
  # sam9260
  dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb
  dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
@@@ -27,7 -26,6 +27,7 @@@ dtb-$(CONFIG_ARCH_AT91) += pm9g45.dt
  # sam9n12
  dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
  # sam9x5
 +dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb
  dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
  dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
  dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
@@@ -89,19 -87,26 +89,26 @@@ dtb-$(CONFIG_ARCH_MXC) += 
        imx25-karo-tx25.dtb \
        imx25-pdk.dtb \
        imx27-apf27.dtb \
+       imx27-apf27dev.dtb \
        imx27-pdk.dtb \
+       imx27-phytec-phycore.dtb \
        imx31-bug.dtb \
        imx51-apf51.dtb \
+       imx51-apf51dev.dtb \
        imx51-babbage.dtb \
        imx53-ard.dtb \
        imx53-evk.dtb \
        imx53-mba53.dtb \
        imx53-qsb.dtb \
        imx53-smd.dtb \
+       imx6dl-sabreauto.dtb \
+       imx6dl-sabresd.dtb \
+       imx6dl-wandboard.dtb \
        imx6q-arm2.dtb \
        imx6q-sabreauto.dtb \
        imx6q-sabrelite.dtb \
-       imx6q-sabresd.dtb
+       imx6q-sabresd.dtb \
+       imx6q-sbc6x.dtb
  dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
        imx23-olinuxino.dtb \
        imx23-stmp378x_devb.dtb \

diff --combined arch/arm/boot/dts/at91sam9x5.dtsi
index a3d4464895a0c782040677b5129bdf57b0f4ff86,a98c0d50fbbe1ed80e6c29d5228716155f3399f5..284bf24815bbffa521ecfb7a286402df516d8850
--- 1/arch/arm/boot/dts/at91sam9x5.dtsi
--- 2/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@@ -238,8 -238,32 +238,32 @@@
                                nand {
                                        pinctrl_nand: nand-0 {
                                                atmel,pins =
-                                                       <3 4 0x0 0x1    /* PD5 gpio RDY pin pull_up */
-                                                        3 5 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
+                                                       <3 0 0x1 0x0    /* PD0 periph A Read Enable */
+                                                        3 1 0x1 0x0    /* PD1 periph A Write Enable */
+                                                        3 2 0x1 0x0    /* PD2 periph A Address Latch Enable */
+                                                        3 3 0x1 0x0    /* PD3 periph A Command Latch Enable */
+                                                        3 4 0x0 0x1    /* PD4 gpio Chip Enable pin pull_up */
+                                                        3 5 0x0 0x1    /* PD5 gpio RDY/BUSY pin pull_up */
+                                                        3 6 0x1 0x0    /* PD6 periph A Data bit 0 */
+                                                        3 7 0x1 0x0    /* PD7 periph A Data bit 1 */
+                                                        3 8 0x1 0x0    /* PD8 periph A Data bit 2 */
+                                                        3 9 0x1 0x0    /* PD9 periph A Data bit 3 */
+                                                        3 10 0x1 0x0   /* PD10 periph A Data bit 4 */
+                                                        3 11 0x1 0x0   /* PD11 periph A Data bit 5 */
+                                                        3 12 0x1 0x0   /* PD12 periph A Data bit 6 */
+                                                        3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
+                                       };
+ 
+                                       pinctrl_nand_16bits: nand_16bits-0 {
+                                               atmel,pins =
+                                                       <3 14 0x1 0x0   /* PD14 periph A Data bit 8 */
+                                                        3 15 0x1 0x0   /* PD15 periph A Data bit 9 */
+                                                        3 16 0x1 0x0   /* PD16 periph A Data bit 10 */
+                                                        3 17 0x1 0x0   /* PD17 periph A Data bit 11 */
+                                                        3 18 0x1 0x0   /* PD18 periph A Data bit 12 */
+                                                        3 19 0x1 0x0   /* PD19 periph A Data bit 13 */
+                                                        3 20 0x1 0x0   /* PD20 periph A Data bit 14 */
+                                                        3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
                                        };
                                };
  
@@@ -319,54 -343,6 +343,54 @@@
                                        };
                                };
  
 +                              i2c0 {
 +                                      pinctrl_i2c0: i2c0-0 {
 +                                              atmel,pins =
 +                                                      <0 30 0x1 0x0   /* PA30 periph A I2C0 data */
 +                                                       0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */
 +                                      };
 +                              };
 +
 +                              i2c1 {
 +                                      pinctrl_i2c1: i2c1-0 {
 +                                              atmel,pins =
 +                                                      <2 0 0x3 0x0    /* PC0 periph C I2C1 data */
 +                                                       2 1 0x3 0x0>;  /* PC1 periph C I2C1 clock */
 +                                      };
 +                              };
 +
 +                              i2c2 {
 +                                      pinctrl_i2c2: i2c2-0 {
 +                                              atmel,pins =
 +                                                      <1 4 0x2 0x0    /* PB4 periph B I2C2 data */
 +                                                       1 5 0x2 0x0>;  /* PB5 periph B I2C2 clock */
 +                                      };
 +                              };
 +
 +                              i2c_gpio0 {
 +                                      pinctrl_i2c_gpio0: i2c_gpio0-0 {
 +                                              atmel,pins =
 +                                                      <0 30 0x0 0x2   /* PA30 gpio multidrive I2C0 data */
 +                                                       0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */
 +                                      };
 +                              };
 +
 +                              i2c_gpio1 {
 +                                      pinctrl_i2c_gpio1: i2c_gpio1-0 {
 +                                              atmel,pins =
 +                                                      <2 0 0x0 0x2    /* PC0 gpio multidrive I2C1 data */
 +                                                       2 1 0x0 0x2>;  /* PC1 gpio multidrive I2C1 clock */
 +                                      };
 +                              };
 +
 +                              i2c_gpio2 {
 +                                      pinctrl_i2c_gpio2: i2c_gpio2-0 {
 +                                              atmel,pins =
 +                                                      <1 4 0x0 0x2    /* PB4 gpio multidrive I2C2 data */
 +                                                       1 5 0x0 0x2>;  /* PB5 gpio multidrive I2C2 clock */
 +                                      };
 +                              };
 +
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
@@@ -495,8 -471,6 +519,8 @@@
                                interrupts = <9 4 6>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 +                              pinctrl-names = "default";
 +                              pinctrl-0 = <&pinctrl_i2c0>;
                                status = "disabled";
                        };
  
@@@ -506,8 -480,6 +530,8 @@@
                                interrupts = <10 4 6>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 +                              pinctrl-names = "default";
 +                              pinctrl-0 = <&pinctrl_i2c1>;
                                status = "disabled";
                        };
  
@@@ -517,8 -489,6 +541,8 @@@
                                interrupts = <11 4 6>;
                                #address-cells = <1>;
                                #size-cells = <0>;
 +                              pinctrl-names = "default";
 +                              pinctrl-0 = <&pinctrl_i2c2>;
                                status = "disabled";
                        };
  
@@@ -535,9 -505,6 +559,9 @@@
                                atmel,adc-drdy-mask = <0x1000000>;
                                atmel,adc-status-register = <0x30>;
                                atmel,adc-trigger-register = <0xc0>;
 +                              atmel,adc-res = <8 10>;
 +                              atmel,adc-res-names = "lowres", "highres";
 +                              atmel,adc-use-res = "highres";
  
                                trigger@0 {
                                        trigger-name = "external-rising";
@@@ -562,13 -529,6 +586,13 @@@
                                        trigger-value = <0x6>;
                                };
                        };
 +
 +                      rtc@fffffeb0 {
 +                              compatible = "atmel,at91rm9200-rtc";
 +                              reg = <0xfffffeb0 0x40>;
 +                              interrupts = <1 4 7>;
 +                              status = "disabled";
 +                      };
                };
  
                nand0: nand@40000000 {
@@@ -617,8 -577,6 +641,8 @@@
                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
                #address-cells = <1>;
                #size-cells = <0>;
 +              pinctrl-names = "default";
 +              pinctrl-0 = <&pinctrl_i2c_gpio0>;
                status = "disabled";
        };
  
@@@ -632,8 -590,6 +656,8 @@@
                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
                #address-cells = <1>;
                #size-cells = <0>;
 +              pinctrl-names = "default";
 +              pinctrl-0 = <&pinctrl_i2c_gpio1>;
                status = "disabled";
        };
  
@@@ -647,8 -603,6 +671,8 @@@
                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
                #address-cells = <1>;
                #size-cells = <0>;
 +              pinctrl-names = "default";
 +              pinctrl-0 = <&pinctrl_i2c_gpio2>;
                status = "disabled";
        };
  };