mmc: sdhci-esdhc-imx: separate transfer mode from command write for usdhc
authorShawn Guo <shawn.guo@linaro.org>
Mon, 21 Jan 2013 11:02:24 +0000 (19:02 +0800)
committerChris Ball <cjb@laptop.org>
Sun, 24 Feb 2013 19:37:01 +0000 (14:37 -0500)
The combining of SDHCI_TRANSFER_MODE and SDHCI_COMMAND writes is only
required for esdhc, but not necessarily for usdhc.  Different from
esdhc where the bits for transfer mode and command are all in the same
register CMD_XFR_TYP, usdhc has a newly introduced register MIX_CTRL
to hold transfer mode bits.  So it makes more sense to separate transfer
mode from command write for usdhc.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/sdhci-esdhc-imx.c

index 370c052f42939ee992dd972a417b37a855449c76..48832c567f720061ad6a7449e43683b00dd31c6d 100644 (file)
@@ -239,10 +239,6 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
 
        switch (reg) {
        case SDHCI_TRANSFER_MODE:
-               /*
-                * Postpone this write, we must do it together with a
-                * command write that is down below.
-                */
                if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
                                && (host->cmd->opcode == SD_IO_RW_EXTENDED)
                                && (host->cmd->data->blocks > 1)
@@ -252,7 +248,18 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
                        v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK;
                        writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
                }
-               imx_data->scratchpad = val;
+
+               if (is_imx6q_usdhc(imx_data)) {
+                       u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
+                       m = val | (m & 0xffff0000);
+                       writel(m, host->ioaddr + ESDHC_MIX_CTRL);
+               } else {
+                       /*
+                        * Postpone this write, we must do it together with a
+                        * command write that is down below.
+                        */
+                       imx_data->scratchpad = val;
+               }
                return;
        case SDHCI_COMMAND:
                if ((host->cmd->opcode == MMC_STOP_TRANSMISSION ||
@@ -260,16 +267,12 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
                    (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
                        val |= SDHCI_CMD_ABORTCMD;
 
-               if (is_imx6q_usdhc(imx_data)) {
-                       u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
-                       m = imx_data->scratchpad | (m & 0xffff0000);
-                       writel(m, host->ioaddr + ESDHC_MIX_CTRL);
+               if (is_imx6q_usdhc(imx_data))
                        writel(val << 16,
                               host->ioaddr + SDHCI_TRANSFER_MODE);
-               } else {
+               else
                        writel(val << 16 | imx_data->scratchpad,
                               host->ioaddr + SDHCI_TRANSFER_MODE);
-               }
                return;
        case SDHCI_BLOCK_SIZE:
                val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);