Pull m68k updates from Geert Uytterhoeven.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k: Make sys_atomic_cmpxchg_32 work on classic m68k
m68k/apollo: Rename "timer" to "apollo_timer"
zorro: Remove unused zorro_bus.devices
m68k: Remove never used asm/shm.h
m68k/sun3: Remove unselectable code in prom_init()
m68k: Use asm-generic version of <asm/sections.h>
m68k: Replace m68k-specific _[se]bss by generic __bss_{start,stop}
mtd/uclinux: Use generic __bss_stop instead of _ebss
m68knommu: Allow ColdFire CPUs to use unaligned accesses
m68k: Remove five unused headers
m68k: CPU32 does not support unaligned accesses
m68k: Introduce config option CPU_HAS_NO_UNALIGNED
m68k: delay, muldi3 - Use CONFIG_CPU_HAS_NO_MULDIV64
m68k: Move CPU_HAS_* config options
m68k: Remove duplicate FPU config option
m68knommu: Clean up printing of sections
m68k: Use asm-generic version of <asm/types.h>
m68k: Use Kbuild logic to import asm-generic headers
select GENERIC_STRNCPY_FROM_USER if MMU
select GENERIC_STRNLEN_USER if MMU
select FPU if MMU
+ select ARCH_WANT_IPC_PARSE_VERSION
select ARCH_USES_GETTIMEOFFSET if MMU && !COLDFIRE
config RWSEM_GENERIC_SPINLOCK
bool
default y
- config CPU_HAS_NO_BITFIELDS
- bool
-
- config CPU_HAS_NO_MULDIV64
- bool
-
- config CPU_HAS_ADDRESS_SPACES
- bool
-
- config FPU
- bool
-
config HZ
int
default 1000 if CLEOPATRA
config COLDFIRE
bool "Coldfire CPU family support"
select GENERIC_GPIO
- select ARCH_REQUIRE_GPIOLIB
+ select ARCH_WANT_OPTIONAL_GPIOLIB
select ARCH_HAVE_CUSTOM_GPIO_H
select CPU_HAS_NO_BITFIELDS
select CPU_HAS_NO_MULDIV64
bool
select CPU_HAS_NO_BITFIELDS
select CPU_HAS_NO_MULDIV64
+ select CPU_HAS_NO_UNALIGNED
select GENERIC_CSUM
help
The Freescale (was Motorola) 68000 CPU is the first generation of
config MCPU32
bool
select CPU_HAS_NO_BITFIELDS
+ select CPU_HAS_NO_UNALIGNED
help
The Freescale (was then Motorola) CPU32 is a CPU core that is
based on the 68020 processor. For the most part it is used in
help
Motorola ColdFire 5249 processor support.
+config M525x
+ bool "MCF525x"
+ depends on !MMU
+ select COLDFIRE_SW_A7
+ select HAVE_MBAR
+ help
+ Freescale (Motorola) Coldfire 5251/5253 processor support.
+
config M527x
bool
help
Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
+config M5441x
+ bool "MCF5441x"
+ depends on !MMU
+ select GENERIC_CLOCKEVENTS
+ select HAVE_CACHE_CB
+ help
+ Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
+
endif # COLDFIRE
default "3"
depends on !SINGLE_MEMORY_CHUNK
+ config CPU_HAS_NO_BITFIELDS
+ bool
+
+ config CPU_HAS_NO_MULDIV64
+ bool
+
+ config CPU_HAS_NO_UNALIGNED
+ bool
+
+ config CPU_HAS_ADDRESS_SPACES
+ bool
+
config FPU
bool
.endm
#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
- defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
- defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
- defined(CONFIG_M5407)
+ defined(CONFIG_M5249) || defined(CONFIG_M525x) || \
+ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
+ defined(CONFIG_M5307) || defined(CONFIG_M5407)
/*
* Not all these devices have exactly the same DRAM controller,
* but the DCMR register is virtually identical - give or take
/*
* Move ROM filesystem above bss :-)
*/
- lea _sbss,%a0 /* get start of bss */
- lea _ebss,%a1 /* set up destination */
+ lea __bss_start,%a0 /* get start of bss */
+ lea __bss_stop,%a1 /* set up destination */
movel %a0,%a2 /* copy of bss start */
movel 8(%a0),%d0 /* get size of ROMFS */
bne _copy_romfs
#else /* CONFIG_ROMFS_FS */
- lea _ebss,%a1
+ lea __bss_stop,%a1
movel %a1,_ramstart
#endif /* CONFIG_ROMFS_FS */
/*
* Zero out the bss region.
*/
- lea _sbss,%a0 /* get start of bss */
- lea _ebss,%a1 /* get end of bss */
+ lea __bss_start,%a0 /* get start of bss */
+ lea __bss_stop,%a1 /* get end of bss */
clrl %d0 /* set value */
_clear_bss:
movel %d0,(%a0)+ /* clear each word */
projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / commitdiff