Merge tag 'v3.10.70' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / spi / at73c213.h
1 /*
2 * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
3 *
4 * Copyright (C) 2006 - 2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
19 * 02111-1307, USA.
20 *
21 * The full GNU General Public License is included in this
22 * distribution in the file called COPYING.
23 */
24
25 #ifndef _SND_AT73C213_H
26 #define _SND_AT73C213_H
27
28 /* DAC control register */
29 #define DAC_CTRL 0x00
30 #define DAC_CTRL_ONPADRV 7
31 #define DAC_CTRL_ONAUXIN 6
32 #define DAC_CTRL_ONDACR 5
33 #define DAC_CTRL_ONDACL 4
34 #define DAC_CTRL_ONLNOR 3
35 #define DAC_CTRL_ONLNOL 2
36 #define DAC_CTRL_ONLNIR 1
37 #define DAC_CTRL_ONLNIL 0
38
39 /* DAC left line in gain register */
40 #define DAC_LLIG 0x01
41 #define DAC_LLIG_LLIG 0
42
43 /* DAC right line in gain register */
44 #define DAC_RLIG 0x02
45 #define DAC_RLIG_RLIG 0
46
47 /* DAC Left Master Playback Gain Register */
48 #define DAC_LMPG 0x03
49 #define DAC_LMPG_LMPG 0
50
51 /* DAC Right Master Playback Gain Register */
52 #define DAC_RMPG 0x04
53 #define DAC_RMPG_RMPG 0
54
55 /* DAC Left Line Out Gain Register */
56 #define DAC_LLOG 0x05
57 #define DAC_LLOG_LLOG 0
58
59 /* DAC Right Line Out Gain Register */
60 #define DAC_RLOG 0x06
61 #define DAC_RLOG_RLOG 0
62
63 /* DAC Output Level Control Register */
64 #define DAC_OLC 0x07
65 #define DAC_OLC_RSHORT 7
66 #define DAC_OLC_ROLC 4
67 #define DAC_OLC_LSHORT 3
68 #define DAC_OLC_LOLC 0
69
70 /* DAC Mixer Control Register */
71 #define DAC_MC 0x08
72 #define DAC_MC_INVR 5
73 #define DAC_MC_INVL 4
74 #define DAC_MC_RMSMIN2 3
75 #define DAC_MC_RMSMIN1 2
76 #define DAC_MC_LMSMIN2 1
77 #define DAC_MC_LMSMIN1 0
78
79 /* DAC Clock and Sampling Frequency Control Register */
80 #define DAC_CSFC 0x09
81 #define DAC_CSFC_OVRSEL 4
82
83 /* DAC Miscellaneous Register */
84 #define DAC_MISC 0x0A
85 #define DAC_MISC_VCMCAPSEL 7
86 #define DAC_MISC_DINTSEL 4
87 #define DAC_MISC_DITHEN 3
88 #define DAC_MISC_DEEMPEN 2
89 #define DAC_MISC_NBITS 0
90
91 /* DAC Precharge Control Register */
92 #define DAC_PRECH 0x0C
93 #define DAC_PRECH_PRCHGPDRV 7
94 #define DAC_PRECH_PRCHGAUX1 6
95 #define DAC_PRECH_PRCHGLNOR 5
96 #define DAC_PRECH_PRCHGLNOL 4
97 #define DAC_PRECH_PRCHGLNIR 3
98 #define DAC_PRECH_PRCHGLNIL 2
99 #define DAC_PRECH_PRCHG 1
100 #define DAC_PRECH_ONMSTR 0
101
102 /* DAC Auxiliary Input Gain Control Register */
103 #define DAC_AUXG 0x0D
104 #define DAC_AUXG_AUXG 0
105
106 /* DAC Reset Register */
107 #define DAC_RST 0x10
108 #define DAC_RST_RESMASK 2
109 #define DAC_RST_RESFILZ 1
110 #define DAC_RST_RSTZ 0
111
112 /* Power Amplifier Control Register */
113 #define PA_CTRL 0x11
114 #define PA_CTRL_APAON 6
115 #define PA_CTRL_APAPRECH 5
116 #define PA_CTRL_APALP 4
117 #define PA_CTRL_APAGAIN 0
118
119 #endif /* _SND_AT73C213_H */