Merge tag 'trace-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / ak4642.c
1 /*
2 * ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on wm8731.c by Richard Purdie
8 * Based on ak4535.c by Richard Purdie
9 * Based on wm8753.c by Liam Girdwood
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 /* ** CAUTION **
17 *
18 * This is very simple driver.
19 * It can use headphone output / stereo input only
20 *
21 * AK4642 is tested.
22 * AK4643 is tested.
23 * AK4648 is tested.
24 */
25
26 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <linux/of_device.h>
30 #include <linux/module.h>
31 #include <sound/soc.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
34
35 #define PW_MGMT1 0x00
36 #define PW_MGMT2 0x01
37 #define SG_SL1 0x02
38 #define SG_SL2 0x03
39 #define MD_CTL1 0x04
40 #define MD_CTL2 0x05
41 #define TIMER 0x06
42 #define ALC_CTL1 0x07
43 #define ALC_CTL2 0x08
44 #define L_IVC 0x09
45 #define L_DVC 0x0a
46 #define ALC_CTL3 0x0b
47 #define R_IVC 0x0c
48 #define R_DVC 0x0d
49 #define MD_CTL3 0x0e
50 #define MD_CTL4 0x0f
51 #define PW_MGMT3 0x10
52 #define DF_S 0x11
53 #define FIL3_0 0x12
54 #define FIL3_1 0x13
55 #define FIL3_2 0x14
56 #define FIL3_3 0x15
57 #define EQ_0 0x16
58 #define EQ_1 0x17
59 #define EQ_2 0x18
60 #define EQ_3 0x19
61 #define EQ_4 0x1a
62 #define EQ_5 0x1b
63 #define FIL1_0 0x1c
64 #define FIL1_1 0x1d
65 #define FIL1_2 0x1e
66 #define FIL1_3 0x1f
67 #define PW_MGMT4 0x20
68 #define MD_CTL5 0x21
69 #define LO_MS 0x22
70 #define HP_MS 0x23
71 #define SPK_MS 0x24
72
73 /* PW_MGMT1*/
74 #define PMVCM (1 << 6) /* VCOM Power Management */
75 #define PMMIN (1 << 5) /* MIN Input Power Management */
76 #define PMDAC (1 << 2) /* DAC Power Management */
77 #define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
78
79 /* PW_MGMT2 */
80 #define HPMTN (1 << 6)
81 #define PMHPL (1 << 5)
82 #define PMHPR (1 << 4)
83 #define MS (1 << 3) /* master/slave select */
84 #define MCKO (1 << 1)
85 #define PMPLL (1 << 0)
86
87 #define PMHP_MASK (PMHPL | PMHPR)
88 #define PMHP PMHP_MASK
89
90 /* PW_MGMT3 */
91 #define PMADR (1 << 0) /* MIC L / ADC R Power Management */
92
93 /* SG_SL1 */
94 #define MINS (1 << 6) /* Switch from MIN to Speaker */
95 #define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
96 #define PMMP (1 << 2) /* MPWR pin Power Management */
97 #define MGAIN0 (1 << 0) /* MIC amp gain*/
98
99 /* TIMER */
100 #define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
101 #define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
102
103 /* ALC_CTL1 */
104 #define ALC (1 << 5) /* ALC Enable */
105 #define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
106
107 /* MD_CTL1 */
108 #define PLL3 (1 << 7)
109 #define PLL2 (1 << 6)
110 #define PLL1 (1 << 5)
111 #define PLL0 (1 << 4)
112 #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
113
114 #define BCKO_MASK (1 << 3)
115 #define BCKO_64 BCKO_MASK
116
117 #define DIF_MASK (3 << 0)
118 #define DSP (0 << 0)
119 #define RIGHT_J (1 << 0)
120 #define LEFT_J (2 << 0)
121 #define I2S (3 << 0)
122
123 /* MD_CTL2 */
124 #define FS0 (1 << 0)
125 #define FS1 (1 << 1)
126 #define FS2 (1 << 2)
127 #define FS3 (1 << 5)
128 #define FS_MASK (FS0 | FS1 | FS2 | FS3)
129
130 /* MD_CTL3 */
131 #define BST1 (1 << 3)
132
133 /* MD_CTL4 */
134 #define DACH (1 << 0)
135
136 /*
137 * Playback Volume (table 39)
138 *
139 * max : 0x00 : +12.0 dB
140 * ( 0.5 dB step )
141 * min : 0xFE : -115.0 dB
142 * mute: 0xFF
143 */
144 static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
145
146 static const struct snd_kcontrol_new ak4642_snd_controls[] = {
147
148 SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
149 0, 0xFF, 1, out_tlv),
150 };
151
152 static const struct snd_kcontrol_new ak4642_headphone_control =
153 SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
154
155 static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
156 SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
157 };
158
159 static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
160
161 /* Outputs */
162 SND_SOC_DAPM_OUTPUT("HPOUTL"),
163 SND_SOC_DAPM_OUTPUT("HPOUTR"),
164 SND_SOC_DAPM_OUTPUT("LINEOUT"),
165
166 SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
167 SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
168 SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
169 &ak4642_headphone_control),
170
171 SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
172
173 SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
174 &ak4642_lout_mixer_controls[0],
175 ARRAY_SIZE(ak4642_lout_mixer_controls)),
176
177 /* DAC */
178 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
179 };
180
181 static const struct snd_soc_dapm_route ak4642_intercon[] = {
182
183 /* Outputs */
184 {"HPOUTL", NULL, "HPL Out"},
185 {"HPOUTR", NULL, "HPR Out"},
186 {"LINEOUT", NULL, "LINEOUT Mixer"},
187
188 {"HPL Out", NULL, "Headphone Enable"},
189 {"HPR Out", NULL, "Headphone Enable"},
190
191 {"Headphone Enable", "Switch", "DACH"},
192
193 {"DACH", NULL, "DAC"},
194
195 {"LINEOUT Mixer", "DACL", "DAC"},
196 };
197
198 /*
199 * ak4642 register cache
200 */
201 static const u8 ak4642_reg[] = {
202 0x00, 0x00, 0x01, 0x00,
203 0x02, 0x00, 0x00, 0x00,
204 0xe1, 0xe1, 0x18, 0x00,
205 0xe1, 0x18, 0x11, 0x08,
206 0x00, 0x00, 0x00, 0x00,
207 0x00, 0x00, 0x00, 0x00,
208 0x00, 0x00, 0x00, 0x00,
209 0x00, 0x00, 0x00, 0x00,
210 0x00, 0x00, 0x00, 0x00,
211 0x00,
212 };
213
214 static const u8 ak4648_reg[] = {
215 0x00, 0x00, 0x01, 0x00,
216 0x02, 0x00, 0x00, 0x00,
217 0xe1, 0xe1, 0x18, 0x00,
218 0xe1, 0x18, 0x11, 0xb8,
219 0x00, 0x00, 0x00, 0x00,
220 0x00, 0x00, 0x00, 0x00,
221 0x00, 0x00, 0x00, 0x00,
222 0x00, 0x00, 0x00, 0x00,
223 0x00, 0x00, 0x00, 0x00,
224 0x00, 0x88, 0x88, 0x08,
225 };
226
227 static int ak4642_dai_startup(struct snd_pcm_substream *substream,
228 struct snd_soc_dai *dai)
229 {
230 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
231 struct snd_soc_codec *codec = dai->codec;
232
233 if (is_play) {
234 /*
235 * start headphone output
236 *
237 * PLL, Master Mode
238 * Audio I/F Format :MSB justified (ADC & DAC)
239 * Bass Boost Level : Middle
240 *
241 * This operation came from example code of
242 * "ASAHI KASEI AK4642" (japanese) manual p97.
243 */
244 snd_soc_write(codec, L_IVC, 0x91); /* volume */
245 snd_soc_write(codec, R_IVC, 0x91); /* volume */
246 } else {
247 /*
248 * start stereo input
249 *
250 * PLL Master Mode
251 * Audio I/F Format:MSB justified (ADC & DAC)
252 * Pre MIC AMP:+20dB
253 * MIC Power On
254 * ALC setting:Refer to Table 35
255 * ALC bit=“1”
256 *
257 * This operation came from example code of
258 * "ASAHI KASEI AK4642" (japanese) manual p94.
259 */
260 snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
261 snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
262 snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
263 snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
264 snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
265 }
266
267 return 0;
268 }
269
270 static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
271 struct snd_soc_dai *dai)
272 {
273 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
274 struct snd_soc_codec *codec = dai->codec;
275
276 if (is_play) {
277 } else {
278 /* stop stereo input */
279 snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
280 snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
281 snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
282 }
283 }
284
285 static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
286 int clk_id, unsigned int freq, int dir)
287 {
288 struct snd_soc_codec *codec = codec_dai->codec;
289 u8 pll;
290
291 switch (freq) {
292 case 11289600:
293 pll = PLL2;
294 break;
295 case 12288000:
296 pll = PLL2 | PLL0;
297 break;
298 case 12000000:
299 pll = PLL2 | PLL1;
300 break;
301 case 24000000:
302 pll = PLL2 | PLL1 | PLL0;
303 break;
304 case 13500000:
305 pll = PLL3 | PLL2;
306 break;
307 case 27000000:
308 pll = PLL3 | PLL2 | PLL0;
309 break;
310 default:
311 return -EINVAL;
312 }
313 snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
314
315 return 0;
316 }
317
318 static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
319 {
320 struct snd_soc_codec *codec = dai->codec;
321 u8 data;
322 u8 bcko;
323
324 data = MCKO | PMPLL; /* use MCKO */
325 bcko = 0;
326
327 /* set master/slave audio interface */
328 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
329 case SND_SOC_DAIFMT_CBM_CFM:
330 data |= MS;
331 bcko = BCKO_64;
332 break;
333 case SND_SOC_DAIFMT_CBS_CFS:
334 break;
335 default:
336 return -EINVAL;
337 }
338 snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
339 snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
340
341 /* format type */
342 data = 0;
343 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
344 case SND_SOC_DAIFMT_LEFT_J:
345 data = LEFT_J;
346 break;
347 case SND_SOC_DAIFMT_I2S:
348 data = I2S;
349 break;
350 /* FIXME
351 * Please add RIGHT_J / DSP support here
352 */
353 default:
354 return -EINVAL;
355 break;
356 }
357 snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
358
359 return 0;
360 }
361
362 static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
363 struct snd_pcm_hw_params *params,
364 struct snd_soc_dai *dai)
365 {
366 struct snd_soc_codec *codec = dai->codec;
367 u8 rate;
368
369 switch (params_rate(params)) {
370 case 7350:
371 rate = FS2;
372 break;
373 case 8000:
374 rate = 0;
375 break;
376 case 11025:
377 rate = FS2 | FS0;
378 break;
379 case 12000:
380 rate = FS0;
381 break;
382 case 14700:
383 rate = FS2 | FS1;
384 break;
385 case 16000:
386 rate = FS1;
387 break;
388 case 22050:
389 rate = FS2 | FS1 | FS0;
390 break;
391 case 24000:
392 rate = FS1 | FS0;
393 break;
394 case 29400:
395 rate = FS3 | FS2 | FS1;
396 break;
397 case 32000:
398 rate = FS3 | FS1;
399 break;
400 case 44100:
401 rate = FS3 | FS2 | FS1 | FS0;
402 break;
403 case 48000:
404 rate = FS3 | FS1 | FS0;
405 break;
406 default:
407 return -EINVAL;
408 break;
409 }
410 snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
411
412 return 0;
413 }
414
415 static int ak4642_set_bias_level(struct snd_soc_codec *codec,
416 enum snd_soc_bias_level level)
417 {
418 switch (level) {
419 case SND_SOC_BIAS_OFF:
420 snd_soc_write(codec, PW_MGMT1, 0x00);
421 break;
422 default:
423 snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
424 break;
425 }
426 codec->dapm.bias_level = level;
427
428 return 0;
429 }
430
431 static const struct snd_soc_dai_ops ak4642_dai_ops = {
432 .startup = ak4642_dai_startup,
433 .shutdown = ak4642_dai_shutdown,
434 .set_sysclk = ak4642_dai_set_sysclk,
435 .set_fmt = ak4642_dai_set_fmt,
436 .hw_params = ak4642_dai_hw_params,
437 };
438
439 static struct snd_soc_dai_driver ak4642_dai = {
440 .name = "ak4642-hifi",
441 .playback = {
442 .stream_name = "Playback",
443 .channels_min = 1,
444 .channels_max = 2,
445 .rates = SNDRV_PCM_RATE_8000_48000,
446 .formats = SNDRV_PCM_FMTBIT_S16_LE },
447 .capture = {
448 .stream_name = "Capture",
449 .channels_min = 1,
450 .channels_max = 2,
451 .rates = SNDRV_PCM_RATE_8000_48000,
452 .formats = SNDRV_PCM_FMTBIT_S16_LE },
453 .ops = &ak4642_dai_ops,
454 .symmetric_rates = 1,
455 };
456
457 static int ak4642_resume(struct snd_soc_codec *codec)
458 {
459 snd_soc_cache_sync(codec);
460 return 0;
461 }
462
463
464 static int ak4642_probe(struct snd_soc_codec *codec)
465 {
466 int ret;
467
468 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
469 if (ret < 0) {
470 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
471 return ret;
472 }
473
474 snd_soc_add_codec_controls(codec, ak4642_snd_controls,
475 ARRAY_SIZE(ak4642_snd_controls));
476
477 ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
478
479 return 0;
480 }
481
482 static int ak4642_remove(struct snd_soc_codec *codec)
483 {
484 ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
485 return 0;
486 }
487
488 static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
489 .probe = ak4642_probe,
490 .remove = ak4642_remove,
491 .resume = ak4642_resume,
492 .set_bias_level = ak4642_set_bias_level,
493 .reg_cache_default = ak4642_reg, /* ak4642 reg */
494 .reg_cache_size = ARRAY_SIZE(ak4642_reg), /* ak4642 reg */
495 .reg_word_size = sizeof(u8),
496 .dapm_widgets = ak4642_dapm_widgets,
497 .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
498 .dapm_routes = ak4642_intercon,
499 .num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
500 };
501
502 static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
503 .probe = ak4642_probe,
504 .remove = ak4642_remove,
505 .resume = ak4642_resume,
506 .set_bias_level = ak4642_set_bias_level,
507 .reg_cache_default = ak4648_reg, /* ak4648 reg */
508 .reg_cache_size = ARRAY_SIZE(ak4648_reg), /* ak4648 reg */
509 .reg_word_size = sizeof(u8),
510 .dapm_widgets = ak4642_dapm_widgets,
511 .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
512 .dapm_routes = ak4642_intercon,
513 .num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
514 };
515
516 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
517 static struct of_device_id ak4642_of_match[];
518 static int ak4642_i2c_probe(struct i2c_client *i2c,
519 const struct i2c_device_id *id)
520 {
521 struct device_node *np = i2c->dev.of_node;
522 const struct snd_soc_codec_driver *driver;
523
524 driver = NULL;
525 if (np) {
526 const struct of_device_id *of_id;
527
528 of_id = of_match_device(ak4642_of_match, &i2c->dev);
529 if (of_id)
530 driver = of_id->data;
531 } else {
532 driver = (struct snd_soc_codec_driver *)id->driver_data;
533 }
534
535 if (!driver) {
536 dev_err(&i2c->dev, "no driver\n");
537 return -EINVAL;
538 }
539
540 return snd_soc_register_codec(&i2c->dev,
541 driver, &ak4642_dai, 1);
542 }
543
544 static int ak4642_i2c_remove(struct i2c_client *client)
545 {
546 snd_soc_unregister_codec(&client->dev);
547 return 0;
548 }
549
550 static struct of_device_id ak4642_of_match[] = {
551 { .compatible = "asahi-kasei,ak4642", .data = &soc_codec_dev_ak4642},
552 { .compatible = "asahi-kasei,ak4643", .data = &soc_codec_dev_ak4642},
553 { .compatible = "asahi-kasei,ak4648", .data = &soc_codec_dev_ak4648},
554 {},
555 };
556 MODULE_DEVICE_TABLE(of, ak4642_of_match);
557
558 static const struct i2c_device_id ak4642_i2c_id[] = {
559 { "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
560 { "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
561 { "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
562 { }
563 };
564 MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
565
566 static struct i2c_driver ak4642_i2c_driver = {
567 .driver = {
568 .name = "ak4642-codec",
569 .owner = THIS_MODULE,
570 .of_match_table = ak4642_of_match,
571 },
572 .probe = ak4642_i2c_probe,
573 .remove = ak4642_i2c_remove,
574 .id_table = ak4642_i2c_id,
575 };
576 #endif
577
578 static int __init ak4642_modinit(void)
579 {
580 int ret = 0;
581 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
582 ret = i2c_add_driver(&ak4642_i2c_driver);
583 #endif
584 return ret;
585
586 }
587 module_init(ak4642_modinit);
588
589 static void __exit ak4642_exit(void)
590 {
591 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
592 i2c_del_driver(&ak4642_i2c_driver);
593 #endif
594
595 }
596 module_exit(ak4642_exit);
597
598 MODULE_DESCRIPTION("Soc AK4642 driver");
599 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
600 MODULE_LICENSE("GPL");