2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/export.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
35 #include <asm/scatterlist.h>
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
41 #define OFFSET(val,align) ((unsigned long) \
42 ( (val) & ( (align) - 1)))
44 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
51 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
56 * Used to do a quick range check in swiotlb_tbl_unmap_single and
57 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
60 static phys_addr_t io_tlb_start
, io_tlb_end
;
63 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
64 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
66 static unsigned long io_tlb_nslabs
;
69 * When the IOMMU overflows we return a fallback buffer. This sets the size.
71 static unsigned long io_tlb_overflow
= 32*1024;
73 static phys_addr_t io_tlb_overflow_buffer
;
76 * This is a free list describing the number of free entries available from
79 static unsigned int *io_tlb_list
;
80 static unsigned int io_tlb_index
;
83 * We need to save away the original address corresponding to a mapped entry
84 * for the sync operations.
86 static phys_addr_t
*io_tlb_orig_addr
;
89 * Protect the above data structures in the map and unmap calls
91 static DEFINE_SPINLOCK(io_tlb_lock
);
93 static int late_alloc
;
96 setup_io_tlb_npages(char *str
)
99 io_tlb_nslabs
= simple_strtoul(str
, &str
, 0);
100 /* avoid tail segment of size < IO_TLB_SEGSIZE */
101 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
105 if (!strcmp(str
, "force"))
110 early_param("swiotlb", setup_io_tlb_npages
);
111 /* make io_tlb_overflow tunable too? */
113 unsigned long swiotlb_nr_tbl(void)
115 return io_tlb_nslabs
;
117 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl
);
119 /* default to 64MB */
120 #ifdef CONFIG_MTK_LM_MODE
121 #define IO_TLB_DEFAULT_SIZE (SZ_64M)
123 #define IO_TLB_DEFAULT_SIZE ((1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE)
124 #endif // end of CONFIG_MTK_LM_MODE
125 unsigned long swiotlb_size_or_default(void)
129 size
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
131 return size
? size
: (IO_TLB_DEFAULT_SIZE
);
134 /* Note that this doesn't work with highmem page */
135 static dma_addr_t
swiotlb_virt_to_bus(struct device
*hwdev
,
136 volatile void *address
)
138 return phys_to_dma(hwdev
, virt_to_phys(address
));
141 static bool no_iotlb_memory
;
143 void swiotlb_print_info(void)
145 unsigned long bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
146 unsigned char *vstart
, *vend
;
148 if (no_iotlb_memory
) {
149 pr_warn("software IO TLB: No low mem\n");
153 vstart
= phys_to_virt(io_tlb_start
);
154 vend
= phys_to_virt(io_tlb_end
);
156 printk(KERN_ALERT
"software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
157 (unsigned long long)io_tlb_start
,
158 (unsigned long long)io_tlb_end
,
159 bytes
>> 20, vstart
, vend
- 1);
162 int __init
swiotlb_init_with_tbl(char *tlb
, unsigned long nslabs
, int verbose
)
164 void *v_overflow_buffer
;
165 unsigned long i
, bytes
;
167 bytes
= nslabs
<< IO_TLB_SHIFT
;
169 io_tlb_nslabs
= nslabs
;
170 io_tlb_start
= __pa(tlb
);
171 io_tlb_end
= io_tlb_start
+ bytes
;
174 * Get the overflow emergency buffer
176 v_overflow_buffer
= alloc_bootmem_low_pages_nopanic(
177 PAGE_ALIGN(io_tlb_overflow
));
178 if (!v_overflow_buffer
)
181 io_tlb_overflow_buffer
= __pa(v_overflow_buffer
);
184 * Allocate and initialize the free list array. This array is used
185 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
186 * between io_tlb_start and io_tlb_end.
188 io_tlb_list
= alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)));
189 for (i
= 0; i
< io_tlb_nslabs
; i
++)
190 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
192 io_tlb_orig_addr
= alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)));
195 swiotlb_print_info();
201 * Statically reserve bounce buffer space and initialize bounce buffer data
202 * structures for the software IO TLB used to implement the DMA API.
205 swiotlb_init(int verbose
)
207 size_t default_size
= IO_TLB_DEFAULT_SIZE
;
208 unsigned char *vstart
;
211 if (!io_tlb_nslabs
) {
212 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
213 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
216 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
218 /* Get IO TLB memory from the low pages */
219 vstart
= alloc_bootmem_low_pages_nopanic(PAGE_ALIGN(bytes
));
220 if (vstart
&& !swiotlb_init_with_tbl(vstart
, io_tlb_nslabs
, verbose
))
224 free_bootmem(io_tlb_start
,
225 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
226 pr_warn("Cannot allocate SWIOTLB buffer");
227 no_iotlb_memory
= true;
231 * Systems with larger DMA zones (those that don't support ISA) can
232 * initialize the swiotlb later using the slab allocator if needed.
233 * This should be just like above, but with some error catching.
236 swiotlb_late_init_with_default_size(size_t default_size
)
238 unsigned long bytes
, req_nslabs
= io_tlb_nslabs
;
239 unsigned char *vstart
= NULL
;
243 if (!io_tlb_nslabs
) {
244 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
245 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
249 * Get IO TLB memory from the low pages
251 order
= get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
);
252 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
253 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
255 while ((SLABS_PER_PAGE
<< order
) > IO_TLB_MIN_SLABS
) {
256 vstart
= (void *)__get_free_pages(GFP_DMA
| __GFP_NOWARN
,
264 io_tlb_nslabs
= req_nslabs
;
267 if (order
!= get_order(bytes
)) {
268 printk(KERN_WARNING
"Warning: only able to allocate %ld MB "
269 "for software IO TLB\n", (PAGE_SIZE
<< order
) >> 20);
270 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
272 rc
= swiotlb_late_init_with_tbl(vstart
, io_tlb_nslabs
);
274 free_pages((unsigned long)vstart
, order
);
279 swiotlb_late_init_with_tbl(char *tlb
, unsigned long nslabs
)
281 unsigned long i
, bytes
;
282 unsigned char *v_overflow_buffer
;
284 bytes
= nslabs
<< IO_TLB_SHIFT
;
286 io_tlb_nslabs
= nslabs
;
287 io_tlb_start
= virt_to_phys(tlb
);
288 io_tlb_end
= io_tlb_start
+ bytes
;
290 memset(tlb
, 0, bytes
);
293 * Get the overflow emergency buffer
295 v_overflow_buffer
= (void *)__get_free_pages(GFP_DMA
,
296 get_order(io_tlb_overflow
));
297 if (!v_overflow_buffer
)
300 io_tlb_overflow_buffer
= virt_to_phys(v_overflow_buffer
);
303 * Allocate and initialize the free list array. This array is used
304 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
305 * between io_tlb_start and io_tlb_end.
307 io_tlb_list
= (unsigned int *)__get_free_pages(GFP_KERNEL
,
308 get_order(io_tlb_nslabs
* sizeof(int)));
312 for (i
= 0; i
< io_tlb_nslabs
; i
++)
313 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
316 io_tlb_orig_addr
= (phys_addr_t
*)
317 __get_free_pages(GFP_KERNEL
,
318 get_order(io_tlb_nslabs
*
319 sizeof(phys_addr_t
)));
320 if (!io_tlb_orig_addr
)
323 memset(io_tlb_orig_addr
, 0, io_tlb_nslabs
* sizeof(phys_addr_t
));
325 swiotlb_print_info();
332 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
336 free_pages((unsigned long)v_overflow_buffer
,
337 get_order(io_tlb_overflow
));
338 io_tlb_overflow_buffer
= 0;
346 void __init
swiotlb_free(void)
348 if (!io_tlb_orig_addr
)
352 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer
),
353 get_order(io_tlb_overflow
));
354 free_pages((unsigned long)io_tlb_orig_addr
,
355 get_order(io_tlb_nslabs
* sizeof(phys_addr_t
)));
356 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
358 free_pages((unsigned long)phys_to_virt(io_tlb_start
),
359 get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
));
361 free_bootmem_late(io_tlb_overflow_buffer
,
362 PAGE_ALIGN(io_tlb_overflow
));
363 free_bootmem_late(__pa(io_tlb_orig_addr
),
364 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)));
365 free_bootmem_late(__pa(io_tlb_list
),
366 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)));
367 free_bootmem_late(io_tlb_start
,
368 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
373 static int is_swiotlb_buffer(phys_addr_t paddr
)
375 return paddr
>= io_tlb_start
&& paddr
< io_tlb_end
;
379 * Bounce: copy the swiotlb buffer back to the original dma location
381 static void swiotlb_bounce(phys_addr_t orig_addr
, phys_addr_t tlb_addr
,
382 size_t size
, enum dma_data_direction dir
)
384 unsigned long pfn
= PFN_DOWN(orig_addr
);
385 unsigned char *vaddr
= phys_to_virt(tlb_addr
);
387 if (PageHighMem(pfn_to_page(pfn
))) {
388 /* The buffer does not have a mapping. Map it in and copy */
389 unsigned int offset
= orig_addr
& ~PAGE_MASK
;
395 sz
= min_t(size_t, PAGE_SIZE
- offset
, size
);
397 local_irq_save(flags
);
398 buffer
= kmap_atomic(pfn_to_page(pfn
));
399 if (dir
== DMA_TO_DEVICE
)
400 memcpy(vaddr
, buffer
+ offset
, sz
);
402 memcpy(buffer
+ offset
, vaddr
, sz
);
403 kunmap_atomic(buffer
);
404 local_irq_restore(flags
);
411 } else if (dir
== DMA_TO_DEVICE
) {
412 memcpy(vaddr
, phys_to_virt(orig_addr
), size
);
414 memcpy(phys_to_virt(orig_addr
), vaddr
, size
);
418 phys_addr_t
swiotlb_tbl_map_single(struct device
*hwdev
,
419 dma_addr_t tbl_dma_addr
,
420 phys_addr_t orig_addr
, size_t size
,
421 enum dma_data_direction dir
)
424 phys_addr_t tlb_addr
;
425 unsigned int nslots
, stride
, index
, wrap
;
428 unsigned long offset_slots
;
429 unsigned long max_slots
;
432 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
434 mask
= dma_get_seg_boundary(hwdev
);
436 tbl_dma_addr
&= mask
;
438 offset_slots
= ALIGN(tbl_dma_addr
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
441 * Carefully handle integer overflow which can occur when mask == ~0UL.
444 ? ALIGN(mask
+ 1, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
445 : 1UL << (BITS_PER_LONG
- IO_TLB_SHIFT
);
448 * For mappings greater than a page, we limit the stride (and
449 * hence alignment) to a page size.
451 nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
452 if (size
> PAGE_SIZE
)
453 stride
= (1 << (PAGE_SHIFT
- IO_TLB_SHIFT
));
460 * Find suitable number of IO TLB entries size that will fit this
461 * request and allocate a buffer from that IO TLB pool.
463 spin_lock_irqsave(&io_tlb_lock
, flags
);
464 index
= ALIGN(io_tlb_index
, stride
);
465 if (index
>= io_tlb_nslabs
)
470 while (iommu_is_span_boundary(index
, nslots
, offset_slots
,
473 if (index
>= io_tlb_nslabs
)
480 * If we find a slot that indicates we have 'nslots' number of
481 * contiguous buffers, we allocate the buffers from that slot
482 * and mark the entries as '0' indicating unavailable.
484 if (io_tlb_list
[index
] >= nslots
) {
487 for (i
= index
; i
< (int) (index
+ nslots
); i
++)
489 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
- 1) && io_tlb_list
[i
]; i
--)
490 io_tlb_list
[i
] = ++count
;
491 tlb_addr
= io_tlb_start
+ (index
<< IO_TLB_SHIFT
);
494 * Update the indices to avoid searching in the next
497 io_tlb_index
= ((index
+ nslots
) < io_tlb_nslabs
498 ? (index
+ nslots
) : 0);
503 if (index
>= io_tlb_nslabs
)
505 } while (index
!= wrap
);
508 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
509 return SWIOTLB_MAP_ERROR
;
511 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
514 * Save away the mapping from the original address to the DMA address.
515 * This is needed when we sync the memory. Then we sync the buffer if
518 for (i
= 0; i
< nslots
; i
++)
519 io_tlb_orig_addr
[index
+i
] = orig_addr
+ (i
<< IO_TLB_SHIFT
);
520 if (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
521 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_TO_DEVICE
);
525 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single
);
528 * Allocates bounce buffer and returns its kernel virtual address.
531 phys_addr_t
map_single(struct device
*hwdev
, phys_addr_t phys
, size_t size
,
532 enum dma_data_direction dir
)
534 dma_addr_t start_dma_addr
= phys_to_dma(hwdev
, io_tlb_start
);
536 return swiotlb_tbl_map_single(hwdev
, start_dma_addr
, phys
, size
, dir
);
540 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
542 void swiotlb_tbl_unmap_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
543 size_t size
, enum dma_data_direction dir
)
546 int i
, count
, nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
547 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
548 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
551 * First, sync the memory before unmapping the entry
553 if (orig_addr
&& ((dir
== DMA_FROM_DEVICE
) || (dir
== DMA_BIDIRECTIONAL
)))
554 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_FROM_DEVICE
);
557 * Return the buffer to the free list by setting the corresponding
558 * entries to indicate the number of contiguous entries available.
559 * While returning the entries to the free list, we merge the entries
560 * with slots below and above the pool being returned.
562 spin_lock_irqsave(&io_tlb_lock
, flags
);
564 count
= ((index
+ nslots
) < ALIGN(index
+ 1, IO_TLB_SEGSIZE
) ?
565 io_tlb_list
[index
+ nslots
] : 0);
567 * Step 1: return the slots to the free list, merging the
568 * slots with superceeding slots
570 for (i
= index
+ nslots
- 1; i
>= index
; i
--)
571 io_tlb_list
[i
] = ++count
;
573 * Step 2: merge the returned slots with the preceding slots,
574 * if available (non zero)
576 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
577 io_tlb_list
[i
] = ++count
;
579 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
581 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single
);
583 void swiotlb_tbl_sync_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
584 size_t size
, enum dma_data_direction dir
,
585 enum dma_sync_target target
)
587 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
588 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
590 orig_addr
+= (unsigned long)tlb_addr
& ((1 << IO_TLB_SHIFT
) - 1);
594 if (likely(dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
595 swiotlb_bounce(orig_addr
, tlb_addr
,
596 size
, DMA_FROM_DEVICE
);
598 BUG_ON(dir
!= DMA_TO_DEVICE
);
600 case SYNC_FOR_DEVICE
:
601 if (likely(dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
602 swiotlb_bounce(orig_addr
, tlb_addr
,
603 size
, DMA_TO_DEVICE
);
605 BUG_ON(dir
!= DMA_FROM_DEVICE
);
611 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single
);
614 swiotlb_alloc_coherent(struct device
*hwdev
, size_t size
,
615 dma_addr_t
*dma_handle
, gfp_t flags
)
619 int order
= get_order(size
);
620 u64 dma_mask
= DMA_BIT_MASK(32);
622 if (hwdev
&& hwdev
->coherent_dma_mask
)
623 dma_mask
= hwdev
->coherent_dma_mask
;
625 ret
= (void *)__get_free_pages(flags
, order
);
627 dev_addr
= swiotlb_virt_to_bus(hwdev
, ret
);
628 if (dev_addr
+ size
- 1 > dma_mask
) {
630 * The allocated memory isn't reachable by the device.
632 free_pages((unsigned long) ret
, order
);
638 * We are either out of memory or the device can't DMA to
639 * GFP_DMA memory; fall back on map_single(), which
640 * will grab memory from the lowest available address range.
642 phys_addr_t paddr
= map_single(hwdev
, 0, size
, DMA_FROM_DEVICE
);
643 if (paddr
== SWIOTLB_MAP_ERROR
)
646 ret
= phys_to_virt(paddr
);
647 dev_addr
= phys_to_dma(hwdev
, paddr
);
649 /* Confirm address can be DMA'd by device */
650 if (dev_addr
+ size
- 1 > dma_mask
) {
651 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
652 (unsigned long long)dma_mask
,
653 (unsigned long long)dev_addr
);
655 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
656 swiotlb_tbl_unmap_single(hwdev
, paddr
,
657 size
, DMA_TO_DEVICE
);
662 *dma_handle
= dev_addr
;
663 memset(ret
, 0, size
);
667 EXPORT_SYMBOL(swiotlb_alloc_coherent
);
670 swiotlb_free_coherent(struct device
*hwdev
, size_t size
, void *vaddr
,
673 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
675 WARN_ON(irqs_disabled());
676 if (!is_swiotlb_buffer(paddr
))
677 free_pages((unsigned long)vaddr
, get_order(size
));
679 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
680 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, DMA_TO_DEVICE
);
682 EXPORT_SYMBOL(swiotlb_free_coherent
);
685 swiotlb_full(struct device
*dev
, size_t size
, enum dma_data_direction dir
,
689 * Ran out of IOMMU space for this operation. This is very bad.
690 * Unfortunately the drivers cannot handle this operation properly.
691 * unless they check for dma_mapping_error (most don't)
692 * When the mapping is small enough return a static buffer to limit
693 * the damage, or panic when the transfer is too big.
695 printk(KERN_ERR
"DMA: Out of SW-IOMMU space for %zu bytes at "
696 "device %s\n", size
, dev
? dev_name(dev
) : "?");
699 if (size
<= io_tlb_overflow
|| !do_panic
)
702 if (dir
== DMA_BIDIRECTIONAL
)
703 panic("DMA: Random memory could be DMA accessed\n");
704 if (dir
== DMA_FROM_DEVICE
)
705 panic("DMA: Random memory could be DMA written\n");
706 if (dir
== DMA_TO_DEVICE
)
707 panic("DMA: Random memory could be DMA read\n");
711 * Map a single buffer of the indicated size for DMA in streaming mode. The
712 * physical address to use is returned.
714 * Once the device is given the dma address, the device owns this memory until
715 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
717 dma_addr_t
swiotlb_map_page(struct device
*dev
, struct page
*page
,
718 unsigned long offset
, size_t size
,
719 enum dma_data_direction dir
,
720 struct dma_attrs
*attrs
)
722 phys_addr_t map
, phys
= page_to_phys(page
) + offset
;
723 dma_addr_t dev_addr
= phys_to_dma(dev
, phys
);
725 BUG_ON(dir
== DMA_NONE
);
727 * If the address happens to be in the device's DMA window,
728 * we can safely return the device addr and not worry about bounce
731 if (dma_capable(dev
, dev_addr
, size
) && !swiotlb_force
)
734 /* Oh well, have to allocate and map a bounce buffer. */
735 map
= map_single(dev
, phys
, size
, dir
);
736 if (map
== SWIOTLB_MAP_ERROR
) {
737 swiotlb_full(dev
, size
, dir
, 1);
738 return phys_to_dma(dev
, io_tlb_overflow_buffer
);
741 dev_addr
= phys_to_dma(dev
, map
);
743 /* Ensure that the address returned is DMA'ble */
744 if (!dma_capable(dev
, dev_addr
, size
)) {
745 swiotlb_tbl_unmap_single(dev
, map
, size
, dir
);
746 return phys_to_dma(dev
, io_tlb_overflow_buffer
);
751 EXPORT_SYMBOL_GPL(swiotlb_map_page
);
754 * Unmap a single streaming mode DMA translation. The dma_addr and size must
755 * match what was provided for in a previous swiotlb_map_page call. All
756 * other usages are undefined.
758 * After this call, reads by the cpu to the buffer are guaranteed to see
759 * whatever the device wrote there.
761 static void unmap_single(struct device
*hwdev
, dma_addr_t dev_addr
,
762 size_t size
, enum dma_data_direction dir
)
764 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
766 BUG_ON(dir
== DMA_NONE
);
768 if (is_swiotlb_buffer(paddr
)) {
769 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, dir
);
773 if (dir
!= DMA_FROM_DEVICE
)
777 * phys_to_virt doesn't work with hihgmem page but we could
778 * call dma_mark_clean() with hihgmem page here. However, we
779 * are fine since dma_mark_clean() is null on POWERPC. We can
780 * make dma_mark_clean() take a physical address if necessary.
782 dma_mark_clean(phys_to_virt(paddr
), size
);
785 void swiotlb_unmap_page(struct device
*hwdev
, dma_addr_t dev_addr
,
786 size_t size
, enum dma_data_direction dir
,
787 struct dma_attrs
*attrs
)
789 unmap_single(hwdev
, dev_addr
, size
, dir
);
791 EXPORT_SYMBOL_GPL(swiotlb_unmap_page
);
794 * Make physical memory consistent for a single streaming mode DMA translation
797 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
798 * using the cpu, yet do not wish to teardown the dma mapping, you must
799 * call this function before doing so. At the next point you give the dma
800 * address back to the card, you must first perform a
801 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
804 swiotlb_sync_single(struct device
*hwdev
, dma_addr_t dev_addr
,
805 size_t size
, enum dma_data_direction dir
,
806 enum dma_sync_target target
)
808 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
810 BUG_ON(dir
== DMA_NONE
);
812 if (is_swiotlb_buffer(paddr
)) {
813 swiotlb_tbl_sync_single(hwdev
, paddr
, size
, dir
, target
);
817 if (dir
!= DMA_FROM_DEVICE
)
820 dma_mark_clean(phys_to_virt(paddr
), size
);
824 swiotlb_sync_single_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
825 size_t size
, enum dma_data_direction dir
)
827 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_CPU
);
829 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu
);
832 swiotlb_sync_single_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
833 size_t size
, enum dma_data_direction dir
)
835 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_DEVICE
);
837 EXPORT_SYMBOL(swiotlb_sync_single_for_device
);
840 * Map a set of buffers described by scatterlist in streaming mode for DMA.
841 * This is the scatter-gather version of the above swiotlb_map_page
842 * interface. Here the scatter gather list elements are each tagged with the
843 * appropriate dma address and length. They are obtained via
844 * sg_dma_{address,length}(SG).
846 * NOTE: An implementation may be able to use a smaller number of
847 * DMA address/length pairs than there are SG table elements.
848 * (for example via virtual mapping capabilities)
849 * The routine returns the number of addr/length pairs actually
850 * used, at most nents.
852 * Device ownership issues as mentioned above for swiotlb_map_page are the
856 swiotlb_map_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
857 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
859 struct scatterlist
*sg
;
862 BUG_ON(dir
== DMA_NONE
);
864 for_each_sg(sgl
, sg
, nelems
, i
) {
865 phys_addr_t paddr
= sg_phys(sg
);
866 dma_addr_t dev_addr
= phys_to_dma(hwdev
, paddr
);
869 !dma_capable(hwdev
, dev_addr
, sg
->length
)) {
870 phys_addr_t map
= map_single(hwdev
, sg_phys(sg
),
872 if (map
== SWIOTLB_MAP_ERROR
) {
873 /* Don't panic here, we expect map_sg users
874 to do proper error handling. */
875 swiotlb_full(hwdev
, sg
->length
, dir
, 0);
876 swiotlb_unmap_sg_attrs(hwdev
, sgl
, i
, dir
,
878 sgl
[0].dma_length
= 0;
881 sg
->dma_address
= phys_to_dma(hwdev
, map
);
883 sg
->dma_address
= dev_addr
;
884 sg
->dma_length
= sg
->length
;
888 EXPORT_SYMBOL(swiotlb_map_sg_attrs
);
891 swiotlb_map_sg(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
892 enum dma_data_direction dir
)
894 return swiotlb_map_sg_attrs(hwdev
, sgl
, nelems
, dir
, NULL
);
896 EXPORT_SYMBOL(swiotlb_map_sg
);
899 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
900 * concerning calls here are the same as for swiotlb_unmap_page() above.
903 swiotlb_unmap_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
,
904 int nelems
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
906 struct scatterlist
*sg
;
909 BUG_ON(dir
== DMA_NONE
);
911 for_each_sg(sgl
, sg
, nelems
, i
)
912 unmap_single(hwdev
, sg
->dma_address
, sg
->dma_length
, dir
);
915 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs
);
918 swiotlb_unmap_sg(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
919 enum dma_data_direction dir
)
921 return swiotlb_unmap_sg_attrs(hwdev
, sgl
, nelems
, dir
, NULL
);
923 EXPORT_SYMBOL(swiotlb_unmap_sg
);
926 * Make physical memory consistent for a set of streaming mode DMA translations
929 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
933 swiotlb_sync_sg(struct device
*hwdev
, struct scatterlist
*sgl
,
934 int nelems
, enum dma_data_direction dir
,
935 enum dma_sync_target target
)
937 struct scatterlist
*sg
;
940 for_each_sg(sgl
, sg
, nelems
, i
)
941 swiotlb_sync_single(hwdev
, sg
->dma_address
,
942 sg
->dma_length
, dir
, target
);
946 swiotlb_sync_sg_for_cpu(struct device
*hwdev
, struct scatterlist
*sg
,
947 int nelems
, enum dma_data_direction dir
)
949 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_CPU
);
951 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu
);
954 swiotlb_sync_sg_for_device(struct device
*hwdev
, struct scatterlist
*sg
,
955 int nelems
, enum dma_data_direction dir
)
957 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_DEVICE
);
959 EXPORT_SYMBOL(swiotlb_sync_sg_for_device
);
962 swiotlb_dma_mapping_error(struct device
*hwdev
, dma_addr_t dma_addr
)
964 return (dma_addr
== phys_to_dma(hwdev
, io_tlb_overflow_buffer
));
966 EXPORT_SYMBOL(swiotlb_dma_mapping_error
);
969 * Return whether the given device DMA address mask can be supported
970 * properly. For example, if your device can only drive the low 24-bits
971 * during bus mastering, then you would pass 0x00ffffff as the mask to
975 swiotlb_dma_supported(struct device
*hwdev
, u64 mask
)
977 return phys_to_dma(hwdev
, io_tlb_end
- 1) <= mask
;
979 EXPORT_SYMBOL(swiotlb_dma_supported
);