include/media/s5p_fimc.h

   1 /*
   2  * Samsung S5P/Exynos4 SoC series camera interface driver header
   3  *
   4  * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
   5  * Sylwester Nawrocki <s.nawrocki@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #ifndef S5P_FIMC_H_
  13 #define S5P_FIMC_H_
  14
  15 #include <media/media-entity.h>
  16 #include <media/v4l2-mediabus.h>
  17
  18 /*
  19  * Enumeration of data inputs to the camera subsystem.
  20  */
  21 enum fimc_input {
  22         FIMC_INPUT_PARALLEL_0   = 1,
  23         FIMC_INPUT_PARALLEL_1,
  24         FIMC_INPUT_MIPI_CSI2_0  = 3,
  25         FIMC_INPUT_MIPI_CSI2_1,
  26         FIMC_INPUT_WRITEBACK_A  = 5,
  27         FIMC_INPUT_WRITEBACK_B,
  28         FIMC_INPUT_WRITEBACK_ISP = 5,
  29 };
  30
  31 /*
  32  * Enumeration of the FIMC data bus types.
  33  */
  34 enum fimc_bus_type {
  35         /* Camera parallel bus */
  36         FIMC_BUS_TYPE_ITU_601 = 1,
  37         /* Camera parallel bus with embedded synchronization */
  38         FIMC_BUS_TYPE_ITU_656,
  39         /* Camera MIPI-CSI2 serial bus */
  40         FIMC_BUS_TYPE_MIPI_CSI2,
  41         /* FIFO link from LCD controller (WriteBack A) */
  42         FIMC_BUS_TYPE_LCD_WRITEBACK_A,
  43         /* FIFO link from LCD controller (WriteBack B) */
  44         FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  45         /* FIFO link from FIMC-IS */
  46         FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  47 };
  48
  49 #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
  50 #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
  51
  52 /*
  53  * The subdevices' group IDs.
  54  */
  55 #define GRP_ID_SENSOR           (1 << 8)
  56 #define GRP_ID_FIMC_IS_SENSOR   (1 << 9)
  57 #define GRP_ID_WRITEBACK        (1 << 10)
  58 #define GRP_ID_CSIS             (1 << 11)
  59 #define GRP_ID_FIMC             (1 << 12)
  60 #define GRP_ID_FLITE            (1 << 13)
  61 #define GRP_ID_FIMC_IS          (1 << 14)
  62
  63 struct i2c_board_info;
  64
  65 /**
  66  * struct fimc_source_info - video source description required for the host
  67  *                           interface configuration
  68  *
  69  * @board_info: pointer to I2C subdevice's board info
  70  * @clk_frequency: frequency of the clock the host interface provides to sensor
  71  * @fimc_bus_type: FIMC camera input type
  72  * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
  73  * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
  74  * @i2c_bus_num: i2c control bus id the sensor is attached to
  75  * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
  76  * @clk_id: index of the SoC peripheral clock for sensors
  77  */
  78 struct fimc_source_info {
  79         struct i2c_board_info *board_info;
  80         unsigned long clk_frequency;
  81         enum fimc_bus_type fimc_bus_type;
  82         enum fimc_bus_type sensor_bus_type;
  83         u16 flags;
  84         u16 i2c_bus_num;
  85         u16 mux_id;
  86         u8 clk_id;
  87 };
  88
  89 /**
  90  * struct s5p_platform_fimc - camera host interface platform data
  91  *
  92  * @source_info: properties of an image source for the host interface setup
  93  * @num_clients: the number of attached image sources
  94  */
  95 struct s5p_platform_fimc {
  96         struct fimc_source_info *source_info;
  97         int num_clients;
  98 };
  99
 100 /*
 101  * v4l2_device notification id. This is only for internal use in the kernel.
 102  * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
 103  * frame capture mode when there is only one VSYNC pulse issued by the sensor
 104  * at begining of the frame transmission.
 105  */
 106 #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
 107
 108 #define FIMC_MAX_PLANES 3
 109
 110 /**
 111  * struct fimc_fmt - color format data structure
 112  * @mbus_code: media bus pixel code, -1 if not applicable
 113  * @name: format description
 114  * @fourcc: fourcc code for this format, 0 if not applicable
 115  * @color: the driver's private color format id
 116  * @memplanes: number of physically non-contiguous data planes
 117  * @colplanes: number of physically contiguous data planes
 118  * @depth: per plane driver's private 'number of bits per pixel'
 119  * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
 120  * @flags: flags indicating which operation mode format applies to
 121  */
 122 struct fimc_fmt {
 123         enum v4l2_mbus_pixelcode mbus_code;
 124         char    *name;
 125         u32     fourcc;
 126         u32     color;
 127         u16     memplanes;
 128         u16     colplanes;
 129         u8      depth[FIMC_MAX_PLANES];
 130         u16     mdataplanes;
 131         u16     flags;
 132 #define FMT_FLAGS_CAM           (1 << 0)
 133 #define FMT_FLAGS_M2M_IN        (1 << 1)
 134 #define FMT_FLAGS_M2M_OUT       (1 << 2)
 135 #define FMT_FLAGS_M2M           (1 << 1 | 1 << 2)
 136 #define FMT_HAS_ALPHA           (1 << 3)
 137 #define FMT_FLAGS_COMPRESSED    (1 << 4)
 138 #define FMT_FLAGS_WRITEBACK     (1 << 5)
 139 #define FMT_FLAGS_RAW_BAYER     (1 << 6)
 140 #define FMT_FLAGS_YUV           (1 << 7)
 141 };
 142
 143 enum fimc_subdev_index {
 144         IDX_SENSOR,
 145         IDX_CSIS,
 146         IDX_FLITE,
 147         IDX_IS_ISP,
 148         IDX_FIMC,
 149         IDX_MAX,
 150 };
 151
 152 struct media_pipeline;
 153 struct v4l2_subdev;
 154
 155 struct fimc_pipeline {
 156         struct v4l2_subdev *subdevs[IDX_MAX];
 157         struct media_pipeline *m_pipeline;
 158 };
 159
 160 /*
 161  * Media pipeline operations to be called from within the fimc(-lite)
 162  * video node when it is the last entity of the pipeline. Implemented
 163  * by corresponding media device driver.
 164  */
 165 struct fimc_pipeline_ops {
 166         int (*open)(struct fimc_pipeline *p, struct media_entity *me,
 167                           bool resume);
 168         int (*close)(struct fimc_pipeline *p);
 169         int (*set_stream)(struct fimc_pipeline *p, bool state);
 170 };
 171
 172 #define fimc_pipeline_call(f, op, p, args...)                           \
 173         (!(f) ? -ENODEV : (((f)->pipeline_ops && (f)->pipeline_ops->op) ? \
 174                             (f)->pipeline_ops->op((p), ##args) : -ENOIOCTLCMD))
 175
 176 #endif /* S5P_FIMC_H_ */