Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-x86 / xen / interface.h
1 /******************************************************************************
2 * arch-x86_32.h
3 *
4 * Guest OS interface to x86 32-bit Xen.
5 *
6 * Copyright (c) 2004, K A Fraser
7 */
8
9 #ifndef __XEN_PUBLIC_ARCH_X86_32_H__
10 #define __XEN_PUBLIC_ARCH_X86_32_H__
11
12 #ifdef __XEN__
13 #define __DEFINE_GUEST_HANDLE(name, type) \
14 typedef struct { type *p; } __guest_handle_ ## name
15 #else
16 #define __DEFINE_GUEST_HANDLE(name, type) \
17 typedef type * __guest_handle_ ## name
18 #endif
19
20 #define DEFINE_GUEST_HANDLE_STRUCT(name) \
21 __DEFINE_GUEST_HANDLE(name, struct name)
22 #define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name)
23 #define GUEST_HANDLE(name) __guest_handle_ ## name
24
25 #ifndef __ASSEMBLY__
26 /* Guest handles for primitive C types. */
27 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
28 __DEFINE_GUEST_HANDLE(uint, unsigned int);
29 __DEFINE_GUEST_HANDLE(ulong, unsigned long);
30 DEFINE_GUEST_HANDLE(char);
31 DEFINE_GUEST_HANDLE(int);
32 DEFINE_GUEST_HANDLE(long);
33 DEFINE_GUEST_HANDLE(void);
34 #endif
35
36 /*
37 * SEGMENT DESCRIPTOR TABLES
38 */
39 /*
40 * A number of GDT entries are reserved by Xen. These are not situated at the
41 * start of the GDT because some stupid OSes export hard-coded selector values
42 * in their ABI. These hard-coded values are always near the start of the GDT,
43 * so Xen places itself out of the way, at the far end of the GDT.
44 */
45 #define FIRST_RESERVED_GDT_PAGE 14
46 #define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096)
47 #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
48
49 /*
50 * These flat segments are in the Xen-private section of every GDT. Since these
51 * are also present in the initial GDT, many OSes will be able to avoid
52 * installing their own GDT.
53 */
54 #define FLAT_RING1_CS 0xe019 /* GDT index 259 */
55 #define FLAT_RING1_DS 0xe021 /* GDT index 260 */
56 #define FLAT_RING1_SS 0xe021 /* GDT index 260 */
57 #define FLAT_RING3_CS 0xe02b /* GDT index 261 */
58 #define FLAT_RING3_DS 0xe033 /* GDT index 262 */
59 #define FLAT_RING3_SS 0xe033 /* GDT index 262 */
60
61 #define FLAT_KERNEL_CS FLAT_RING1_CS
62 #define FLAT_KERNEL_DS FLAT_RING1_DS
63 #define FLAT_KERNEL_SS FLAT_RING1_SS
64 #define FLAT_USER_CS FLAT_RING3_CS
65 #define FLAT_USER_DS FLAT_RING3_DS
66 #define FLAT_USER_SS FLAT_RING3_SS
67
68 /* And the trap vector is... */
69 #define TRAP_INSTR "int $0x82"
70
71 /*
72 * Virtual addresses beyond this are not modifiable by guest OSes. The
73 * machine->physical mapping table starts at this address, read-only.
74 */
75 #ifdef CONFIG_X86_PAE
76 #define __HYPERVISOR_VIRT_START 0xF5800000
77 #else
78 #define __HYPERVISOR_VIRT_START 0xFC000000
79 #endif
80
81 #ifndef HYPERVISOR_VIRT_START
82 #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
83 #endif
84
85 #ifndef machine_to_phys_mapping
86 #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
87 #endif
88
89 /* Maximum number of virtual CPUs in multi-processor guests. */
90 #define MAX_VIRT_CPUS 32
91
92 #ifndef __ASSEMBLY__
93
94 /*
95 * Send an array of these to HYPERVISOR_set_trap_table()
96 */
97 #define TI_GET_DPL(_ti) ((_ti)->flags & 3)
98 #define TI_GET_IF(_ti) ((_ti)->flags & 4)
99 #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl))
100 #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2))
101
102 struct trap_info {
103 uint8_t vector; /* exception vector */
104 uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
105 uint16_t cs; /* code selector */
106 unsigned long address; /* code offset */
107 };
108 DEFINE_GUEST_HANDLE_STRUCT(trap_info);
109
110 struct cpu_user_regs {
111 uint32_t ebx;
112 uint32_t ecx;
113 uint32_t edx;
114 uint32_t esi;
115 uint32_t edi;
116 uint32_t ebp;
117 uint32_t eax;
118 uint16_t error_code; /* private */
119 uint16_t entry_vector; /* private */
120 uint32_t eip;
121 uint16_t cs;
122 uint8_t saved_upcall_mask;
123 uint8_t _pad0;
124 uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
125 uint32_t esp;
126 uint16_t ss, _pad1;
127 uint16_t es, _pad2;
128 uint16_t ds, _pad3;
129 uint16_t fs, _pad4;
130 uint16_t gs, _pad5;
131 };
132 DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs);
133
134 typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
135
136 /*
137 * The following is all CPU context. Note that the fpu_ctxt block is filled
138 * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
139 */
140 struct vcpu_guest_context {
141 /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
142 struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */
143 #define VGCF_I387_VALID (1<<0)
144 #define VGCF_HVM_GUEST (1<<1)
145 #define VGCF_IN_KERNEL (1<<2)
146 unsigned long flags; /* VGCF_* flags */
147 struct cpu_user_regs user_regs; /* User-level CPU registers */
148 struct trap_info trap_ctxt[256]; /* Virtual IDT */
149 unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */
150 unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
151 unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */
152 unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
153 unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */
154 unsigned long event_callback_cs; /* CS:EIP of event callback */
155 unsigned long event_callback_eip;
156 unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */
157 unsigned long failsafe_callback_eip;
158 unsigned long vm_assist; /* VMASST_TYPE_* bitmap */
159 };
160 DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context);
161
162 struct arch_shared_info {
163 unsigned long max_pfn; /* max pfn that appears in table */
164 /* Frame containing list of mfns containing list of mfns containing p2m. */
165 unsigned long pfn_to_mfn_frame_list_list;
166 unsigned long nmi_reason;
167 };
168
169 struct arch_vcpu_info {
170 unsigned long cr2;
171 unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */
172 };
173
174 #endif /* !__ASSEMBLY__ */
175
176 /*
177 * Prefix forces emulation of some non-trapping instructions.
178 * Currently only CPUID.
179 */
180 #ifdef __ASSEMBLY__
181 #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ;
182 #define XEN_CPUID XEN_EMULATE_PREFIX cpuid
183 #else
184 #define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; "
185 #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid"
186 #endif
187
188 #endif