x86: consolidate header guards
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-x86 / kexec.h
1 #ifndef ASM_X86__KEXEC_H
2 #define ASM_X86__KEXEC_H
3
4 #ifdef CONFIG_X86_32
5 # define PA_CONTROL_PAGE 0
6 # define VA_CONTROL_PAGE 1
7 # define PA_PGD 2
8 # define VA_PGD 3
9 # define PA_PTE_0 4
10 # define VA_PTE_0 5
11 # define PA_PTE_1 6
12 # define VA_PTE_1 7
13 # ifdef CONFIG_X86_PAE
14 # define PA_PMD_0 8
15 # define VA_PMD_0 9
16 # define PA_PMD_1 10
17 # define VA_PMD_1 11
18 # define PAGES_NR 12
19 # else
20 # define PAGES_NR 8
21 # endif
22 #else
23 # define PA_CONTROL_PAGE 0
24 # define VA_CONTROL_PAGE 1
25 # define PA_PGD 2
26 # define VA_PGD 3
27 # define PA_PUD_0 4
28 # define VA_PUD_0 5
29 # define PA_PMD_0 6
30 # define VA_PMD_0 7
31 # define PA_PTE_0 8
32 # define VA_PTE_0 9
33 # define PA_PUD_1 10
34 # define VA_PUD_1 11
35 # define PA_PMD_1 12
36 # define VA_PMD_1 13
37 # define PA_PTE_1 14
38 # define VA_PTE_1 15
39 # define PA_TABLE_PAGE 16
40 # define PAGES_NR 17
41 #endif
42
43 #ifndef __ASSEMBLY__
44
45 #include <linux/string.h>
46
47 #include <asm/page.h>
48 #include <asm/ptrace.h>
49
50 /*
51 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
52 * I.e. Maximum page that is mapped directly into kernel memory,
53 * and kmap is not required.
54 *
55 * So far x86_64 is limited to 40 physical address bits.
56 */
57 #ifdef CONFIG_X86_32
58 /* Maximum physical address we can use pages from */
59 # define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
60 /* Maximum address we can reach in physical address mode */
61 # define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
62 /* Maximum address we can use for the control code buffer */
63 # define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
64
65 # define KEXEC_CONTROL_CODE_SIZE 4096
66
67 /* The native architecture */
68 # define KEXEC_ARCH KEXEC_ARCH_386
69
70 /* We can also handle crash dumps from 64 bit kernel. */
71 # define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
72 #else
73 /* Maximum physical address we can use pages from */
74 # define KEXEC_SOURCE_MEMORY_LIMIT (0xFFFFFFFFFFUL)
75 /* Maximum address we can reach in physical address mode */
76 # define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
77 /* Maximum address we can use for the control pages */
78 # define KEXEC_CONTROL_MEMORY_LIMIT (0xFFFFFFFFFFUL)
79
80 /* Allocate one page for the pdp and the second for the code */
81 # define KEXEC_CONTROL_CODE_SIZE (4096UL + 4096UL)
82
83 /* The native architecture */
84 # define KEXEC_ARCH KEXEC_ARCH_X86_64
85 #endif
86
87 /*
88 * CPU does not save ss and sp on stack if execution is already
89 * running in kernel mode at the time of NMI occurrence. This code
90 * fixes it.
91 */
92 static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
93 struct pt_regs *oldregs)
94 {
95 #ifdef CONFIG_X86_32
96 newregs->sp = (unsigned long)&(oldregs->sp);
97 asm volatile("xorl %%eax, %%eax\n\t"
98 "movw %%ss, %%ax\n\t"
99 :"=a"(newregs->ss));
100 #endif
101 }
102
103 /*
104 * This function is responsible for capturing register states if coming
105 * via panic otherwise just fix up the ss and sp if coming via kernel
106 * mode exception.
107 */
108 static inline void crash_setup_regs(struct pt_regs *newregs,
109 struct pt_regs *oldregs)
110 {
111 if (oldregs) {
112 memcpy(newregs, oldregs, sizeof(*newregs));
113 crash_fixup_ss_esp(newregs, oldregs);
114 } else {
115 #ifdef CONFIG_X86_32
116 asm volatile("movl %%ebx,%0" : "=m"(newregs->bx));
117 asm volatile("movl %%ecx,%0" : "=m"(newregs->cx));
118 asm volatile("movl %%edx,%0" : "=m"(newregs->dx));
119 asm volatile("movl %%esi,%0" : "=m"(newregs->si));
120 asm volatile("movl %%edi,%0" : "=m"(newregs->di));
121 asm volatile("movl %%ebp,%0" : "=m"(newregs->bp));
122 asm volatile("movl %%eax,%0" : "=m"(newregs->ax));
123 asm volatile("movl %%esp,%0" : "=m"(newregs->sp));
124 asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
125 asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
126 asm volatile("movl %%ds, %%eax;" :"=a"(newregs->ds));
127 asm volatile("movl %%es, %%eax;" :"=a"(newregs->es));
128 asm volatile("pushfl; popl %0" :"=m"(newregs->flags));
129 #else
130 asm volatile("movq %%rbx,%0" : "=m"(newregs->bx));
131 asm volatile("movq %%rcx,%0" : "=m"(newregs->cx));
132 asm volatile("movq %%rdx,%0" : "=m"(newregs->dx));
133 asm volatile("movq %%rsi,%0" : "=m"(newregs->si));
134 asm volatile("movq %%rdi,%0" : "=m"(newregs->di));
135 asm volatile("movq %%rbp,%0" : "=m"(newregs->bp));
136 asm volatile("movq %%rax,%0" : "=m"(newregs->ax));
137 asm volatile("movq %%rsp,%0" : "=m"(newregs->sp));
138 asm volatile("movq %%r8,%0" : "=m"(newregs->r8));
139 asm volatile("movq %%r9,%0" : "=m"(newregs->r9));
140 asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
141 asm volatile("movq %%r11,%0" : "=m"(newregs->r11));
142 asm volatile("movq %%r12,%0" : "=m"(newregs->r12));
143 asm volatile("movq %%r13,%0" : "=m"(newregs->r13));
144 asm volatile("movq %%r14,%0" : "=m"(newregs->r14));
145 asm volatile("movq %%r15,%0" : "=m"(newregs->r15));
146 asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
147 asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
148 asm volatile("pushfq; popq %0" :"=m"(newregs->flags));
149 #endif
150 newregs->ip = (unsigned long)current_text_addr();
151 }
152 }
153
154 #ifdef CONFIG_X86_32
155 asmlinkage NORET_TYPE void
156 relocate_kernel(unsigned long indirection_page,
157 unsigned long control_page,
158 unsigned long start_address,
159 unsigned int has_pae) ATTRIB_NORET;
160 #else
161 NORET_TYPE void
162 relocate_kernel(unsigned long indirection_page,
163 unsigned long page_list,
164 unsigned long start_address) ATTRIB_NORET;
165 #endif
166
167 #endif /* __ASSEMBLY__ */
168
169 #endif /* ASM_X86__KEXEC_H */