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hw_breakpoint: Use cpu_possible_mask in {reserve,release}_bp_slot()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / ps3fb.c
1 /*
2 * linux/drivers/video/ps3fb.c -- PS3 GPU frame buffer device
3 *
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006, 2007 Sony Corporation
6 *
7 * This file is based on :
8 *
9 * linux/drivers/video/vfb.c -- Virtual frame buffer device
10 *
11 * Copyright (C) 2002 James Simmons
12 *
13 * Copyright (C) 1997 Geert Uytterhoeven
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 */
19
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/mm.h>
25 #include <linux/interrupt.h>
26 #include <linux/console.h>
27 #include <linux/ioctl.h>
28 #include <linux/kthread.h>
29 #include <linux/freezer.h>
30 #include <linux/uaccess.h>
31 #include <linux/fb.h>
32 #include <linux/init.h>
33
34 #include <asm/cell-regs.h>
35 #include <asm/lv1call.h>
36 #include <asm/ps3av.h>
37 #include <asm/ps3fb.h>
38 #include <asm/ps3.h>
39 #include <asm/ps3gpu.h>
40
41
42 #define DEVICE_NAME "ps3fb"
43
44 #define GPU_CMD_BUF_SIZE (2 * 1024 * 1024)
45 #define GPU_FB_START (64 * 1024)
46 #define GPU_IOIF (0x0d000000UL)
47 #define GPU_ALIGN_UP(x) _ALIGN_UP((x), 64)
48 #define GPU_MAX_LINE_LENGTH (65536 - 64)
49
50 #define GPU_INTR_STATUS_VSYNC_0 0 /* vsync on head A */
51 #define GPU_INTR_STATUS_VSYNC_1 1 /* vsync on head B */
52 #define GPU_INTR_STATUS_FLIP_0 3 /* flip head A */
53 #define GPU_INTR_STATUS_FLIP_1 4 /* flip head B */
54 #define GPU_INTR_STATUS_QUEUE_0 5 /* queue head A */
55 #define GPU_INTR_STATUS_QUEUE_1 6 /* queue head B */
56
57 #define GPU_DRIVER_INFO_VERSION 0x211
58
59 /* gpu internals */
60 struct display_head {
61 u64 be_time_stamp;
62 u32 status;
63 u32 offset;
64 u32 res1;
65 u32 res2;
66 u32 field;
67 u32 reserved1;
68
69 u64 res3;
70 u32 raster;
71
72 u64 vblank_count;
73 u32 field_vsync;
74 u32 reserved2;
75 };
76
77 struct gpu_irq {
78 u32 irq_outlet;
79 u32 status;
80 u32 mask;
81 u32 video_cause;
82 u32 graph_cause;
83 u32 user_cause;
84
85 u32 res1;
86 u64 res2;
87
88 u32 reserved[4];
89 };
90
91 struct gpu_driver_info {
92 u32 version_driver;
93 u32 version_gpu;
94 u32 memory_size;
95 u32 hardware_channel;
96
97 u32 nvcore_frequency;
98 u32 memory_frequency;
99
100 u32 reserved[1063];
101 struct display_head display_head[8];
102 struct gpu_irq irq;
103 };
104
105 struct ps3fb_priv {
106 unsigned int irq_no;
107
108 u64 context_handle, memory_handle;
109 struct gpu_driver_info *dinfo;
110
111 u64 vblank_count; /* frame count */
112 wait_queue_head_t wait_vsync;
113
114 atomic_t ext_flip; /* on/off flip with vsync */
115 atomic_t f_count; /* fb_open count */
116 int is_blanked;
117 int is_kicked;
118 struct task_struct *task;
119 };
120 static struct ps3fb_priv ps3fb;
121
122 struct ps3fb_par {
123 u32 pseudo_palette[16];
124 int mode_id, new_mode_id;
125 unsigned int num_frames; /* num of frame buffers */
126 unsigned int width;
127 unsigned int height;
128 unsigned int ddr_line_length;
129 unsigned int ddr_frame_size;
130 unsigned int xdr_frame_size;
131 unsigned int full_offset; /* start of fullscreen DDR fb */
132 unsigned int fb_offset; /* start of actual DDR fb */
133 unsigned int pan_offset;
134 };
135
136
137 #define FIRST_NATIVE_MODE_INDEX 10
138
139 static const struct fb_videomode ps3fb_modedb[] = {
140 /* 60 Hz broadcast modes (modes "1" to "5") */
141 {
142 /* 480i */
143 "480i", 60, 576, 384, 74074, 130, 89, 78, 57, 63, 6,
144 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
145 }, {
146 /* 480p */
147 "480p", 60, 576, 384, 37037, 130, 89, 78, 57, 63, 6,
148 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
149 }, {
150 /* 720p */
151 "720p", 60, 1124, 644, 13481, 298, 148, 57, 44, 80, 5,
152 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
153 }, {
154 /* 1080i */
155 "1080i", 60, 1688, 964, 13481, 264, 160, 94, 62, 88, 5,
156 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
157 }, {
158 /* 1080p */
159 "1080p", 60, 1688, 964, 6741, 264, 160, 94, 62, 88, 5,
160 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
161 },
162
163 /* 50 Hz broadcast modes (modes "6" to "10") */
164 {
165 /* 576i */
166 "576i", 50, 576, 460, 74074, 142, 83, 97, 63, 63, 5,
167 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
168 }, {
169 /* 576p */
170 "576p", 50, 576, 460, 37037, 142, 83, 97, 63, 63, 5,
171 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
172 }, {
173 /* 720p */
174 "720p", 50, 1124, 644, 13468, 298, 478, 57, 44, 80, 5,
175 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
176 }, {
177 /* 1080i */
178 "1080i", 50, 1688, 964, 13468, 264, 600, 94, 62, 88, 5,
179 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
180 }, {
181 /* 1080p */
182 "1080p", 50, 1688, 964, 6734, 264, 600, 94, 62, 88, 5,
183 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
184 },
185
186 [FIRST_NATIVE_MODE_INDEX] =
187 /* 60 Hz broadcast modes (full resolution versions of modes "1" to "5") */
188 {
189 /* 480if */
190 "480if", 60, 720, 480, 74074, 58, 17, 30, 9, 63, 6,
191 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
192 }, {
193 /* 480pf */
194 "480pf", 60, 720, 480, 37037, 58, 17, 30, 9, 63, 6,
195 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
196 }, {
197 /* 720pf */
198 "720pf", 60, 1280, 720, 13481, 220, 70, 19, 6, 80, 5,
199 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
200 }, {
201 /* 1080if */
202 "1080if", 60, 1920, 1080, 13481, 148, 44, 36, 4, 88, 5,
203 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
204 }, {
205 /* 1080pf */
206 "1080pf", 60, 1920, 1080, 6741, 148, 44, 36, 4, 88, 5,
207 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
208 },
209
210 /* 50 Hz broadcast modes (full resolution versions of modes "6" to "10") */
211 {
212 /* 576if */
213 "576if", 50, 720, 576, 74074, 70, 11, 39, 5, 63, 5,
214 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
215 }, {
216 /* 576pf */
217 "576pf", 50, 720, 576, 37037, 70, 11, 39, 5, 63, 5,
218 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
219 }, {
220 /* 720pf */
221 "720pf", 50, 1280, 720, 13468, 220, 400, 19, 6, 80, 5,
222 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
223 }, {
224 /* 1080if */
225 "1080if", 50, 1920, 1080, 13468, 148, 484, 36, 4, 88, 5,
226 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
227 }, {
228 /* 1080pf */
229 "1080pf", 50, 1920, 1080, 6734, 148, 484, 36, 4, 88, 5,
230 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
231 },
232
233 /* VESA modes (modes "11" to "13") */
234 {
235 /* WXGA */
236 "wxga", 60, 1280, 768, 12924, 160, 24, 29, 3, 136, 6,
237 0, FB_VMODE_NONINTERLACED,
238 FB_MODE_IS_VESA
239 }, {
240 /* SXGA */
241 "sxga", 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
242 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED,
243 FB_MODE_IS_VESA
244 }, {
245 /* WUXGA */
246 "wuxga", 60, 1920, 1200, 6494, 80, 48, 26, 3, 32, 6,
247 FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED,
248 FB_MODE_IS_VESA
249 }
250 };
251
252
253 #define HEAD_A
254 #define HEAD_B
255
256 #define BPP 4 /* number of bytes per pixel */
257
258
259 static int ps3fb_mode;
260 module_param(ps3fb_mode, int, 0);
261
262 static char *mode_option;
263
264 static int ps3fb_cmp_mode(const struct fb_videomode *vmode,
265 const struct fb_var_screeninfo *var)
266 {
267 long xres, yres, left_margin, right_margin, upper_margin, lower_margin;
268 long dx, dy;
269
270 /* maximum values */
271 if (var->xres > vmode->xres || var->yres > vmode->yres ||
272 var->pixclock > vmode->pixclock ||
273 var->hsync_len > vmode->hsync_len ||
274 var->vsync_len > vmode->vsync_len)
275 return -1;
276
277 /* progressive/interlaced must match */
278 if ((var->vmode & FB_VMODE_MASK) != vmode->vmode)
279 return -1;
280
281 /* minimum resolution */
282 xres = max(var->xres, 1U);
283 yres = max(var->yres, 1U);
284
285 /* minimum margins */
286 left_margin = max(var->left_margin, vmode->left_margin);
287 right_margin = max(var->right_margin, vmode->right_margin);
288 upper_margin = max(var->upper_margin, vmode->upper_margin);
289 lower_margin = max(var->lower_margin, vmode->lower_margin);
290
291 /* resolution + margins may not exceed native parameters */
292 dx = ((long)vmode->left_margin + (long)vmode->xres +
293 (long)vmode->right_margin) -
294 (left_margin + xres + right_margin);
295 if (dx < 0)
296 return -1;
297
298 dy = ((long)vmode->upper_margin + (long)vmode->yres +
299 (long)vmode->lower_margin) -
300 (upper_margin + yres + lower_margin);
301 if (dy < 0)
302 return -1;
303
304 /* exact match */
305 if (!dx && !dy)
306 return 0;
307
308 /* resolution difference */
309 return (vmode->xres - xres) * (vmode->yres - yres);
310 }
311
312 static const struct fb_videomode *ps3fb_native_vmode(enum ps3av_mode_num id)
313 {
314 return &ps3fb_modedb[FIRST_NATIVE_MODE_INDEX + id - 1];
315 }
316
317 static const struct fb_videomode *ps3fb_vmode(int id)
318 {
319 u32 mode = id & PS3AV_MODE_MASK;
320
321 if (mode < PS3AV_MODE_480I || mode > PS3AV_MODE_WUXGA)
322 return NULL;
323
324 if (mode <= PS3AV_MODE_1080P50 && !(id & PS3AV_MODE_FULL)) {
325 /* Non-fullscreen broadcast mode */
326 return &ps3fb_modedb[mode - 1];
327 }
328
329 return ps3fb_native_vmode(mode);
330 }
331
332 static unsigned int ps3fb_find_mode(struct fb_var_screeninfo *var,
333 u32 *ddr_line_length, u32 *xdr_line_length)
334 {
335 unsigned int id, best_id;
336 int diff, best_diff;
337 const struct fb_videomode *vmode;
338 long gap;
339
340 best_id = 0;
341 best_diff = INT_MAX;
342 pr_debug("%s: wanted %u [%u] %u x %u [%u] %u\n", __func__,
343 var->left_margin, var->xres, var->right_margin,
344 var->upper_margin, var->yres, var->lower_margin);
345 for (id = PS3AV_MODE_480I; id <= PS3AV_MODE_WUXGA; id++) {
346 vmode = ps3fb_native_vmode(id);
347 diff = ps3fb_cmp_mode(vmode, var);
348 pr_debug("%s: mode %u: %u [%u] %u x %u [%u] %u: diff = %d\n",
349 __func__, id, vmode->left_margin, vmode->xres,
350 vmode->right_margin, vmode->upper_margin,
351 vmode->yres, vmode->lower_margin, diff);
352 if (diff < 0)
353 continue;
354 if (diff < best_diff) {
355 best_id = id;
356 if (!diff)
357 break;
358 best_diff = diff;
359 }
360 }
361
362 if (!best_id) {
363 pr_debug("%s: no suitable mode found\n", __func__);
364 return 0;
365 }
366
367 id = best_id;
368 vmode = ps3fb_native_vmode(id);
369
370 *ddr_line_length = vmode->xres * BPP;
371
372 /* minimum resolution */
373 if (!var->xres)
374 var->xres = 1;
375 if (!var->yres)
376 var->yres = 1;
377
378 /* minimum virtual resolution */
379 if (var->xres_virtual < var->xres)
380 var->xres_virtual = var->xres;
381 if (var->yres_virtual < var->yres)
382 var->yres_virtual = var->yres;
383
384 /* minimum margins */
385 if (var->left_margin < vmode->left_margin)
386 var->left_margin = vmode->left_margin;
387 if (var->right_margin < vmode->right_margin)
388 var->right_margin = vmode->right_margin;
389 if (var->upper_margin < vmode->upper_margin)
390 var->upper_margin = vmode->upper_margin;
391 if (var->lower_margin < vmode->lower_margin)
392 var->lower_margin = vmode->lower_margin;
393
394 /* extra margins */
395 gap = ((long)vmode->left_margin + (long)vmode->xres +
396 (long)vmode->right_margin) -
397 ((long)var->left_margin + (long)var->xres +
398 (long)var->right_margin);
399 if (gap > 0) {
400 var->left_margin += gap/2;
401 var->right_margin += (gap+1)/2;
402 pr_debug("%s: rounded up H to %u [%u] %u\n", __func__,
403 var->left_margin, var->xres, var->right_margin);
404 }
405
406 gap = ((long)vmode->upper_margin + (long)vmode->yres +
407 (long)vmode->lower_margin) -
408 ((long)var->upper_margin + (long)var->yres +
409 (long)var->lower_margin);
410 if (gap > 0) {
411 var->upper_margin += gap/2;
412 var->lower_margin += (gap+1)/2;
413 pr_debug("%s: rounded up V to %u [%u] %u\n", __func__,
414 var->upper_margin, var->yres, var->lower_margin);
415 }
416
417 /* fixed fields */
418 var->pixclock = vmode->pixclock;
419 var->hsync_len = vmode->hsync_len;
420 var->vsync_len = vmode->vsync_len;
421 var->sync = vmode->sync;
422
423 if (ps3_compare_firmware_version(1, 9, 0) >= 0) {
424 *xdr_line_length = GPU_ALIGN_UP(var->xres_virtual * BPP);
425 if (*xdr_line_length > GPU_MAX_LINE_LENGTH)
426 *xdr_line_length = GPU_MAX_LINE_LENGTH;
427 } else
428 *xdr_line_length = *ddr_line_length;
429
430 if (vmode->sync & FB_SYNC_BROADCAST) {
431 /* Full broadcast modes have the full mode bit set */
432 if (vmode->xres == var->xres && vmode->yres == var->yres)
433 id |= PS3AV_MODE_FULL;
434 }
435
436 pr_debug("%s: mode %u\n", __func__, id);
437 return id;
438 }
439
440 static void ps3fb_sync_image(struct device *dev, u64 frame_offset,
441 u64 dst_offset, u64 src_offset, u32 width,
442 u32 height, u32 dst_line_length,
443 u32 src_line_length)
444 {
445 int status;
446 u64 line_length;
447
448 line_length = dst_line_length;
449 if (src_line_length != dst_line_length)
450 line_length |= (u64)src_line_length << 32;
451
452 src_offset += GPU_FB_START;
453
454 mutex_lock(&ps3_gpu_mutex);
455 status = lv1_gpu_fb_blit(ps3fb.context_handle, dst_offset,
456 GPU_IOIF + src_offset,
457 L1GPU_FB_BLIT_WAIT_FOR_COMPLETION |
458 (width << 16) | height,
459 line_length);
460 mutex_unlock(&ps3_gpu_mutex);
461
462 if (status)
463 dev_err(dev, "%s: lv1_gpu_fb_blit failed: %d\n", __func__,
464 status);
465 #ifdef HEAD_A
466 status = lv1_gpu_display_flip(ps3fb.context_handle, 0, frame_offset);
467 if (status)
468 dev_err(dev, "%s: lv1_gpu_display_flip failed: %d\n", __func__,
469 status);
470 #endif
471 #ifdef HEAD_B
472 status = lv1_gpu_display_flip(ps3fb.context_handle, 1, frame_offset);
473 if (status)
474 dev_err(dev, "%s: lv1_gpu_display_flip failed: %d\n", __func__,
475 status);
476 #endif
477 }
478
479 static int ps3fb_sync(struct fb_info *info, u32 frame)
480 {
481 struct ps3fb_par *par = info->par;
482 int error = 0;
483 u64 ddr_base, xdr_base;
484
485 if (frame > par->num_frames - 1) {
486 dev_dbg(info->device, "%s: invalid frame number (%u)\n",
487 __func__, frame);
488 error = -EINVAL;
489 goto out;
490 }
491
492 xdr_base = frame * par->xdr_frame_size;
493 ddr_base = frame * par->ddr_frame_size;
494
495 ps3fb_sync_image(info->device, ddr_base + par->full_offset,
496 ddr_base + par->fb_offset, xdr_base + par->pan_offset,
497 par->width, par->height, par->ddr_line_length,
498 info->fix.line_length);
499
500 out:
501 return error;
502 }
503
504 static int ps3fb_open(struct fb_info *info, int user)
505 {
506 atomic_inc(&ps3fb.f_count);
507 return 0;
508 }
509
510 static int ps3fb_release(struct fb_info *info, int user)
511 {
512 if (atomic_dec_and_test(&ps3fb.f_count)) {
513 if (atomic_read(&ps3fb.ext_flip)) {
514 atomic_set(&ps3fb.ext_flip, 0);
515 if (console_trylock()) {
516 ps3fb_sync(info, 0); /* single buffer */
517 console_unlock();
518 }
519 }
520 }
521 return 0;
522 }
523
524 /*
525 * Setting the video mode has been split into two parts.
526 * First part, xxxfb_check_var, must not write anything
527 * to hardware, it should only verify and adjust var.
528 * This means it doesn't alter par but it does use hardware
529 * data from it to check this var.
530 */
531
532 static int ps3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
533 {
534 u32 xdr_line_length, ddr_line_length;
535 int mode;
536
537 mode = ps3fb_find_mode(var, &ddr_line_length, &xdr_line_length);
538 if (!mode)
539 return -EINVAL;
540
541 /* Virtual screen */
542 if (var->xres_virtual > xdr_line_length / BPP) {
543 dev_dbg(info->device,
544 "Horizontal virtual screen size too large\n");
545 return -EINVAL;
546 }
547
548 if (var->xoffset + var->xres > var->xres_virtual ||
549 var->yoffset + var->yres > var->yres_virtual) {
550 dev_dbg(info->device, "panning out-of-range\n");
551 return -EINVAL;
552 }
553
554 /* We support ARGB8888 only */
555 if (var->bits_per_pixel > 32 || var->grayscale ||
556 var->red.offset > 16 || var->green.offset > 8 ||
557 var->blue.offset > 0 || var->transp.offset > 24 ||
558 var->red.length > 8 || var->green.length > 8 ||
559 var->blue.length > 8 || var->transp.length > 8 ||
560 var->red.msb_right || var->green.msb_right ||
561 var->blue.msb_right || var->transp.msb_right || var->nonstd) {
562 dev_dbg(info->device, "We support ARGB8888 only\n");
563 return -EINVAL;
564 }
565
566 var->bits_per_pixel = 32;
567 var->red.offset = 16;
568 var->green.offset = 8;
569 var->blue.offset = 0;
570 var->transp.offset = 24;
571 var->red.length = 8;
572 var->green.length = 8;
573 var->blue.length = 8;
574 var->transp.length = 8;
575 var->red.msb_right = 0;
576 var->green.msb_right = 0;
577 var->blue.msb_right = 0;
578 var->transp.msb_right = 0;
579
580 /* Rotation is not supported */
581 if (var->rotate) {
582 dev_dbg(info->device, "Rotation is not supported\n");
583 return -EINVAL;
584 }
585
586 /* Memory limit */
587 if (var->yres_virtual * xdr_line_length > info->fix.smem_len) {
588 dev_dbg(info->device, "Not enough memory\n");
589 return -ENOMEM;
590 }
591
592 var->height = -1;
593 var->width = -1;
594
595 return 0;
596 }
597
598 /*
599 * This routine actually sets the video mode.
600 */
601
602 static int ps3fb_set_par(struct fb_info *info)
603 {
604 struct ps3fb_par *par = info->par;
605 unsigned int mode, ddr_line_length, xdr_line_length, lines, maxlines;
606 unsigned int ddr_xoff, ddr_yoff, offset;
607 const struct fb_videomode *vmode;
608 u64 dst;
609
610 mode = ps3fb_find_mode(&info->var, &ddr_line_length, &xdr_line_length);
611 if (!mode)
612 return -EINVAL;
613
614 vmode = ps3fb_native_vmode(mode & PS3AV_MODE_MASK);
615
616 info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
617 info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
618 info->fix.line_length = xdr_line_length;
619
620 par->ddr_line_length = ddr_line_length;
621 par->ddr_frame_size = vmode->yres * ddr_line_length;
622 par->xdr_frame_size = info->var.yres_virtual * xdr_line_length;
623
624 par->num_frames = info->fix.smem_len /
625 max(par->ddr_frame_size, par->xdr_frame_size);
626
627 /* Keep the special bits we cannot set using fb_var_screeninfo */
628 par->new_mode_id = (par->new_mode_id & ~PS3AV_MODE_MASK) | mode;
629
630 par->width = info->var.xres;
631 par->height = info->var.yres;
632
633 /* Start of the virtual frame buffer (relative to fullscreen) */
634 ddr_xoff = info->var.left_margin - vmode->left_margin;
635 ddr_yoff = info->var.upper_margin - vmode->upper_margin;
636 offset = ddr_yoff * ddr_line_length + ddr_xoff * BPP;
637
638 par->fb_offset = GPU_ALIGN_UP(offset);
639 par->full_offset = par->fb_offset - offset;
640 par->pan_offset = info->var.yoffset * xdr_line_length +
641 info->var.xoffset * BPP;
642
643 if (par->new_mode_id != par->mode_id) {
644 if (ps3av_set_video_mode(par->new_mode_id)) {
645 par->new_mode_id = par->mode_id;
646 return -EINVAL;
647 }
648 par->mode_id = par->new_mode_id;
649 }
650
651 /* Clear XDR frame buffer memory */
652 memset((void __force *)info->screen_base, 0, info->fix.smem_len);
653
654 /* Clear DDR frame buffer memory */
655 lines = vmode->yres * par->num_frames;
656 if (par->full_offset)
657 lines++;
658 maxlines = info->fix.smem_len / ddr_line_length;
659 for (dst = 0; lines; dst += maxlines * ddr_line_length) {
660 unsigned int l = min(lines, maxlines);
661 ps3fb_sync_image(info->device, 0, dst, 0, vmode->xres, l,
662 ddr_line_length, ddr_line_length);
663 lines -= l;
664 }
665
666 return 0;
667 }
668
669 /*
670 * Set a single color register. The values supplied are already
671 * rounded down to the hardware's capabilities (according to the
672 * entries in the var structure). Return != 0 for invalid regno.
673 */
674
675 static int ps3fb_setcolreg(unsigned int regno, unsigned int red,
676 unsigned int green, unsigned int blue,
677 unsigned int transp, struct fb_info *info)
678 {
679 if (regno >= 16)
680 return 1;
681
682 red >>= 8;
683 green >>= 8;
684 blue >>= 8;
685 transp >>= 8;
686
687 ((u32 *)info->pseudo_palette)[regno] = transp << 24 | red << 16 |
688 green << 8 | blue;
689 return 0;
690 }
691
692 static int ps3fb_pan_display(struct fb_var_screeninfo *var,
693 struct fb_info *info)
694 {
695 struct ps3fb_par *par = info->par;
696
697 par->pan_offset = var->yoffset * info->fix.line_length +
698 var->xoffset * BPP;
699 return 0;
700 }
701
702 /*
703 * As we have a virtual frame buffer, we need our own mmap function
704 */
705
706 static int ps3fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
707 {
708 int r;
709
710 r = vm_iomap_memory(vma, info->fix.smem_start, info->fix.smem_len);
711
712 dev_dbg(info->device, "ps3fb: mmap framebuffer P(%lx)->V(%lx)\n",
713 info->fix.smem_start + vma->vm_pgoff << PAGE_SHIFT,
714 vma->vm_start);
715
716 return r;
717 }
718
719 /*
720 * Blank the display
721 */
722
723 static int ps3fb_blank(int blank, struct fb_info *info)
724 {
725 int retval;
726
727 dev_dbg(info->device, "%s: blank:%d\n", __func__, blank);
728 switch (blank) {
729 case FB_BLANK_POWERDOWN:
730 case FB_BLANK_HSYNC_SUSPEND:
731 case FB_BLANK_VSYNC_SUSPEND:
732 case FB_BLANK_NORMAL:
733 retval = ps3av_video_mute(1); /* mute on */
734 if (!retval)
735 ps3fb.is_blanked = 1;
736 break;
737
738 default: /* unblank */
739 retval = ps3av_video_mute(0); /* mute off */
740 if (!retval)
741 ps3fb.is_blanked = 0;
742 break;
743 }
744 return retval;
745 }
746
747 static int ps3fb_get_vblank(struct fb_vblank *vblank)
748 {
749 memset(vblank, 0, sizeof(*vblank));
750 vblank->flags = FB_VBLANK_HAVE_VSYNC;
751 return 0;
752 }
753
754 static int ps3fb_wait_for_vsync(u32 crtc)
755 {
756 int ret;
757 u64 count;
758
759 count = ps3fb.vblank_count;
760 ret = wait_event_interruptible_timeout(ps3fb.wait_vsync,
761 count != ps3fb.vblank_count,
762 HZ / 10);
763 if (!ret)
764 return -ETIMEDOUT;
765
766 return 0;
767 }
768
769
770 /*
771 * ioctl
772 */
773
774 static int ps3fb_ioctl(struct fb_info *info, unsigned int cmd,
775 unsigned long arg)
776 {
777 void __user *argp = (void __user *)arg;
778 u32 val;
779 int retval = -EFAULT;
780
781 switch (cmd) {
782 case FBIOGET_VBLANK:
783 {
784 struct fb_vblank vblank;
785 dev_dbg(info->device, "FBIOGET_VBLANK:\n");
786 retval = ps3fb_get_vblank(&vblank);
787 if (retval)
788 break;
789
790 if (copy_to_user(argp, &vblank, sizeof(vblank)))
791 retval = -EFAULT;
792 break;
793 }
794
795 case FBIO_WAITFORVSYNC:
796 {
797 u32 crt;
798 dev_dbg(info->device, "FBIO_WAITFORVSYNC:\n");
799 if (get_user(crt, (u32 __user *) arg))
800 break;
801
802 retval = ps3fb_wait_for_vsync(crt);
803 break;
804 }
805
806 case PS3FB_IOCTL_SETMODE:
807 {
808 struct ps3fb_par *par = info->par;
809 const struct fb_videomode *vmode;
810 struct fb_var_screeninfo var;
811
812 if (copy_from_user(&val, argp, sizeof(val)))
813 break;
814
815 if (!(val & PS3AV_MODE_MASK)) {
816 u32 id = ps3av_get_auto_mode();
817 if (id > 0)
818 val = (val & ~PS3AV_MODE_MASK) | id;
819 }
820 dev_dbg(info->device, "PS3FB_IOCTL_SETMODE:%x\n", val);
821 retval = -EINVAL;
822 vmode = ps3fb_vmode(val);
823 if (vmode) {
824 var = info->var;
825 fb_videomode_to_var(&var, vmode);
826 console_lock();
827 info->flags |= FBINFO_MISC_USEREVENT;
828 /* Force, in case only special bits changed */
829 var.activate |= FB_ACTIVATE_FORCE;
830 par->new_mode_id = val;
831 retval = fb_set_var(info, &var);
832 info->flags &= ~FBINFO_MISC_USEREVENT;
833 console_unlock();
834 }
835 break;
836 }
837
838 case PS3FB_IOCTL_GETMODE:
839 val = ps3av_get_mode();
840 dev_dbg(info->device, "PS3FB_IOCTL_GETMODE:%x\n", val);
841 if (!copy_to_user(argp, &val, sizeof(val)))
842 retval = 0;
843 break;
844
845 case PS3FB_IOCTL_SCREENINFO:
846 {
847 struct ps3fb_par *par = info->par;
848 struct ps3fb_ioctl_res res;
849 dev_dbg(info->device, "PS3FB_IOCTL_SCREENINFO:\n");
850 res.xres = info->fix.line_length / BPP;
851 res.yres = info->var.yres_virtual;
852 res.xoff = (res.xres - info->var.xres) / 2;
853 res.yoff = (res.yres - info->var.yres) / 2;
854 res.num_frames = par->num_frames;
855 if (!copy_to_user(argp, &res, sizeof(res)))
856 retval = 0;
857 break;
858 }
859
860 case PS3FB_IOCTL_ON:
861 dev_dbg(info->device, "PS3FB_IOCTL_ON:\n");
862 atomic_inc(&ps3fb.ext_flip);
863 retval = 0;
864 break;
865
866 case PS3FB_IOCTL_OFF:
867 dev_dbg(info->device, "PS3FB_IOCTL_OFF:\n");
868 atomic_dec_if_positive(&ps3fb.ext_flip);
869 retval = 0;
870 break;
871
872 case PS3FB_IOCTL_FSEL:
873 if (copy_from_user(&val, argp, sizeof(val)))
874 break;
875
876 dev_dbg(info->device, "PS3FB_IOCTL_FSEL:%d\n", val);
877 console_lock();
878 retval = ps3fb_sync(info, val);
879 console_unlock();
880 break;
881
882 default:
883 retval = -ENOIOCTLCMD;
884 break;
885 }
886 return retval;
887 }
888
889 static int ps3fbd(void *arg)
890 {
891 struct fb_info *info = arg;
892
893 set_freezable();
894 while (!kthread_should_stop()) {
895 try_to_freeze();
896 set_current_state(TASK_INTERRUPTIBLE);
897 if (ps3fb.is_kicked) {
898 ps3fb.is_kicked = 0;
899 console_lock();
900 ps3fb_sync(info, 0); /* single buffer */
901 console_unlock();
902 }
903 schedule();
904 }
905 return 0;
906 }
907
908 static irqreturn_t ps3fb_vsync_interrupt(int irq, void *ptr)
909 {
910 struct device *dev = ptr;
911 u64 v1;
912 int status;
913 struct display_head *head = &ps3fb.dinfo->display_head[1];
914
915 status = lv1_gpu_context_intr(ps3fb.context_handle, &v1);
916 if (status) {
917 dev_err(dev, "%s: lv1_gpu_context_intr failed: %d\n", __func__,
918 status);
919 return IRQ_NONE;
920 }
921
922 if (v1 & (1 << GPU_INTR_STATUS_VSYNC_1)) {
923 /* VSYNC */
924 ps3fb.vblank_count = head->vblank_count;
925 if (ps3fb.task && !ps3fb.is_blanked &&
926 !atomic_read(&ps3fb.ext_flip)) {
927 ps3fb.is_kicked = 1;
928 wake_up_process(ps3fb.task);
929 }
930 wake_up_interruptible(&ps3fb.wait_vsync);
931 }
932
933 return IRQ_HANDLED;
934 }
935
936
937 static struct fb_ops ps3fb_ops = {
938 .fb_open = ps3fb_open,
939 .fb_release = ps3fb_release,
940 .fb_read = fb_sys_read,
941 .fb_write = fb_sys_write,
942 .fb_check_var = ps3fb_check_var,
943 .fb_set_par = ps3fb_set_par,
944 .fb_setcolreg = ps3fb_setcolreg,
945 .fb_pan_display = ps3fb_pan_display,
946 .fb_fillrect = sys_fillrect,
947 .fb_copyarea = sys_copyarea,
948 .fb_imageblit = sys_imageblit,
949 .fb_mmap = ps3fb_mmap,
950 .fb_blank = ps3fb_blank,
951 .fb_ioctl = ps3fb_ioctl,
952 .fb_compat_ioctl = ps3fb_ioctl
953 };
954
955 static struct fb_fix_screeninfo ps3fb_fix __initdata = {
956 .id = DEVICE_NAME,
957 .type = FB_TYPE_PACKED_PIXELS,
958 .visual = FB_VISUAL_TRUECOLOR,
959 .accel = FB_ACCEL_NONE,
960 };
961
962 static int ps3fb_probe(struct ps3_system_bus_device *dev)
963 {
964 struct fb_info *info;
965 struct ps3fb_par *par;
966 int retval;
967 u64 ddr_lpar = 0;
968 u64 lpar_dma_control = 0;
969 u64 lpar_driver_info = 0;
970 u64 lpar_reports = 0;
971 u64 lpar_reports_size = 0;
972 u64 xdr_lpar;
973 struct gpu_driver_info *dinfo;
974 void *fb_start;
975 int status;
976 struct task_struct *task;
977 unsigned long max_ps3fb_size;
978
979 if (ps3fb_videomemory.size < GPU_CMD_BUF_SIZE) {
980 dev_err(&dev->core, "%s: Not enough video memory\n", __func__);
981 return -ENOMEM;
982 }
983
984 retval = ps3_open_hv_device(dev);
985 if (retval) {
986 dev_err(&dev->core, "%s: ps3_open_hv_device failed\n",
987 __func__);
988 goto err;
989 }
990
991 if (!ps3fb_mode)
992 ps3fb_mode = ps3av_get_mode();
993 dev_dbg(&dev->core, "ps3fb_mode: %d\n", ps3fb_mode);
994
995 atomic_set(&ps3fb.f_count, -1); /* fbcon opens ps3fb */
996 atomic_set(&ps3fb.ext_flip, 0); /* for flip with vsync */
997 init_waitqueue_head(&ps3fb.wait_vsync);
998
999 #ifdef HEAD_A
1000 status = lv1_gpu_display_sync(0x0, 0, L1GPU_DISPLAY_SYNC_VSYNC);
1001 if (status) {
1002 dev_err(&dev->core, "%s: lv1_gpu_display_sync failed: %d\n",
1003 __func__, status);
1004 retval = -ENODEV;
1005 goto err_close_device;
1006 }
1007 #endif
1008 #ifdef HEAD_B
1009 status = lv1_gpu_display_sync(0x0, 1, L1GPU_DISPLAY_SYNC_VSYNC);
1010 if (status) {
1011 dev_err(&dev->core, "%s: lv1_gpu_display_sync failed: %d\n",
1012 __func__, status);
1013 retval = -ENODEV;
1014 goto err_close_device;
1015 }
1016 #endif
1017
1018 max_ps3fb_size = _ALIGN_UP(GPU_IOIF, 256*1024*1024) - GPU_IOIF;
1019 if (ps3fb_videomemory.size > max_ps3fb_size) {
1020 dev_info(&dev->core, "Limiting ps3fb mem size to %lu bytes\n",
1021 max_ps3fb_size);
1022 ps3fb_videomemory.size = max_ps3fb_size;
1023 }
1024
1025 /* get gpu context handle */
1026 status = lv1_gpu_memory_allocate(ps3fb_videomemory.size, 0, 0, 0, 0,
1027 &ps3fb.memory_handle, &ddr_lpar);
1028 if (status) {
1029 dev_err(&dev->core, "%s: lv1_gpu_memory_allocate failed: %d\n",
1030 __func__, status);
1031 retval = -ENOMEM;
1032 goto err_close_device;
1033 }
1034 dev_dbg(&dev->core, "ddr:lpar:0x%llx\n", ddr_lpar);
1035
1036 status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0,
1037 &ps3fb.context_handle,
1038 &lpar_dma_control, &lpar_driver_info,
1039 &lpar_reports, &lpar_reports_size);
1040 if (status) {
1041 dev_err(&dev->core,
1042 "%s: lv1_gpu_context_allocate failed: %d\n", __func__,
1043 status);
1044 retval = -ENOMEM;
1045 goto err_gpu_memory_free;
1046 }
1047
1048 /* vsync interrupt */
1049 dinfo = (void __force *)ioremap(lpar_driver_info, 128 * 1024);
1050 if (!dinfo) {
1051 dev_err(&dev->core, "%s: ioremap failed\n", __func__);
1052 retval = -ENOMEM;
1053 goto err_gpu_context_free;
1054 }
1055
1056 ps3fb.dinfo = dinfo;
1057 dev_dbg(&dev->core, "version_driver:%x\n", dinfo->version_driver);
1058 dev_dbg(&dev->core, "irq outlet:%x\n", dinfo->irq.irq_outlet);
1059 dev_dbg(&dev->core, "version_gpu: %x memory_size: %x ch: %x "
1060 "core_freq: %d mem_freq:%d\n", dinfo->version_gpu,
1061 dinfo->memory_size, dinfo->hardware_channel,
1062 dinfo->nvcore_frequency/1000000,
1063 dinfo->memory_frequency/1000000);
1064
1065 if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) {
1066 dev_err(&dev->core, "%s: version_driver err:%x\n", __func__,
1067 dinfo->version_driver);
1068 retval = -EINVAL;
1069 goto err_iounmap_dinfo;
1070 }
1071
1072 retval = ps3_irq_plug_setup(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet,
1073 &ps3fb.irq_no);
1074 if (retval) {
1075 dev_err(&dev->core, "%s: ps3_alloc_irq failed %d\n", __func__,
1076 retval);
1077 goto err_iounmap_dinfo;
1078 }
1079
1080 retval = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt,
1081 0, DEVICE_NAME, &dev->core);
1082 if (retval) {
1083 dev_err(&dev->core, "%s: request_irq failed %d\n", __func__,
1084 retval);
1085 goto err_destroy_plug;
1086 }
1087
1088 dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) |
1089 (1 << GPU_INTR_STATUS_FLIP_1);
1090
1091 /* Clear memory to prevent kernel info leakage into userspace */
1092 memset(ps3fb_videomemory.address, 0, ps3fb_videomemory.size);
1093
1094 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb_videomemory.address));
1095
1096 status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF,
1097 xdr_lpar, ps3fb_videomemory.size,
1098 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
1099 CBE_IOPTE_M);
1100 if (status) {
1101 dev_err(&dev->core, "%s: lv1_gpu_context_iomap failed: %d\n",
1102 __func__, status);
1103 retval = -ENXIO;
1104 goto err_free_irq;
1105 }
1106
1107 dev_dbg(&dev->core, "video:%p ioif:%lx lpar:%llx size:%lx\n",
1108 ps3fb_videomemory.address, GPU_IOIF, xdr_lpar,
1109 ps3fb_videomemory.size);
1110
1111 status = lv1_gpu_fb_setup(ps3fb.context_handle, xdr_lpar,
1112 GPU_CMD_BUF_SIZE, GPU_IOIF);
1113 if (status) {
1114 dev_err(&dev->core, "%s: lv1_gpu_fb_setup failed: %d\n",
1115 __func__, status);
1116 retval = -ENXIO;
1117 goto err_context_unmap;
1118 }
1119
1120 info = framebuffer_alloc(sizeof(struct ps3fb_par), &dev->core);
1121 if (!info) {
1122 retval = -ENOMEM;
1123 goto err_context_fb_close;
1124 }
1125
1126 par = info->par;
1127 par->mode_id = ~ps3fb_mode; /* != ps3fb_mode, to trigger change */
1128 par->new_mode_id = ps3fb_mode;
1129 par->num_frames = 1;
1130
1131 info->fbops = &ps3fb_ops;
1132 info->fix = ps3fb_fix;
1133
1134 /*
1135 * The GPU command buffer is at the start of video memory
1136 * As we don't use the full command buffer, we can put the actual
1137 * frame buffer at offset GPU_FB_START and save some precious XDR
1138 * memory
1139 */
1140 fb_start = ps3fb_videomemory.address + GPU_FB_START;
1141 info->screen_base = (char __force __iomem *)fb_start;
1142 info->fix.smem_start = __pa(fb_start);
1143 info->fix.smem_len = ps3fb_videomemory.size - GPU_FB_START;
1144
1145 info->pseudo_palette = par->pseudo_palette;
1146 info->flags = FBINFO_DEFAULT | FBINFO_READS_FAST |
1147 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1148
1149 retval = fb_alloc_cmap(&info->cmap, 256, 0);
1150 if (retval < 0)
1151 goto err_framebuffer_release;
1152
1153 if (!fb_find_mode(&info->var, info, mode_option, ps3fb_modedb,
1154 ARRAY_SIZE(ps3fb_modedb),
1155 ps3fb_vmode(par->new_mode_id), 32)) {
1156 retval = -EINVAL;
1157 goto err_fb_dealloc;
1158 }
1159
1160 fb_videomode_to_modelist(ps3fb_modedb, ARRAY_SIZE(ps3fb_modedb),
1161 &info->modelist);
1162
1163 retval = register_framebuffer(info);
1164 if (retval < 0)
1165 goto err_fb_dealloc;
1166
1167 ps3_system_bus_set_drvdata(dev, info);
1168
1169 dev_info(info->device, "%s %s, using %u KiB of video memory\n",
1170 dev_driver_string(info->dev), dev_name(info->dev),
1171 info->fix.smem_len >> 10);
1172
1173 task = kthread_run(ps3fbd, info, DEVICE_NAME);
1174 if (IS_ERR(task)) {
1175 retval = PTR_ERR(task);
1176 goto err_unregister_framebuffer;
1177 }
1178
1179 ps3fb.task = task;
1180
1181 return 0;
1182
1183 err_unregister_framebuffer:
1184 unregister_framebuffer(info);
1185 err_fb_dealloc:
1186 fb_dealloc_cmap(&info->cmap);
1187 err_framebuffer_release:
1188 framebuffer_release(info);
1189 err_context_fb_close:
1190 lv1_gpu_fb_close(ps3fb.context_handle);
1191 err_context_unmap:
1192 lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, xdr_lpar,
1193 ps3fb_videomemory.size, CBE_IOPTE_M);
1194 err_free_irq:
1195 free_irq(ps3fb.irq_no, &dev->core);
1196 err_destroy_plug:
1197 ps3_irq_plug_destroy(ps3fb.irq_no);
1198 err_iounmap_dinfo:
1199 iounmap((u8 __force __iomem *)ps3fb.dinfo);
1200 err_gpu_context_free:
1201 lv1_gpu_context_free(ps3fb.context_handle);
1202 err_gpu_memory_free:
1203 lv1_gpu_memory_free(ps3fb.memory_handle);
1204 err_close_device:
1205 ps3_close_hv_device(dev);
1206 err:
1207 return retval;
1208 }
1209
1210 static int ps3fb_shutdown(struct ps3_system_bus_device *dev)
1211 {
1212 struct fb_info *info = ps3_system_bus_get_drvdata(dev);
1213 u64 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb_videomemory.address));
1214
1215 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__);
1216
1217 atomic_inc(&ps3fb.ext_flip); /* flip off */
1218 ps3fb.dinfo->irq.mask = 0;
1219
1220 if (ps3fb.task) {
1221 struct task_struct *task = ps3fb.task;
1222 ps3fb.task = NULL;
1223 kthread_stop(task);
1224 }
1225 if (ps3fb.irq_no) {
1226 free_irq(ps3fb.irq_no, &dev->core);
1227 ps3_irq_plug_destroy(ps3fb.irq_no);
1228 }
1229 if (info) {
1230 unregister_framebuffer(info);
1231 fb_dealloc_cmap(&info->cmap);
1232 framebuffer_release(info);
1233 ps3_system_bus_set_drvdata(dev, NULL);
1234 }
1235 iounmap((u8 __force __iomem *)ps3fb.dinfo);
1236 lv1_gpu_fb_close(ps3fb.context_handle);
1237 lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, xdr_lpar,
1238 ps3fb_videomemory.size, CBE_IOPTE_M);
1239 lv1_gpu_context_free(ps3fb.context_handle);
1240 lv1_gpu_memory_free(ps3fb.memory_handle);
1241 ps3_close_hv_device(dev);
1242 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__);
1243
1244 return 0;
1245 }
1246
1247 static struct ps3_system_bus_driver ps3fb_driver = {
1248 .match_id = PS3_MATCH_ID_GPU,
1249 .match_sub_id = PS3_MATCH_SUB_ID_GPU_FB,
1250 .core.name = DEVICE_NAME,
1251 .core.owner = THIS_MODULE,
1252 .probe = ps3fb_probe,
1253 .remove = ps3fb_shutdown,
1254 .shutdown = ps3fb_shutdown,
1255 };
1256
1257 static int __init ps3fb_setup(void)
1258 {
1259 char *options;
1260
1261 #ifdef MODULE
1262 return 0;
1263 #endif
1264
1265 if (fb_get_options(DEVICE_NAME, &options))
1266 return -ENXIO;
1267
1268 if (!options || !*options)
1269 return 0;
1270
1271 while (1) {
1272 char *this_opt = strsep(&options, ",");
1273
1274 if (!this_opt)
1275 break;
1276 if (!*this_opt)
1277 continue;
1278 if (!strncmp(this_opt, "mode:", 5))
1279 ps3fb_mode = simple_strtoul(this_opt + 5, NULL, 0);
1280 else
1281 mode_option = this_opt;
1282 }
1283 return 0;
1284 }
1285
1286 static int __init ps3fb_init(void)
1287 {
1288 if (!ps3fb_videomemory.address || ps3fb_setup())
1289 return -ENXIO;
1290
1291 return ps3_system_bus_driver_register(&ps3fb_driver);
1292 }
1293
1294 static void __exit ps3fb_exit(void)
1295 {
1296 pr_debug(" -> %s:%d\n", __func__, __LINE__);
1297 ps3_system_bus_driver_unregister(&ps3fb_driver);
1298 pr_debug(" <- %s:%d\n", __func__, __LINE__);
1299 }
1300
1301 module_init(ps3fb_init);
1302 module_exit(ps3fb_exit);
1303
1304 MODULE_LICENSE("GPL");
1305 MODULE_DESCRIPTION("PS3 GPU Frame Buffer Driver");
1306 MODULE_AUTHOR("Sony Computer Entertainment Inc.");
1307 MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_FB);
kernel source for telekom puls (alcatel/mediatek)