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[WATCHDOG] pcwd_pci-include+WDIOC_SETOPTIONS-patch
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / pm3fb.c
1 /*
2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
3 *
4 * Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
5 * Based on code written by:
6 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
7 * Alan Hourihane, <alanh@fairlite.demon.co.uk>
8 * Russell King, <rmk@arm.linux.org.uk>
9 * Based on linux/drivers/video/skeletonfb.c:
10 * Copyright (C) 1997 Geert Uytterhoeven
11 * Based on linux/driver/video/pm2fb.c:
12 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
13 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 *
19 * $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $
20 *
21 * CHANGELOG:
22 * Mon Feb 11 10:35:48 MET 2002, v 1.4.11B: Cosmetic update.
23 * Wed Jan 23 14:16:59 MET 2002, v 1.4.11: Preliminary 2.5.x support, patch for 2.5.2.
24 * Wed Nov 28 11:08:29 MET 2001, v 1.4.10: potential bug fix for SDRAM-based board, patch for 2.4.16.
25 * Thu Sep 20 10:24:42 MET DST 2001, v 1.4.9: sync bug fix, preliminary flatpanel support, better timings.
26 * Tue Aug 28 10:13:01 MET DST 2001, v 1.4.8: memory timings check, minor bug fixes.
27 * Wed Jul 18 19:06:14 CEST 2001, v 1.4.7: Mode fix (800x600-100, 1024x768-100 changed), using HW panning + accel bug fix.
28 * Mon Jun 25 10:33:56 MET DST 2001, v 1.4.6: Depth 12 fix, chip reset ioctl, moved memory erase ioctl to DEBUG.
29 * Wed Jun 20 11:13:08 MET DST 2001, v 1.4.5: Fixed missing blinking cursor in 8bpp, code cleaning, memory erase IOCTL.
30 * Mon Jun 18 16:00:27 CEST 2001, v 1.4.4: Depth 12 (RGBA 4444) support, code cleaning.
31 * Fri Jun 15 13:53:01 CEST 2001, v 1.4.3: Removed warnings, depth 15 support, add 'depth' option.
32 * Thu Jun 14 10:13:52 MET DST 2001, v 1.4.2: Fixed depth switching bug, preliminary 15bpp (RGB5551) support.
33 * Thu Apr 12 11:16:45 MET DST 2001, v 1.4.1B: Doc updates.
34 * Fri Apr 6 11:12:53 MET DST 2001, v 1.4.1: Configure.help, minor cleanup
35 * Thu Mar 29 10:56:50 MET DST 2001, v 1.4.0: Module & module options support (note: linux patch changed, 2.2.19 added).
36 * Thu Mar 15 15:30:31 MET 2001, v 1.3.2: Fixed mirroring bug on little-endian.
37 * Wed Mar 14 21:25:54 CET 2001, v 1.3.1: Fixed bug in BlockMove (_bmov).
38 * Tue Mar 13 10:53:19 MET 2001, v 1.3.0: Character drawing hardware support (in all width between 1 and 16), fixes.
39 * Thu Mar 8 10:20:16 MET 2001, v 1.2.2: Better J2000 support, "font:" option.
40 * Tue Mar 6 21:25:04 CET 2001, v 1.2.1: Better acceleration support.
41 * Mon Mar 5 21:54:17 CET 2001, v 1.2.0: Partial acceleration support (clear & bmove)
42 * Mon Mar 5 12:52:15 CET 2001, v 1.1.3: Big pan_display fix.
43 * Sun Mar 4 22:21:50 CET 2001, v 1.1.2: (numerous) bug fixes.
44 * Fri Mar 2 15:54:07 CET 2001, v 1.1.1: Might have Appian J2000 support, resource mangement in 2.4
45 * Wed Feb 28 18:21:35 CET 2001, v 1.1.0: Might have multiple boards support (added, but not yest tested)
46 * Tue Feb 27 17:31:12 CET 2001, v 1.0.6: fixes boot-time mode select, add more default mode
47 * Tue Feb 27 14:01:36 CET 2001, v 1.0.5: fixes (1.0.4 was broken for 2.2), cleaning up
48 * Mon Feb 26 23:17:36 CET 2001, v 1.0.4: preliminary 2.4.x support, dropped (useless on pm3) partial product, more OF fix
49 * Mon Feb 26 20:59:05 CET 2001, v 1.0.3: No more shadow register (and wasted memory), endianess fix, use OF-preset resolution by default
50 * Wed Feb 21 22:09:30 CET 2001, v 1.0.2: Code cleaning for future multiboard support, better OF support, bugs fix
51 * Wed Feb 21 19:58:56 CET 2001, v 1.0.1: OpenFirmware support, fixed memory detection, better debug support, code cleaning
52 * Wed Feb 21 14:47:06 CET 2001, v 1.0.0: First working version
53 */
54
55 #include <linux/config.h>
56 #include <linux/module.h>
57 #include <linux/kernel.h>
58 #include <linux/errno.h>
59 #include <linux/string.h>
60 #include <linux/mm.h>
61 #include <linux/tty.h>
62 #include <linux/slab.h>
63 #include <linux/vmalloc.h>
64 #include <linux/delay.h>
65 #include <linux/interrupt.h>
66 #include <linux/fb.h>
67 #include <linux/init.h>
68 #include <linux/pci.h>
69 #include <linux/ioport.h>
70
71 #include <video/fbcon.h>
72 #include <video/fbcon-mfb.h>
73 #include <video/fbcon-cfb2.h>
74 #include <video/fbcon-cfb4.h>
75 #include <video/fbcon-cfb8.h>
76 #include <video/fbcon-cfb16.h>
77 #include <video/fbcon-cfb24.h>
78 #include <video/fbcon-cfb32.h>
79 #include <video/pm3fb.h>
80
81 #include <asm/io.h>
82 #include <asm/uaccess.h>
83
84 #ifdef CONFIG_FB_OF
85 #include <asm/prom.h>
86 #endif
87
88 /* ************************************* */
89 /* ***** The various "global" data ***** */
90 /* ************************************* */
91
92 /* those will need a rework for multiple board support */
93 /* Driver name */
94 static const char permedia3_name[16] = "Permedia3";
95
96 /* the fb_par struct, mandatory */
97 struct pm3fb_par {
98 u32 pixclock; /* pixclock in KHz */
99
100 u32 width; /* width of virtual screen */
101 u32 height; /* height of virtual screen */
102
103 u32 hsstart; /* horiz. sync start */
104 u32 hsend; /* horiz. sync end */
105 u32 hbend; /* horiz. blank end (also gate end) */
106 u32 htotal; /* total width (w/ sync & blank) */
107
108 u32 vsstart; /* vert. sync start */
109 u32 vsend; /* vert. sync end */
110 u32 vbend; /* vert. blank end */
111 u32 vtotal; /* total height (w/ sync & blank) */
112
113 u32 stride; /* screen stride */
114 u32 base; /* screen base (xoffset+yoffset) in 128 bits unit */
115 /* NOTE : unlike other pm3 stuff above, stored *after* shiftbpp. don't ask */
116 u32 depth; /* screen depth (8, 12, 15, 16 or 32) */
117 u32 video; /* video control (hsync,vsync) */
118 };
119
120 /* memory timings */
121 struct pm3fb_timings
122 {
123 unsigned long caps;
124 unsigned long timings;
125 unsigned long control;
126 unsigned long refresh;
127 unsigned long powerdown;
128 };
129 typedef enum pm3fb_timing_result { pm3fb_timing_ok, pm3fb_timing_problem, pm3fb_timing_retry } pm3fb_timing_result;
130 #define PM3FB_UNKNOWN_TIMING_VALUE ((unsigned long)-1)
131 #define PM3FB_UNKNOWN_TIMINGS { PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE }
132
133 /* the fb_info struct, mandatory */
134 struct pm3fb_info {
135 struct fb_info_gen gen;
136 unsigned long board_num; /* internal board number */
137 unsigned long use_current;
138 struct pm3fb_par *current_par;
139 struct pci_dev *dev; /* PCI device */
140 unsigned long board_type; /* index in the cardbase */
141 unsigned char *fb_base; /* framebuffer memory base */
142 u32 fb_size; /* framebuffer memory size */
143 unsigned char *p_fb; /* physical address of frame buffer */
144 unsigned char *v_fb; /* virtual address of frame buffer */
145 unsigned char *pIOBase; /* physical address of registers region, must be rg_base or rg_base+PM2_REGS_SIZE depending on the host endianness */
146 unsigned char *vIOBase; /* address of registers after ioremap() */
147 struct {
148 u8 transp;
149 u8 red;
150 u8 green;
151 u8 blue;
152 } palette[256];
153 union {
154 #ifdef FBCON_HAS_CFB16
155 u16 cmap12[16]; /* RGBA 4444 */
156 u16 cmap15[16]; /* RGBA 5551 */
157 u16 cmap16[16]; /* RGBA 5650 */
158 #endif
159 #ifdef FBCON_HAS_CFB32
160 u32 cmap32[16];
161 #endif
162 } cmap;
163 struct pm3fb_timings memt;
164 };
165
166 /* regular resolution database*/
167 static struct {
168 char name[16];
169 struct pm3fb_par user_mode;
170 } mode_base[] __initdata = {
171 {
172 "default-800x600", {
173 49500, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
174 800, 0, 8,
175 PM3VideoControl_ENABLE |
176 PM3VideoControl_HSYNC_ACTIVE_HIGH
177 |
178 PM3VideoControl_VSYNC_ACTIVE_HIGH
179 | PM3VideoControl_PIXELSIZE_8BIT}}, {
180 "1024x768-74", {
181 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
182 806, 1024, 0, 8,
183 PM3VideoControl_ENABLE |
184 PM3VideoControl_HSYNC_ACTIVE_HIGH
185 |
186 PM3VideoControl_VSYNC_ACTIVE_HIGH
187 | PM3VideoControl_PIXELSIZE_8BIT}}, {
188 "1024x768-74-32", {
189 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
190 806, 1024, 0, 32,
191 PM3VideoControl_ENABLE |
192 PM3VideoControl_HSYNC_ACTIVE_HIGH
193 |
194 PM3VideoControl_VSYNC_ACTIVE_HIGH
195 | PM3VideoControl_PIXELSIZE_32BIT}},
196 /* Generated mode : "1600x1024", for the SGI 1600SW flat panel*/
197 {
198 "SGI1600SW", {
199 108000, 1600, 1024, 16, 56, 104, 1704, 3, 6, 32,
200 1056, 1600, 0, 8,
201 PM3VideoControl_ENABLE|
202 PM3VideoControl_HSYNC_ACTIVE_LOW|PM3VideoControl_VSYNC_ACTIVE_LOW|
203 PM3VideoControl_PIXELSIZE_32BIT}},
204 /* ##### auto-generated mode, by fbtimings2pm3 */
205 /* Generated mode : "640x480-60" */
206 {
207 "640x480-60", {
208 25174, 640, 480, 16, 112, 160, 800, 10, 12, 45,
209 525, 640, 0, 8,
210 PM3VideoControl_ENABLE |
211 PM3VideoControl_HSYNC_ACTIVE_LOW
212 |
213 PM3VideoControl_VSYNC_ACTIVE_LOW
214 | PM3VideoControl_PIXELSIZE_8BIT}},
215 /* Generated mode : "640x480-72" */
216 {
217 "640x480-72", {
218 31199, 640, 480, 24, 64, 192, 832, 9, 12, 40, 520,
219 640, 0, 8,
220 PM3VideoControl_ENABLE |
221 PM3VideoControl_HSYNC_ACTIVE_LOW
222 |
223 PM3VideoControl_VSYNC_ACTIVE_LOW
224 | PM3VideoControl_PIXELSIZE_8BIT}},
225 /* Generated mode : "640x480-75" */
226 {
227 "640x480-75", {
228 31499, 640, 480, 16, 80, 200, 840, 1, 4, 20, 500,
229 640, 0, 8,
230 PM3VideoControl_ENABLE |
231 PM3VideoControl_HSYNC_ACTIVE_LOW
232 |
233 PM3VideoControl_VSYNC_ACTIVE_LOW
234 | PM3VideoControl_PIXELSIZE_8BIT}},
235 /* Generated mode : "640x480-90" */
236 {
237 "640x480-90", {
238 39909, 640, 480, 32, 72, 192, 832, 25, 39, 53, 533,
239 640, 0, 8,
240 PM3VideoControl_ENABLE |
241 PM3VideoControl_HSYNC_ACTIVE_LOW
242 |
243 PM3VideoControl_VSYNC_ACTIVE_LOW
244 | PM3VideoControl_PIXELSIZE_8BIT}},
245 /* Generated mode : "640x480-100" */
246 {
247 "640x480-100", {
248 44899, 640, 480, 32, 160, 208, 848, 22, 34, 51,
249 531, 640, 0, 8,
250 PM3VideoControl_ENABLE |
251 PM3VideoControl_HSYNC_ACTIVE_LOW
252 |
253 PM3VideoControl_VSYNC_ACTIVE_LOW
254 | PM3VideoControl_PIXELSIZE_8BIT}},
255 /* Generated mode : "800x600-48-lace" */
256 /* INTERLACED NOT SUPPORTED
257 {"800x600-48-lace", {35999, 800, 600, 80, 208, 264, 1064, 11, 23, 102, 702, 800, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
258 INTERLACED NOT SUPPORTED */
259 /* Generated mode : "800x600-56" */
260 {
261 "800x600-56", {
262 35999, 800, 600, 24, 96, 224, 1024, 1, 3, 25, 625,
263 800, 0, 8,
264 PM3VideoControl_ENABLE |
265 PM3VideoControl_HSYNC_ACTIVE_HIGH
266 |
267 PM3VideoControl_VSYNC_ACTIVE_HIGH
268 | PM3VideoControl_PIXELSIZE_8BIT}},
269 /* Generated mode : "800x600-60" */
270 {
271 "800x600-60", {
272 40000, 800, 600, 40, 168, 256, 1056, 1, 5, 28, 628,
273 800, 0, 8,
274 PM3VideoControl_ENABLE |
275 PM3VideoControl_HSYNC_ACTIVE_HIGH
276 |
277 PM3VideoControl_VSYNC_ACTIVE_HIGH
278 | PM3VideoControl_PIXELSIZE_8BIT}},
279 /* Generated mode : "800x600-70" */
280 {
281 "800x600-70", {
282 44899, 800, 600, 24, 168, 208, 1008, 9, 21, 36,
283 636, 800, 0, 8,
284 PM3VideoControl_ENABLE |
285 PM3VideoControl_HSYNC_ACTIVE_HIGH
286 |
287 PM3VideoControl_VSYNC_ACTIVE_LOW
288 | PM3VideoControl_PIXELSIZE_8BIT}},
289 /* Generated mode : "800x600-72" */
290 {
291 "800x600-72", {
292 50000, 800, 600, 56, 176, 240, 1040, 37, 43, 66,
293 666, 800, 0, 8,
294 PM3VideoControl_ENABLE |
295 PM3VideoControl_HSYNC_ACTIVE_HIGH
296 |
297 PM3VideoControl_VSYNC_ACTIVE_HIGH
298 | PM3VideoControl_PIXELSIZE_8BIT}},
299 /* Generated mode : "800x600-75" */
300 {
301 "800x600-75", {
302 49497, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
303 800, 0, 8,
304 PM3VideoControl_ENABLE |
305 PM3VideoControl_HSYNC_ACTIVE_HIGH
306 |
307 PM3VideoControl_VSYNC_ACTIVE_HIGH
308 | PM3VideoControl_PIXELSIZE_8BIT}},
309 /* Generated mode : "800x600-90" */
310 {
311 "800x600-90", {
312 56637, 800, 600, 8, 72, 192, 992, 8, 19, 35, 635,
313 800, 0, 8,
314 PM3VideoControl_ENABLE |
315 PM3VideoControl_HSYNC_ACTIVE_HIGH
316 |
317 PM3VideoControl_VSYNC_ACTIVE_HIGH
318 | PM3VideoControl_PIXELSIZE_8BIT}},
319 /* Generated mode : "800x600-100", from /etc/fb.modes */
320 /* DISABLED, hsstart == 0
321 {
322 "800x600-100", {
323 67499, 800, 600, 0, 64, 280, 1080, 7, 11, 25, 625,
324 800, 0, 8,
325 PM3VideoControl_ENABLE |
326 PM3VideoControl_HSYNC_ACTIVE_HIGH
327 |
328 PM3VideoControl_VSYNC_ACTIVE_HIGH
329 | PM3VideoControl_PIXELSIZE_8BIT}},
330 */
331 /* Generated mode : "800x600-100", from ??? */
332 {
333 "800x600-100", {
334 69650, 800, 600, 64, 128, 288, 1088, 4, 10, 40, 640, 800, 0, 8,
335 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
336 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
337 /* Generated mode : "1024x768-43-lace" */
338 /* INTERLACED NOT SUPPORTED
339 {"1024x768-43-lace", {44899, 1024, 768, 8, 184, 240, 1264, 1, 9, 49, 817, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
340 INTERLACED NOT SUPPORTED */
341 /* Generated mode : "1024x768-60" */
342 {
343 "1024x768-60", {
344 64998, 1024, 768, 24, 160, 320, 1344, 3, 9, 38,
345 806, 1024, 0, 8,
346 PM3VideoControl_ENABLE |
347 PM3VideoControl_HSYNC_ACTIVE_LOW
348 |
349 PM3VideoControl_VSYNC_ACTIVE_LOW
350 | PM3VideoControl_PIXELSIZE_8BIT}},
351 /* Generated mode : "1024x768-70" */
352 {
353 "1024x768-70", {
354 74996, 1024, 768, 24, 160, 304, 1328, 3, 9, 38,
355 806, 1024, 0, 8,
356 PM3VideoControl_ENABLE |
357 PM3VideoControl_HSYNC_ACTIVE_LOW
358 |
359 PM3VideoControl_VSYNC_ACTIVE_LOW
360 | PM3VideoControl_PIXELSIZE_8BIT}},
361 /* Generated mode : "1024x768-72" */
362 {
363 "1024x768-72", {
364 74996, 10224, 768, 24, 160, 264, 10488, 3, 9, 38,
365 806, 10224, 0, 8,
366 PM3VideoControl_ENABLE |
367 PM3VideoControl_HSYNC_ACTIVE_LOW
368 |
369 PM3VideoControl_VSYNC_ACTIVE_LOW
370 | PM3VideoControl_PIXELSIZE_8BIT}},
371 /* Generated mode : "1024x768-75" */
372 {
373 "1024x768-75", {
374 78746, 1024, 768, 16, 112, 288, 1312, 1, 4, 32,
375 800, 1024, 0, 8,
376 PM3VideoControl_ENABLE |
377 PM3VideoControl_HSYNC_ACTIVE_HIGH
378 |
379 PM3VideoControl_VSYNC_ACTIVE_HIGH
380 | PM3VideoControl_PIXELSIZE_8BIT}},
381 /* Generated mode : "1024x768-90" */
382 {
383 "1024x768-90", {
384 100000, 1024, 768, 0, 96, 288, 1312, 21, 36, 77,
385 845, 1024, 0, 8,
386 PM3VideoControl_ENABLE |
387 PM3VideoControl_HSYNC_ACTIVE_LOW
388 |
389 PM3VideoControl_VSYNC_ACTIVE_LOW
390 | PM3VideoControl_PIXELSIZE_8BIT}},
391 /* Generated mode : "1024x768-100", from /etc/fb.modes */
392 /* DISABLED, vsstart == 0
393 {
394 "1024x768-100", {
395 109998, 1024, 768, 0, 88, 368, 1392, 0, 8, 24, 792,
396 1024, 0, 8,
397 PM3VideoControl_ENABLE |
398 PM3VideoControl_HSYNC_ACTIVE_LOW
399 |
400 PM3VideoControl_VSYNC_ACTIVE_LOW
401 | PM3VideoControl_PIXELSIZE_8BIT}},
402 */
403 /* Generated mode : "1024x768-100", from ??? */
404 {
405 "1024x768-100", {
406 115500, 1024, 768, 32, 224, 416, 1440, 3, 13, 34, 802, 1024, 0, 8,
407 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
408 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
409 /* Generated mode : "1152x864-43-lace" */
410 /* INTERLACED NOT SUPPORTED
411 {"1152x864-43-lace", {64998, 1152, 864, 72, 200, 264, 1416, 78, 87, 191, 1055, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
412 INTERLACED NOT SUPPORTED */
413 /* Generated mode : "1152x864-47-lace" */
414 /* INTERLACED NOT SUPPORTED
415 {"1152x864-47-lace", {64998, 1152, 864, 88, 216, 296, 1448, 30, 39, 83, 947, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
416 INTERLACED NOT SUPPORTED */
417 /* Generated mode : "1152x864-60" */
418 {
419 "1152x864-60", {
420 80000, 1152, 864, 64, 176, 304, 1456, 6, 11, 52,
421 916, 1152, 0, 8,
422 PM3VideoControl_ENABLE |
423 PM3VideoControl_HSYNC_ACTIVE_HIGH
424 |
425 PM3VideoControl_VSYNC_ACTIVE_HIGH
426 | PM3VideoControl_PIXELSIZE_8BIT}},
427 /* Generated mode : "1152x864-70" */
428 {
429 "1152x864-70", {
430 100000, 1152, 864, 40, 192, 360, 1512, 13, 24, 81,
431 945, 1152, 0, 8,
432 PM3VideoControl_ENABLE |
433 PM3VideoControl_HSYNC_ACTIVE_HIGH
434 |
435 PM3VideoControl_VSYNC_ACTIVE_HIGH
436 | PM3VideoControl_PIXELSIZE_8BIT}},
437 /* Generated mode : "1152x864-75" */
438 {
439 "1152x864-75", {
440 109998, 1152, 864, 24, 168, 312, 1464, 45, 53, 138,
441 1002, 1152, 0, 8,
442 PM3VideoControl_ENABLE |
443 PM3VideoControl_HSYNC_ACTIVE_HIGH
444 |
445 PM3VideoControl_VSYNC_ACTIVE_HIGH
446 | PM3VideoControl_PIXELSIZE_8BIT}},
447 /* Generated mode : "1152x864-80" */
448 {
449 "1152x864-80", {
450 109998, 1152, 864, 16, 128, 288, 1440, 30, 37, 94,
451 958, 1152, 0, 8,
452 PM3VideoControl_ENABLE |
453 PM3VideoControl_HSYNC_ACTIVE_HIGH
454 |
455 PM3VideoControl_VSYNC_ACTIVE_HIGH
456 | PM3VideoControl_PIXELSIZE_8BIT}},
457 /* Generated mode : "1280x1024-43-lace" */
458 /* INTERLACED NOT SUPPORTED
459 {"1280x1024-43-lace", {80000, 1024, 1024, 80, 160, 320, 1344, 50, 60, 125, 1149, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
460 INTERLACED NOT SUPPORTED */
461 /* Generated mode : "1280x1024-47-lace" */
462 /* INTERLACED NOT SUPPORTED
463 {"1280x1024-47-lace", {80000, 1280, 1024, 80, 160, 320, 1600, 1, 11, 29, 1053, 1280, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
464 INTERLACED NOT SUPPORTED */
465 /* Generated mode : "1280x1024-60" */
466 {
467 "1280x1024-60", {
468 107991, 1280, 1024, 48, 160, 408, 1688, 1, 4, 42,
469 1066, 1280, 0, 8,
470 PM3VideoControl_ENABLE |
471 PM3VideoControl_HSYNC_ACTIVE_HIGH
472 |
473 PM3VideoControl_VSYNC_ACTIVE_HIGH
474 | PM3VideoControl_PIXELSIZE_8BIT}},
475 /* Generated mode : "1280x1024-70" */
476 {
477 "1280x1024-70", {
478 125992, 1280, 1024, 80, 192, 408, 1688, 1, 6, 42,
479 1066, 1280, 0, 8,
480 PM3VideoControl_ENABLE |
481 PM3VideoControl_HSYNC_ACTIVE_HIGH
482 |
483 PM3VideoControl_VSYNC_ACTIVE_HIGH
484 | PM3VideoControl_PIXELSIZE_8BIT}},
485 /* Generated mode : "1280x1024-74" */
486 {
487 "1280x1024-74", {
488 134989, 1280, 1024, 32, 176, 432, 1712, 0, 30, 40,
489 1064, 1280, 0, 8,
490 PM3VideoControl_ENABLE |
491 PM3VideoControl_HSYNC_ACTIVE_HIGH
492 |
493 PM3VideoControl_VSYNC_ACTIVE_HIGH
494 | PM3VideoControl_PIXELSIZE_8BIT}},
495 /* Generated mode : "1280x1024-75" */
496 {
497 "1280x1024-75", {
498 134989, 1280, 1024, 16, 160, 408, 1688, 1, 4, 42,
499 1066, 1280, 0, 8,
500 PM3VideoControl_ENABLE |
501 PM3VideoControl_HSYNC_ACTIVE_HIGH
502 |
503 PM3VideoControl_VSYNC_ACTIVE_HIGH
504 | PM3VideoControl_PIXELSIZE_8BIT}},
505 /* Generated mode : "1600x1200-60" */
506 {
507 "1600x1200-60", {
508 155981, 1600, 1200, 32, 192, 448, 2048, 10, 18, 70,
509 1270, 1600, 0, 8,
510 PM3VideoControl_ENABLE |
511 PM3VideoControl_HSYNC_ACTIVE_LOW
512 |
513 PM3VideoControl_VSYNC_ACTIVE_LOW
514 | PM3VideoControl_PIXELSIZE_8BIT}},
515 /* Generated mode : "1600x1200-66" */
516 {
517 "1600x1200-66", {
518 171998, 1600, 1200, 40, 176, 480, 2080, 3, 6, 53,
519 1253, 1600, 0, 8,
520 PM3VideoControl_ENABLE |
521 PM3VideoControl_HSYNC_ACTIVE_LOW
522 |
523 PM3VideoControl_VSYNC_ACTIVE_LOW
524 | PM3VideoControl_PIXELSIZE_8BIT}},
525 /* Generated mode : "1600x1200-76" */
526 {
527 "1600x1200-76", {
528 197980, 1600, 1200, 40, 176, 480, 2080, 3, 8, 50,
529 1250, 1600, 0, 8,
530 PM3VideoControl_ENABLE |
531 PM3VideoControl_HSYNC_ACTIVE_LOW
532 |
533 PM3VideoControl_VSYNC_ACTIVE_LOW
534 | PM3VideoControl_PIXELSIZE_8BIT}},
535 /* ##### end of auto-generated mode */
536 {
537 "\0",}
538 };
539
540 /* more mandatory stuff (see skeletonfb.c + framebuffer driver HOWTO */
541 static struct pm3fb_info fb_info[PM3_MAX_BOARD];
542 static struct pm3fb_par current_par[PM3_MAX_BOARD];
543 static int current_par_valid[PM3_MAX_BOARD];
544 /* to allow explicit filtering of board */
545 short bus[PM3_MAX_BOARD];
546 short slot[PM3_MAX_BOARD];
547 short func[PM3_MAX_BOARD];
548 short disable[PM3_MAX_BOARD];
549 short noaccel[PM3_MAX_BOARD];
550 char fontn[PM3_MAX_BOARD][PM3_FONTNAME_SIZE];
551 short depth[PM3_MAX_BOARD];
552 short flatpanel[PM3_MAX_BOARD];
553 static struct display disp[PM3_MAX_BOARD];
554 static char g_options[PM3_OPTIONS_SIZE] __initdata = "pm3fb,dummy";
555 short printtimings = 0;
556 short forcesize[PM3_MAX_BOARD];
557
558 /* ********************* */
559 /* ***** prototype ***** */
560 /* ********************* */
561 /* card-specific */
562 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info);
563 /* permedia3-specific */
564 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info);
565 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info);
566 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info);
567 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
568 unsigned long r);
569 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
570 unsigned long refclock, /* In kHz units */
571 unsigned char *prescale, /* ClkPreScale */
572 unsigned char *feedback, /* ClkFeedBackScale */
573 unsigned char *postscale
574 /* ClkPostScale */ );
575 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc);
576 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b);
577 static void pm3fb_common_init(struct pm3fb_info *l_fb_info);
578 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
579 unsigned long depth, int v);
580 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
581 unsigned long depth, int v);
582 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info);
583 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info);
584 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
585 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info);
586 #endif
587 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info);
588 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info);
589 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
590 struct pm3fb_par *curpar);
591 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info);
592 /* accelerated permedia3-specific */
593 #ifdef PM3FB_USE_ACCEL
594 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info);
595 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info);
596 #ifdef FBCON_HAS_CFB32
597 static void pm3fb_cfb32_clear(struct vc_data *conp,
598 struct display *p,
599 int sy, int sx, int height, int width);
600 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
601 struct display *p, int bottom_only);
602 #endif /* FBCON_HAS_CFB32 */
603 #ifdef FBCON_HAS_CFB16
604 static void pm3fb_cfb16_clear(struct vc_data *conp,
605 struct display *p,
606 int sy, int sx, int height, int width);
607 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
608 struct display *p, int bottom_only);
609 #endif /* FBCON_HAS_CFB16 */
610 #ifdef FBCON_HAS_CFB8
611 static void pm3fb_cfb8_clear(struct vc_data *conp,
612 struct display *p,
613 int sy, int sx, int height, int width);
614 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
615 struct display *p, int bottom_only);
616 #endif /* FBCON_HAS_CFB8 */
617 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
618 static void pm3fb_cfbX_bmove(struct display *p,
619 int sy, int sx,
620 int dy, int dx, int height, int width);
621 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
622 int c, int yy, int xx);
623 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
624 const unsigned short *s, int count, int yy,
625 int xx);
626 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy);
627 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
628 #endif /* PM3FB_USE_ACCEL */
629 /* pre-init */
630 static void pm3fb_mode_setup(char *mode, unsigned long board_num);
631 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num);
632 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn);
633 static void pm3fb_real_setup(char *options);
634 /* fbdev */
635 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
636 const void *par, struct fb_info_gen *info);
637 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
638 void *par, struct fb_info_gen *info);
639 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d);
640 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
641 const void *par, struct fb_info_gen *info);
642 static void pm3fb_get_par(void *par, struct fb_info_gen *info);
643 static void pm3fb_set_par(const void *par, struct fb_info_gen *info);
644 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
645 unsigned char regno, unsigned char r,
646 unsigned char g, unsigned char b);
647 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
648 unsigned *blue, unsigned *transp,
649 struct fb_info *info);
650 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
651 unsigned blue, unsigned transp,
652 struct fb_info *info);
653 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info);
654 static void pm3fb_set_disp(const void *par, struct display *disp,
655 struct fb_info_gen *info);
656 static void pm3fb_detect(void);
657 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
658 struct fb_info_gen *info);
659 static int pm3fb_ioctl(struct inode *inode, struct file *file,
660 u_int cmd, u_long arg, int con,
661 struct fb_info *info);
662
663
664 /* the struct that hold them together */
665 struct fbgen_hwswitch pm3fb_switch = {
666 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
667 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg,
668 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
669 };
670
671 static struct fb_ops pm3fb_ops = {
672 .owner = THIS_MODULE,
673 .fb_get_fix = fbgen_get_fix,
674 .fb_get_var = fbgen_get_var,
675 .fb_set_var = fbgen_set_var,
676 .fb_get_cmap = fbgen_get_cmap,
677 .fb_set_cmap = fbgen_set_cmap,
678 .fb_setcolreg = pm3fb_setcolreg,
679 .fb_pan_display =fbgen_pan_display,
680 .fb_blank = fbgen_blank,
681 .fb_ioctl = pm3fb_ioctl,
682 };
683
684 #ifdef PM3FB_USE_ACCEL
685 #ifdef FBCON_HAS_CFB32
686 static struct display_switch pm3fb_cfb32 = {
687 fbcon_cfb32_setup, pm3fb_cfbX_bmove, pm3fb_cfb32_clear,
688 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
689 NULL /* cursor() */ , NULL /* set_font() */ ,
690 pm3fb_cfb32_clear_margins,
691 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
692 };
693 #endif /* FBCON_HAS_CFB32 */
694 #ifdef FBCON_HAS_CFB16
695 static struct display_switch pm3fb_cfb16 = {
696 fbcon_cfb16_setup, pm3fb_cfbX_bmove, pm3fb_cfb16_clear,
697 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
698 NULL /* cursor() */ , NULL /* set_font() */ ,
699 pm3fb_cfb16_clear_margins,
700 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
701 };
702 #endif /* FBCON_HAS_CFB16 */
703 #ifdef FBCON_HAS_CFB8
704 static struct display_switch pm3fb_cfb8 = {
705 fbcon_cfb8_setup, pm3fb_cfbX_bmove, pm3fb_cfb8_clear,
706 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
707 NULL /* cursor() */ , NULL /* set_font() */ ,
708 pm3fb_cfb8_clear_margins,
709 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
710 };
711 #endif /* FBCON_HAS_CFB8 */
712 #endif /* PM3FB_USE_ACCEL */
713
714 /* ****************************** */
715 /* ***** card-specific data ***** */
716 /* ****************************** */
717 struct pm3fb_card_timings {
718 unsigned long memsize; /* 0 for last value (i.e. default) */
719 struct pm3fb_timings memt;
720 };
721
722 static struct pm3fb_card_timings t_FormacProFormance3[] = {
723 { 16, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} },
724 { 0, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} } /* from 16 MB PF3 */
725 };
726
727 static struct pm3fb_card_timings t_AppianJeronimo2000[] = {
728 { 32, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} },
729 { 0, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} } /* from 32MB J2000 */
730 };
731
732 static struct pm3fb_card_timings t_3DLabsOxygenVX1[] = {
733 { 32, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} },
734 { 0, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} } /* from 32MB VX1 */
735 };
736
737 static struct {
738 char cardname[32]; /* recognized card name */
739 u16 subvendor; /* subvendor of the card */
740 u16 subdevice; /* subdevice of the card */
741 u8 func; /* function of the card to which the extra init apply */
742 void (*specific_setup)(struct pm3fb_info *l_fb_info); /* card/func specific setup, done before _any_ FB access */
743 struct pm3fb_card_timings *c_memt; /* defauls timings for the boards */
744 } cardbase[] = {
745 { "Unknown Permedia3 board", 0xFFFF, 0xFFFF, 0xFF, NULL, NULL },
746 { "Appian Jeronimo 2000 head 1", 0x1097, 0x3d32, 1, NULL,
747 t_AppianJeronimo2000
748 },
749 { "Appian Jeronimo 2000 head 2", 0x1097, 0x3d32, 2, pm3fb_j2000_setup,
750 t_AppianJeronimo2000
751 },
752 { "Formac ProFormance 3", PCI_VENDOR_ID_3DLABS, 0x000a, 0, NULL, /* Formac use 3DLabs ID ?!? */
753 t_FormacProFormance3
754 },
755 { "3DLabs Permedia3 Create!", PCI_VENDOR_ID_3DLABS, 0x0127, 0, NULL, NULL },
756 { "3DLabs Oxygen VX1 PCI", PCI_VENDOR_ID_3DLABS, 0x0121, 0, NULL,
757 t_3DLabsOxygenVX1
758 },
759 { "3DLabs Oxygen VX1 AGP", PCI_VENDOR_ID_3DLABS, 0x0125, 0, NULL, NULL },
760 { "3DLabs Oxygen VX1-16 AGP", PCI_VENDOR_ID_3DLABS, 0x0140, 0, NULL, NULL },
761 { "3DLabs Oxygen VX1-1600SW PCI", PCI_VENDOR_ID_3DLABS, 0x0800, 0, NULL, NULL },
762 { "\0", 0x0, 0x0, 0, NULL, NULL }
763 };
764
765 /* ********************************** */
766 /* ***** card-specific function ***** */
767 /* ********************************** */
768 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info)
769 { /* the appian j2000 require more initialization of the second head */
770 /* l_fb_info must point to the _second_ head of the J2000 */
771
772 DTRACE;
773
774 l_fb_info->memt = t_AppianJeronimo2000[0].memt; /* 32 MB, first and only j2000 ? */
775
776 pm3fb_write_memory_timings(l_fb_info);
777 }
778
779 /* *************************************** */
780 /* ***** permedia3-specific function ***** */
781 /* *************************************** */
782 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info)
783 {
784 l_fb_info->memt.caps = PM3_READ_REG(PM3LocalMemCaps);
785 l_fb_info->memt.timings = PM3_READ_REG(PM3LocalMemTimings);
786 l_fb_info->memt.control = PM3_READ_REG(PM3LocalMemControl);
787 l_fb_info->memt.refresh = PM3_READ_REG(PM3LocalMemRefresh);
788 l_fb_info->memt.powerdown = PM3_READ_REG(PM3LocalMemPowerDown);
789
790 if ((l_fb_info->memt.caps == PM3FB_UNKNOWN_TIMING_VALUE) ||
791 (l_fb_info->memt.timings == PM3FB_UNKNOWN_TIMING_VALUE) ||
792 (l_fb_info->memt.control == PM3FB_UNKNOWN_TIMING_VALUE) ||
793 (l_fb_info->memt.refresh == PM3FB_UNKNOWN_TIMING_VALUE) ||
794 (l_fb_info->memt.powerdown == PM3FB_UNKNOWN_TIMING_VALUE))
795 {
796 printk(KERN_ERR "pm3fb: invalid memory timings in permedia3 board #%ld\n", l_fb_info->board_num);
797 return(pm3fb_try_memory_timings(l_fb_info));
798 }
799 return(pm3fb_timing_ok);
800 }
801
802 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info)
803 {
804 if (cardbase[l_fb_info->board_type].c_memt)
805 {
806 int i = 0, done = 0;
807 while (!done)
808 {
809 if ((cardbase[l_fb_info->board_type].c_memt[i].memsize == l_fb_info->fb_size)
810 || !(cardbase[l_fb_info->board_type].c_memt[i].memsize))
811 { /* will use the 0-sized timings by default */
812 done = 1;
813 l_fb_info->memt = cardbase[l_fb_info->board_type].c_memt[i].memt;
814 printk(KERN_WARNING "pm3fb: trying to use predefined memory timings for permedia3 board #%ld (%s, %ld MB)\n",
815 l_fb_info->board_num,
816 cardbase[l_fb_info->board_type].cardname,
817 cardbase[l_fb_info->board_type].c_memt[i].memsize);
818 pm3fb_write_memory_timings(l_fb_info);
819 return(pm3fb_timing_retry);
820 }
821 i++;
822 }
823 } else
824 return(pm3fb_timing_problem);
825 return(pm3fb_timing_ok);
826 }
827
828 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info)
829 {
830 unsigned char m, n, p;
831 unsigned long clockused;
832
833 PM3_SLOW_WRITE_REG(PM3LocalMemCaps, l_fb_info->memt.caps);
834 PM3_SLOW_WRITE_REG(PM3LocalMemTimings, l_fb_info->memt.timings);
835 PM3_SLOW_WRITE_REG(PM3LocalMemControl, l_fb_info->memt.control);
836 PM3_SLOW_WRITE_REG(PM3LocalMemRefresh, l_fb_info->memt.refresh);
837 PM3_SLOW_WRITE_REG(PM3LocalMemPowerDown, l_fb_info->memt.powerdown);
838
839 clockused =
840 pm3fb_CalculateClock(l_fb_info, 2 * 105000, PM3_REF_CLOCK, &m,
841 &n, &p);
842
843 PM3_WRITE_DAC_REG(PM3RD_KClkPreScale, m);
844 PM3_WRITE_DAC_REG(PM3RD_KClkFeedbackScale, n);
845 PM3_WRITE_DAC_REG(PM3RD_KClkPostScale, p);
846 PM3_WRITE_DAC_REG(PM3RD_KClkControl,
847 PM3RD_KClkControl_STATE_RUN |
848 PM3RD_KClkControl_SOURCE_PLL |
849 PM3RD_KClkControl_ENABLE);
850 PM3_WRITE_DAC_REG(PM3RD_MClkControl,
851 PM3RD_MClkControl_STATE_RUN |
852 PM3RD_MClkControl_SOURCE_KCLK |
853 PM3RD_MClkControl_ENABLE);
854 PM3_WRITE_DAC_REG(PM3RD_SClkControl,
855 PM3RD_SClkControl_STATE_RUN |
856 PM3RD_SClkControl_SOURCE_PCLK |
857 PM3RD_SClkControl_ENABLE);
858 }
859
860 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
861 unsigned long r)
862 {
863 DASSERT((l_fb_info->vIOBase != (unsigned char *) (-1)),
864 "l_fb_info->vIOBase mapped in read dac reg\n");
865 PM3_SET_INDEX(r);
866 mb();
867 return (PM3_READ_REG(PM3RD_IndexedData));
868 }
869
870 /* Calculating various clock parameter */
871 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
872 unsigned long refclock, /* In kHz units */
873 unsigned char *prescale, /* ClkPreScale */
874 unsigned char *feedback, /* ClkFeedBackScale */
875 unsigned char *postscale
876 /* ClkPostScale */ )
877 {
878 int f, pre, post;
879 unsigned long freq;
880 long freqerr = 1000;
881 unsigned long actualclock = 0;
882
883 DTRACE;
884
885 for (f = 1; f < 256; f++) {
886 for (pre = 1; pre < 256; pre++) {
887 for (post = 0; post < 5; post++) {
888 freq =
889 ((2 * refclock * f) /
890 (pre * (1 << post)));
891 if ((reqclock > freq - freqerr)
892 && (reqclock < freq + freqerr)) {
893 freqerr =
894 (reqclock >
895 freq) ? reqclock -
896 freq : freq - reqclock;
897 *feedback = f;
898 *prescale = pre;
899 *postscale = post;
900 actualclock = freq;
901 }
902 }
903 }
904 }
905
906 return (actualclock);
907 }
908
909 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
910 unsigned long depth, int v)
911 {
912 DTRACE;
913
914 switch (depth) {
915 case 8:
916 return (v >> 4);
917 case 12:
918 case 15:
919 case 16:
920 return (v >> 3);
921 case 32:
922 return (v >> 2);
923 }
924 DPRINTK(1, "Unsupported depth %ld\n", depth);
925 return (0);
926 }
927
928 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
929 unsigned long depth, int v)
930 {
931 DTRACE;
932
933 switch (depth) {
934 case 8:
935 return (v << 4);
936 case 12:
937 case 15:
938 case 16:
939 return (v << 3);
940 case 32:
941 return (v << 2);
942 }
943 DPRINTK(1, "Unsupported depth %ld\n", depth);
944 return (0);
945 }
946
947 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info)
948 {
949 DTRACE;
950
951 l_fb_info->vIOBase =
952 ioremap((unsigned long) l_fb_info->pIOBase, PM3_REGS_SIZE);
953 l_fb_info->v_fb =
954 ioremap((unsigned long) l_fb_info->p_fb, l_fb_info->fb_size);
955 DPRINTK(2, "IO mapping : IOBase %lx / %lx, fb %lx / %lx\n",
956 (unsigned long) l_fb_info->pIOBase,
957 (unsigned long) l_fb_info->vIOBase,
958 (unsigned long) l_fb_info->p_fb,
959 (unsigned long) l_fb_info->v_fb);
960 }
961
962 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info)
963 {
964 DTRACE;
965
966 iounmap(l_fb_info->vIOBase);
967 iounmap(l_fb_info->v_fb);
968 l_fb_info->vIOBase = (unsigned char *) -1;
969 l_fb_info->v_fb = (unsigned char *) -1;
970 }
971
972 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
973 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info)
974 {
975 DPRINTK(2, "PM3Aperture0: 0x%08x\n", PM3_READ_REG(PM3Aperture0));
976 DPRINTK(2, "PM3Aperture1: 0x%08x\n", PM3_READ_REG(PM3Aperture1));
977 DPRINTK(2, "PM3ByAperture1Mode: 0x%08x\n",
978 PM3_READ_REG(PM3ByAperture1Mode));
979 DPRINTK(2, "PM3ByAperture2Mode: 0x%08x\n",
980 PM3_READ_REG(PM3ByAperture2Mode));
981 DPRINTK(2, "PM3ChipConfig: 0x%08x\n", PM3_READ_REG(PM3ChipConfig));
982 DPRINTK(2, "PM3FIFODis: 0x%08x\n", PM3_READ_REG(PM3FIFODis));
983 DPRINTK(2, "PM3HTotal: 0x%08x\n", PM3_READ_REG(PM3HTotal));
984 DPRINTK(2, "PM3HbEnd: 0x%08x\n", PM3_READ_REG(PM3HbEnd));
985 DPRINTK(2, "PM3HgEnd: 0x%08x\n", PM3_READ_REG(PM3HgEnd));
986 DPRINTK(2, "PM3HsEnd: 0x%08x\n", PM3_READ_REG(PM3HsEnd));
987 DPRINTK(2, "PM3HsStart: 0x%08x\n", PM3_READ_REG(PM3HsStart));
988 DPRINTK(2, "PM3MemBypassWriteMask: 0x%08x\n",
989 PM3_READ_REG(PM3MemBypassWriteMask));
990 DPRINTK(2, "PM3RD_IndexControl: 0x%08x\n",
991 PM3_READ_REG(PM3RD_IndexControl));
992 DPRINTK(2, "PM3ScreenBase: 0x%08x\n", PM3_READ_REG(PM3ScreenBase));
993 DPRINTK(2, "PM3ScreenStride: 0x%08x\n",
994 PM3_READ_REG(PM3ScreenStride));
995 DPRINTK(2, "PM3VClkCtl: 0x%08x\n", PM3_READ_REG(PM3VClkCtl));
996 DPRINTK(2, "PM3VTotal: 0x%08x\n", PM3_READ_REG(PM3VTotal));
997 DPRINTK(2, "PM3VbEnd: 0x%08x\n", PM3_READ_REG(PM3VbEnd));
998 DPRINTK(2, "PM3VideoControl: 0x%08x\n",
999 PM3_READ_REG(PM3VideoControl));
1000 DPRINTK(2, "PM3VsEnd: 0x%08x\n", PM3_READ_REG(PM3VsEnd));
1001 DPRINTK(2, "PM3VsStart: 0x%08x\n", PM3_READ_REG(PM3VsStart));
1002
1003 DPRINTK(2, "PM3RD_ColorFormat: %ld\n",
1004 PM3_READ_DAC_REG(PM3RD_ColorFormat));
1005 DPRINTK(2, "PM3RD_DACControl: %ld\n",
1006 PM3_READ_DAC_REG(PM3RD_DACControl));
1007 DPRINTK(2, "PM3RD_DClk0FeedbackScale: %ld\n",
1008 PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale));
1009 DPRINTK(2, "PM3RD_DClk0PostScale: %ld\n",
1010 PM3_READ_DAC_REG(PM3RD_DClk0PostScale));
1011 DPRINTK(2, "PM3RD_DClk0PreScale: %ld\n",
1012 PM3_READ_DAC_REG(PM3RD_DClk0PreScale));
1013 DPRINTK(2, "[not set] PM3RD_IndexControl: %ld\n",
1014 PM3_READ_DAC_REG(PM3RD_IndexControl));
1015 DPRINTK(2, "PM3RD_MiscControl: %ld\n",
1016 PM3_READ_DAC_REG(PM3RD_MiscControl));
1017 DPRINTK(2, "PM3RD_PixelSize: %ld\n",
1018 PM3_READ_DAC_REG(PM3RD_PixelSize));
1019 DPRINTK(2, "PM3RD_SyncControl: %ld\n",
1020 PM3_READ_DAC_REG(PM3RD_SyncControl));
1021 }
1022
1023 #endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2) */
1024 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info)
1025 {
1026 u16 subvendor, subdevice;
1027
1028 if ((!pci_read_config_word
1029 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1030 &&
1031 (!pci_read_config_word
1032 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1033 /* well, nothing... */
1034 } else {
1035 subvendor = subdevice = (u16)-1;
1036 }
1037
1038 printk(KERN_INFO "pm3fb: memory timings for board #%ld (subvendor: 0x%hx, subdevice: 0x%hx)\n", l_fb_info->board_num, subvendor, subdevice);
1039 printk(KERN_INFO " PM3LocalMemCaps: 0x%08x\n",
1040 PM3_READ_REG(PM3LocalMemCaps));
1041 printk(KERN_INFO " PM3LocalMemTimings: 0x%08x\n",
1042 PM3_READ_REG(PM3LocalMemTimings));
1043 printk(KERN_INFO " PM3LocalMemControl: 0x%08x\n",
1044 PM3_READ_REG(PM3LocalMemControl));
1045 printk(KERN_INFO " PM3LocalMemRefresh: 0x%08x\n",
1046 PM3_READ_REG(PM3LocalMemRefresh));
1047 printk(KERN_INFO " PM3LocalMemPowerDown: 0x%08x\n",
1048 PM3_READ_REG(PM3LocalMemPowerDown));
1049 }
1050
1051 /* write the mode to registers */
1052 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info)
1053 {
1054 char tempsync = 0x00, tempmisc = 0x00;
1055 DTRACE;
1056
1057 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xffffffff);
1058 PM3_SLOW_WRITE_REG(PM3Aperture0, 0x00000000);
1059 PM3_SLOW_WRITE_REG(PM3Aperture1, 0x00000000);
1060 PM3_SLOW_WRITE_REG(PM3FIFODis, 0x00000007);
1061
1062 PM3_SLOW_WRITE_REG(PM3HTotal,
1063 pm3fb_Shiftbpp(l_fb_info,
1064 l_fb_info->current_par->depth,
1065 l_fb_info->current_par->htotal -
1066 1));
1067 PM3_SLOW_WRITE_REG(PM3HsEnd,
1068 pm3fb_Shiftbpp(l_fb_info,
1069 l_fb_info->current_par->depth,
1070 l_fb_info->current_par->hsend));
1071 PM3_SLOW_WRITE_REG(PM3HsStart,
1072 pm3fb_Shiftbpp(l_fb_info,
1073 l_fb_info->current_par->depth,
1074 l_fb_info->current_par->
1075 hsstart));
1076 PM3_SLOW_WRITE_REG(PM3HbEnd,
1077 pm3fb_Shiftbpp(l_fb_info,
1078 l_fb_info->current_par->depth,
1079 l_fb_info->current_par->hbend));
1080 PM3_SLOW_WRITE_REG(PM3HgEnd,
1081 pm3fb_Shiftbpp(l_fb_info,
1082 l_fb_info->current_par->depth,
1083 l_fb_info->current_par->hbend));
1084 PM3_SLOW_WRITE_REG(PM3ScreenStride,
1085 pm3fb_Shiftbpp(l_fb_info,
1086 l_fb_info->current_par->depth,
1087 l_fb_info->current_par->stride));
1088 PM3_SLOW_WRITE_REG(PM3VTotal, l_fb_info->current_par->vtotal - 1);
1089 PM3_SLOW_WRITE_REG(PM3VsEnd, l_fb_info->current_par->vsend - 1);
1090 PM3_SLOW_WRITE_REG(PM3VsStart,
1091 l_fb_info->current_par->vsstart - 1);
1092 PM3_SLOW_WRITE_REG(PM3VbEnd, l_fb_info->current_par->vbend);
1093
1094 switch (l_fb_info->current_par->depth) {
1095 case 8:
1096 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1097 PM3ByApertureMode_PIXELSIZE_8BIT);
1098 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1099 PM3ByApertureMode_PIXELSIZE_8BIT);
1100 break;
1101
1102 case 12:
1103 case 15:
1104 case 16:
1105 #ifndef __BIG_ENDIAN
1106 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1107 PM3ByApertureMode_PIXELSIZE_16BIT);
1108 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1109 PM3ByApertureMode_PIXELSIZE_16BIT);
1110 #else
1111 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1112 PM3ByApertureMode_PIXELSIZE_16BIT |
1113 PM3ByApertureMode_BYTESWAP_BADC);
1114 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1115 PM3ByApertureMode_PIXELSIZE_16BIT |
1116 PM3ByApertureMode_BYTESWAP_BADC);
1117 #endif /* ! __BIG_ENDIAN */
1118 break;
1119
1120 case 32:
1121 #ifndef __BIG_ENDIAN
1122 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1123 PM3ByApertureMode_PIXELSIZE_32BIT);
1124 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1125 PM3ByApertureMode_PIXELSIZE_32BIT);
1126 #else
1127 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1128 PM3ByApertureMode_PIXELSIZE_32BIT |
1129 PM3ByApertureMode_BYTESWAP_DCBA);
1130 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1131 PM3ByApertureMode_PIXELSIZE_32BIT |
1132 PM3ByApertureMode_BYTESWAP_DCBA);
1133 #endif /* ! __BIG_ENDIAN */
1134 break;
1135
1136 default:
1137 DPRINTK(1, "Unsupported depth %d\n",
1138 l_fb_info->current_par->depth);
1139 break;
1140 }
1141
1142 /*
1143 * Oxygen VX1 - it appears that setting PM3VideoControl and
1144 * then PM3RD_SyncControl to the same SYNC settings undoes
1145 * any net change - they seem to xor together. Only set the
1146 * sync options in PM3RD_SyncControl. --rmk
1147 */
1148 {
1149 unsigned int video = l_fb_info->current_par->video;
1150
1151 video &= ~(PM3VideoControl_HSYNC_MASK |
1152 PM3VideoControl_VSYNC_MASK);
1153 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
1154 PM3VideoControl_VSYNC_ACTIVE_HIGH;
1155 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
1156 }
1157 PM3_SLOW_WRITE_REG(PM3VClkCtl,
1158 (PM3_READ_REG(PM3VClkCtl) & 0xFFFFFFFC));
1159 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
1160 PM3_SLOW_WRITE_REG(PM3ChipConfig,
1161 (PM3_READ_REG(PM3ChipConfig) & 0xFFFFFFFD));
1162
1163 {
1164 unsigned char m; /* ClkPreScale */
1165 unsigned char n; /* ClkFeedBackScale */
1166 unsigned char p; /* ClkPostScale */
1167 (void)pm3fb_CalculateClock(l_fb_info, l_fb_info->current_par->pixclock, PM3_REF_CLOCK, &m, &n, &p);
1168
1169 DPRINTK(2,
1170 "Pixclock: %d, Pre: %d, Feedback: %d, Post: %d\n",
1171 l_fb_info->current_par->pixclock, (int) m, (int) n,
1172 (int) p);
1173
1174 PM3_WRITE_DAC_REG(PM3RD_DClk0PreScale, m);
1175 PM3_WRITE_DAC_REG(PM3RD_DClk0FeedbackScale, n);
1176 PM3_WRITE_DAC_REG(PM3RD_DClk0PostScale, p);
1177 }
1178 /*
1179 PM3_WRITE_DAC_REG(PM3RD_IndexControl, 0x00);
1180 */
1181 /*
1182 PM3_SLOW_WRITE_REG(PM3RD_IndexControl, 0x00);
1183 */
1184 if ((l_fb_info->current_par->video & PM3VideoControl_HSYNC_MASK) ==
1185 PM3VideoControl_HSYNC_ACTIVE_HIGH)
1186 tempsync |= PM3RD_SyncControl_HSYNC_ACTIVE_HIGH;
1187 if ((l_fb_info->current_par->video & PM3VideoControl_VSYNC_MASK) ==
1188 PM3VideoControl_VSYNC_ACTIVE_HIGH)
1189 tempsync |= PM3RD_SyncControl_VSYNC_ACTIVE_HIGH;
1190
1191 PM3_WRITE_DAC_REG(PM3RD_SyncControl, tempsync);
1192 DPRINTK(2, "PM3RD_SyncControl: %d\n", tempsync);
1193
1194 if (flatpanel[l_fb_info->board_num])
1195 {
1196 PM3_WRITE_DAC_REG(PM3RD_DACControl, PM3RD_DACControl_BLANK_PEDESTAL_ENABLE);
1197 PM3_WAIT(2);
1198 PM3_WRITE_REG(PM3VSConfiguration, 0x06);
1199 PM3_WRITE_REG(0x5a00, 1 << 14); /* black magic... */
1200 tempmisc = PM3RD_MiscControl_VSB_OUTPUT_ENABLE;
1201 }
1202 else
1203 PM3_WRITE_DAC_REG(PM3RD_DACControl, 0x00);
1204
1205 switch (l_fb_info->current_par->depth) {
1206 case 8:
1207 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1208 PM3RD_PixelSize_8_BIT_PIXELS);
1209 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1210 PM3RD_ColorFormat_CI8_COLOR |
1211 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1212 tempmisc |= PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1213 break;
1214 case 12:
1215 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1216 PM3RD_PixelSize_16_BIT_PIXELS);
1217 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1218 PM3RD_ColorFormat_4444_COLOR |
1219 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1220 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1221 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1222 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1223 break;
1224 case 15:
1225 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1226 PM3RD_PixelSize_16_BIT_PIXELS);
1227 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1228 PM3RD_ColorFormat_5551_FRONT_COLOR |
1229 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1230 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1231 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1232 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1233 break;
1234 case 16:
1235 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1236 PM3RD_PixelSize_16_BIT_PIXELS);
1237 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1238 PM3RD_ColorFormat_565_FRONT_COLOR |
1239 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1240 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1241 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1242 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1243 break;
1244 case 32:
1245 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1246 PM3RD_PixelSize_32_BIT_PIXELS);
1247 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1248 PM3RD_ColorFormat_8888_COLOR |
1249 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1250 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1251 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1252 break;
1253 }
1254 PM3_WRITE_DAC_REG(PM3RD_MiscControl, tempmisc);
1255
1256 PM3_SHOW_CUR_MODE;
1257 }
1258
1259 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
1260 struct pm3fb_par *curpar)
1261 {
1262 unsigned long pixsize1, pixsize2, clockused;
1263 unsigned long pre, feedback, post;
1264
1265 DTRACE;
1266
1267 clockused = PM3_READ_REG(PM3VClkCtl);
1268
1269 switch (clockused) {
1270 case 3:
1271 pre = PM3_READ_DAC_REG(PM3RD_DClk3PreScale);
1272 feedback = PM3_READ_DAC_REG(PM3RD_DClk3FeedbackScale);
1273 post = PM3_READ_DAC_REG(PM3RD_DClk3PostScale);
1274
1275 DPRINTK(2,
1276 "DClk3 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1277 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1278 feedback,
1279 post));
1280 break;
1281 case 2:
1282 pre = PM3_READ_DAC_REG(PM3RD_DClk2PreScale);
1283 feedback = PM3_READ_DAC_REG(PM3RD_DClk2FeedbackScale);
1284 post = PM3_READ_DAC_REG(PM3RD_DClk2PostScale);
1285
1286 DPRINTK(2,
1287 "DClk2 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1288 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1289 feedback,
1290 post));
1291 break;
1292 case 1:
1293 pre = PM3_READ_DAC_REG(PM3RD_DClk1PreScale);
1294 feedback = PM3_READ_DAC_REG(PM3RD_DClk1FeedbackScale);
1295 post = PM3_READ_DAC_REG(PM3RD_DClk1PostScale);
1296
1297 DPRINTK(2,
1298 "DClk1 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1299 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1300 feedback,
1301 post));
1302 break;
1303 case 0:
1304 pre = PM3_READ_DAC_REG(PM3RD_DClk0PreScale);
1305 feedback = PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale);
1306 post = PM3_READ_DAC_REG(PM3RD_DClk0PostScale);
1307
1308 DPRINTK(2,
1309 "DClk0 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1310 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1311 feedback,
1312 post));
1313 break;
1314 default:
1315 pre = feedback = post = 0;
1316 DPRINTK(1, "Unknowk D clock used : %ld\n", clockused);
1317 break;
1318 }
1319
1320 curpar->pixclock = PM3_SCALE_TO_CLOCK(pre, feedback, post);
1321
1322 pixsize1 =
1323 PM3ByApertureMode_PIXELSIZE_MASK &
1324 (PM3_READ_REG(PM3ByAperture1Mode));
1325 pixsize2 =
1326 PM3ByApertureMode_PIXELSIZE_MASK &
1327 (PM3_READ_REG(PM3ByAperture2Mode));
1328
1329 DASSERT((pixsize1 == pixsize2),
1330 "pixsize the same in both aperture\n");
1331
1332 if (pixsize1 & PM3ByApertureMode_PIXELSIZE_32BIT)
1333 curpar->depth = 32;
1334 else if (pixsize1 & PM3ByApertureMode_PIXELSIZE_16BIT)
1335 {
1336 curpar->depth = 16;
1337 }
1338 else
1339 curpar->depth = 8;
1340
1341 /* not sure if I need to add one on the next ; it give better result with */
1342 curpar->htotal =
1343 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1344 1 + PM3_READ_REG(PM3HTotal));
1345 curpar->hsend =
1346 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1347 PM3_READ_REG(PM3HsEnd));
1348 curpar->hsstart =
1349 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1350 PM3_READ_REG(PM3HsStart));
1351 curpar->hbend =
1352 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1353 PM3_READ_REG(PM3HbEnd));
1354
1355 curpar->stride =
1356 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1357 PM3_READ_REG(PM3ScreenStride));
1358
1359 curpar->vtotal = 1 + PM3_READ_REG(PM3VTotal);
1360 curpar->vsend = 1 + PM3_READ_REG(PM3VsEnd);
1361 curpar->vsstart = 1 + PM3_READ_REG(PM3VsStart);
1362 curpar->vbend = PM3_READ_REG(PM3VbEnd);
1363
1364 curpar->video = PM3_READ_REG(PM3VideoControl);
1365
1366 curpar->base = PM3_READ_REG(PM3ScreenBase);
1367 curpar->width = curpar->htotal - curpar->hbend; /* make virtual == displayed resolution */
1368 curpar->height = curpar->vtotal - curpar->vbend;
1369
1370 DPRINTK(2, "Found : %d * %d, %d Khz, stride is %08x\n",
1371 curpar->width, curpar->height, curpar->pixclock,
1372 curpar->stride);
1373 }
1374
1375 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info)
1376 {
1377 unsigned long memsize = 0, tempBypass, i, temp1, temp2;
1378 u16 subvendor, subdevice;
1379 pm3fb_timing_result ptr;
1380
1381 DTRACE;
1382
1383 l_fb_info->fb_size = 64 * 1024 * 1024; /* pm3 aperture always 64 MB */
1384 pm3fb_mapIO(l_fb_info); /* temporary map IO */
1385
1386 DASSERT((l_fb_info->vIOBase != NULL),
1387 "IO successfully mapped before mem detect\n");
1388 DASSERT((l_fb_info->v_fb != NULL),
1389 "FB successfully mapped before mem detect\n");
1390
1391 /* card-specific stuff, *before* accessing *any* FB memory */
1392 if ((!pci_read_config_word
1393 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1394 &&
1395 (!pci_read_config_word
1396 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1397 i = 0; l_fb_info->board_type = 0;
1398 while ((cardbase[i].cardname[0]) && !(l_fb_info->board_type)) {
1399 if ((cardbase[i].subvendor == subvendor) &&
1400 (cardbase[i].subdevice == subdevice) &&
1401 (cardbase[i].func == PCI_FUNC(l_fb_info->dev->devfn))) {
1402 DPRINTK(2, "Card #%ld is an %s\n",
1403 l_fb_info->board_num,
1404 cardbase[i].cardname);
1405 if (cardbase[i].specific_setup)
1406 cardbase[i].specific_setup(l_fb_info);
1407 l_fb_info->board_type = i;
1408 }
1409 i++;
1410 }
1411 if (!l_fb_info->board_type) {
1412 DPRINTK(1, "Card #%ld is an unknown 0x%04x / 0x%04x\n",
1413 l_fb_info->board_num, subvendor, subdevice);
1414 }
1415 } else {
1416 printk(KERN_ERR "pm3fb: Error: pci_read_config_word failed, board #%ld\n",
1417 l_fb_info->board_num);
1418 }
1419
1420 if (printtimings)
1421 pm3fb_show_cur_timing(l_fb_info);
1422
1423 /* card-specific setup is done, we preserve the final
1424 memory timing for future reference */
1425 if ((ptr = pm3fb_preserve_memory_timings(l_fb_info)) == pm3fb_timing_problem) { /* memory timings were wrong ! oops.... */
1426 return(0);
1427 }
1428
1429 tempBypass = PM3_READ_REG(PM3MemBypassWriteMask);
1430
1431 DPRINTK(2, "PM3MemBypassWriteMask was: 0x%08lx\n", tempBypass);
1432
1433 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xFFFFFFFF);
1434
1435 /* pm3 split up memory, replicates, and do a lot of nasty stuff IMHO ;-) */
1436 for (i = 0; i < 32; i++) {
1437 fb_writel(i * 0x00345678,
1438 (l_fb_info->v_fb + (i * 1048576)));
1439 mb();
1440 temp1 = fb_readl((l_fb_info->v_fb + (i * 1048576)));
1441
1442 /* Let's check for wrapover, write will fail at 16MB boundary */
1443 if (temp1 == (i * 0x00345678))
1444 memsize = i;
1445 else
1446 break;
1447 }
1448
1449 DPRINTK(2, "First detect pass already got %ld MB\n", memsize + 1);
1450
1451 if (memsize == i) {
1452 for (i = 0; i < 32; i++) {
1453 /* Clear first 32MB ; 0 is 0, no need to byteswap */
1454 writel(0x0000000,
1455 (l_fb_info->v_fb + (i * 1048576)));
1456 mb();
1457 }
1458
1459 for (i = 32; i < 64; i++) {
1460 fb_writel(i * 0x00345678,
1461 (l_fb_info->v_fb + (i * 1048576)));
1462 mb();
1463 temp1 =
1464 fb_readl((l_fb_info->v_fb + (i * 1048576)));
1465 temp2 =
1466 fb_readl((l_fb_info->v_fb +
1467 ((i - 32) * 1048576)));
1468 if ((temp1 == (i * 0x00345678)) && (temp2 == 0)) /* different value, different RAM... */
1469 memsize = i;
1470 else
1471 break;
1472 }
1473 }
1474
1475 DPRINTK(2, "Second detect pass got %ld MB\n", memsize + 1);
1476
1477 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, tempBypass);
1478
1479 pm3fb_unmapIO(l_fb_info);
1480 memsize = 1048576 * (memsize + 1);
1481
1482 DPRINTK(2, "Returning 0x%08lx bytes\n", memsize);
1483
1484 if (forcesize[l_fb_info->board_num] && ((forcesize[l_fb_info->board_num] * 1048576) != memsize))
1485 {
1486 printk(KERN_WARNING "pm3fb: mismatch between probed (%ld MB) and specified (%hd MB) memory size, using SPECIFIED !\n", memsize, forcesize[l_fb_info->board_num]);
1487 memsize = 1048576 * forcesize[l_fb_info->board_num];
1488 }
1489
1490 l_fb_info->fb_size = memsize;
1491
1492 if (ptr == pm3fb_timing_retry)
1493 {
1494 printk(KERN_WARNING "pm3fb: retrying memory timings check");
1495 if (pm3fb_try_memory_timings(l_fb_info) == pm3fb_timing_problem)
1496 return(0);
1497 }
1498
1499 return (memsize);
1500 }
1501
1502 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc)
1503 {
1504 int i;
1505
1506 DTRACE;
1507
1508 for (i = 0; i < (l_fb_info->fb_size / sizeof(u32)) ; i++) /* clear entire FB memory to black */
1509 {
1510 fb_writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1511 }
1512 }
1513
1514 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b)
1515 {
1516 int i;
1517
1518 DTRACE;
1519
1520 for (i = 0; i < 256 ; i++) /* fill color map with white */
1521 pm3fb_set_color(l_fb_info, i, r, g, b);
1522
1523 }
1524
1525 /* common initialisation */
1526 static void pm3fb_common_init(struct pm3fb_info *l_fb_info)
1527 {
1528 DTRACE;
1529
1530 DPRINTK(2, "Initializing board #%ld @ %lx\n", l_fb_info->board_num,
1531 (unsigned long) l_fb_info);
1532
1533 strcpy(l_fb_info->gen.info.modename, permedia3_name);
1534 disp[l_fb_info->board_num].scrollmode = 0; /* SCROLL_YNOMOVE; *//* 0 means "let fbcon choose" */
1535 l_fb_info->gen.parsize = sizeof(struct pm3fb_par);
1536 l_fb_info->gen.info.changevar = NULL;
1537 l_fb_info->gen.info.fbops = &pm3fb_ops;
1538 l_fb_info->gen.info.disp = &(disp[l_fb_info->board_num]);
1539 if (fontn[l_fb_info->board_num][0])
1540 strcpy(l_fb_info->gen.info.fontname,
1541 fontn[l_fb_info->board_num]);
1542 l_fb_info->gen.info.switch_con = &fbgen_switch;
1543 l_fb_info->gen.info.updatevar = &fbgen_update_var; /* */
1544 l_fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
1545
1546 pm3fb_mapIO(l_fb_info);
1547
1548 pm3fb_clear_memory(l_fb_info, 0);
1549 pm3fb_clear_colormap(l_fb_info, 0, 0, 0);
1550
1551 (void) fbgen_get_var(&(disp[l_fb_info->board_num]).var, -1,
1552 &l_fb_info->gen.info);
1553
1554 if (depth[l_fb_info->board_num]) /* override mode-defined depth */
1555 {
1556 pm3fb_encode_depth(&(disp[l_fb_info->board_num]).var, depth[l_fb_info->board_num]);
1557 (disp[l_fb_info->board_num]).var.bits_per_pixel = depth2bpp(depth[l_fb_info->board_num]);
1558 }
1559
1560 (void) fbgen_do_set_var(&(disp[l_fb_info->board_num]).var, 1,
1561 &l_fb_info->gen);
1562
1563 fbgen_set_disp(-1, &l_fb_info->gen);
1564
1565 do_install_cmap(0, &l_fb_info->gen.info);
1566
1567 if (register_framebuffer(&l_fb_info->gen.info) < 0) {
1568 DPRINTK(1, "Couldn't register framebuffer\n");
1569 return;
1570 }
1571
1572 PM3_WRITE_DAC_REG(PM3RD_CursorMode,
1573 PM3RD_CursorMode_CURSOR_DISABLE);
1574
1575 PM3_SHOW_CUR_MODE;
1576
1577 pm3fb_write_mode(l_fb_info);
1578
1579 printk("fb%d: %s, using %uK of video memory (%s)\n",
1580 l_fb_info->gen.info.node,
1581 permedia3_name, (u32) (l_fb_info->fb_size >> 10),
1582 cardbase[l_fb_info->board_type].cardname);
1583 }
1584
1585 /* **************************************************** */
1586 /* ***** accelerated permedia3-specific functions ***** */
1587 /* **************************************************** */
1588 #ifdef PM3FB_USE_ACCEL
1589 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info)
1590 {
1591 DTRACE;
1592
1593 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1594 PM3_SLOW_WRITE_REG(PM3Sync, 0);
1595 mb();
1596 do {
1597 while ((PM3_READ_REG(PM3OutFIFOWords)) == 0);
1598 rmb();
1599 } while ((PM3_READ_REG(PM3OutputFifo)) != PM3Sync_Tag);
1600 }
1601
1602 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info)
1603 {
1604 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1605 PM3_SLOW_WRITE_REG(PM3StatisticMode, 0x0);
1606 PM3_SLOW_WRITE_REG(PM3DeltaMode, 0x0);
1607 PM3_SLOW_WRITE_REG(PM3RasterizerMode, 0x0);
1608 PM3_SLOW_WRITE_REG(PM3ScissorMode, 0x0);
1609 PM3_SLOW_WRITE_REG(PM3LineStippleMode, 0x0);
1610 PM3_SLOW_WRITE_REG(PM3AreaStippleMode, 0x0);
1611 PM3_SLOW_WRITE_REG(PM3GIDMode, 0x0);
1612 PM3_SLOW_WRITE_REG(PM3DepthMode, 0x0);
1613 PM3_SLOW_WRITE_REG(PM3StencilMode, 0x0);
1614 PM3_SLOW_WRITE_REG(PM3StencilData, 0x0);
1615 PM3_SLOW_WRITE_REG(PM3ColorDDAMode, 0x0);
1616 PM3_SLOW_WRITE_REG(PM3TextureCoordMode, 0x0);
1617 PM3_SLOW_WRITE_REG(PM3TextureIndexMode0, 0x0);
1618 PM3_SLOW_WRITE_REG(PM3TextureIndexMode1, 0x0);
1619 PM3_SLOW_WRITE_REG(PM3TextureReadMode, 0x0);
1620 PM3_SLOW_WRITE_REG(PM3LUTMode, 0x0);
1621 PM3_SLOW_WRITE_REG(PM3TextureFilterMode, 0x0);
1622 PM3_SLOW_WRITE_REG(PM3TextureCompositeMode, 0x0);
1623 PM3_SLOW_WRITE_REG(PM3TextureApplicationMode, 0x0);
1624 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode1, 0x0);
1625 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode1, 0x0);
1626 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode0, 0x0);
1627 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode0, 0x0);
1628 PM3_SLOW_WRITE_REG(PM3FogMode, 0x0);
1629 PM3_SLOW_WRITE_REG(PM3ChromaTestMode, 0x0);
1630 PM3_SLOW_WRITE_REG(PM3AlphaTestMode, 0x0);
1631 PM3_SLOW_WRITE_REG(PM3AntialiasMode, 0x0);
1632 PM3_SLOW_WRITE_REG(PM3YUVMode, 0x0);
1633 PM3_SLOW_WRITE_REG(PM3AlphaBlendColorMode, 0x0);
1634 PM3_SLOW_WRITE_REG(PM3AlphaBlendAlphaMode, 0x0);
1635 PM3_SLOW_WRITE_REG(PM3DitherMode, 0x0);
1636 PM3_SLOW_WRITE_REG(PM3LogicalOpMode, 0x0);
1637 PM3_SLOW_WRITE_REG(PM3RouterMode, 0x0);
1638 PM3_SLOW_WRITE_REG(PM3Window, 0x0);
1639
1640 PM3_SLOW_WRITE_REG(PM3Config2D, 0x0);
1641
1642 PM3_SLOW_WRITE_REG(PM3SpanColorMask, 0xffffffff);
1643
1644 PM3_SLOW_WRITE_REG(PM3XBias, 0x0);
1645 PM3_SLOW_WRITE_REG(PM3YBias, 0x0);
1646 PM3_SLOW_WRITE_REG(PM3DeltaControl, 0x0);
1647
1648 PM3_SLOW_WRITE_REG(PM3BitMaskPattern, 0xffffffff);
1649
1650 PM3_SLOW_WRITE_REG(PM3FBDestReadEnables,
1651 PM3FBDestReadEnables_E(0xff) |
1652 PM3FBDestReadEnables_R(0xff) |
1653 PM3FBDestReadEnables_ReferenceAlpha(0xff));
1654 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferAddr0, 0x0);
1655 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferOffset0, 0x0);
1656 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferWidth0,
1657 PM3FBDestReadBufferWidth_Width(l_fb_info->
1658 current_par->
1659 width));
1660
1661 PM3_SLOW_WRITE_REG(PM3FBDestReadMode,
1662 PM3FBDestReadMode_ReadEnable |
1663 PM3FBDestReadMode_Enable0);
1664 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferAddr, 0x0);
1665 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferOffset, 0x0);
1666 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferWidth,
1667 PM3FBSourceReadBufferWidth_Width(l_fb_info->
1668 current_par->
1669 width));
1670 PM3_SLOW_WRITE_REG(PM3FBSourceReadMode,
1671 PM3FBSourceReadMode_Blocking |
1672 PM3FBSourceReadMode_ReadEnable);
1673
1674 {
1675 unsigned long rm = 1;
1676 switch (l_fb_info->current_par->depth) {
1677 case 8:
1678 PM3_SLOW_WRITE_REG(PM3PixelSize,
1679 PM3PixelSize_GLOBAL_8BIT);
1680 break;
1681 case 12:
1682 case 15:
1683 case 16:
1684 PM3_SLOW_WRITE_REG(PM3PixelSize,
1685 PM3PixelSize_GLOBAL_16BIT);
1686 break;
1687 case 32:
1688 PM3_SLOW_WRITE_REG(PM3PixelSize,
1689 PM3PixelSize_GLOBAL_32BIT);
1690 break;
1691 default:
1692 DPRINTK(1, "Unsupported depth %d\n",
1693 l_fb_info->current_par->depth);
1694 break;
1695 }
1696 PM3_SLOW_WRITE_REG(PM3RasterizerMode, rm);
1697 }
1698
1699 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xffffffff);
1700 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xffffffff);
1701 PM3_SLOW_WRITE_REG(PM3FBWriteMode,
1702 PM3FBWriteMode_WriteEnable |
1703 PM3FBWriteMode_OpaqueSpan |
1704 PM3FBWriteMode_Enable0);
1705 PM3_SLOW_WRITE_REG(PM3FBWriteBufferAddr0, 0x0);
1706 PM3_SLOW_WRITE_REG(PM3FBWriteBufferOffset0, 0x0);
1707 PM3_SLOW_WRITE_REG(PM3FBWriteBufferWidth0,
1708 PM3FBWriteBufferWidth_Width(l_fb_info->
1709 current_par->
1710 width));
1711
1712 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 0x0);
1713 {
1714 unsigned long sofb = (8UL * l_fb_info->fb_size) /
1715 ((depth2bpp(l_fb_info->current_par->depth))
1716 * l_fb_info->current_par->width); /* size in lines of FB */
1717 if (sofb > 4095)
1718 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 4095);
1719 else
1720 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, sofb);
1721
1722 switch (l_fb_info->current_par->depth) {
1723 case 8:
1724 PM3_SLOW_WRITE_REG(PM3DitherMode,
1725 (1 << 10) | (2 << 3));
1726 break;
1727 case 12:
1728 case 15:
1729 case 16:
1730 PM3_SLOW_WRITE_REG(PM3DitherMode,
1731 (1 << 10) | (1 << 3));
1732 break;
1733 case 32:
1734 PM3_SLOW_WRITE_REG(PM3DitherMode,
1735 (1 << 10) | (0 << 3));
1736 break;
1737 default:
1738 DPRINTK(1, "Unsupported depth %d\n",
1739 l_fb_info->current_par->depth);
1740 break;
1741 }
1742 }
1743
1744 PM3_SLOW_WRITE_REG(PM3dXDom, 0x0);
1745 PM3_SLOW_WRITE_REG(PM3dXSub, 0x0);
1746 PM3_SLOW_WRITE_REG(PM3dY, (1 << 16));
1747 PM3_SLOW_WRITE_REG(PM3StartXDom, 0x0);
1748 PM3_SLOW_WRITE_REG(PM3StartXSub, 0x0);
1749 PM3_SLOW_WRITE_REG(PM3StartY, 0x0);
1750 PM3_SLOW_WRITE_REG(PM3Count, 0x0);
1751
1752 /* Disable LocalBuffer. better safe than sorry */
1753 PM3_SLOW_WRITE_REG(PM3LBDestReadMode, 0x0);
1754 PM3_SLOW_WRITE_REG(PM3LBDestReadEnables, 0x0);
1755 PM3_SLOW_WRITE_REG(PM3LBSourceReadMode, 0x0);
1756 PM3_SLOW_WRITE_REG(PM3LBWriteMode, 0x0);
1757
1758 pm3fb_wait_pm3(l_fb_info);
1759 }
1760
1761 #ifdef FBCON_HAS_CFB32
1762 static void pm3fb_cfb32_clear(struct vc_data *conp,
1763 struct display *p,
1764 int sy, int sx, int height, int width)
1765 {
1766 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1767 u32 c;
1768
1769 DTRACE;
1770
1771 sx = sx * fontwidth(p);
1772 width = width * fontwidth(p);
1773 sy = sy * fontheight(p);
1774 height = height * fontheight(p);
1775 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1776
1777 /* block fills in 32bpp are hard, but in low res (width <= 1600 :-)
1778 we can use 16bpp operations, but not if NoWriteMask is on (SDRAM) */
1779 if ((l_fb_info->current_par->width > 1600) ||
1780 (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)) {
1781 PM3_WAIT(4);
1782
1783 PM3_WRITE_REG(PM3Config2D,
1784 PM3Config2D_UseConstantSource |
1785 PM3Config2D_ForegroundROPEnable |
1786 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1787 PM3Config2D_FBWriteEnable);
1788
1789 PM3_WRITE_REG(PM3ForegroundColor, c);
1790
1791 PM3_WRITE_REG(PM3RectanglePosition,
1792 (PM3RectanglePosition_XOffset(sx)) |
1793 (PM3RectanglePosition_YOffset(sy)));
1794
1795 PM3_WRITE_REG(PM3Render2D,
1796 PM3Render2D_XPositive |
1797 PM3Render2D_YPositive |
1798 PM3Render2D_Operation_Normal |
1799 PM3Render2D_SpanOperation |
1800 (PM3Render2D_Width(width)) |
1801 (PM3Render2D_Height(height)));
1802 } else {
1803 PM3_WAIT(8);
1804
1805 PM3_WRITE_REG(PM3FBBlockColor, c);
1806
1807 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_16BIT);
1808
1809 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1810 PM3FBWriteBufferWidth_Width(l_fb_info->
1811 current_par->
1812 width << 1));
1813
1814 PM3_WRITE_REG(PM3Config2D,
1815 PM3Config2D_UseConstantSource |
1816 PM3Config2D_ForegroundROPEnable |
1817 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1818 PM3Config2D_FBWriteEnable);
1819
1820 PM3_WRITE_REG(PM3RectanglePosition,
1821 (PM3RectanglePosition_XOffset(sx << 1)) |
1822 (PM3RectanglePosition_YOffset(sy)));
1823
1824 PM3_WRITE_REG(PM3Render2D,
1825 PM3Render2D_XPositive |
1826 PM3Render2D_YPositive |
1827 PM3Render2D_Operation_Normal |
1828 (PM3Render2D_Width(width << 1)) |
1829 (PM3Render2D_Height(height)));
1830
1831 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1832 PM3FBWriteBufferWidth_Width(l_fb_info->
1833 current_par->
1834 width));
1835
1836 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_32BIT);
1837 }
1838
1839 pm3fb_wait_pm3(l_fb_info);
1840 }
1841
1842 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
1843 struct display *p, int bottom_only)
1844 {
1845 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1846 int sx, sy;
1847 u32 c;
1848
1849 DTRACE;
1850
1851 sx = conp->vc_cols * fontwidth(p); /* right margin */
1852 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1853 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1854
1855 if (!bottom_only) { /* right margin top->bottom */
1856 PM3_WAIT(4);
1857
1858 PM3_WRITE_REG(PM3Config2D,
1859 PM3Config2D_UseConstantSource |
1860 PM3Config2D_ForegroundROPEnable |
1861 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1862 PM3Config2D_FBWriteEnable);
1863
1864 PM3_WRITE_REG(PM3ForegroundColor, c);
1865
1866 PM3_WRITE_REG(PM3RectanglePosition,
1867 (PM3RectanglePosition_XOffset
1868 (p->var.xoffset +
1869 sx)) | (PM3RectanglePosition_YOffset(p->
1870 var.
1871 yoffset)));
1872
1873 PM3_WRITE_REG(PM3Render2D,
1874 PM3Render2D_XPositive |
1875 PM3Render2D_YPositive |
1876 PM3Render2D_Operation_Normal |
1877 PM3Render2D_SpanOperation |
1878 (PM3Render2D_Width(p->var.xres - sx)) |
1879 (PM3Render2D_Height(p->var.yres)));
1880 }
1881
1882 /* bottom margin left -> right */
1883 PM3_WAIT(4);
1884
1885 PM3_WRITE_REG(PM3Config2D,
1886 PM3Config2D_UseConstantSource |
1887 PM3Config2D_ForegroundROPEnable |
1888 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1889 PM3Config2D_FBWriteEnable);
1890
1891 PM3_WRITE_REG(PM3ForegroundColor, c);
1892
1893 PM3_WRITE_REG(PM3RectanglePosition,
1894 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
1895 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
1896
1897 PM3_WRITE_REG(PM3Render2D,
1898 PM3Render2D_XPositive |
1899 PM3Render2D_YPositive |
1900 PM3Render2D_Operation_Normal |
1901 PM3Render2D_SpanOperation |
1902 (PM3Render2D_Width(p->var.xres)) |
1903 (PM3Render2D_Height(p->var.yres - sy)));
1904
1905 pm3fb_wait_pm3(l_fb_info);
1906 }
1907 #endif /* FBCON_HAS_CFB32 */
1908 #ifdef FBCON_HAS_CFB16
1909 static void pm3fb_cfb16_clear(struct vc_data *conp,
1910 struct display *p,
1911 int sy, int sx, int height, int width)
1912 {
1913 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1914 u32 c;
1915
1916 DTRACE;
1917
1918 sx = sx * fontwidth(p);
1919 width = width * fontwidth(p);
1920 sy = sy * fontheight(p);
1921 height = height * fontheight(p);
1922 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1923 c = c | (c << 16);
1924
1925 PM3_WAIT(4);
1926
1927 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1928 PM3_WRITE_REG(PM3ForegroundColor, c);
1929 else
1930 PM3_WRITE_REG(PM3FBBlockColor, c);
1931
1932 PM3_WRITE_REG(PM3Config2D,
1933 PM3Config2D_UseConstantSource |
1934 PM3Config2D_ForegroundROPEnable |
1935 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1936 PM3Config2D_FBWriteEnable);
1937
1938 PM3_WRITE_REG(PM3RectanglePosition,
1939 (PM3RectanglePosition_XOffset(sx)) |
1940 (PM3RectanglePosition_YOffset(sy)));
1941
1942 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1943 PM3_WRITE_REG(PM3Render2D,
1944 PM3Render2D_XPositive |
1945 PM3Render2D_YPositive |
1946 PM3Render2D_Operation_Normal |
1947 PM3Render2D_SpanOperation |
1948 (PM3Render2D_Width(width)) |
1949 (PM3Render2D_Height(height)));
1950 else
1951 PM3_WRITE_REG(PM3Render2D,
1952 PM3Render2D_XPositive |
1953 PM3Render2D_YPositive |
1954 PM3Render2D_Operation_Normal |
1955 (PM3Render2D_Width(width)) |
1956 (PM3Render2D_Height(height)));
1957
1958 pm3fb_wait_pm3(l_fb_info);
1959 }
1960
1961 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
1962 struct display *p, int bottom_only)
1963 {
1964 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1965 int sx, sy;
1966 u32 c;
1967
1968 DTRACE;
1969
1970 sx = conp->vc_cols * fontwidth(p); /* right margin */
1971 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1972 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1973 c = c | (c << 16);
1974
1975 if (!bottom_only) { /* right margin top->bottom */
1976 PM3_WAIT(4);
1977
1978 PM3_WRITE_REG(PM3Config2D,
1979 PM3Config2D_UseConstantSource |
1980 PM3Config2D_ForegroundROPEnable |
1981 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1982 PM3Config2D_FBWriteEnable);
1983
1984 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1985 PM3_WRITE_REG(PM3ForegroundColor, c);
1986 else
1987 PM3_WRITE_REG(PM3FBBlockColor, c);
1988
1989 PM3_WRITE_REG(PM3RectanglePosition,
1990 (PM3RectanglePosition_XOffset
1991 (p->var.xoffset +
1992 sx)) | (PM3RectanglePosition_YOffset(p->
1993 var.
1994 yoffset)));
1995 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1996 PM3_WRITE_REG(PM3Render2D,
1997 PM3Render2D_XPositive |
1998 PM3Render2D_YPositive |
1999 PM3Render2D_Operation_Normal |
2000 PM3Render2D_SpanOperation |
2001 (PM3Render2D_Width(p->var.xres - sx)) |
2002 (PM3Render2D_Height(p->var.yres)));
2003 else
2004 PM3_WRITE_REG(PM3Render2D,
2005 PM3Render2D_XPositive |
2006 PM3Render2D_YPositive |
2007 PM3Render2D_Operation_Normal |
2008 (PM3Render2D_Width(p->var.xres - sx)) |
2009 (PM3Render2D_Height(p->var.yres)));
2010 }
2011
2012 /* bottom margin left -> right */
2013 PM3_WAIT(4);
2014
2015 PM3_WRITE_REG(PM3Config2D,
2016 PM3Config2D_UseConstantSource |
2017 PM3Config2D_ForegroundROPEnable |
2018 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2019 PM3Config2D_FBWriteEnable);
2020
2021 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2022 PM3_WRITE_REG(PM3ForegroundColor, c);
2023 else
2024 PM3_WRITE_REG(PM3FBBlockColor, c);
2025
2026
2027 PM3_WRITE_REG(PM3RectanglePosition,
2028 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2029 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2030
2031 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2032 PM3_WRITE_REG(PM3Render2D,
2033 PM3Render2D_XPositive |
2034 PM3Render2D_YPositive |
2035 PM3Render2D_Operation_Normal |
2036 PM3Render2D_SpanOperation |
2037 (PM3Render2D_Width(p->var.xres)) |
2038 (PM3Render2D_Height(p->var.yres - sy)));
2039 else
2040 PM3_WRITE_REG(PM3Render2D,
2041 PM3Render2D_XPositive |
2042 PM3Render2D_YPositive |
2043 PM3Render2D_Operation_Normal |
2044 (PM3Render2D_Width(p->var.xres)) |
2045 (PM3Render2D_Height(p->var.yres - sy)));
2046
2047 pm3fb_wait_pm3(l_fb_info);
2048 }
2049 #endif /* FBCON_HAS_CFB16 */
2050 #ifdef FBCON_HAS_CFB8
2051 static void pm3fb_cfb8_clear(struct vc_data *conp,
2052 struct display *p,
2053 int sy, int sx, int height, int width)
2054 {
2055 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2056 u32 c;
2057
2058 DTRACE;
2059
2060 sx = sx * fontwidth(p);
2061 width = width * fontwidth(p);
2062 sy = sy * fontheight(p);
2063 height = height * fontheight(p);
2064
2065 c = attr_bgcol_ec(p, conp);
2066 c |= c << 8;
2067 c |= c << 16;
2068
2069 PM3_WAIT(4);
2070
2071 PM3_WRITE_REG(PM3Config2D,
2072 PM3Config2D_UseConstantSource |
2073 PM3Config2D_ForegroundROPEnable |
2074 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2075 PM3Config2D_FBWriteEnable);
2076
2077 PM3_WRITE_REG(PM3ForegroundColor, c);
2078
2079 PM3_WRITE_REG(PM3RectanglePosition,
2080 (PM3RectanglePosition_XOffset(sx)) |
2081 (PM3RectanglePosition_YOffset(sy)));
2082
2083 PM3_WRITE_REG(PM3Render2D,
2084 PM3Render2D_XPositive |
2085 PM3Render2D_YPositive |
2086 PM3Render2D_Operation_Normal |
2087 PM3Render2D_SpanOperation |
2088 (PM3Render2D_Width(width)) |
2089 (PM3Render2D_Height(height)));
2090
2091 pm3fb_wait_pm3(l_fb_info);
2092 }
2093
2094 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
2095 struct display *p, int bottom_only)
2096 {
2097 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2098 int sx, sy;
2099 u32 c;
2100
2101 DTRACE;
2102
2103 sx = conp->vc_cols * fontwidth(p); /* right margin */
2104 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2105 c = attr_bgcol_ec(p, conp);
2106 c |= c << 8;
2107 c |= c << 16;
2108
2109 if (!bottom_only) { /* right margin top->bottom */
2110 PM3_WAIT(4);
2111
2112 PM3_WRITE_REG(PM3Config2D,
2113 PM3Config2D_UseConstantSource |
2114 PM3Config2D_ForegroundROPEnable |
2115 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2116 PM3Config2D_FBWriteEnable);
2117
2118 PM3_WRITE_REG(PM3ForegroundColor, c);
2119
2120 PM3_WRITE_REG(PM3RectanglePosition,
2121 (PM3RectanglePosition_XOffset
2122 (p->var.xoffset +
2123 sx)) | (PM3RectanglePosition_YOffset(p->
2124 var.
2125 yoffset)));
2126
2127 PM3_WRITE_REG(PM3Render2D,
2128 PM3Render2D_XPositive |
2129 PM3Render2D_YPositive |
2130 PM3Render2D_Operation_Normal |
2131 PM3Render2D_SpanOperation |
2132 (PM3Render2D_Width(p->var.xres - sx)) |
2133 (PM3Render2D_Height(p->var.yres)));
2134 }
2135
2136 /* bottom margin left -> right */
2137 PM3_WAIT(4);
2138
2139 PM3_WRITE_REG(PM3Config2D,
2140 PM3Config2D_UseConstantSource |
2141 PM3Config2D_ForegroundROPEnable |
2142 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2143 PM3Config2D_FBWriteEnable);
2144
2145 PM3_WRITE_REG(PM3ForegroundColor, c);
2146
2147 PM3_WRITE_REG(PM3RectanglePosition,
2148 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2149 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2150
2151 PM3_WRITE_REG(PM3Render2D,
2152 PM3Render2D_XPositive |
2153 PM3Render2D_YPositive |
2154 PM3Render2D_Operation_Normal |
2155 PM3Render2D_SpanOperation |
2156 (PM3Render2D_Width(p->var.xres)) |
2157 (PM3Render2D_Height(p->var.yres - sy)));
2158
2159 pm3fb_wait_pm3(l_fb_info);
2160 }
2161 #endif /* FBCON_HAS_CFB8 */
2162 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
2163 static void pm3fb_cfbX_bmove(struct display *p,
2164 int sy, int sx,
2165 int dy, int dx, int height, int width)
2166 {
2167 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2168 int x_align, o_x, o_y;
2169
2170 DTRACE;
2171
2172 sx = sx * fontwidth(p);
2173 dx = dx * fontwidth(p);
2174 width = width * fontwidth(p);
2175 sy = sy * fontheight(p);
2176 dy = dy * fontheight(p);
2177 height = height * fontheight(p);
2178
2179 o_x = sx - dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
2180 o_y = sy - dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
2181
2182 x_align = (sx & 0x1f);
2183
2184 PM3_WAIT(6);
2185
2186 PM3_WRITE_REG(PM3Config2D,
2187 PM3Config2D_UserScissorEnable |
2188 PM3Config2D_ForegroundROPEnable |
2189 PM3Config2D_Blocking |
2190 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2191 PM3Config2D_FBWriteEnable);
2192
2193 PM3_WRITE_REG(PM3ScissorMinXY,
2194 ((dy & 0x0fff) << 16) | (dx & 0x0fff));
2195 PM3_WRITE_REG(PM3ScissorMaxXY,
2196 (((dy + height) & 0x0fff) << 16) |
2197 ((dx + width) & 0x0fff));
2198
2199 PM3_WRITE_REG(PM3FBSourceReadBufferOffset,
2200 PM3FBSourceReadBufferOffset_XOffset(o_x) |
2201 PM3FBSourceReadBufferOffset_YOffset(o_y));
2202
2203 PM3_WRITE_REG(PM3RectanglePosition,
2204 (PM3RectanglePosition_XOffset(dx - x_align)) |
2205 (PM3RectanglePosition_YOffset(dy)));
2206
2207 PM3_WRITE_REG(PM3Render2D,
2208 ((sx > dx) ? PM3Render2D_XPositive : 0) |
2209 ((sy > dy) ? PM3Render2D_YPositive : 0) |
2210 PM3Render2D_Operation_Normal |
2211 PM3Render2D_SpanOperation |
2212 PM3Render2D_FBSourceReadEnable |
2213 (PM3Render2D_Width(width + x_align)) |
2214 (PM3Render2D_Height(height)));
2215
2216 pm3fb_wait_pm3(l_fb_info);
2217 }
2218
2219 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
2220 int c, int yy, int xx)
2221 {
2222 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2223 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2224 u32 fgx, bgx, ldat;
2225 int sx, sy, i;
2226
2227 DTRACE;
2228
2229 if (l_fb_info->current_par->depth == 8)
2230 fgx = attr_fgcol(p, c);
2231 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2232 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, c)];
2233 else
2234 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, c)];
2235
2236 PM3_COLOR(fgx);
2237
2238 if (l_fb_info->current_par->depth == 8)
2239 bgx = attr_bgcol(p, c);
2240 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2241 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, c)];
2242 else
2243 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, c)];
2244
2245 PM3_COLOR(bgx);
2246
2247 PM3_WAIT(4);
2248
2249 PM3_WRITE_REG(PM3Config2D,
2250 PM3Config2D_UseConstantSource |
2251 PM3Config2D_ForegroundROPEnable |
2252 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2253 PM3Config2D_FBWriteEnable | PM3Config2D_OpaqueSpan);
2254
2255 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2256 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2257
2258 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2259 /* and 16 bits for fontwidth <= 16 */
2260 /* same in _putcs, same for Y and fontheight */
2261 if (fontwidth(p) <= 8)
2262 asx = 2;
2263 else if (fontwidth(p) <= 16)
2264 asx = 3; /* look OK */
2265 if (fontheight(p) <= 8)
2266 asy = 2;
2267 else if (fontheight(p) <= 16)
2268 asy = 3; /* look OK */
2269 else if (fontheight(p) <= 32)
2270 asy = 4; /* look OK */
2271
2272 sx = xx * fontwidth(p);
2273 sy = yy * fontheight(p);
2274
2275 if (fontwidth(p) <= 8)
2276 o_x = (8 - (sx & 0x7)) & 0x7;
2277 else if (fontwidth(p) <= 16)
2278 o_x = (16 - (sx & 0xF)) & 0xF;
2279 if (fontheight(p) <= 8)
2280 o_y = (8 - (sy & 0x7)) & 0x7;
2281 else if (fontheight(p) <= 16)
2282 o_y = (16 - (sy & 0xF)) & 0xF;
2283 else if (fontheight(p) <= 32)
2284 o_y = (32 - (sy & 0x1F)) & 0x1F;
2285
2286 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2287 (1 << 18) | /* BE */
2288 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2289 (1 << 20)); /* OpaqueSpan */
2290
2291 if (fontwidth(p) <= 8) {
2292 cdat = p->fontdata + (c & p->charmask) * fontheight(p);
2293 } else {
2294 cdat =
2295 p->fontdata +
2296 ((c & p->charmask) * (fontheight(p) << 1));
2297 }
2298
2299 PM3_WAIT(2 + fontheight(p));
2300
2301 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2302 if (fontwidth(p) <= 8) {
2303 ldat = *cdat++;
2304 } else { /* assume fontwidth <= 16 ATM */
2305
2306 ldat = ((*cdat++) << 8);
2307 ldat |= *cdat++;
2308 }
2309 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2310 }
2311
2312 PM3_WRITE_REG(PM3RectanglePosition,
2313 (PM3RectanglePosition_XOffset(sx)) |
2314 (PM3RectanglePosition_YOffset(sy)));
2315
2316 PM3_WRITE_REG(PM3Render2D,
2317 PM3Render2D_AreaStippleEnable |
2318 PM3Render2D_XPositive |
2319 PM3Render2D_YPositive |
2320 PM3Render2D_Operation_Normal |
2321 PM3Render2D_SpanOperation |
2322 (PM3Render2D_Width(fontwidth(p))) |
2323 (PM3Render2D_Height(fontheight(p))));
2324
2325 pm3fb_wait_pm3(l_fb_info);
2326 }
2327
2328 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
2329 const unsigned short *s, int count, int yy,
2330 int xx)
2331 {
2332 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2333 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2334 u32 fgx, bgx, ldat;
2335 int sx, sy, i, j;
2336 u16 sc;
2337
2338 DTRACE;
2339
2340 sc = scr_readw(s);
2341 if (l_fb_info->current_par->depth == 8)
2342 fgx = attr_fgcol(p, sc);
2343 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2344 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, sc)];
2345 else
2346 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, sc)];
2347
2348 PM3_COLOR(fgx);
2349
2350 if (l_fb_info->current_par->depth == 8)
2351 bgx = attr_bgcol(p, sc);
2352 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2353 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, sc)];
2354 else
2355 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, sc)];
2356
2357 PM3_COLOR(bgx);
2358
2359 PM3_WAIT(4);
2360
2361 PM3_WRITE_REG(PM3Config2D,
2362 PM3Config2D_UseConstantSource |
2363 PM3Config2D_ForegroundROPEnable |
2364 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2365 PM3Config2D_FBWriteEnable |
2366 PM3Config2D_OpaqueSpan);
2367
2368 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2369 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2370
2371 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2372 /* and 16 bits for fontwidth <= 16 */
2373 /* same in _putc, same for Y and fontheight */
2374 if (fontwidth(p) <= 8)
2375 asx = 2;
2376 else if (fontwidth(p) <= 16)
2377 asx = 3; /* look OK */
2378 if (fontheight(p) <= 8)
2379 asy = 2;
2380 else if (fontheight(p) <= 16)
2381 asy = 3; /* look OK */
2382 else if (fontheight(p) <= 32)
2383 asy = 4; /* look OK */
2384
2385 sy = yy * fontheight(p);
2386
2387 if (fontheight(p) <= 8)
2388 o_y = (8 - (sy & 0x7)) & 0x7;
2389 else if (fontheight(p) <= 16)
2390 o_y = (16 - (sy & 0xF)) & 0xF;
2391 else if (fontheight(p) <= 32)
2392 o_y = (32 - (sy & 0x1F)) & 0x1F;
2393
2394 for (j = 0; j < count; j++) {
2395 sc = scr_readw(s + j);
2396 if (fontwidth(p) <= 8)
2397 cdat = p->fontdata +
2398 (sc & p->charmask) * fontheight(p);
2399 else
2400 cdat = p->fontdata +
2401 ((sc & p->charmask) * fontheight(p) << 1);
2402
2403 sx = (xx + j) * fontwidth(p);
2404
2405 if (fontwidth(p) <= 8)
2406 o_x = (8 - (sx & 0x7)) & 0x7;
2407 else if (fontwidth(p) <= 16)
2408 o_x = (16 - (sx & 0xF)) & 0xF;
2409
2410 PM3_WAIT(3 + fontheight(p));
2411
2412 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2413 (1 << 18) | /* BE */
2414 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2415 (1 << 20)); /* OpaqueSpan */
2416
2417 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2418 if (fontwidth(p) <= 8) {
2419 ldat = *cdat++;
2420 } else { /* assume fontwidth <= 16 ATM */
2421 ldat = ((*cdat++) << 8);
2422 ldat |= *cdat++;
2423 }
2424 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2425 }
2426
2427 PM3_WRITE_REG(PM3RectanglePosition,
2428 (PM3RectanglePosition_XOffset(sx)) |
2429 (PM3RectanglePosition_YOffset(sy)));
2430
2431 PM3_WRITE_REG(PM3Render2D,
2432 PM3Render2D_AreaStippleEnable |
2433 PM3Render2D_XPositive |
2434 PM3Render2D_YPositive |
2435 PM3Render2D_Operation_Normal |
2436 PM3Render2D_SpanOperation |
2437 (PM3Render2D_Width(fontwidth(p))) |
2438 (PM3Render2D_Height(fontheight(p))));
2439 }
2440 pm3fb_wait_pm3(l_fb_info);
2441 }
2442
2443 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy)
2444 {
2445 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2446
2447 xx = xx * fontwidth(p);
2448 yy = yy * fontheight(p);
2449
2450 if (l_fb_info->current_par->depth == 8)
2451 {
2452 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2453 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0x0F0F0F0F);
2454 else
2455 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0x0F0F0F0F);
2456 }
2457
2458 PM3_WAIT(3);
2459
2460 PM3_WRITE_REG(PM3Config2D,
2461 PM3Config2D_UseConstantSource |
2462 PM3Config2D_ForegroundROPEnable |
2463 (PM3Config2D_ForegroundROP(0xa)) | /* Oxa is GXinvert */
2464 PM3Config2D_FBDestReadEnable |
2465 PM3Config2D_FBWriteEnable);
2466
2467 PM3_WRITE_REG(PM3RectanglePosition,
2468 (PM3RectanglePosition_XOffset(xx)) |
2469 (PM3RectanglePosition_YOffset(yy)));
2470
2471 PM3_WRITE_REG(PM3Render2D,
2472 PM3Render2D_XPositive |
2473 PM3Render2D_YPositive |
2474 PM3Render2D_Operation_Normal |
2475 PM3Render2D_SpanOperation |
2476 (PM3Render2D_Width(fontwidth(p))) |
2477 (PM3Render2D_Height(fontheight(p))));
2478
2479 pm3fb_wait_pm3(l_fb_info);
2480
2481 if (l_fb_info->current_par->depth == 8)
2482 {
2483 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2484 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xFFFFFFFF);
2485 else
2486 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xFFFFFFFF);
2487 }
2488 }
2489
2490 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
2491 #endif /* PM3FB_USE_ACCEL */
2492 /* *********************************** */
2493 /* ***** pre-init board(s) setup ***** */
2494 /* *********************************** */
2495
2496 static void pm3fb_mode_setup(char *mode, unsigned long board_num)
2497 {
2498 struct pm3fb_info *l_fb_info = &(fb_info[board_num]);
2499 struct pm3fb_par *l_fb_par = &(current_par[board_num]);
2500 unsigned long i = 0;
2501
2502 current_par_valid[board_num] = 0;
2503
2504 if (!strncmp(mode, "current", 7)) {
2505 l_fb_info->use_current = 1; /* default w/ OpenFirmware */
2506 } else {
2507 while ((mode_base[i].name[0])
2508 && (!current_par_valid[board_num])) {
2509 if (!
2510 (strncmp
2511 (mode, mode_base[i].name,
2512 strlen(mode_base[i].name)))) {
2513 memcpy(l_fb_par, &(mode_base[i].user_mode),
2514 sizeof(struct pm3fb_par));
2515 current_par_valid[board_num] = 1;
2516 DPRINTK(2, "Mode set to %s\n",
2517 mode_base[i].name);
2518 }
2519 i++;
2520 }
2521 DASSERT(current_par_valid[board_num],
2522 "Valid mode on command line\n");
2523 }
2524 }
2525
2526 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num)
2527 {
2528 short l_bus = -1, l_slot = -1, l_func = -1;
2529 char *next;
2530
2531 if (pciid) {
2532 l_bus = simple_strtoul(pciid, &next, 10);
2533 if (next && (next[0] == ':')) {
2534 pciid = next + 1;
2535 l_slot = simple_strtoul(pciid, &next, 10);
2536 if (next && (next[0] == ':')) {
2537 pciid = next + 1;
2538 l_func =
2539 simple_strtoul(pciid, (char **) NULL,
2540 10);
2541 }
2542 }
2543 } else
2544 return;
2545
2546 if ((l_bus >= 0) && (l_slot >= 0) && (l_func >= 0)) {
2547 bus[board_num] = l_bus;
2548 slot[board_num] = l_slot;
2549 func[board_num] = l_func;
2550 DPRINTK(2, "Board #%ld will be PciId: %hd:%hd:%hd\n",
2551 board_num, l_bus, l_slot, l_func);
2552 } else {
2553 DPRINTK(1, "Invalid PciId: %hd:%hd:%hd for board #%ld\n",
2554 l_bus, l_slot, l_func, board_num);
2555 }
2556 }
2557
2558 static void pm3fb_font_setup(char *lf, unsigned long board_num)
2559 {
2560 unsigned long lfs = strlen(lf);
2561
2562 if (lfs > (PM3_FONTNAME_SIZE - 1)) {
2563 DPRINTK(1, "Fontname %s too long\n", lf);
2564 return;
2565 }
2566 strlcpy(fontn[board_num], lf, lfs + 1);
2567 }
2568
2569 static void pm3fb_bootdepth_setup(char *bds, unsigned long board_num)
2570 {
2571 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2572
2573 if (!(depth_supported(bd))) {
2574 printk(KERN_WARNING "pm3fb: ignoring invalid depth %s for board #%ld\n",
2575 bds, board_num);
2576 return;
2577 }
2578 depth[board_num] = bd;
2579 }
2580
2581 static void pm3fb_forcesize_setup(char *bds, unsigned long board_num)
2582 {
2583 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2584
2585 if (bd > 64) {
2586 printk(KERN_WARNING "pm3fb: ignoring invalid memory size %s for board #%ld\n",
2587 bds, board_num);
2588 return;
2589 }
2590 forcesize[board_num] = bd;
2591 }
2592
2593 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn)
2594 {
2595 char *next;
2596
2597 if (!(CHAR_IS_NUM(options[0]))) {
2598 (*bn) = 0;
2599 return (options);
2600 }
2601
2602 (*bn) = simple_strtoul(options, &next, 10);
2603
2604 if (next && (next[0] == ':') && ((*bn) >= 0)
2605 && ((*bn) <= PM3_MAX_BOARD)) {
2606 DPRINTK(2, "Board_num seen as %ld\n", (*bn));
2607 return (next + 1);
2608 } else {
2609 (*bn) = 0;
2610 DPRINTK(2, "Board_num default to %ld\n", (*bn));
2611 return (options);
2612 }
2613 }
2614
2615 static void pm3fb_real_setup(char *options)
2616 {
2617 char *next;
2618 unsigned long i, bn;
2619 struct pm3fb_info *l_fb_info;
2620
2621 DTRACE;
2622
2623 DPRINTK(2, "Options : %s\n", options);
2624
2625 for (i = 0; i < PM3_MAX_BOARD; i++) {
2626 l_fb_info = &(fb_info[i]);
2627 memset(l_fb_info, 0, sizeof(struct pm3fb_info));
2628 l_fb_info->gen.fbhw = &pm3fb_switch;
2629 l_fb_info->board_num = i;
2630 current_par_valid[i] = 0;
2631 slot[i] = -1;
2632 func[i] = -1;
2633 bus[i] = -1;
2634 disable[i] = 0;
2635 noaccel[i] = 0;
2636 fontn[i][0] = '\0';
2637 depth[i] = 0;
2638 l_fb_info->current_par = &(current_par[i]);
2639 }
2640
2641 /* eat up prefix pm3fb and whatever is used as separator i.e. :,= */
2642 if (!strncmp(options, "pm3fb", 5)) {
2643 options += 5;
2644 while (((*options) == ',') || ((*options) == ':')
2645 || ((*options) == '='))
2646 options++;
2647 }
2648
2649 while (options) {
2650 bn = 0;
2651 if ((next = strchr(options, ','))) {
2652 (*next) = '\0';
2653 next++;
2654 }
2655
2656 if (!strncmp(options, "mode:", 5)) {
2657 options = pm3fb_boardnum_setup(options + 5, &bn);
2658 DPRINTK(2, "Setting mode for board #%ld\n", bn);
2659 pm3fb_mode_setup(options, bn);
2660 } else if (!strncmp(options, "off:", 4)) {
2661 options = pm3fb_boardnum_setup(options + 4, &bn);
2662 DPRINTK(2, "Disabling board #%ld\n", bn);
2663 disable[bn] = 1;
2664 } else if (!strncmp(options, "off", 3)) { /* disable everything */
2665 for (i = 0; i < PM3_MAX_BOARD; i++)
2666 disable[i] = 1;
2667 } else if (!strncmp(options, "disable:", 8)) {
2668 options = pm3fb_boardnum_setup(options + 8, &bn);
2669 DPRINTK(2, "Disabling board #%ld\n", bn);
2670 disable[bn] = 1;
2671 } else if (!strncmp(options, "pciid:", 6)) {
2672 options = pm3fb_boardnum_setup(options + 6, &bn);
2673 DPRINTK(2, "Setting PciID for board #%ld\n", bn);
2674 pm3fb_pciid_setup(options, bn);
2675 } else if (!strncmp(options, "noaccel:", 8)) {
2676 options = pm3fb_boardnum_setup(options + 8, &bn);
2677 noaccel[bn] = 1;
2678 } else if (!strncmp(options, "font:", 5)) {
2679 options = pm3fb_boardnum_setup(options + 5, &bn);
2680 pm3fb_font_setup(options, bn);
2681 } else if (!strncmp(options, "depth:", 6)) {
2682 options = pm3fb_boardnum_setup(options + 6, &bn);
2683 pm3fb_bootdepth_setup(options, bn);
2684 } else if (!strncmp(options, "printtimings", 12)) {
2685 printtimings = 1;
2686 } else if (!strncmp(options, "flatpanel:", 10)) {
2687 options = pm3fb_boardnum_setup(options + 10, &bn);
2688 flatpanel[bn] = 1;
2689 } else if (!strncmp(options, "forcesize:", 10)) {
2690 options = pm3fb_boardnum_setup(options + 10, &bn);
2691 pm3fb_forcesize_setup(options, bn);
2692 }
2693 options = next;
2694 }
2695 }
2696
2697 /* ********************************************** */
2698 /* ***** framebuffer API standard functions ***** */
2699 /* ********************************************** */
2700
2701 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
2702 const void *par, struct fb_info_gen *info)
2703 {
2704 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2705 struct pm3fb_par *p = (struct pm3fb_par *) par;
2706
2707 DTRACE;
2708
2709 strcpy(fix->id, permedia3_name);
2710 fix->smem_start = (unsigned long)l_fb_info->p_fb;
2711 fix->smem_len = l_fb_info->fb_size;
2712 fix->mmio_start = (unsigned long)l_fb_info->pIOBase;
2713 fix->mmio_len = PM3_REGS_SIZE;
2714 #ifdef PM3FB_USE_ACCEL
2715 if (!(noaccel[l_fb_info->board_num]))
2716 fix->accel = FB_ACCEL_3DLABS_PERMEDIA3;
2717 else
2718 #endif /* PM3FB_USE_ACCEL */
2719 fix->accel = FB_ACCEL_NONE;
2720 fix->type = FB_TYPE_PACKED_PIXELS;
2721 fix->visual =
2722 (p->depth == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
2723 if (current_par_valid[l_fb_info->board_num])
2724 fix->line_length =
2725 l_fb_info->current_par->width *
2726 depth2ByPP(l_fb_info->current_par->depth);
2727 else
2728 fix->line_length = 0;
2729 fix->xpanstep = 64 / depth2bpp(p->depth);
2730 fix->ypanstep = 1;
2731 fix->ywrapstep = 0;
2732 return (0);
2733 }
2734
2735 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
2736 void *par, struct fb_info_gen *info)
2737 {
2738 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2739 struct pm3fb_par *p = (struct pm3fb_par *) par;
2740 struct pm3fb_par temp_p;
2741 u32 xres;
2742
2743 DTRACE;
2744
2745 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2746 DASSERT((p != NULL), "pm3fb_par* not NULL");
2747 DASSERT((l_fb_info != NULL), "pm3fb_info* not NULL");
2748
2749 memset(&temp_p, 0, sizeof(struct pm3fb_par));
2750 temp_p.width = (var->xres_virtual + 7) & ~7;
2751 temp_p.height = var->yres_virtual;
2752
2753 if (!(depth_supported(var->bits_per_pixel))) /* round unsupported up to a multiple of 8 */
2754 temp_p.depth = depth2bpp(var->bits_per_pixel);
2755 else
2756 temp_p.depth = var->bits_per_pixel;
2757
2758 temp_p.depth = (temp_p.depth > 32) ? 32 : temp_p.depth; /* max 32 */
2759 temp_p.depth = (temp_p.depth == 24) ? 32 : temp_p.depth; /* 24 unsupported, round-up to 32 */
2760
2761 if ((temp_p.depth == 16) && (var->red.length == 5) && (var->green.length == 5) && (var->blue.length == 5))
2762 temp_p.depth = 15; /* RGBA 5551 is stored as depth 15 */
2763
2764 if ((temp_p.depth == 16) && (var->red.length == 4) && (var->green.length == 4) && (var->blue.length == 4))
2765 temp_p.depth = 12; /* RGBA 4444 is stored as depth 12 */
2766
2767
2768 DPRINTK(2,
2769 "xres: %d, yres: %d, vxres: %d, vyres: %d ; xoffset:%d, yoffset: %d\n",
2770 var->xres, var->yres, var->xres_virtual, var->yres_virtual,
2771 var->xoffset, var->yoffset);
2772
2773 xres = (var->xres + 31) & ~31;
2774 if (temp_p.width < xres + var->xoffset)
2775 temp_p.width = xres + var->xoffset;
2776 if (temp_p.height < var->yres + var->yoffset)
2777 temp_p.height = var->yres + var->yoffset;
2778
2779 if (temp_p.width > 2048) {
2780 DPRINTK(1, "virtual width not supported: %u\n",
2781 temp_p.width);
2782 return (-EINVAL);
2783 }
2784 if (var->yres < 200) {
2785 DPRINTK(1, "height not supported: %u\n", (u32) var->yres);
2786 return (-EINVAL);
2787 }
2788 if (temp_p.height < 200 || temp_p.height > 4095) {
2789 DPRINTK(1, "virtual height not supported: %u\n",
2790 temp_p.height);
2791 return (-EINVAL);
2792 }
2793 if (!(depth_supported(temp_p.depth))) {
2794 DPRINTK(1, "depth not supported: %u\n", temp_p.depth);
2795 return (-EINVAL);
2796 }
2797 if ((temp_p.width * temp_p.height * depth2ByPP(temp_p.depth)) >
2798 l_fb_info->fb_size) {
2799 DPRINTK(1, "no memory for screen (%ux%ux%u)\n",
2800 temp_p.width, temp_p.height, temp_p.depth);
2801 return (-EINVAL);
2802 }
2803
2804 if ((!var->pixclock) ||
2805 (!var->right_margin) ||
2806 (!var->hsync_len) ||
2807 (!var->left_margin) ||
2808 (!var->lower_margin) ||
2809 (!var->vsync_len) || (!var->upper_margin)
2810 ) {
2811 unsigned long i = 0, done = 0;
2812 printk(KERN_WARNING "pm3fb: refusing to use a likely wrong timing\n");
2813
2814 while ((mode_base[i].user_mode.width) && !done) {
2815 if ((mode_base[i].user_mode.width == temp_p.width)
2816 && (mode_base[i].user_mode.height ==
2817 temp_p.height)) {
2818 printk(KERN_NOTICE "pm3fb: using close match %s\n",
2819 mode_base[i].name);
2820 temp_p = mode_base[i].user_mode;
2821 done = 1;
2822 }
2823 i++;
2824 }
2825 if (!done)
2826 return (-EINVAL);
2827 } else {
2828 temp_p.pixclock = PICOS2KHZ(var->pixclock);
2829 if (temp_p.pixclock > PM3_MAX_PIXCLOCK) {
2830 DPRINTK(1, "pixclock too high (%uKHz)\n",
2831 temp_p.pixclock);
2832 return (-EINVAL);
2833 }
2834
2835 temp_p.hsstart = var->right_margin;
2836 temp_p.hsend = var->right_margin + var->hsync_len;
2837 temp_p.hbend =
2838 var->right_margin + var->hsync_len + var->left_margin;
2839 temp_p.htotal = xres + temp_p.hbend;
2840
2841 temp_p.vsstart = var->lower_margin;
2842 temp_p.vsend = var->lower_margin + var->vsync_len;
2843 temp_p.vbend =
2844 var->lower_margin + var->vsync_len + var->upper_margin;
2845 temp_p.vtotal = var->yres + temp_p.vbend;
2846
2847 temp_p.stride = temp_p.width;
2848
2849 DPRINTK(2, "Using %d * %d, %d Khz, stride is %08x\n",
2850 temp_p.width, temp_p.height, temp_p.pixclock,
2851 temp_p.stride);
2852
2853 temp_p.base =
2854 pm3fb_Shiftbpp(l_fb_info, temp_p.depth,
2855 (var->yoffset * xres) + var->xoffset);
2856
2857 temp_p.video = 0;
2858
2859 if (var->sync & FB_SYNC_HOR_HIGH_ACT)
2860 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_HIGH;
2861 else
2862 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_LOW;
2863
2864 if (var->sync & FB_SYNC_VERT_HIGH_ACT)
2865 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_HIGH;
2866 else
2867 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_LOW;
2868
2869 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
2870 DPRINTK(1, "Interlaced mode not supported\n\n");
2871 return (-EINVAL);
2872 }
2873
2874 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
2875 temp_p.video |= PM3VideoControl_LINE_DOUBLE_ON;
2876 else
2877 temp_p.video |= PM3VideoControl_LINE_DOUBLE_OFF;
2878
2879 if (var->activate == FB_ACTIVATE_NOW)
2880 temp_p.video |= PM3VideoControl_ENABLE;
2881 else {
2882 temp_p.video |= PM3VideoControl_DISABLE;
2883 DPRINTK(2, "PM3Video disabled\n");
2884 }
2885
2886 switch (temp_p.depth) {
2887 case 8:
2888 temp_p.video |= PM3VideoControl_PIXELSIZE_8BIT;
2889 break;
2890 case 12:
2891 case 15:
2892 case 16:
2893 temp_p.video |= PM3VideoControl_PIXELSIZE_16BIT;
2894 break;
2895 case 32:
2896 temp_p.video |= PM3VideoControl_PIXELSIZE_32BIT;
2897 break;
2898 default:
2899 DPRINTK(1, "Unsupported depth\n");
2900 break;
2901 }
2902 }
2903 (*p) = temp_p;
2904
2905 #ifdef PM3FB_USE_ACCEL
2906 if (var->accel_flags & FB_ACCELF_TEXT)
2907 noaccel[l_fb_info->board_num] = 0;
2908 else
2909 noaccel[l_fb_info->board_num] = 1;
2910 #endif /* PM3FB_USE_ACCEL */
2911
2912 return (0);
2913 }
2914
2915 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d)
2916 {
2917 switch (d) {
2918 case 8:
2919 var->red.length = var->green.length = var->blue.length = 8;
2920 var->red.offset = var->green.offset = var->blue.offset = 0;
2921 var->transp.offset = var->transp.length = 0;
2922 break;
2923
2924 case 12:
2925 var->red.offset = 8;
2926 var->red.length = 4;
2927 var->green.offset = 4;
2928 var->green.length = 4;
2929 var->blue.offset = 0;
2930 var->blue.length = 4;
2931 var->transp.offset = 12;
2932 var->transp.length = 4;
2933 break;
2934
2935 case 15:
2936 var->red.offset = 10;
2937 var->red.length = 5;
2938 var->green.offset = 5;
2939 var->green.length = 5;
2940 var->blue.offset = 0;
2941 var->blue.length = 5;
2942 var->transp.offset = 15;
2943 var->transp.length = 1;
2944 break;
2945
2946 case 16:
2947 var->red.offset = 11;
2948 var->red.length = 5;
2949 var->green.offset = 5;
2950 var->green.length = 6;
2951 var->blue.offset = 0;
2952 var->blue.length = 5;
2953 var->transp.offset = var->transp.length = 0;
2954 break;
2955
2956 case 32:
2957 var->transp.offset = 24;
2958 var->red.offset = 16;
2959 var->green.offset = 8;
2960 var->blue.offset = 0;
2961 var->red.length = var->green.length =
2962 var->blue.length = var->transp.length = 8;
2963 break;
2964
2965 default:
2966 DPRINTK(1, "Unsupported depth %ld\n", d);
2967 break;
2968 }
2969 }
2970
2971 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
2972 const void *par, struct fb_info_gen *info)
2973 {
2974 struct pm3fb_par *p = (struct pm3fb_par *) par;
2975 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2976
2977 u32 base;
2978
2979 DTRACE;
2980
2981 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2982 DASSERT((p != NULL), "pm3fb_par* not NULL");
2983 DASSERT((info != NULL), "fb_info_gen* not NULL");
2984
2985 memset(var, 0, sizeof(struct fb_var_screeninfo));
2986
2987 #ifdef PM3FB_USE_ACCEL
2988 if (!(noaccel[l_fb_info->board_num]))
2989 var->accel_flags |= FB_ACCELF_TEXT;
2990 #endif /* PM3FB_USE_ACCEL */
2991
2992 var->xres_virtual = p->width;
2993 var->yres_virtual = p->height;
2994 var->xres = p->htotal - p->hbend;
2995 var->yres = p->vtotal - p->vbend;
2996
2997 DPRINTK(2, "xres = %d, yres : %d\n", var->xres, var->yres);
2998
2999 var->right_margin = p->hsstart;
3000 var->hsync_len = p->hsend - p->hsstart;
3001 var->left_margin = p->hbend - p->hsend;
3002 var->lower_margin = p->vsstart;
3003 var->vsync_len = p->vsend - p->vsstart;
3004 var->upper_margin = p->vbend - p->vsend;
3005 var->bits_per_pixel = depth2bpp(p->depth);
3006
3007 pm3fb_encode_depth(var, p->depth);
3008
3009 base = pm3fb_Unshiftbpp(l_fb_info, p->depth, p->base);
3010
3011 var->xoffset = base % var->xres;
3012 var->yoffset = base / var->xres;
3013
3014 var->height = var->width = -1;
3015
3016 var->pixclock = KHZ2PICOS(p->pixclock);
3017
3018 if ((p->video & PM3VideoControl_HSYNC_MASK) ==
3019 PM3VideoControl_HSYNC_ACTIVE_HIGH)
3020 var->sync |= FB_SYNC_HOR_HIGH_ACT;
3021 if ((p->video & PM3VideoControl_VSYNC_MASK) ==
3022 PM3VideoControl_VSYNC_ACTIVE_HIGH)
3023 var->sync |= FB_SYNC_VERT_HIGH_ACT;
3024 if (p->video & PM3VideoControl_LINE_DOUBLE_ON)
3025 var->vmode = FB_VMODE_DOUBLE;
3026
3027 return (0);
3028 }
3029
3030 static void pm3fb_get_par(void *par, struct fb_info_gen *info)
3031 {
3032 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3033
3034 DTRACE;
3035
3036 if (!current_par_valid[l_fb_info->board_num]) {
3037 if (l_fb_info->use_current)
3038 pm3fb_read_mode(l_fb_info, l_fb_info->current_par);
3039 else
3040 memcpy(l_fb_info->current_par,
3041 &(mode_base[0].user_mode),
3042 sizeof(struct pm3fb_par));
3043 current_par_valid[l_fb_info->board_num] = 1;
3044 }
3045 *((struct pm3fb_par *) par) = *(l_fb_info->current_par);
3046 }
3047
3048 static void pm3fb_set_par(const void *par, struct fb_info_gen *info)
3049 {
3050 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3051
3052 DTRACE;
3053
3054 *(l_fb_info->current_par) = *((struct pm3fb_par *) par);
3055 current_par_valid[l_fb_info->board_num] = 1;
3056
3057 pm3fb_write_mode(l_fb_info);
3058
3059 #ifdef PM3FB_USE_ACCEL
3060 pm3fb_init_engine(l_fb_info);
3061 #endif /* PM3FB_USE_ACCEL */
3062 }
3063
3064 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
3065 unsigned char regno, unsigned char r,
3066 unsigned char g, unsigned char b)
3067 {
3068 DTRACE;
3069
3070 PM3_SLOW_WRITE_REG(PM3RD_PaletteWriteAddress, regno);
3071 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, r);
3072 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, g);
3073 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, b);
3074 }
3075
3076 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
3077 unsigned *blue, unsigned *transp,
3078 struct fb_info *info)
3079 {
3080 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3081
3082 DTRACE;
3083
3084 if (regno < 256) {
3085 *red =
3086 l_fb_info->palette[regno].red << 8 | l_fb_info->
3087 palette[regno].red;
3088 *green =
3089 l_fb_info->palette[regno].green << 8 | l_fb_info->
3090 palette[regno].green;
3091 *blue =
3092 l_fb_info->palette[regno].blue << 8 | l_fb_info->
3093 palette[regno].blue;
3094 *transp =
3095 l_fb_info->palette[regno].transp << 8 | l_fb_info->
3096 palette[regno].transp;
3097 }
3098 return (regno > 255);
3099 }
3100
3101 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
3102 unsigned blue, unsigned transp,
3103 struct fb_info *info)
3104 {
3105 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3106
3107 DTRACE;
3108
3109 if (regno < 16) {
3110 switch (l_fb_info->current_par->depth) {
3111 #ifdef FBCON_HAS_CFB8
3112 case 8:
3113 break;
3114 #endif
3115 #ifdef FBCON_HAS_CFB16
3116 case 12:
3117 l_fb_info->cmap.cmap12[regno] =
3118 (((u32) red & 0xf000) >> 4) |
3119 (((u32) green & 0xf000) >> 8) |
3120 (((u32) blue & 0xf000) >> 12);
3121 break;
3122
3123 case 15:
3124 l_fb_info->cmap.cmap15[regno] =
3125 (((u32) red & 0xf800) >> 1) |
3126 (((u32) green & 0xf800) >> 6) |
3127 (((u32) blue & 0xf800) >> 11);
3128 break;
3129
3130 case 16:
3131 l_fb_info->cmap.cmap16[regno] =
3132 ((u32) red & 0xf800) |
3133 (((u32) green & 0xfc00) >> 5) |
3134 (((u32) blue & 0xf800) >> 11);
3135 break;
3136 #endif
3137 #ifdef FBCON_HAS_CFB32
3138 case 32:
3139 l_fb_info->cmap.cmap32[regno] =
3140 (((u32) transp & 0xff00) << 16) |
3141 (((u32) red & 0xff00) << 8) |
3142 (((u32) green & 0xff00)) |
3143 (((u32) blue & 0xff00) >> 8);
3144 break;
3145 #endif
3146 default:
3147 DPRINTK(1, "bad depth %u\n",
3148 l_fb_info->current_par->depth);
3149 break;
3150 }
3151 }
3152 if (regno < 256) {
3153 l_fb_info->palette[regno].red = red >> 8;
3154 l_fb_info->palette[regno].green = green >> 8;
3155 l_fb_info->palette[regno].blue = blue >> 8;
3156 l_fb_info->palette[regno].transp = transp >> 8;
3157 if (l_fb_info->current_par->depth == 8)
3158 pm3fb_set_color(l_fb_info, regno, red >> 8,
3159 green >> 8, blue >> 8);
3160 }
3161 return (regno > 255);
3162 }
3163
3164 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info)
3165 {
3166 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3167 u32 video;
3168
3169 DTRACE;
3170
3171 if (!current_par_valid[l_fb_info->board_num])
3172 return (1);
3173
3174 video = l_fb_info->current_par->video;
3175
3176 /*
3177 * Oxygen VX1 - it appears that setting PM3VideoControl and
3178 * then PM3RD_SyncControl to the same SYNC settings undoes
3179 * any net change - they seem to xor together. Only set the
3180 * sync options in PM3RD_SyncControl. --rmk
3181 */
3182 video &= ~(PM3VideoControl_HSYNC_MASK |
3183 PM3VideoControl_VSYNC_MASK);
3184 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
3185 PM3VideoControl_VSYNC_ACTIVE_HIGH;
3186
3187 if (blank_mode > 0) {
3188 switch (blank_mode - 1) {
3189
3190 case VESA_NO_BLANKING: /* FIXME */
3191 video = video & ~(PM3VideoControl_ENABLE);
3192 break;
3193
3194 case VESA_HSYNC_SUSPEND:
3195 video = video & ~(PM3VideoControl_HSYNC_MASK |
3196 PM3VideoControl_BLANK_ACTIVE_LOW);
3197 break;
3198 case VESA_VSYNC_SUSPEND:
3199 video = video & ~(PM3VideoControl_VSYNC_MASK |
3200 PM3VideoControl_BLANK_ACTIVE_LOW);
3201 break;
3202 case VESA_POWERDOWN:
3203 video = video & ~(PM3VideoControl_HSYNC_MASK |
3204 PM3VideoControl_VSYNC_MASK |
3205 PM3VideoControl_BLANK_ACTIVE_LOW);
3206 break;
3207 default:
3208 DPRINTK(1, "Unsupported blanking %d\n",
3209 blank_mode);
3210 return (1);
3211 break;
3212 }
3213 }
3214
3215 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
3216
3217 return (0);
3218 }
3219
3220 static void pm3fb_set_disp(const void *par, struct display *disp,
3221 struct fb_info_gen *info)
3222 {
3223 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3224 struct pm3fb_par *p = (struct pm3fb_par *) par;
3225 u32 flags;
3226
3227 DTRACE;
3228
3229 local_irq_save(flags);
3230 info->info.screen_base = l_fb_info->v_fb;
3231 switch (p->depth) {
3232 #ifdef FBCON_HAS_CFB8
3233 case 8:
3234 #ifdef PM3FB_USE_ACCEL
3235 if (!(noaccel[l_fb_info->board_num]))
3236 disp->dispsw = &pm3fb_cfb8;
3237 else
3238 #endif /* PM3FB_USE_ACCEL */
3239 disp->dispsw = &fbcon_cfb8;
3240 break;
3241 #endif
3242 #ifdef FBCON_HAS_CFB16
3243 case 12:
3244 #ifdef PM3FB_USE_ACCEL
3245 if (!(noaccel[l_fb_info->board_num]))
3246 disp->dispsw = &pm3fb_cfb16;
3247 else
3248 #endif /* PM3FB_USE_ACCEL */
3249 disp->dispsw = &fbcon_cfb16;
3250 disp->dispsw_data = l_fb_info->cmap.cmap12;
3251 break;
3252 case 15:
3253 #ifdef PM3FB_USE_ACCEL
3254 if (!(noaccel[l_fb_info->board_num]))
3255 disp->dispsw = &pm3fb_cfb16;
3256 else
3257 #endif /* PM3FB_USE_ACCEL */
3258 disp->dispsw = &fbcon_cfb16;
3259 disp->dispsw_data = l_fb_info->cmap.cmap15;
3260 break;
3261 case 16:
3262 #ifdef PM3FB_USE_ACCEL
3263 if (!(noaccel[l_fb_info->board_num]))
3264 disp->dispsw = &pm3fb_cfb16;
3265 else
3266 #endif /* PM3FB_USE_ACCEL */
3267 disp->dispsw = &fbcon_cfb16;
3268 disp->dispsw_data = l_fb_info->cmap.cmap16;
3269 break;
3270 #endif
3271 #ifdef FBCON_HAS_CFB32
3272 case 32:
3273 #ifdef PM3FB_USE_ACCEL
3274 if (!(noaccel[l_fb_info->board_num]))
3275 disp->dispsw = &pm3fb_cfb32;
3276 else
3277 #endif /* PM3FB_USE_ACCEL */
3278 disp->dispsw = &fbcon_cfb32;
3279 disp->dispsw_data = l_fb_info->cmap.cmap32;
3280 break;
3281 #endif /* FBCON_HAS_CFB32 */
3282 default:
3283 disp->dispsw = &fbcon_dummy;
3284 DPRINTK(1, "Invalid depth, using fbcon_dummy\n");
3285 break;
3286 }
3287 local_irq_restore(flags);
3288 }
3289
3290 /* */
3291 static void pm3fb_detect(void)
3292 {
3293 struct pci_dev *dev_array[PM3_MAX_BOARD];
3294 struct pci_dev *dev = NULL;
3295 struct pm3fb_info *l_fb_info = &(fb_info[0]);
3296 unsigned long i, j, done;
3297
3298 DTRACE;
3299
3300 for (i = 0; i < PM3_MAX_BOARD; i++) {
3301 dev_array[i] = NULL;
3302 fb_info[i].dev = NULL;
3303 }
3304
3305 dev =
3306 pci_find_device(PCI_VENDOR_ID_3DLABS,
3307 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3308
3309 for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) {
3310 dev_array[i] = dev;
3311 dev =
3312 pci_find_device(PCI_VENDOR_ID_3DLABS,
3313 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3314 }
3315
3316 if (dev) { /* more than PM3_MAX_BOARD */
3317 printk(KERN_WARNING "pm3fb: Warning: more than %d boards found\n",
3318 PM3_MAX_BOARD);
3319 }
3320
3321 if (!dev_array[0]) { /* not a single board, abort */
3322 return;
3323 }
3324
3325 /* allocate user-defined boards */
3326 for (i = 0; i < PM3_MAX_BOARD; i++) {
3327 if ((bus[i] >= 0) && (slot[i] >= 0) && (func[i] >= 0)) {
3328 for (j = 0; j < PM3_MAX_BOARD; j++) {
3329 if ((dev_array[j] != NULL) &&
3330 (dev_array[j]->bus->number == bus[i])
3331 && (PCI_SLOT(dev_array[j]->devfn) ==
3332 slot[i])
3333 && (PCI_FUNC(dev_array[j]->devfn) ==
3334 func[i])) {
3335 fb_info[i].dev = dev_array[j];
3336 dev_array[j] = NULL;
3337 }
3338 }
3339 }
3340 }
3341 /* allocate remaining boards */
3342 for (i = 0; i < PM3_MAX_BOARD; i++) {
3343 if (fb_info[i].dev == NULL) {
3344 done = 0;
3345 for (j = 0; ((j < PM3_MAX_BOARD) && (!done)); j++) {
3346 if (dev_array[j] != NULL) {
3347 fb_info[i].dev = dev_array[j];
3348 dev_array[j] = NULL;
3349 done = 1;
3350 }
3351 }
3352 }
3353 }
3354
3355 /* at that point, all PCI Permedia3 are detected and allocated */
3356 /* now, initialize... or not */
3357 for (i = 0; i < PM3_MAX_BOARD; i++) {
3358 l_fb_info = &(fb_info[i]);
3359 if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */
3360 DPRINTK(2,
3361 "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n",
3362 (unsigned long) l_fb_info->dev,
3363 (unsigned long) l_fb_info->dev->vendor,
3364 (unsigned long) l_fb_info->dev->device,
3365 (unsigned long)
3366 pci_resource_start(l_fb_info->dev, 0),
3367 (unsigned long)
3368 pci_resource_start(l_fb_info->dev, 1),
3369 (unsigned long)
3370 pci_resource_start(l_fb_info->dev, 2),
3371 (unsigned long)
3372 pci_resource_start(l_fb_info->dev, 3),
3373 (unsigned long)
3374 pci_resource_start(l_fb_info->dev, 4),
3375 (unsigned long)
3376 pci_resource_start(l_fb_info->dev, 5),
3377 (unsigned long) l_fb_info->dev->irq);
3378
3379 l_fb_info->pIOBase =
3380 (unsigned char *)
3381 pci_resource_start(l_fb_info->dev, 0);
3382 #ifdef __BIG_ENDIAN
3383 l_fb_info->pIOBase += PM3_REGS_SIZE;
3384 #endif
3385 l_fb_info->vIOBase = (unsigned char *) -1;
3386 l_fb_info->p_fb =
3387 (unsigned char *)
3388 pci_resource_start(l_fb_info->dev, 1);
3389 l_fb_info->v_fb = (unsigned char *) -1;
3390
3391 if (!request_mem_region
3392 ((unsigned long)l_fb_info->p_fb, 64 * 1024 * 1024, /* request full aperture size */
3393 "pm3fb")) {
3394 printk
3395 (KERN_ERR "pm3fb: Error: couldn't request framebuffer memory, board #%ld\n",
3396 l_fb_info->board_num);
3397 continue;
3398 }
3399 if (!request_mem_region
3400 ((unsigned long)l_fb_info->pIOBase, PM3_REGS_SIZE,
3401 "pm3fb I/O regs")) {
3402 printk
3403 (KERN_ERR "pm3fb: Error: couldn't request IObase memory, board #%ld\n",
3404 l_fb_info->board_num);
3405 continue;
3406 }
3407 if (forcesize[l_fb_info->board_num])
3408 l_fb_info->fb_size = forcesize[l_fb_info->board_num];
3409
3410 l_fb_info->fb_size =
3411 pm3fb_size_memory(l_fb_info);
3412 if (l_fb_info->fb_size) {
3413 (void) pci_enable_device(l_fb_info->dev);
3414 pm3fb_common_init(l_fb_info);
3415 } else
3416 printk(KERN_ERR "pm3fb: memory problem, not enabling board #%ld\n", l_fb_info->board_num);
3417 }
3418 }
3419 }
3420
3421 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
3422 struct fb_info_gen *info)
3423 {
3424 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3425
3426 DTRACE;
3427
3428 if (!current_par_valid[l_fb_info->board_num])
3429 return -EINVAL;
3430
3431 l_fb_info->current_par->base = /* in 128 bits chunk - i.e. AFTER Shiftbpp */
3432 pm3fb_Shiftbpp(l_fb_info,
3433 l_fb_info->current_par->depth,
3434 (var->yoffset * l_fb_info->current_par->width) +
3435 var->xoffset);
3436 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
3437 return 0;
3438 }
3439
3440 static int pm3fb_ioctl(struct inode *inode, struct file *file,
3441 u_int cmd, u_long arg, int con,
3442 struct fb_info *info)
3443 {
3444 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3445 u32 cm, i;
3446 #ifdef PM3FB_MASTER_DEBUG
3447 char cc[3];
3448 #endif /* PM3FB_MASTER_DEBUG */
3449
3450 switch(cmd)
3451 {
3452 #ifdef PM3FB_MASTER_DEBUG
3453 case PM3FBIO_CLEARMEMORY:
3454 if (copy_from_user(&cm, (void *)arg, sizeof(u32)))
3455 return(-EFAULT);
3456 pm3fb_clear_memory(l_fb_info, cm);
3457 return(0);
3458 break;
3459
3460 case PM3FBIO_CLEARCMAP:
3461 if (copy_from_user(cc, (void*)arg, 3 * sizeof(char)))
3462 return(-EFAULT);
3463 pm3fb_clear_colormap(l_fb_info, cc[0], cc[1], cc[2]);
3464 return(0);
3465 break;
3466 #endif /* PM3FB_MASTER_DEBUG */
3467
3468 case PM3FBIO_RESETCHIP:
3469 cm = 1;
3470 PM3_SLOW_WRITE_REG(PM3ResetStatus, 1);
3471 for (i = 0 ; (i < 10000) && cm ; i++)
3472 {
3473 PM3_DELAY(10);
3474 cm = PM3_READ_REG(PM3ResetStatus);
3475 }
3476 if (cm)
3477 {
3478 printk(KERN_ERR "pm3fb: chip reset failed with status 0x%x\n", cm);
3479 return(-EIO);
3480 }
3481 /* first thing first, reload memory timings */
3482 pm3fb_write_memory_timings(l_fb_info);
3483 #ifdef PM3FB_USE_ACCEL
3484 pm3fb_init_engine(l_fb_info);
3485 #endif /* PM3FB_USE_ACCEL */
3486 pm3fb_write_mode(l_fb_info);
3487 return(0);
3488 break;
3489
3490 default:
3491 DPRINTK(2, "unknown ioctl: %d (%x)\n", cmd, cmd);
3492 return(-EINVAL);
3493 }
3494 }
3495
3496 /* ****************************************** */
3497 /* ***** standard FB API init functions ***** */
3498 /* ****************************************** */
3499
3500 int __init pm3fb_setup(char *options)
3501 {
3502 long opsi = strlen(options);
3503
3504 DTRACE;
3505
3506 memcpy(g_options, options,
3507 ((opsi + 1) >
3508 PM3_OPTIONS_SIZE) ? PM3_OPTIONS_SIZE : (opsi + 1));
3509 g_options[PM3_OPTIONS_SIZE - 1] = 0;
3510
3511 return (0);
3512 }
3513
3514 int __init pm3fb_init(void)
3515 {
3516 DTRACE;
3517
3518 DPRINTK(2, "This is pm3fb.c, CVS version: $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $");
3519
3520 pm3fb_real_setup(g_options);
3521
3522 pm3fb_detect();
3523
3524 if (!fb_info[0].dev) { /* not even one board ??? */
3525 DPRINTK(1, "No PCI Permedia3 board detected\n");
3526 }
3527 return (0);
3528 }
3529
3530 /* ************************* */
3531 /* **** Module support ***** */
3532 /* ************************* */
3533
3534 #ifdef MODULE
3535 MODULE_AUTHOR("Romain Dolbeau");
3536 MODULE_DESCRIPTION("Permedia3 framebuffer device driver");
3537 static char *mode[PM3_MAX_BOARD];
3538 MODULE_PARM(mode,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3539 MODULE_PARM_DESC(mode,"video mode");
3540 MODULE_PARM(disable,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3541 MODULE_PARM_DESC(disable,"disable board");
3542 static short off[PM3_MAX_BOARD];
3543 MODULE_PARM(off,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3544 MODULE_PARM_DESC(off,"disable board");
3545 static char *pciid[PM3_MAX_BOARD];
3546 MODULE_PARM(pciid,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3547 MODULE_PARM_DESC(pciid,"board PCI Id");
3548 MODULE_PARM(noaccel,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3549 MODULE_PARM_DESC(noaccel,"disable accel");
3550 static char *font[PM3_MAX_BOARD];
3551 MODULE_PARM(font,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3552 MODULE_PARM_DESC(font,"choose font");
3553 MODULE_PARM(depth,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3554 MODULE_PARM_DESC(depth,"boot-time depth");
3555 MODULE_PARM(printtimings, "h");
3556 MODULE_PARM_DESC(printtimings, "print the memory timings of the card(s)");
3557 MODULE_PARM(forcesize, PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3558 MODULE_PARM_DESC(forcesize, "force specified memory size");
3559 /*
3560 MODULE_SUPPORTED_DEVICE("Permedia3 PCI boards")
3561 MODULE_GENERIC_TABLE(gtype,name)
3562 MODULE_DEVICE_TABLE(type,name)
3563 */
3564
3565 void pm3fb_build_options(void)
3566 {
3567 int i;
3568 char ts[128];
3569
3570 strcpy(g_options, "pm3fb");
3571 for (i = 0; i < PM3_MAX_BOARD ; i++)
3572 {
3573 if (mode[i])
3574 {
3575 sprintf(ts, ",mode:%d:%s", i, mode[i]);
3576 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3577 }
3578 if (disable[i] || off[i])
3579 {
3580 sprintf(ts, ",disable:%d:", i);
3581 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3582 }
3583 if (pciid[i])
3584 {
3585 sprintf(ts, ",pciid:%d:%s", i, pciid[i]);
3586 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3587 }
3588 if (noaccel[i])
3589 {
3590 sprintf(ts, ",noaccel:%d:", i);
3591 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3592 }
3593 if (font[i])
3594 {
3595 sprintf(ts, ",font:%d:%s", i, font[i]);
3596 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3597 }
3598 if (depth[i])
3599 {
3600 sprintf(ts, ",depth:%d:%d", i, depth[i]);
3601 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3602 }
3603 }
3604 g_options[PM3_OPTIONS_SIZE - 1] = '\0';
3605 DPRINTK(1, "pm3fb use options: %s\n", g_options);
3606 }
3607
3608 int init_module(void)
3609 {
3610 DTRACE;
3611
3612 pm3fb_build_options();
3613
3614 pm3fb_init();
3615
3616 return (0);
3617 }
3618
3619 void cleanup_module(void)
3620 {
3621 DTRACE;
3622 {
3623 unsigned long i;
3624 struct pm3fb_info *l_fb_info;
3625 for (i = 0; i < PM3_MAX_BOARD; i++) {
3626 l_fb_info = &(fb_info[i]);
3627 if ((l_fb_info->dev != NULL)
3628 && (!(disable[l_fb_info->board_num]))) {
3629 if (l_fb_info->vIOBase !=
3630 (unsigned char *) -1) {
3631 pm3fb_unmapIO(l_fb_info);
3632 release_mem_region(l_fb_info->p_fb,
3633 l_fb_info->
3634 fb_size);
3635 release_mem_region(l_fb_info->
3636 pIOBase,
3637 PM3_REGS_SIZE);
3638 }
3639 unregister_framebuffer(&l_fb_info->gen.
3640 info);
3641 }
3642 }
3643 }
3644 return;
3645 }
3646 #endif /* MODULE */
kernel source for telekom puls (alcatel/mediatek)