Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / atmel_lcdfb.c
1 /*
2 * Driver for AT91/AT32 LCD Controller
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
22 #include <linux/platform_data/atmel.h>
23
24 #include <mach/cpu.h>
25 #include <asm/gpio.h>
26
27 #include <video/atmel_lcdc.h>
28
29 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
30 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
31
32 /* configurable parameters */
33 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
34 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
35 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
36
37 struct atmel_lcdfb_config {
38 bool have_alt_pixclock;
39 bool have_hozval;
40 bool have_intensity_bit;
41 };
42
43 static struct atmel_lcdfb_config at91sam9261_config = {
44 .have_hozval = true,
45 .have_intensity_bit = true,
46 };
47
48 static struct atmel_lcdfb_config at91sam9263_config = {
49 .have_intensity_bit = true,
50 };
51
52 static struct atmel_lcdfb_config at91sam9g10_config = {
53 .have_hozval = true,
54 };
55
56 static struct atmel_lcdfb_config at91sam9g45_config = {
57 .have_alt_pixclock = true,
58 };
59
60 static struct atmel_lcdfb_config at91sam9g45es_config = {
61 };
62
63 static struct atmel_lcdfb_config at91sam9rl_config = {
64 .have_intensity_bit = true,
65 };
66
67 static struct atmel_lcdfb_config at32ap_config = {
68 .have_hozval = true,
69 };
70
71 static const struct platform_device_id atmel_lcdfb_devtypes[] = {
72 {
73 .name = "at91sam9261-lcdfb",
74 .driver_data = (unsigned long)&at91sam9261_config,
75 }, {
76 .name = "at91sam9263-lcdfb",
77 .driver_data = (unsigned long)&at91sam9263_config,
78 }, {
79 .name = "at91sam9g10-lcdfb",
80 .driver_data = (unsigned long)&at91sam9g10_config,
81 }, {
82 .name = "at91sam9g45-lcdfb",
83 .driver_data = (unsigned long)&at91sam9g45_config,
84 }, {
85 .name = "at91sam9g45es-lcdfb",
86 .driver_data = (unsigned long)&at91sam9g45es_config,
87 }, {
88 .name = "at91sam9rl-lcdfb",
89 .driver_data = (unsigned long)&at91sam9rl_config,
90 }, {
91 .name = "at32ap-lcdfb",
92 .driver_data = (unsigned long)&at32ap_config,
93 }, {
94 /* terminator */
95 }
96 };
97
98 static struct atmel_lcdfb_config *
99 atmel_lcdfb_get_config(struct platform_device *pdev)
100 {
101 unsigned long data;
102
103 data = platform_get_device_id(pdev)->driver_data;
104
105 return (struct atmel_lcdfb_config *)data;
106 }
107
108 #if defined(CONFIG_ARCH_AT91)
109 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
110 | FBINFO_PARTIAL_PAN_OK \
111 | FBINFO_HWACCEL_YPAN)
112
113 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
114 struct fb_var_screeninfo *var,
115 struct fb_info *info)
116 {
117
118 }
119 #elif defined(CONFIG_AVR32)
120 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
121 | FBINFO_PARTIAL_PAN_OK \
122 | FBINFO_HWACCEL_XPAN \
123 | FBINFO_HWACCEL_YPAN)
124
125 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
126 struct fb_var_screeninfo *var,
127 struct fb_info *info)
128 {
129 u32 dma2dcfg;
130 u32 pixeloff;
131
132 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
133
134 dma2dcfg = (info->var.xres_virtual - info->var.xres)
135 * info->var.bits_per_pixel / 8;
136 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
137 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
138
139 /* Update configuration */
140 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
141 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
142 | ATMEL_LCDC_DMAUPDT);
143 }
144 #endif
145
146 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
147 | ATMEL_LCDC_POL_POSITIVE
148 | ATMEL_LCDC_ENA_PWMENABLE;
149
150 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
151
152 /* some bl->props field just changed */
153 static int atmel_bl_update_status(struct backlight_device *bl)
154 {
155 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
156 int power = sinfo->bl_power;
157 int brightness = bl->props.brightness;
158
159 /* REVISIT there may be a meaningful difference between
160 * fb_blank and power ... there seem to be some cases
161 * this doesn't handle correctly.
162 */
163 if (bl->props.fb_blank != sinfo->bl_power)
164 power = bl->props.fb_blank;
165 else if (bl->props.power != sinfo->bl_power)
166 power = bl->props.power;
167
168 if (brightness < 0 && power == FB_BLANK_UNBLANK)
169 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
170 else if (power != FB_BLANK_UNBLANK)
171 brightness = 0;
172
173 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
174 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
175 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
176 brightness ? contrast_ctr : 0);
177 else
178 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
179
180 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
181
182 return 0;
183 }
184
185 static int atmel_bl_get_brightness(struct backlight_device *bl)
186 {
187 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
188
189 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
190 }
191
192 static const struct backlight_ops atmel_lcdc_bl_ops = {
193 .update_status = atmel_bl_update_status,
194 .get_brightness = atmel_bl_get_brightness,
195 };
196
197 static void init_backlight(struct atmel_lcdfb_info *sinfo)
198 {
199 struct backlight_properties props;
200 struct backlight_device *bl;
201
202 sinfo->bl_power = FB_BLANK_UNBLANK;
203
204 if (sinfo->backlight)
205 return;
206
207 memset(&props, 0, sizeof(struct backlight_properties));
208 props.type = BACKLIGHT_RAW;
209 props.max_brightness = 0xff;
210 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
211 &atmel_lcdc_bl_ops, &props);
212 if (IS_ERR(bl)) {
213 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
214 PTR_ERR(bl));
215 return;
216 }
217 sinfo->backlight = bl;
218
219 bl->props.power = FB_BLANK_UNBLANK;
220 bl->props.fb_blank = FB_BLANK_UNBLANK;
221 bl->props.brightness = atmel_bl_get_brightness(bl);
222 }
223
224 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
225 {
226 if (sinfo->backlight)
227 backlight_device_unregister(sinfo->backlight);
228 }
229
230 #else
231
232 static void init_backlight(struct atmel_lcdfb_info *sinfo)
233 {
234 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
235 }
236
237 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
238 {
239 }
240
241 #endif
242
243 static void init_contrast(struct atmel_lcdfb_info *sinfo)
244 {
245 /* contrast pwm can be 'inverted' */
246 if (sinfo->lcdcon_pol_negative)
247 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
248
249 /* have some default contrast/backlight settings */
250 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
251 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
252
253 if (sinfo->lcdcon_is_backlight)
254 init_backlight(sinfo);
255 }
256
257
258 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
259 .type = FB_TYPE_PACKED_PIXELS,
260 .visual = FB_VISUAL_TRUECOLOR,
261 .xpanstep = 0,
262 .ypanstep = 1,
263 .ywrapstep = 0,
264 .accel = FB_ACCEL_NONE,
265 };
266
267 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
268 unsigned long xres)
269 {
270 unsigned long lcdcon2;
271 unsigned long value;
272
273 if (!sinfo->config->have_hozval)
274 return xres;
275
276 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
277 value = xres;
278 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
279 /* STN display */
280 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
281 value *= 3;
282 }
283 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
284 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
285 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
286 value = DIV_ROUND_UP(value, 4);
287 else
288 value = DIV_ROUND_UP(value, 8);
289 }
290
291 return value;
292 }
293
294 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
295 {
296 /* Turn off the LCD controller and the DMA controller */
297 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
298 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
299
300 /* Wait for the LCDC core to become idle */
301 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
302 msleep(10);
303
304 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
305 }
306
307 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
308 {
309 atmel_lcdfb_stop_nowait(sinfo);
310
311 /* Wait for DMA engine to become idle... */
312 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
313 msleep(10);
314 }
315
316 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
317 {
318 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
319 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
320 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
321 | ATMEL_LCDC_PWR);
322 }
323
324 static void atmel_lcdfb_update_dma(struct fb_info *info,
325 struct fb_var_screeninfo *var)
326 {
327 struct atmel_lcdfb_info *sinfo = info->par;
328 struct fb_fix_screeninfo *fix = &info->fix;
329 unsigned long dma_addr;
330
331 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
332 + var->xoffset * info->var.bits_per_pixel / 8);
333
334 dma_addr &= ~3UL;
335
336 /* Set framebuffer DMA base address and pixel offset */
337 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
338
339 atmel_lcdfb_update_dma2d(sinfo, var, info);
340 }
341
342 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
343 {
344 struct fb_info *info = sinfo->info;
345
346 dma_free_writecombine(info->device, info->fix.smem_len,
347 info->screen_base, info->fix.smem_start);
348 }
349
350 /**
351 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
352 * @sinfo: the frame buffer to allocate memory for
353 *
354 * This function is called only from the atmel_lcdfb_probe()
355 * so no locking by fb_info->mm_lock around smem_len setting is needed.
356 */
357 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
358 {
359 struct fb_info *info = sinfo->info;
360 struct fb_var_screeninfo *var = &info->var;
361 unsigned int smem_len;
362
363 smem_len = (var->xres_virtual * var->yres_virtual
364 * ((var->bits_per_pixel + 7) / 8));
365 info->fix.smem_len = max(smem_len, sinfo->smem_len);
366
367 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
368 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
369
370 if (!info->screen_base) {
371 return -ENOMEM;
372 }
373
374 memset(info->screen_base, 0, info->fix.smem_len);
375
376 return 0;
377 }
378
379 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
380 struct fb_info *info)
381 {
382 struct fb_videomode varfbmode;
383 const struct fb_videomode *fbmode = NULL;
384
385 fb_var_to_videomode(&varfbmode, var);
386 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
387 if (fbmode)
388 fb_videomode_to_var(var, fbmode);
389 return fbmode;
390 }
391
392
393 /**
394 * atmel_lcdfb_check_var - Validates a var passed in.
395 * @var: frame buffer variable screen structure
396 * @info: frame buffer structure that represents a single frame buffer
397 *
398 * Checks to see if the hardware supports the state requested by
399 * var passed in. This function does not alter the hardware
400 * state!!! This means the data stored in struct fb_info and
401 * struct atmel_lcdfb_info do not change. This includes the var
402 * inside of struct fb_info. Do NOT change these. This function
403 * can be called on its own if we intent to only test a mode and
404 * not actually set it. The stuff in modedb.c is a example of
405 * this. If the var passed in is slightly off by what the
406 * hardware can support then we alter the var PASSED in to what
407 * we can do. If the hardware doesn't support mode change a
408 * -EINVAL will be returned by the upper layers. You don't need
409 * to implement this function then. If you hardware doesn't
410 * support changing the resolution then this function is not
411 * needed. In this case the driver would just provide a var that
412 * represents the static state the screen is in.
413 *
414 * Returns negative errno on error, or zero on success.
415 */
416 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
417 struct fb_info *info)
418 {
419 struct device *dev = info->device;
420 struct atmel_lcdfb_info *sinfo = info->par;
421 unsigned long clk_value_khz;
422
423 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
424
425 dev_dbg(dev, "%s:\n", __func__);
426
427 if (!(var->pixclock && var->bits_per_pixel)) {
428 /* choose a suitable mode if possible */
429 if (!atmel_lcdfb_choose_mode(var, info)) {
430 dev_err(dev, "needed value not specified\n");
431 return -EINVAL;
432 }
433 }
434
435 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
436 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
437 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
438 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
439
440 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
441 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
442 return -EINVAL;
443 }
444
445 /* Do not allow to have real resoulution larger than virtual */
446 if (var->xres > var->xres_virtual)
447 var->xres_virtual = var->xres;
448
449 if (var->yres > var->yres_virtual)
450 var->yres_virtual = var->yres;
451
452 /* Force same alignment for each line */
453 var->xres = (var->xres + 3) & ~3UL;
454 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
455
456 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
457 var->transp.msb_right = 0;
458 var->transp.offset = var->transp.length = 0;
459 var->xoffset = var->yoffset = 0;
460
461 if (info->fix.smem_len) {
462 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
463 * ((var->bits_per_pixel + 7) / 8));
464 if (smem_len > info->fix.smem_len)
465 return -EINVAL;
466 }
467
468 /* Saturate vertical and horizontal timings at maximum values */
469 var->vsync_len = min_t(u32, var->vsync_len,
470 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
471 var->upper_margin = min_t(u32, var->upper_margin,
472 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
473 var->lower_margin = min_t(u32, var->lower_margin,
474 ATMEL_LCDC_VFP);
475 var->right_margin = min_t(u32, var->right_margin,
476 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
477 var->hsync_len = min_t(u32, var->hsync_len,
478 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
479 var->left_margin = min_t(u32, var->left_margin,
480 ATMEL_LCDC_HBP + 1);
481
482 /* Some parameters can't be zero */
483 var->vsync_len = max_t(u32, var->vsync_len, 1);
484 var->right_margin = max_t(u32, var->right_margin, 1);
485 var->hsync_len = max_t(u32, var->hsync_len, 1);
486 var->left_margin = max_t(u32, var->left_margin, 1);
487
488 switch (var->bits_per_pixel) {
489 case 1:
490 case 2:
491 case 4:
492 case 8:
493 var->red.offset = var->green.offset = var->blue.offset = 0;
494 var->red.length = var->green.length = var->blue.length
495 = var->bits_per_pixel;
496 break;
497 case 16:
498 /* Older SOCs use IBGR:555 rather than BGR:565. */
499 if (sinfo->config->have_intensity_bit)
500 var->green.length = 5;
501 else
502 var->green.length = 6;
503
504 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
505 /* RGB:5X5 mode */
506 var->red.offset = var->green.length + 5;
507 var->blue.offset = 0;
508 } else {
509 /* BGR:5X5 mode */
510 var->red.offset = 0;
511 var->blue.offset = var->green.length + 5;
512 }
513 var->green.offset = 5;
514 var->red.length = var->blue.length = 5;
515 break;
516 case 32:
517 var->transp.offset = 24;
518 var->transp.length = 8;
519 /* fall through */
520 case 24:
521 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
522 /* RGB:888 mode */
523 var->red.offset = 16;
524 var->blue.offset = 0;
525 } else {
526 /* BGR:888 mode */
527 var->red.offset = 0;
528 var->blue.offset = 16;
529 }
530 var->green.offset = 8;
531 var->red.length = var->green.length = var->blue.length = 8;
532 break;
533 default:
534 dev_err(dev, "color depth %d not supported\n",
535 var->bits_per_pixel);
536 return -EINVAL;
537 }
538
539 return 0;
540 }
541
542 /*
543 * LCD reset sequence
544 */
545 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
546 {
547 might_sleep();
548
549 atmel_lcdfb_stop(sinfo);
550 atmel_lcdfb_start(sinfo);
551 }
552
553 /**
554 * atmel_lcdfb_set_par - Alters the hardware state.
555 * @info: frame buffer structure that represents a single frame buffer
556 *
557 * Using the fb_var_screeninfo in fb_info we set the resolution
558 * of the this particular framebuffer. This function alters the
559 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
560 * not alter var in fb_info since we are using that data. This
561 * means we depend on the data in var inside fb_info to be
562 * supported by the hardware. atmel_lcdfb_check_var is always called
563 * before atmel_lcdfb_set_par to ensure this. Again if you can't
564 * change the resolution you don't need this function.
565 *
566 */
567 static int atmel_lcdfb_set_par(struct fb_info *info)
568 {
569 struct atmel_lcdfb_info *sinfo = info->par;
570 unsigned long hozval_linesz;
571 unsigned long value;
572 unsigned long clk_value_khz;
573 unsigned long bits_per_line;
574 unsigned long pix_factor = 2;
575
576 might_sleep();
577
578 dev_dbg(info->device, "%s:\n", __func__);
579 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
580 info->var.xres, info->var.yres,
581 info->var.xres_virtual, info->var.yres_virtual);
582
583 atmel_lcdfb_stop_nowait(sinfo);
584
585 if (info->var.bits_per_pixel == 1)
586 info->fix.visual = FB_VISUAL_MONO01;
587 else if (info->var.bits_per_pixel <= 8)
588 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
589 else
590 info->fix.visual = FB_VISUAL_TRUECOLOR;
591
592 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
593 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
594
595 /* Re-initialize the DMA engine... */
596 dev_dbg(info->device, " * update DMA engine\n");
597 atmel_lcdfb_update_dma(info, &info->var);
598
599 /* ...set frame size and burst length = 8 words (?) */
600 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
601 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
602 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
603
604 /* Now, the LCDC core... */
605
606 /* Set pixel clock */
607 if (sinfo->config->have_alt_pixclock)
608 pix_factor = 1;
609
610 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
611
612 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
613
614 if (value < pix_factor) {
615 dev_notice(info->device, "Bypassing pixel clock divider\n");
616 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
617 } else {
618 value = (value / pix_factor) - 1;
619 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
620 value);
621 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
622 value << ATMEL_LCDC_CLKVAL_OFFSET);
623 info->var.pixclock =
624 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
625 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
626 PICOS2KHZ(info->var.pixclock));
627 }
628
629
630 /* Initialize control register 2 */
631 value = sinfo->default_lcdcon2;
632
633 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
634 value |= ATMEL_LCDC_INVLINE_INVERTED;
635 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
636 value |= ATMEL_LCDC_INVFRAME_INVERTED;
637
638 switch (info->var.bits_per_pixel) {
639 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
640 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
641 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
642 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
643 case 15: /* fall through */
644 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
645 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
646 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
647 default: BUG(); break;
648 }
649 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
650 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
651
652 /* Vertical timing */
653 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
654 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
655 value |= info->var.lower_margin;
656 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
657 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
658
659 /* Horizontal timing */
660 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
661 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
662 value |= (info->var.left_margin - 1);
663 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
664 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
665
666 /* Horizontal value (aka line size) */
667 hozval_linesz = compute_hozval(sinfo, info->var.xres);
668
669 /* Display size */
670 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
671 value |= info->var.yres - 1;
672 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
673 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
674
675 /* FIFO Threshold: Use formula from data sheet */
676 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
677 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
678
679 /* Toggle LCD_MODE every frame */
680 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
681
682 /* Disable all interrupts */
683 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
684 /* Enable FIFO & DMA errors */
685 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
686
687 /* ...wait for DMA engine to become idle... */
688 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
689 msleep(10);
690
691 atmel_lcdfb_start(sinfo);
692
693 dev_dbg(info->device, " * DONE\n");
694
695 return 0;
696 }
697
698 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
699 {
700 chan &= 0xffff;
701 chan >>= 16 - bf->length;
702 return chan << bf->offset;
703 }
704
705 /**
706 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
707 * @regno: Which register in the CLUT we are programming
708 * @red: The red value which can be up to 16 bits wide
709 * @green: The green value which can be up to 16 bits wide
710 * @blue: The blue value which can be up to 16 bits wide.
711 * @transp: If supported the alpha value which can be up to 16 bits wide.
712 * @info: frame buffer info structure
713 *
714 * Set a single color register. The values supplied have a 16 bit
715 * magnitude which needs to be scaled in this function for the hardware.
716 * Things to take into consideration are how many color registers, if
717 * any, are supported with the current color visual. With truecolor mode
718 * no color palettes are supported. Here a pseudo palette is created
719 * which we store the value in pseudo_palette in struct fb_info. For
720 * pseudocolor mode we have a limited color palette. To deal with this
721 * we can program what color is displayed for a particular pixel value.
722 * DirectColor is similar in that we can program each color field. If
723 * we have a static colormap we don't need to implement this function.
724 *
725 * Returns negative errno on error, or zero on success. In an
726 * ideal world, this would have been the case, but as it turns
727 * out, the other drivers return 1 on failure, so that's what
728 * we're going to do.
729 */
730 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
731 unsigned int green, unsigned int blue,
732 unsigned int transp, struct fb_info *info)
733 {
734 struct atmel_lcdfb_info *sinfo = info->par;
735 unsigned int val;
736 u32 *pal;
737 int ret = 1;
738
739 if (info->var.grayscale)
740 red = green = blue = (19595 * red + 38470 * green
741 + 7471 * blue) >> 16;
742
743 switch (info->fix.visual) {
744 case FB_VISUAL_TRUECOLOR:
745 if (regno < 16) {
746 pal = info->pseudo_palette;
747
748 val = chan_to_field(red, &info->var.red);
749 val |= chan_to_field(green, &info->var.green);
750 val |= chan_to_field(blue, &info->var.blue);
751
752 pal[regno] = val;
753 ret = 0;
754 }
755 break;
756
757 case FB_VISUAL_PSEUDOCOLOR:
758 if (regno < 256) {
759 if (sinfo->config->have_intensity_bit) {
760 /* old style I+BGR:555 */
761 val = ((red >> 11) & 0x001f);
762 val |= ((green >> 6) & 0x03e0);
763 val |= ((blue >> 1) & 0x7c00);
764
765 /*
766 * TODO: intensity bit. Maybe something like
767 * ~(red[10] ^ green[10] ^ blue[10]) & 1
768 */
769 } else {
770 /* new style BGR:565 / RGB:565 */
771 if (sinfo->lcd_wiring_mode ==
772 ATMEL_LCDC_WIRING_RGB) {
773 val = ((blue >> 11) & 0x001f);
774 val |= ((red >> 0) & 0xf800);
775 } else {
776 val = ((red >> 11) & 0x001f);
777 val |= ((blue >> 0) & 0xf800);
778 }
779
780 val |= ((green >> 5) & 0x07e0);
781 }
782
783 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
784 ret = 0;
785 }
786 break;
787
788 case FB_VISUAL_MONO01:
789 if (regno < 2) {
790 val = (regno == 0) ? 0x00 : 0x1F;
791 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
792 ret = 0;
793 }
794 break;
795
796 }
797
798 return ret;
799 }
800
801 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
802 struct fb_info *info)
803 {
804 dev_dbg(info->device, "%s\n", __func__);
805
806 atmel_lcdfb_update_dma(info, var);
807
808 return 0;
809 }
810
811 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
812 {
813 struct atmel_lcdfb_info *sinfo = info->par;
814
815 switch (blank_mode) {
816 case FB_BLANK_UNBLANK:
817 case FB_BLANK_NORMAL:
818 atmel_lcdfb_start(sinfo);
819 break;
820 case FB_BLANK_VSYNC_SUSPEND:
821 case FB_BLANK_HSYNC_SUSPEND:
822 break;
823 case FB_BLANK_POWERDOWN:
824 atmel_lcdfb_stop(sinfo);
825 break;
826 default:
827 return -EINVAL;
828 }
829
830 /* let fbcon do a soft blank for us */
831 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
832 }
833
834 static struct fb_ops atmel_lcdfb_ops = {
835 .owner = THIS_MODULE,
836 .fb_check_var = atmel_lcdfb_check_var,
837 .fb_set_par = atmel_lcdfb_set_par,
838 .fb_setcolreg = atmel_lcdfb_setcolreg,
839 .fb_blank = atmel_lcdfb_blank,
840 .fb_pan_display = atmel_lcdfb_pan_display,
841 .fb_fillrect = cfb_fillrect,
842 .fb_copyarea = cfb_copyarea,
843 .fb_imageblit = cfb_imageblit,
844 };
845
846 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
847 {
848 struct fb_info *info = dev_id;
849 struct atmel_lcdfb_info *sinfo = info->par;
850 u32 status;
851
852 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
853 if (status & ATMEL_LCDC_UFLWI) {
854 dev_warn(info->device, "FIFO underflow %#x\n", status);
855 /* reset DMA and FIFO to avoid screen shifting */
856 schedule_work(&sinfo->task);
857 }
858 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
859 return IRQ_HANDLED;
860 }
861
862 /*
863 * LCD controller task (to reset the LCD)
864 */
865 static void atmel_lcdfb_task(struct work_struct *work)
866 {
867 struct atmel_lcdfb_info *sinfo =
868 container_of(work, struct atmel_lcdfb_info, task);
869
870 atmel_lcdfb_reset(sinfo);
871 }
872
873 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
874 {
875 struct fb_info *info = sinfo->info;
876 int ret = 0;
877
878 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
879
880 dev_info(info->device,
881 "%luKiB frame buffer at %08lx (mapped at %p)\n",
882 (unsigned long)info->fix.smem_len / 1024,
883 (unsigned long)info->fix.smem_start,
884 info->screen_base);
885
886 /* Allocate colormap */
887 ret = fb_alloc_cmap(&info->cmap, 256, 0);
888 if (ret < 0)
889 dev_err(info->device, "Alloc color map failed\n");
890
891 return ret;
892 }
893
894 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
895 {
896 clk_enable(sinfo->bus_clk);
897 clk_enable(sinfo->lcdc_clk);
898 }
899
900 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
901 {
902 clk_disable(sinfo->bus_clk);
903 clk_disable(sinfo->lcdc_clk);
904 }
905
906
907 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
908 {
909 struct device *dev = &pdev->dev;
910 struct fb_info *info;
911 struct atmel_lcdfb_info *sinfo;
912 struct atmel_lcdfb_info *pdata_sinfo;
913 struct fb_videomode fbmode;
914 struct resource *regs = NULL;
915 struct resource *map = NULL;
916 int ret;
917
918 dev_dbg(dev, "%s BEGIN\n", __func__);
919
920 ret = -ENOMEM;
921 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
922 if (!info) {
923 dev_err(dev, "cannot allocate memory\n");
924 goto out;
925 }
926
927 sinfo = info->par;
928
929 if (dev->platform_data) {
930 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
931 sinfo->default_bpp = pdata_sinfo->default_bpp;
932 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
933 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
934 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
935 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
936 sinfo->guard_time = pdata_sinfo->guard_time;
937 sinfo->smem_len = pdata_sinfo->smem_len;
938 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
939 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
940 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
941 } else {
942 dev_err(dev, "cannot get default configuration\n");
943 goto free_info;
944 }
945 sinfo->info = info;
946 sinfo->pdev = pdev;
947 sinfo->config = atmel_lcdfb_get_config(pdev);
948 if (!sinfo->config)
949 goto free_info;
950
951 strcpy(info->fix.id, sinfo->pdev->name);
952 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
953 info->pseudo_palette = sinfo->pseudo_palette;
954 info->fbops = &atmel_lcdfb_ops;
955
956 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
957 info->fix = atmel_lcdfb_fix;
958
959 /* Enable LCDC Clocks */
960 sinfo->bus_clk = clk_get(dev, "hclk");
961 if (IS_ERR(sinfo->bus_clk)) {
962 ret = PTR_ERR(sinfo->bus_clk);
963 goto free_info;
964 }
965 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
966 if (IS_ERR(sinfo->lcdc_clk)) {
967 ret = PTR_ERR(sinfo->lcdc_clk);
968 goto put_bus_clk;
969 }
970 atmel_lcdfb_start_clock(sinfo);
971
972 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
973 info->monspecs.modedb_len, info->monspecs.modedb,
974 sinfo->default_bpp);
975 if (!ret) {
976 dev_err(dev, "no suitable video mode found\n");
977 goto stop_clk;
978 }
979
980
981 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
982 if (!regs) {
983 dev_err(dev, "resources unusable\n");
984 ret = -ENXIO;
985 goto stop_clk;
986 }
987
988 sinfo->irq_base = platform_get_irq(pdev, 0);
989 if (sinfo->irq_base < 0) {
990 dev_err(dev, "unable to get irq\n");
991 ret = sinfo->irq_base;
992 goto stop_clk;
993 }
994
995 /* Initialize video memory */
996 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
997 if (map) {
998 /* use a pre-allocated memory buffer */
999 info->fix.smem_start = map->start;
1000 info->fix.smem_len = resource_size(map);
1001 if (!request_mem_region(info->fix.smem_start,
1002 info->fix.smem_len, pdev->name)) {
1003 ret = -EBUSY;
1004 goto stop_clk;
1005 }
1006
1007 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
1008 if (!info->screen_base) {
1009 ret = -ENOMEM;
1010 goto release_intmem;
1011 }
1012
1013 /*
1014 * Don't clear the framebuffer -- someone may have set
1015 * up a splash image.
1016 */
1017 } else {
1018 /* allocate memory buffer */
1019 ret = atmel_lcdfb_alloc_video_memory(sinfo);
1020 if (ret < 0) {
1021 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1022 goto stop_clk;
1023 }
1024 }
1025
1026 /* LCDC registers */
1027 info->fix.mmio_start = regs->start;
1028 info->fix.mmio_len = resource_size(regs);
1029
1030 if (!request_mem_region(info->fix.mmio_start,
1031 info->fix.mmio_len, pdev->name)) {
1032 ret = -EBUSY;
1033 goto free_fb;
1034 }
1035
1036 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1037 if (!sinfo->mmio) {
1038 dev_err(dev, "cannot map LCDC registers\n");
1039 ret = -ENOMEM;
1040 goto release_mem;
1041 }
1042
1043 /* Initialize PWM for contrast or backlight ("off") */
1044 init_contrast(sinfo);
1045
1046 /* interrupt */
1047 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1048 if (ret) {
1049 dev_err(dev, "request_irq failed: %d\n", ret);
1050 goto unmap_mmio;
1051 }
1052
1053 /* Some operations on the LCDC might sleep and
1054 * require a preemptible task context */
1055 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1056
1057 ret = atmel_lcdfb_init_fbinfo(sinfo);
1058 if (ret < 0) {
1059 dev_err(dev, "init fbinfo failed: %d\n", ret);
1060 goto unregister_irqs;
1061 }
1062
1063 /*
1064 * This makes sure that our colour bitfield
1065 * descriptors are correctly initialised.
1066 */
1067 atmel_lcdfb_check_var(&info->var, info);
1068
1069 ret = fb_set_var(info, &info->var);
1070 if (ret) {
1071 dev_warn(dev, "unable to set display parameters\n");
1072 goto free_cmap;
1073 }
1074
1075 dev_set_drvdata(dev, info);
1076
1077 /*
1078 * Tell the world that we're ready to go
1079 */
1080 ret = register_framebuffer(info);
1081 if (ret < 0) {
1082 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1083 goto reset_drvdata;
1084 }
1085
1086 /* add selected videomode to modelist */
1087 fb_var_to_videomode(&fbmode, &info->var);
1088 fb_add_videomode(&fbmode, &info->modelist);
1089
1090 /* Power up the LCDC screen */
1091 if (sinfo->atmel_lcdfb_power_control)
1092 sinfo->atmel_lcdfb_power_control(1);
1093
1094 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1095 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1096
1097 return 0;
1098
1099 reset_drvdata:
1100 dev_set_drvdata(dev, NULL);
1101 free_cmap:
1102 fb_dealloc_cmap(&info->cmap);
1103 unregister_irqs:
1104 cancel_work_sync(&sinfo->task);
1105 free_irq(sinfo->irq_base, info);
1106 unmap_mmio:
1107 exit_backlight(sinfo);
1108 iounmap(sinfo->mmio);
1109 release_mem:
1110 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1111 free_fb:
1112 if (map)
1113 iounmap(info->screen_base);
1114 else
1115 atmel_lcdfb_free_video_memory(sinfo);
1116
1117 release_intmem:
1118 if (map)
1119 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1120 stop_clk:
1121 atmel_lcdfb_stop_clock(sinfo);
1122 clk_put(sinfo->lcdc_clk);
1123 put_bus_clk:
1124 clk_put(sinfo->bus_clk);
1125 free_info:
1126 framebuffer_release(info);
1127 out:
1128 dev_dbg(dev, "%s FAILED\n", __func__);
1129 return ret;
1130 }
1131
1132 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1133 {
1134 struct device *dev = &pdev->dev;
1135 struct fb_info *info = dev_get_drvdata(dev);
1136 struct atmel_lcdfb_info *sinfo;
1137
1138 if (!info || !info->par)
1139 return 0;
1140 sinfo = info->par;
1141
1142 cancel_work_sync(&sinfo->task);
1143 exit_backlight(sinfo);
1144 if (sinfo->atmel_lcdfb_power_control)
1145 sinfo->atmel_lcdfb_power_control(0);
1146 unregister_framebuffer(info);
1147 atmel_lcdfb_stop_clock(sinfo);
1148 clk_put(sinfo->lcdc_clk);
1149 clk_put(sinfo->bus_clk);
1150 fb_dealloc_cmap(&info->cmap);
1151 free_irq(sinfo->irq_base, info);
1152 iounmap(sinfo->mmio);
1153 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1154 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1155 iounmap(info->screen_base);
1156 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1157 } else {
1158 atmel_lcdfb_free_video_memory(sinfo);
1159 }
1160
1161 dev_set_drvdata(dev, NULL);
1162 framebuffer_release(info);
1163
1164 return 0;
1165 }
1166
1167 #ifdef CONFIG_PM
1168
1169 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1170 {
1171 struct fb_info *info = platform_get_drvdata(pdev);
1172 struct atmel_lcdfb_info *sinfo = info->par;
1173
1174 /*
1175 * We don't want to handle interrupts while the clock is
1176 * stopped. It may take forever.
1177 */
1178 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1179
1180 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1181 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1182 if (sinfo->atmel_lcdfb_power_control)
1183 sinfo->atmel_lcdfb_power_control(0);
1184
1185 atmel_lcdfb_stop(sinfo);
1186 atmel_lcdfb_stop_clock(sinfo);
1187
1188 return 0;
1189 }
1190
1191 static int atmel_lcdfb_resume(struct platform_device *pdev)
1192 {
1193 struct fb_info *info = platform_get_drvdata(pdev);
1194 struct atmel_lcdfb_info *sinfo = info->par;
1195
1196 atmel_lcdfb_start_clock(sinfo);
1197 atmel_lcdfb_start(sinfo);
1198 if (sinfo->atmel_lcdfb_power_control)
1199 sinfo->atmel_lcdfb_power_control(1);
1200 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1201
1202 /* Enable FIFO & DMA errors */
1203 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1204 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1205
1206 return 0;
1207 }
1208
1209 #else
1210 #define atmel_lcdfb_suspend NULL
1211 #define atmel_lcdfb_resume NULL
1212 #endif
1213
1214 static struct platform_driver atmel_lcdfb_driver = {
1215 .remove = __exit_p(atmel_lcdfb_remove),
1216 .suspend = atmel_lcdfb_suspend,
1217 .resume = atmel_lcdfb_resume,
1218 .id_table = atmel_lcdfb_devtypes,
1219 .driver = {
1220 .name = "atmel_lcdfb",
1221 .owner = THIS_MODULE,
1222 },
1223 };
1224
1225 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1226
1227 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1228 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1229 MODULE_LICENSE("GPL");