2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk
;
38 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
39 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * xhci_handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int xhci_handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
56 u32 mask
, u32 done
, int usec
)
61 result
= xhci_readl(xhci
, ptr
);
62 if (result
== ~(u32
)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd
*xhci
)
83 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
87 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
89 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd
*xhci
)
103 xhci_dbg(xhci
, "// Halt the HC\n");
106 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
107 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
109 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
110 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
112 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd
*xhci
)
125 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
127 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
136 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
137 if (ret
== -ETIMEDOUT
)
138 xhci_err(xhci
, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd
*xhci
)
159 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
160 if ((state
& STS_HALT
) == 0) {
161 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci
, "// Reset the HC\n");
166 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
167 command
|= CMD_RESET
;
168 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
170 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->command
,
171 CMD_RESET
, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
181 STS_CNR
, 0, 10 * 1000 * 1000);
183 for (i
= 0; i
< 2; ++i
) {
184 xhci
->bus_state
[i
].port_c_suspend
= 0;
185 xhci
->bus_state
[i
].suspended_ports
= 0;
186 xhci
->bus_state
[i
].resuming_ports
= 0;
193 static int xhci_free_msi(struct xhci_hcd
*xhci
)
197 if (!xhci
->msix_entries
)
200 for (i
= 0; i
< xhci
->msix_count
; i
++)
201 if (xhci
->msix_entries
[i
].vector
)
202 free_irq(xhci
->msix_entries
[i
].vector
,
210 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
213 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
215 ret
= pci_enable_msi(pdev
);
217 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
221 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
222 0, "xhci_hcd", xhci_to_hcd(xhci
));
224 xhci_dbg(xhci
, "disable MSI interrupt\n");
225 pci_disable_msi(pdev
);
233 * free all IRQs request
235 static void xhci_free_irq(struct xhci_hcd
*xhci
)
237 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
240 /* return if using legacy interrupt */
241 if (xhci_to_hcd(xhci
)->irq
> 0)
244 ret
= xhci_free_msi(xhci
);
248 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
256 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
259 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
260 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
263 * calculate number of msi-x vectors supported.
264 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
265 * with max number of interrupters based on the xhci HCSPARAMS1.
266 * - num_online_cpus: maximum msi-x vectors per CPUs core.
267 * Add additional 1 vector to ensure always available interrupt.
269 xhci
->msix_count
= min(num_online_cpus() + 1,
270 HCS_MAX_INTRS(xhci
->hcs_params1
));
273 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
275 if (!xhci
->msix_entries
) {
276 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
280 for (i
= 0; i
< xhci
->msix_count
; i
++) {
281 xhci
->msix_entries
[i
].entry
= i
;
282 xhci
->msix_entries
[i
].vector
= 0;
285 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
287 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
291 for (i
= 0; i
< xhci
->msix_count
; i
++) {
292 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
293 (irq_handler_t
)xhci_msi_irq
,
294 0, "xhci_hcd", xhci_to_hcd(xhci
));
299 hcd
->msix_enabled
= 1;
303 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
305 pci_disable_msix(pdev
);
307 kfree(xhci
->msix_entries
);
308 xhci
->msix_entries
= NULL
;
312 /* Free any IRQs and disable MSI-X */
313 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
315 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
316 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
320 if (xhci
->msix_entries
) {
321 pci_disable_msix(pdev
);
322 kfree(xhci
->msix_entries
);
323 xhci
->msix_entries
= NULL
;
325 pci_disable_msi(pdev
);
328 hcd
->msix_enabled
= 0;
332 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
336 if (xhci
->msix_entries
) {
337 for (i
= 0; i
< xhci
->msix_count
; i
++)
338 synchronize_irq(xhci
->msix_entries
[i
].vector
);
342 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
344 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
345 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
349 * Some Fresco Logic host controllers advertise MSI, but fail to
350 * generate interrupts. Don't even try to enable MSI.
352 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
355 /* unregister the legacy interrupt */
357 free_irq(hcd
->irq
, hcd
);
360 ret
= xhci_setup_msix(xhci
);
362 /* fall back to msi*/
363 ret
= xhci_setup_msi(xhci
);
366 /* hcd->irq is 0, we have MSI */
370 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
375 /* fall back to legacy interrupt*/
376 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
377 hcd
->irq_descr
, hcd
);
379 xhci_err(xhci
, "request interrupt %d failed\n",
383 hcd
->irq
= pdev
->irq
;
389 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
394 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
398 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
404 static void compliance_mode_recovery(unsigned long arg
)
406 struct xhci_hcd
*xhci
;
411 xhci
= (struct xhci_hcd
*)arg
;
413 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
414 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
415 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
417 * Compliance Mode Detected. Letting USB Core
418 * handle the Warm Reset
420 xhci_dbg(xhci
, "Compliance mode detected->port %d\n",
422 xhci_dbg(xhci
, "Attempting compliance mode recovery\n");
423 hcd
= xhci
->shared_hcd
;
425 if (hcd
->state
== HC_STATE_SUSPENDED
)
426 usb_hcd_resume_root_hub(hcd
);
428 usb_hcd_poll_rh_status(hcd
);
432 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
433 mod_timer(&xhci
->comp_mode_recovery_timer
,
434 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
438 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
439 * that causes ports behind that hardware to enter compliance mode sometimes.
440 * The quirk creates a timer that polls every 2 seconds the link state of
441 * each host controller's port and recovers it by issuing a Warm reset
442 * if Compliance mode is detected, otherwise the port will become "dead" (no
443 * device connections or disconnections will be detected anymore). Becasue no
444 * status event is generated when entering compliance mode (per xhci spec),
445 * this quirk is needed on systems that have the failing hardware installed.
447 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
449 xhci
->port_status_u0
= 0;
450 init_timer(&xhci
->comp_mode_recovery_timer
);
452 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
453 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
454 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
455 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
457 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
458 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
459 add_timer(&xhci
->comp_mode_recovery_timer
);
460 xhci_dbg(xhci
, "Compliance mode recovery timer initialized\n");
464 * This function identifies the systems that have installed the SN65LVPE502CP
465 * USB3.0 re-driver and that need the Compliance Mode Quirk.
467 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
469 static bool compliance_mode_recovery_timer_quirk_check(void)
471 const char *dmi_product_name
, *dmi_sys_vendor
;
473 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
474 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
475 if (!dmi_product_name
|| !dmi_sys_vendor
)
478 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
481 if (strstr(dmi_product_name
, "Z420") ||
482 strstr(dmi_product_name
, "Z620") ||
483 strstr(dmi_product_name
, "Z820") ||
484 strstr(dmi_product_name
, "Z1 Workstation"))
490 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
492 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
497 * Initialize memory for HCD and xHC (one-time init).
499 * Program the PAGESIZE register, initialize the device context array, create
500 * device contexts (?), set up a command ring segment (or two?), create event
501 * ring (one for now).
503 int xhci_init(struct usb_hcd
*hcd
)
505 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
508 xhci_dbg(xhci
, "xhci_init\n");
509 spin_lock_init(&xhci
->lock
);
510 if (xhci
->hci_version
== 0x95 && link_quirk
) {
511 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
512 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
514 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
516 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
517 xhci_dbg(xhci
, "Finished xhci_init\n");
519 /* Initializing Compliance Mode Recovery Data If Needed */
520 if (compliance_mode_recovery_timer_quirk_check()) {
521 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
522 compliance_mode_recovery_timer_init(xhci
);
528 /*-------------------------------------------------------------------------*/
531 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
532 static void xhci_event_ring_work(unsigned long arg
)
537 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
540 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
542 spin_lock_irqsave(&xhci
->lock
, flags
);
543 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
544 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
545 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
546 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
547 xhci_dbg(xhci
, "HW died, polling stopped.\n");
548 spin_unlock_irqrestore(&xhci
->lock
, flags
);
552 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
553 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
554 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
555 xhci
->error_bitmask
= 0;
556 xhci_dbg(xhci
, "Event ring:\n");
557 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
558 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
559 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
560 temp_64
&= ~ERST_PTR_MASK
;
561 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
562 xhci_dbg(xhci
, "Command ring:\n");
563 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
564 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
565 xhci_dbg_cmd_ptrs(xhci
);
566 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
569 for (j
= 0; j
< 31; ++j
) {
570 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
573 spin_unlock_irqrestore(&xhci
->lock
, flags
);
576 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
578 xhci_dbg(xhci
, "Quit polling the event ring.\n");
582 static int xhci_run_finished(struct xhci_hcd
*xhci
)
584 if (xhci_start(xhci
)) {
588 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
589 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
591 if (xhci
->quirks
& XHCI_NEC_HOST
)
592 xhci_ring_cmd_db(xhci
);
594 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
599 * Start the HC after it was halted.
601 * This function is called by the USB core when the HC driver is added.
602 * Its opposite is xhci_stop().
604 * xhci_init() must be called once before this function can be called.
605 * Reset the HC, enable device slot contexts, program DCBAAP, and
606 * set command ring pointer and event ring pointer.
608 * Setup MSI-X vectors and enable interrupts.
610 int xhci_run(struct usb_hcd
*hcd
)
615 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
617 /* Start the xHCI host controller running only after the USB 2.0 roothub
621 hcd
->uses_new_polling
= 1;
622 if (!usb_hcd_is_primary_hcd(hcd
))
623 return xhci_run_finished(xhci
);
625 xhci_dbg(xhci
, "xhci_run\n");
627 ret
= xhci_try_enable_msi(hcd
);
631 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
632 init_timer(&xhci
->event_ring_timer
);
633 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
634 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
635 /* Poll the event ring */
636 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
638 xhci_dbg(xhci
, "Setting event ring polling timer\n");
639 add_timer(&xhci
->event_ring_timer
);
642 xhci_dbg(xhci
, "Command ring memory map follows:\n");
643 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
644 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
645 xhci_dbg_cmd_ptrs(xhci
);
647 xhci_dbg(xhci
, "ERST memory map follows:\n");
648 xhci_dbg_erst(xhci
, &xhci
->erst
);
649 xhci_dbg(xhci
, "Event ring:\n");
650 xhci_debug_ring(xhci
, xhci
->event_ring
);
651 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
652 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
653 temp_64
&= ~ERST_PTR_MASK
;
654 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
656 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
657 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
658 temp
&= ~ER_IRQ_INTERVAL_MASK
;
660 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
662 /* Set the HCD state before we enable the irqs */
663 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
665 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
667 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
669 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
670 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
671 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
672 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
673 &xhci
->ir_set
->irq_pending
);
674 xhci_print_ir_set(xhci
, 0);
676 if (xhci
->quirks
& XHCI_NEC_HOST
)
677 xhci_queue_vendor_command(xhci
, 0, 0, 0,
678 TRB_TYPE(TRB_NEC_GET_FW
));
680 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
684 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
686 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
688 spin_lock_irq(&xhci
->lock
);
691 /* The shared_hcd is going to be deallocated shortly (the USB core only
692 * calls this function when allocation fails in usb_add_hcd(), or
693 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
695 xhci
->shared_hcd
= NULL
;
696 spin_unlock_irq(&xhci
->lock
);
702 * This function is called by the USB core when the HC driver is removed.
703 * Its opposite is xhci_run().
705 * Disable device contexts, disable IRQs, and quiesce the HC.
706 * Reset the HC, finish any completed transactions, and cleanup memory.
708 void xhci_stop(struct usb_hcd
*hcd
)
711 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
713 if (!usb_hcd_is_primary_hcd(hcd
)) {
714 xhci_only_stop_hcd(xhci
->shared_hcd
);
718 spin_lock_irq(&xhci
->lock
);
719 /* Make sure the xHC is halted for a USB3 roothub
720 * (xhci_stop() could be called as part of failed init).
724 spin_unlock_irq(&xhci
->lock
);
726 xhci_cleanup_msix(xhci
);
728 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
729 /* Tell the event ring poll function not to reschedule */
731 del_timer_sync(&xhci
->event_ring_timer
);
734 /* Deleting Compliance Mode Recovery Timer */
735 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
736 (!(xhci_all_ports_seen_u0(xhci
)))) {
737 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
738 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
742 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
745 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
746 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
747 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
748 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
749 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
750 &xhci
->ir_set
->irq_pending
);
751 xhci_print_ir_set(xhci
, 0);
753 xhci_dbg(xhci
, "cleaning up memory\n");
754 xhci_mem_cleanup(xhci
);
755 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
756 xhci_readl(xhci
, &xhci
->op_regs
->status
));
760 * Shutdown HC (not bus-specific)
762 * This is called when the machine is rebooting or halting. We assume that the
763 * machine will be powered off, and the HC's internal state will be reset.
764 * Don't bother to free memory.
766 * This will only ever be called with the main usb_hcd (the USB3 roothub).
768 void xhci_shutdown(struct usb_hcd
*hcd
)
770 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
772 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
773 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
775 spin_lock_irq(&xhci
->lock
);
777 spin_unlock_irq(&xhci
->lock
);
779 xhci_cleanup_msix(xhci
);
781 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
782 xhci_readl(xhci
, &xhci
->op_regs
->status
));
786 static void xhci_save_registers(struct xhci_hcd
*xhci
)
788 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
789 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
790 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
791 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
792 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
793 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
794 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
795 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
796 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
799 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
801 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
802 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
803 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
804 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
805 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
806 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
807 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
808 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
809 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
812 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
816 /* step 2: initialize command ring buffer */
817 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
818 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
819 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
820 xhci
->cmd_ring
->dequeue
) &
821 (u64
) ~CMD_RING_RSVD_BITS
) |
822 xhci
->cmd_ring
->cycle_state
;
823 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
824 (long unsigned long) val_64
);
825 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
829 * The whole command ring must be cleared to zero when we suspend the host.
831 * The host doesn't save the command ring pointer in the suspend well, so we
832 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
833 * aligned, because of the reserved bits in the command ring dequeue pointer
834 * register. Therefore, we can't just set the dequeue pointer back in the
835 * middle of the ring (TRBs are 16-byte aligned).
837 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
839 struct xhci_ring
*ring
;
840 struct xhci_segment
*seg
;
842 ring
= xhci
->cmd_ring
;
846 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
847 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
848 cpu_to_le32(~TRB_CYCLE
);
850 } while (seg
!= ring
->deq_seg
);
852 /* Reset the software enqueue and dequeue pointers */
853 ring
->deq_seg
= ring
->first_seg
;
854 ring
->dequeue
= ring
->first_seg
->trbs
;
855 ring
->enq_seg
= ring
->deq_seg
;
856 ring
->enqueue
= ring
->dequeue
;
858 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
860 * Ring is now zeroed, so the HW should look for change of ownership
861 * when the cycle bit is set to 1.
863 ring
->cycle_state
= 1;
866 * Reset the hardware dequeue pointer.
867 * Yes, this will need to be re-written after resume, but we're paranoid
868 * and want to make sure the hardware doesn't access bogus memory
869 * because, say, the BIOS or an SMI started the host without changing
870 * the command ring pointers.
872 xhci_set_cmd_ring_deq(xhci
);
876 * Stop HC (not bus-specific)
878 * This is called when the machine transition into S3/S4 mode.
881 int xhci_suspend(struct xhci_hcd
*xhci
)
884 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
887 if (hcd
->state
!= HC_STATE_SUSPENDED
||
888 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
891 /* Don't poll the roothubs on bus suspend. */
892 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
893 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
894 del_timer_sync(&hcd
->rh_timer
);
896 spin_lock_irq(&xhci
->lock
);
897 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
898 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
899 /* step 1: stop endpoint */
900 /* skipped assuming that port suspend has done */
902 /* step 2: clear Run/Stop bit */
903 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
905 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
906 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
907 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
)) {
908 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
909 spin_unlock_irq(&xhci
->lock
);
912 xhci_clear_command_ring(xhci
);
914 /* step 3: save registers */
915 xhci_save_registers(xhci
);
917 /* step 4: set CSS flag */
918 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
920 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
921 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
922 STS_SAVE
, 0, 10 * 1000)) {
923 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
924 spin_unlock_irq(&xhci
->lock
);
927 spin_unlock_irq(&xhci
->lock
);
930 * Deleting Compliance Mode Recovery Timer because the xHCI Host
931 * is about to be suspended.
933 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
934 (!(xhci_all_ports_seen_u0(xhci
)))) {
935 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
936 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
940 /* step 5: remove core well power */
941 /* synchronize irq when using MSI-X */
942 xhci_msix_sync_irqs(xhci
);
948 * start xHC (not bus-specific)
950 * This is called when the machine transition from S3/S4 mode.
953 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
955 u32 command
, temp
= 0;
956 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
957 struct usb_hcd
*secondary_hcd
;
960 /* Wait a bit if either of the roothubs need to settle from the
961 * transition into bus suspend.
963 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
965 xhci
->bus_state
[1].next_statechange
))
968 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
969 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
971 spin_lock_irq(&xhci
->lock
);
972 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
976 /* step 1: restore register */
977 xhci_restore_registers(xhci
);
978 /* step 2: initialize command ring buffer */
979 xhci_set_cmd_ring_deq(xhci
);
980 /* step 3: restore state and start state*/
981 /* step 3: set CRS flag */
982 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
984 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
985 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
986 STS_RESTORE
, 0, 10 * 1000)) {
987 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
988 spin_unlock_irq(&xhci
->lock
);
991 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
994 /* If restore operation fails, re-initialize the HC during resume */
995 if ((temp
& STS_SRE
) || hibernated
) {
996 /* Let the USB core know _both_ roothubs lost power. */
997 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
998 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
1000 xhci_dbg(xhci
, "Stop HCD\n");
1003 spin_unlock_irq(&xhci
->lock
);
1004 xhci_cleanup_msix(xhci
);
1006 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1007 /* Tell the event ring poll function not to reschedule */
1009 del_timer_sync(&xhci
->event_ring_timer
);
1012 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
1013 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1014 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
1015 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
1016 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
1017 &xhci
->ir_set
->irq_pending
);
1018 xhci_print_ir_set(xhci
, 0);
1020 xhci_dbg(xhci
, "cleaning up memory\n");
1021 xhci_mem_cleanup(xhci
);
1022 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1023 xhci_readl(xhci
, &xhci
->op_regs
->status
));
1025 /* USB core calls the PCI reinit and start functions twice:
1026 * first with the primary HCD, and then with the secondary HCD.
1027 * If we don't do the same, the host will never be started.
1029 if (!usb_hcd_is_primary_hcd(hcd
))
1030 secondary_hcd
= hcd
;
1032 secondary_hcd
= xhci
->shared_hcd
;
1034 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1035 retval
= xhci_init(hcd
->primary_hcd
);
1038 xhci_dbg(xhci
, "Start the primary HCD\n");
1039 retval
= xhci_run(hcd
->primary_hcd
);
1041 xhci_dbg(xhci
, "Start the secondary HCD\n");
1042 retval
= xhci_run(secondary_hcd
);
1044 hcd
->state
= HC_STATE_SUSPENDED
;
1045 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1049 /* step 4: set Run/Stop bit */
1050 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1052 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1053 xhci_handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1056 /* step 5: walk topology and initialize portsc,
1057 * portpmsc and portli
1059 /* this is done in bus_resume */
1061 /* step 6: restart each of the previously
1062 * Running endpoints by ringing their doorbells
1065 spin_unlock_irq(&xhci
->lock
);
1069 usb_hcd_resume_root_hub(hcd
);
1070 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1074 * If system is subject to the Quirk, Compliance Mode Timer needs to
1075 * be re-initialized Always after a system resume. Ports are subject
1076 * to suffer the Compliance Mode issue again. It doesn't matter if
1077 * ports have entered previously to U0 before system's suspension.
1079 if (xhci
->quirks
& XHCI_COMP_MODE_QUIRK
)
1080 compliance_mode_recovery_timer_init(xhci
);
1082 /* Re-enable port polling. */
1083 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1084 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1085 usb_hcd_poll_rh_status(hcd
);
1089 #endif /* CONFIG_PM */
1091 /*-------------------------------------------------------------------------*/
1094 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1095 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1096 * value to right shift 1 for the bitmask.
1098 * Index = (epnum * 2) + direction - 1,
1099 * where direction = 0 for OUT, 1 for IN.
1100 * For control endpoints, the IN index is used (OUT index is unused), so
1101 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1103 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1106 if (usb_endpoint_xfer_control(desc
))
1107 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1109 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1110 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1114 /* Find the flag for this endpoint (for use in the control context). Use the
1115 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1118 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1120 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1123 /* Find the flag for this endpoint (for use in the control context). Use the
1124 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1127 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1129 return 1 << (ep_index
+ 1);
1132 /* Compute the last valid endpoint context index. Basically, this is the
1133 * endpoint index plus one. For slot contexts with more than valid endpoint,
1134 * we find the most significant bit set in the added contexts flags.
1135 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1136 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1138 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1140 return fls(added_ctxs
) - 1;
1143 /* Returns 1 if the arguments are OK;
1144 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1146 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1147 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1149 struct xhci_hcd
*xhci
;
1150 struct xhci_virt_device
*virt_dev
;
1152 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1153 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1157 if (!udev
->parent
) {
1158 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1163 xhci
= hcd_to_xhci(hcd
);
1164 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1167 if (check_virt_dev
) {
1168 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1169 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1174 virt_dev
= xhci
->devs
[udev
->slot_id
];
1175 if (virt_dev
->udev
!= udev
) {
1176 printk(KERN_DEBUG
"xHCI %s called with udev and "
1177 "virt_dev does not match\n", func
);
1185 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1186 struct usb_device
*udev
, struct xhci_command
*command
,
1187 bool ctx_change
, bool must_succeed
);
1190 * Full speed devices may have a max packet size greater than 8 bytes, but the
1191 * USB core doesn't know that until it reads the first 8 bytes of the
1192 * descriptor. If the usb_device's max packet size changes after that point,
1193 * we need to issue an evaluate context command and wait on it.
1195 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1196 unsigned int ep_index
, struct urb
*urb
)
1198 struct xhci_container_ctx
*in_ctx
;
1199 struct xhci_container_ctx
*out_ctx
;
1200 struct xhci_input_control_ctx
*ctrl_ctx
;
1201 struct xhci_ep_ctx
*ep_ctx
;
1202 int max_packet_size
;
1203 int hw_max_packet_size
;
1206 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1207 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1208 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1209 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1210 if (hw_max_packet_size
!= max_packet_size
) {
1211 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1212 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1214 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1215 hw_max_packet_size
);
1216 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1218 /* Set up the modified control endpoint 0 */
1219 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1220 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1221 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1222 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1223 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1224 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1226 /* Set up the input context flags for the command */
1227 /* FIXME: This won't work if a non-default control endpoint
1228 * changes max packet sizes.
1230 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1231 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1232 ctrl_ctx
->drop_flags
= 0;
1234 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1235 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1236 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1237 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1239 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1242 /* Clean up the input context for later use by bandwidth
1245 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1251 * non-error returns are a promise to giveback() the urb later
1252 * we drop ownership so next owner (or urb unlink) can get it
1254 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1256 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1257 struct xhci_td
*buffer
;
1258 unsigned long flags
;
1260 unsigned int slot_id
, ep_index
;
1261 struct urb_priv
*urb_priv
;
1264 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1265 true, true, __func__
) <= 0)
1268 slot_id
= urb
->dev
->slot_id
;
1269 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1271 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1272 if (!in_interrupt())
1273 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1278 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1279 size
= urb
->number_of_packets
;
1283 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1284 size
* sizeof(struct xhci_td
*), mem_flags
);
1288 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1294 for (i
= 0; i
< size
; i
++) {
1295 urb_priv
->td
[i
] = buffer
;
1299 urb_priv
->length
= size
;
1300 urb_priv
->td_cnt
= 0;
1301 urb
->hcpriv
= urb_priv
;
1303 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1304 /* Check to see if the max packet size for the default control
1305 * endpoint changed during FS device enumeration
1307 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1308 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1311 xhci_urb_free_priv(xhci
, urb_priv
);
1317 /* We have a spinlock and interrupts disabled, so we must pass
1318 * atomic context to this function, which may allocate memory.
1320 spin_lock_irqsave(&xhci
->lock
, flags
);
1321 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1323 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1327 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1328 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1329 spin_lock_irqsave(&xhci
->lock
, flags
);
1330 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1332 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1333 EP_GETTING_STREAMS
) {
1334 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1335 "is transitioning to using streams.\n");
1337 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1338 EP_GETTING_NO_STREAMS
) {
1339 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1340 "is transitioning to "
1341 "not having streams.\n");
1344 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1349 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1350 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1351 spin_lock_irqsave(&xhci
->lock
, flags
);
1352 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1354 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1358 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1360 spin_lock_irqsave(&xhci
->lock
, flags
);
1361 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1363 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1367 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1372 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1373 "non-responsive xHCI host.\n",
1374 urb
->ep
->desc
.bEndpointAddress
, urb
);
1377 xhci_urb_free_priv(xhci
, urb_priv
);
1379 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1383 /* Get the right ring for the given URB.
1384 * If the endpoint supports streams, boundary check the URB's stream ID.
1385 * If the endpoint doesn't support streams, return the singular endpoint ring.
1387 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1390 unsigned int slot_id
;
1391 unsigned int ep_index
;
1392 unsigned int stream_id
;
1393 struct xhci_virt_ep
*ep
;
1395 slot_id
= urb
->dev
->slot_id
;
1396 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1397 stream_id
= urb
->stream_id
;
1398 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1399 /* Common case: no streams */
1400 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1403 if (stream_id
== 0) {
1405 "WARN: Slot ID %u, ep index %u has streams, "
1406 "but URB has no stream ID.\n",
1411 if (stream_id
< ep
->stream_info
->num_streams
)
1412 return ep
->stream_info
->stream_rings
[stream_id
];
1415 "WARN: Slot ID %u, ep index %u has "
1416 "stream IDs 1 to %u allocated, "
1417 "but stream ID %u is requested.\n",
1419 ep
->stream_info
->num_streams
- 1,
1425 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1426 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1427 * should pick up where it left off in the TD, unless a Set Transfer Ring
1428 * Dequeue Pointer is issued.
1430 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1431 * the ring. Since the ring is a contiguous structure, they can't be physically
1432 * removed. Instead, there are two options:
1434 * 1) If the HC is in the middle of processing the URB to be canceled, we
1435 * simply move the ring's dequeue pointer past those TRBs using the Set
1436 * Transfer Ring Dequeue Pointer command. This will be the common case,
1437 * when drivers timeout on the last submitted URB and attempt to cancel.
1439 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1440 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1441 * HC will need to invalidate the any TRBs it has cached after the stop
1442 * endpoint command, as noted in the xHCI 0.95 errata.
1444 * 3) The TD may have completed by the time the Stop Endpoint Command
1445 * completes, so software needs to handle that case too.
1447 * This function should protect against the TD enqueueing code ringing the
1448 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1449 * It also needs to account for multiple cancellations on happening at the same
1450 * time for the same endpoint.
1452 * Note that this function can be called in any context, or so says
1453 * usb_hcd_unlink_urb()
1455 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1457 unsigned long flags
;
1460 struct xhci_hcd
*xhci
;
1461 struct urb_priv
*urb_priv
;
1463 unsigned int ep_index
;
1464 struct xhci_ring
*ep_ring
;
1465 struct xhci_virt_ep
*ep
;
1467 xhci
= hcd_to_xhci(hcd
);
1468 spin_lock_irqsave(&xhci
->lock
, flags
);
1469 /* Make sure the URB hasn't completed or been unlinked already */
1470 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1471 if (ret
|| !urb
->hcpriv
)
1473 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1474 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1475 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1476 urb_priv
= urb
->hcpriv
;
1477 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1478 td
= urb_priv
->td
[i
];
1479 if (!list_empty(&td
->td_list
))
1480 list_del_init(&td
->td_list
);
1481 if (!list_empty(&td
->cancelled_td_list
))
1482 list_del_init(&td
->cancelled_td_list
);
1485 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1486 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1487 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1488 xhci_urb_free_priv(xhci
, urb_priv
);
1491 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1492 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1493 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1494 "non-responsive xHCI host.\n",
1495 urb
->ep
->desc
.bEndpointAddress
, urb
);
1496 /* Let the stop endpoint command watchdog timer (which set this
1497 * state) finish cleaning up the endpoint TD lists. We must
1498 * have caught it in the middle of dropping a lock and giving
1504 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1505 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1506 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1512 urb_priv
= urb
->hcpriv
;
1513 i
= urb_priv
->td_cnt
;
1514 if (i
< urb_priv
->length
)
1515 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1516 "starting at offset 0x%llx\n",
1517 urb
, urb
->dev
->devpath
,
1518 urb
->ep
->desc
.bEndpointAddress
,
1519 (unsigned long long) xhci_trb_virt_to_dma(
1520 urb_priv
->td
[i
]->start_seg
,
1521 urb_priv
->td
[i
]->first_trb
));
1523 for (; i
< urb_priv
->length
; i
++) {
1524 td
= urb_priv
->td
[i
];
1525 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1528 /* Queue a stop endpoint command, but only if this is
1529 * the first cancellation to be handled.
1531 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1532 ep
->ep_state
|= EP_HALT_PENDING
;
1533 ep
->stop_cmds_pending
++;
1534 ep
->stop_cmd_timer
.expires
= jiffies
+
1535 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1536 add_timer(&ep
->stop_cmd_timer
);
1537 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1538 xhci_ring_cmd_db(xhci
);
1541 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1545 /* Drop an endpoint from a new bandwidth configuration for this device.
1546 * Only one call to this function is allowed per endpoint before
1547 * check_bandwidth() or reset_bandwidth() must be called.
1548 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1549 * add the endpoint to the schedule with possibly new parameters denoted by a
1550 * different endpoint descriptor in usb_host_endpoint.
1551 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1554 * The USB core will not allow URBs to be queued to an endpoint that is being
1555 * disabled, so there's no need for mutual exclusion to protect
1556 * the xhci->devs[slot_id] structure.
1558 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1559 struct usb_host_endpoint
*ep
)
1561 struct xhci_hcd
*xhci
;
1562 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1563 struct xhci_input_control_ctx
*ctrl_ctx
;
1564 struct xhci_slot_ctx
*slot_ctx
;
1565 unsigned int last_ctx
;
1566 unsigned int ep_index
;
1567 struct xhci_ep_ctx
*ep_ctx
;
1569 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1572 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1575 xhci
= hcd_to_xhci(hcd
);
1576 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1579 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1580 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1581 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1582 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1583 __func__
, drop_flag
);
1587 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1588 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1589 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1590 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1591 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1592 /* If the HC already knows the endpoint is disabled,
1593 * or the HCD has noted it is disabled, ignore this request
1595 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1596 cpu_to_le32(EP_STATE_DISABLED
)) ||
1597 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1598 xhci_get_endpoint_flag(&ep
->desc
)) {
1599 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1604 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1605 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1607 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1608 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1610 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1611 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1612 /* Update the last valid endpoint context, if we deleted the last one */
1613 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1614 LAST_CTX(last_ctx
)) {
1615 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1616 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1618 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1620 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1622 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1623 (unsigned int) ep
->desc
.bEndpointAddress
,
1625 (unsigned int) new_drop_flags
,
1626 (unsigned int) new_add_flags
,
1627 (unsigned int) new_slot_info
);
1631 /* Add an endpoint to a new possible bandwidth configuration for this device.
1632 * Only one call to this function is allowed per endpoint before
1633 * check_bandwidth() or reset_bandwidth() must be called.
1634 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1635 * add the endpoint to the schedule with possibly new parameters denoted by a
1636 * different endpoint descriptor in usb_host_endpoint.
1637 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1640 * The USB core will not allow URBs to be queued to an endpoint until the
1641 * configuration or alt setting is installed in the device, so there's no need
1642 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1644 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1645 struct usb_host_endpoint
*ep
)
1647 struct xhci_hcd
*xhci
;
1648 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1649 unsigned int ep_index
;
1650 struct xhci_slot_ctx
*slot_ctx
;
1651 struct xhci_input_control_ctx
*ctrl_ctx
;
1653 unsigned int last_ctx
;
1654 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1655 struct xhci_virt_device
*virt_dev
;
1658 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1660 /* So we won't queue a reset ep command for a root hub */
1664 xhci
= hcd_to_xhci(hcd
);
1665 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1668 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1669 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1670 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1671 /* FIXME when we have to issue an evaluate endpoint command to
1672 * deal with ep0 max packet size changing once we get the
1675 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1676 __func__
, added_ctxs
);
1680 virt_dev
= xhci
->devs
[udev
->slot_id
];
1681 in_ctx
= virt_dev
->in_ctx
;
1682 out_ctx
= virt_dev
->out_ctx
;
1683 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1684 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1686 /* If this endpoint is already in use, and the upper layers are trying
1687 * to add it again without dropping it, reject the addition.
1689 if (virt_dev
->eps
[ep_index
].ring
&&
1690 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1691 xhci_get_endpoint_flag(&ep
->desc
))) {
1692 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1693 "without dropping it.\n",
1694 (unsigned int) ep
->desc
.bEndpointAddress
);
1698 /* If the HCD has already noted the endpoint is enabled,
1699 * ignore this request.
1701 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1702 xhci_get_endpoint_flag(&ep
->desc
)) {
1703 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1709 * Configuration and alternate setting changes must be done in
1710 * process context, not interrupt context (or so documenation
1711 * for usb_set_interface() and usb_set_configuration() claim).
1713 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1714 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1715 __func__
, ep
->desc
.bEndpointAddress
);
1719 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1720 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1722 /* If xhci_endpoint_disable() was called for this endpoint, but the
1723 * xHC hasn't been notified yet through the check_bandwidth() call,
1724 * this re-adds a new state for the endpoint from the new endpoint
1725 * descriptors. We must drop and re-add this endpoint, so we leave the
1728 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1730 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1731 /* Update the last valid endpoint context, if we just added one past */
1732 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1733 LAST_CTX(last_ctx
)) {
1734 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1735 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1737 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1739 /* Store the usb_device pointer for later use */
1742 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1743 (unsigned int) ep
->desc
.bEndpointAddress
,
1745 (unsigned int) new_drop_flags
,
1746 (unsigned int) new_add_flags
,
1747 (unsigned int) new_slot_info
);
1751 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1753 struct xhci_input_control_ctx
*ctrl_ctx
;
1754 struct xhci_ep_ctx
*ep_ctx
;
1755 struct xhci_slot_ctx
*slot_ctx
;
1758 /* When a device's add flag and drop flag are zero, any subsequent
1759 * configure endpoint command will leave that endpoint's state
1760 * untouched. Make sure we don't leave any old state in the input
1761 * endpoint contexts.
1763 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1764 ctrl_ctx
->drop_flags
= 0;
1765 ctrl_ctx
->add_flags
= 0;
1766 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1767 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1768 /* Endpoint 0 is always valid */
1769 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1770 for (i
= 1; i
< 31; ++i
) {
1771 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1772 ep_ctx
->ep_info
= 0;
1773 ep_ctx
->ep_info2
= 0;
1775 ep_ctx
->tx_info
= 0;
1779 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1780 struct usb_device
*udev
, u32
*cmd_status
)
1784 switch (*cmd_status
) {
1786 dev_warn(&udev
->dev
, "Not enough host controller resources "
1787 "for new device state.\n");
1789 /* FIXME: can we allocate more resources for the HC? */
1792 case COMP_2ND_BW_ERR
:
1793 dev_warn(&udev
->dev
, "Not enough bandwidth "
1794 "for new device state.\n");
1796 /* FIXME: can we go back to the old state? */
1799 /* the HCD set up something wrong */
1800 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1802 "and endpoint is not disabled.\n");
1806 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1807 "configure command.\n");
1811 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1815 xhci_err(xhci
, "ERROR: unexpected command completion "
1816 "code 0x%x.\n", *cmd_status
);
1823 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1824 struct usb_device
*udev
, u32
*cmd_status
)
1827 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1829 switch (*cmd_status
) {
1831 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1832 "context command.\n");
1836 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1837 "evaluate context command.\n");
1840 case COMP_CTX_STATE
:
1841 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1842 "evaluate context command.\n");
1843 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1847 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1848 "context command.\n");
1852 /* Max Exit Latency too large error */
1853 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1857 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
1861 xhci_err(xhci
, "ERROR: unexpected command completion "
1862 "code 0x%x.\n", *cmd_status
);
1869 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1870 struct xhci_container_ctx
*in_ctx
)
1872 struct xhci_input_control_ctx
*ctrl_ctx
;
1873 u32 valid_add_flags
;
1874 u32 valid_drop_flags
;
1876 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1877 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1878 * (bit 1). The default control endpoint is added during the Address
1879 * Device command and is never removed until the slot is disabled.
1881 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1882 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1884 /* Use hweight32 to count the number of ones in the add flags, or
1885 * number of endpoints added. Don't count endpoints that are changed
1886 * (both added and dropped).
1888 return hweight32(valid_add_flags
) -
1889 hweight32(valid_add_flags
& valid_drop_flags
);
1892 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1893 struct xhci_container_ctx
*in_ctx
)
1895 struct xhci_input_control_ctx
*ctrl_ctx
;
1896 u32 valid_add_flags
;
1897 u32 valid_drop_flags
;
1899 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1900 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1901 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1903 return hweight32(valid_drop_flags
) -
1904 hweight32(valid_add_flags
& valid_drop_flags
);
1908 * We need to reserve the new number of endpoints before the configure endpoint
1909 * command completes. We can't subtract the dropped endpoints from the number
1910 * of active endpoints until the command completes because we can oversubscribe
1911 * the host in this case:
1913 * - the first configure endpoint command drops more endpoints than it adds
1914 * - a second configure endpoint command that adds more endpoints is queued
1915 * - the first configure endpoint command fails, so the config is unchanged
1916 * - the second command may succeed, even though there isn't enough resources
1918 * Must be called with xhci->lock held.
1920 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1921 struct xhci_container_ctx
*in_ctx
)
1925 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1926 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1927 xhci_dbg(xhci
, "Not enough ep ctxs: "
1928 "%u active, need to add %u, limit is %u.\n",
1929 xhci
->num_active_eps
, added_eps
,
1930 xhci
->limit_active_eps
);
1933 xhci
->num_active_eps
+= added_eps
;
1934 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
1935 xhci
->num_active_eps
);
1940 * The configure endpoint was failed by the xHC for some other reason, so we
1941 * need to revert the resources that failed configuration would have used.
1943 * Must be called with xhci->lock held.
1945 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1946 struct xhci_container_ctx
*in_ctx
)
1950 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1951 xhci
->num_active_eps
-= num_failed_eps
;
1952 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
1954 xhci
->num_active_eps
);
1958 * Now that the command has completed, clean up the active endpoint count by
1959 * subtracting out the endpoints that were dropped (but not changed).
1961 * Must be called with xhci->lock held.
1963 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1964 struct xhci_container_ctx
*in_ctx
)
1966 u32 num_dropped_eps
;
1968 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
1969 xhci
->num_active_eps
-= num_dropped_eps
;
1970 if (num_dropped_eps
)
1971 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
1973 xhci
->num_active_eps
);
1976 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1978 switch (udev
->speed
) {
1980 case USB_SPEED_FULL
:
1982 case USB_SPEED_HIGH
:
1984 case USB_SPEED_SUPER
:
1986 case USB_SPEED_UNKNOWN
:
1987 case USB_SPEED_WIRELESS
:
1989 /* Should never happen */
1995 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
1997 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
1999 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2004 /* If we are changing a LS/FS device under a HS hub,
2005 * make sure (if we are activating a new TT) that the HS bus has enough
2006 * bandwidth for this new TT.
2008 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2009 struct xhci_virt_device
*virt_dev
,
2012 struct xhci_interval_bw_table
*bw_table
;
2013 struct xhci_tt_bw_info
*tt_info
;
2015 /* Find the bandwidth table for the root port this TT is attached to. */
2016 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2017 tt_info
= virt_dev
->tt_info
;
2018 /* If this TT already had active endpoints, the bandwidth for this TT
2019 * has already been added. Removing all periodic endpoints (and thus
2020 * making the TT enactive) will only decrease the bandwidth used.
2024 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2025 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2029 /* Not sure why we would have no new active endpoints...
2031 * Maybe because of an Evaluate Context change for a hub update or a
2032 * control endpoint 0 max packet size change?
2033 * FIXME: skip the bandwidth calculation in that case.
2038 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2039 struct xhci_virt_device
*virt_dev
)
2041 unsigned int bw_reserved
;
2043 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2044 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2047 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2048 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2055 * This algorithm is a very conservative estimate of the worst-case scheduling
2056 * scenario for any one interval. The hardware dynamically schedules the
2057 * packets, so we can't tell which microframe could be the limiting factor in
2058 * the bandwidth scheduling. This only takes into account periodic endpoints.
2060 * Obviously, we can't solve an NP complete problem to find the minimum worst
2061 * case scenario. Instead, we come up with an estimate that is no less than
2062 * the worst case bandwidth used for any one microframe, but may be an
2065 * We walk the requirements for each endpoint by interval, starting with the
2066 * smallest interval, and place packets in the schedule where there is only one
2067 * possible way to schedule packets for that interval. In order to simplify
2068 * this algorithm, we record the largest max packet size for each interval, and
2069 * assume all packets will be that size.
2071 * For interval 0, we obviously must schedule all packets for each interval.
2072 * The bandwidth for interval 0 is just the amount of data to be transmitted
2073 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2074 * the number of packets).
2076 * For interval 1, we have two possible microframes to schedule those packets
2077 * in. For this algorithm, if we can schedule the same number of packets for
2078 * each possible scheduling opportunity (each microframe), we will do so. The
2079 * remaining number of packets will be saved to be transmitted in the gaps in
2080 * the next interval's scheduling sequence.
2082 * As we move those remaining packets to be scheduled with interval 2 packets,
2083 * we have to double the number of remaining packets to transmit. This is
2084 * because the intervals are actually powers of 2, and we would be transmitting
2085 * the previous interval's packets twice in this interval. We also have to be
2086 * sure that when we look at the largest max packet size for this interval, we
2087 * also look at the largest max packet size for the remaining packets and take
2088 * the greater of the two.
2090 * The algorithm continues to evenly distribute packets in each scheduling
2091 * opportunity, and push the remaining packets out, until we get to the last
2092 * interval. Then those packets and their associated overhead are just added
2093 * to the bandwidth used.
2095 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2096 struct xhci_virt_device
*virt_dev
,
2099 unsigned int bw_reserved
;
2100 unsigned int max_bandwidth
;
2101 unsigned int bw_used
;
2102 unsigned int block_size
;
2103 struct xhci_interval_bw_table
*bw_table
;
2104 unsigned int packet_size
= 0;
2105 unsigned int overhead
= 0;
2106 unsigned int packets_transmitted
= 0;
2107 unsigned int packets_remaining
= 0;
2110 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2111 return xhci_check_ss_bw(xhci
, virt_dev
);
2113 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2114 max_bandwidth
= HS_BW_LIMIT
;
2115 /* Convert percent of bus BW reserved to blocks reserved */
2116 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2118 max_bandwidth
= FS_BW_LIMIT
;
2119 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2122 bw_table
= virt_dev
->bw_table
;
2123 /* We need to translate the max packet size and max ESIT payloads into
2124 * the units the hardware uses.
2126 block_size
= xhci_get_block_size(virt_dev
->udev
);
2128 /* If we are manipulating a LS/FS device under a HS hub, double check
2129 * that the HS bus has enough bandwidth if we are activing a new TT.
2131 if (virt_dev
->tt_info
) {
2132 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2133 virt_dev
->real_port
);
2134 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2135 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2136 "newly activated TT.\n");
2139 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
2140 virt_dev
->tt_info
->slot_id
,
2141 virt_dev
->tt_info
->ttport
);
2143 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2144 virt_dev
->real_port
);
2147 /* Add in how much bandwidth will be used for interval zero, or the
2148 * rounded max ESIT payload + number of packets * largest overhead.
2150 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2151 bw_table
->interval_bw
[0].num_packets
*
2152 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2154 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2155 unsigned int bw_added
;
2156 unsigned int largest_mps
;
2157 unsigned int interval_overhead
;
2160 * How many packets could we transmit in this interval?
2161 * If packets didn't fit in the previous interval, we will need
2162 * to transmit that many packets twice within this interval.
2164 packets_remaining
= 2 * packets_remaining
+
2165 bw_table
->interval_bw
[i
].num_packets
;
2167 /* Find the largest max packet size of this or the previous
2170 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2173 struct xhci_virt_ep
*virt_ep
;
2174 struct list_head
*ep_entry
;
2176 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2177 virt_ep
= list_entry(ep_entry
,
2178 struct xhci_virt_ep
, bw_endpoint_list
);
2179 /* Convert to blocks, rounding up */
2180 largest_mps
= DIV_ROUND_UP(
2181 virt_ep
->bw_info
.max_packet_size
,
2184 if (largest_mps
> packet_size
)
2185 packet_size
= largest_mps
;
2187 /* Use the larger overhead of this or the previous interval. */
2188 interval_overhead
= xhci_get_largest_overhead(
2189 &bw_table
->interval_bw
[i
]);
2190 if (interval_overhead
> overhead
)
2191 overhead
= interval_overhead
;
2193 /* How many packets can we evenly distribute across
2194 * (1 << (i + 1)) possible scheduling opportunities?
2196 packets_transmitted
= packets_remaining
>> (i
+ 1);
2198 /* Add in the bandwidth used for those scheduled packets */
2199 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2201 /* How many packets do we have remaining to transmit? */
2202 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2204 /* What largest max packet size should those packets have? */
2205 /* If we've transmitted all packets, don't carry over the
2206 * largest packet size.
2208 if (packets_remaining
== 0) {
2211 } else if (packets_transmitted
> 0) {
2212 /* Otherwise if we do have remaining packets, and we've
2213 * scheduled some packets in this interval, take the
2214 * largest max packet size from endpoints with this
2217 packet_size
= largest_mps
;
2218 overhead
= interval_overhead
;
2220 /* Otherwise carry over packet_size and overhead from the last
2221 * time we had a remainder.
2223 bw_used
+= bw_added
;
2224 if (bw_used
> max_bandwidth
) {
2225 xhci_warn(xhci
, "Not enough bandwidth. "
2226 "Proposed: %u, Max: %u\n",
2227 bw_used
, max_bandwidth
);
2232 * Ok, we know we have some packets left over after even-handedly
2233 * scheduling interval 15. We don't know which microframes they will
2234 * fit into, so we over-schedule and say they will be scheduled every
2237 if (packets_remaining
> 0)
2238 bw_used
+= overhead
+ packet_size
;
2240 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2241 unsigned int port_index
= virt_dev
->real_port
- 1;
2243 /* OK, we're manipulating a HS device attached to a
2244 * root port bandwidth domain. Include the number of active TTs
2245 * in the bandwidth used.
2247 bw_used
+= TT_HS_OVERHEAD
*
2248 xhci
->rh_bw
[port_index
].num_active_tts
;
2251 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2252 "Available: %u " "percent\n",
2253 bw_used
, max_bandwidth
, bw_reserved
,
2254 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2257 bw_used
+= bw_reserved
;
2258 if (bw_used
> max_bandwidth
) {
2259 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2260 bw_used
, max_bandwidth
);
2264 bw_table
->bw_used
= bw_used
;
2268 static bool xhci_is_async_ep(unsigned int ep_type
)
2270 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2271 ep_type
!= ISOC_IN_EP
&&
2272 ep_type
!= INT_IN_EP
);
2275 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2277 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2280 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2282 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2284 if (ep_bw
->ep_interval
== 0)
2285 return SS_OVERHEAD_BURST
+
2286 (ep_bw
->mult
* ep_bw
->num_packets
*
2287 (SS_OVERHEAD
+ mps
));
2288 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2289 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2290 1 << ep_bw
->ep_interval
);
2294 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2295 struct xhci_bw_info
*ep_bw
,
2296 struct xhci_interval_bw_table
*bw_table
,
2297 struct usb_device
*udev
,
2298 struct xhci_virt_ep
*virt_ep
,
2299 struct xhci_tt_bw_info
*tt_info
)
2301 struct xhci_interval_bw
*interval_bw
;
2302 int normalized_interval
;
2304 if (xhci_is_async_ep(ep_bw
->type
))
2307 if (udev
->speed
== USB_SPEED_SUPER
) {
2308 if (xhci_is_sync_in_ep(ep_bw
->type
))
2309 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2310 xhci_get_ss_bw_consumed(ep_bw
);
2312 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2313 xhci_get_ss_bw_consumed(ep_bw
);
2317 /* SuperSpeed endpoints never get added to intervals in the table, so
2318 * this check is only valid for HS/FS/LS devices.
2320 if (list_empty(&virt_ep
->bw_endpoint_list
))
2322 /* For LS/FS devices, we need to translate the interval expressed in
2323 * microframes to frames.
2325 if (udev
->speed
== USB_SPEED_HIGH
)
2326 normalized_interval
= ep_bw
->ep_interval
;
2328 normalized_interval
= ep_bw
->ep_interval
- 3;
2330 if (normalized_interval
== 0)
2331 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2332 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2333 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2334 switch (udev
->speed
) {
2336 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2338 case USB_SPEED_FULL
:
2339 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2341 case USB_SPEED_HIGH
:
2342 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2344 case USB_SPEED_SUPER
:
2345 case USB_SPEED_UNKNOWN
:
2346 case USB_SPEED_WIRELESS
:
2347 /* Should never happen because only LS/FS/HS endpoints will get
2348 * added to the endpoint list.
2353 tt_info
->active_eps
-= 1;
2354 list_del_init(&virt_ep
->bw_endpoint_list
);
2357 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2358 struct xhci_bw_info
*ep_bw
,
2359 struct xhci_interval_bw_table
*bw_table
,
2360 struct usb_device
*udev
,
2361 struct xhci_virt_ep
*virt_ep
,
2362 struct xhci_tt_bw_info
*tt_info
)
2364 struct xhci_interval_bw
*interval_bw
;
2365 struct xhci_virt_ep
*smaller_ep
;
2366 int normalized_interval
;
2368 if (xhci_is_async_ep(ep_bw
->type
))
2371 if (udev
->speed
== USB_SPEED_SUPER
) {
2372 if (xhci_is_sync_in_ep(ep_bw
->type
))
2373 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2374 xhci_get_ss_bw_consumed(ep_bw
);
2376 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2377 xhci_get_ss_bw_consumed(ep_bw
);
2381 /* For LS/FS devices, we need to translate the interval expressed in
2382 * microframes to frames.
2384 if (udev
->speed
== USB_SPEED_HIGH
)
2385 normalized_interval
= ep_bw
->ep_interval
;
2387 normalized_interval
= ep_bw
->ep_interval
- 3;
2389 if (normalized_interval
== 0)
2390 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2391 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2392 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2393 switch (udev
->speed
) {
2395 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2397 case USB_SPEED_FULL
:
2398 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2400 case USB_SPEED_HIGH
:
2401 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2403 case USB_SPEED_SUPER
:
2404 case USB_SPEED_UNKNOWN
:
2405 case USB_SPEED_WIRELESS
:
2406 /* Should never happen because only LS/FS/HS endpoints will get
2407 * added to the endpoint list.
2413 tt_info
->active_eps
+= 1;
2414 /* Insert the endpoint into the list, largest max packet size first. */
2415 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2417 if (ep_bw
->max_packet_size
>=
2418 smaller_ep
->bw_info
.max_packet_size
) {
2419 /* Add the new ep before the smaller endpoint */
2420 list_add_tail(&virt_ep
->bw_endpoint_list
,
2421 &smaller_ep
->bw_endpoint_list
);
2425 /* Add the new endpoint at the end of the list. */
2426 list_add_tail(&virt_ep
->bw_endpoint_list
,
2427 &interval_bw
->endpoints
);
2430 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2431 struct xhci_virt_device
*virt_dev
,
2434 struct xhci_root_port_bw_info
*rh_bw_info
;
2435 if (!virt_dev
->tt_info
)
2438 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2439 if (old_active_eps
== 0 &&
2440 virt_dev
->tt_info
->active_eps
!= 0) {
2441 rh_bw_info
->num_active_tts
+= 1;
2442 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2443 } else if (old_active_eps
!= 0 &&
2444 virt_dev
->tt_info
->active_eps
== 0) {
2445 rh_bw_info
->num_active_tts
-= 1;
2446 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2450 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2451 struct xhci_virt_device
*virt_dev
,
2452 struct xhci_container_ctx
*in_ctx
)
2454 struct xhci_bw_info ep_bw_info
[31];
2456 struct xhci_input_control_ctx
*ctrl_ctx
;
2457 int old_active_eps
= 0;
2459 if (virt_dev
->tt_info
)
2460 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2462 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2464 for (i
= 0; i
< 31; i
++) {
2465 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2468 /* Make a copy of the BW info in case we need to revert this */
2469 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2470 sizeof(ep_bw_info
[i
]));
2471 /* Drop the endpoint from the interval table if the endpoint is
2472 * being dropped or changed.
2474 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2475 xhci_drop_ep_from_interval_table(xhci
,
2476 &virt_dev
->eps
[i
].bw_info
,
2482 /* Overwrite the information stored in the endpoints' bw_info */
2483 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2484 for (i
= 0; i
< 31; i
++) {
2485 /* Add any changed or added endpoints to the interval table */
2486 if (EP_IS_ADDED(ctrl_ctx
, i
))
2487 xhci_add_ep_to_interval_table(xhci
,
2488 &virt_dev
->eps
[i
].bw_info
,
2495 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2496 /* Ok, this fits in the bandwidth we have.
2497 * Update the number of active TTs.
2499 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2503 /* We don't have enough bandwidth for this, revert the stored info. */
2504 for (i
= 0; i
< 31; i
++) {
2505 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2508 /* Drop the new copies of any added or changed endpoints from
2509 * the interval table.
2511 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2512 xhci_drop_ep_from_interval_table(xhci
,
2513 &virt_dev
->eps
[i
].bw_info
,
2519 /* Revert the endpoint back to its old information */
2520 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2521 sizeof(ep_bw_info
[i
]));
2522 /* Add any changed or dropped endpoints back into the table */
2523 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2524 xhci_add_ep_to_interval_table(xhci
,
2525 &virt_dev
->eps
[i
].bw_info
,
2535 /* Issue a configure endpoint command or evaluate context command
2536 * and wait for it to finish.
2538 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2539 struct usb_device
*udev
,
2540 struct xhci_command
*command
,
2541 bool ctx_change
, bool must_succeed
)
2545 unsigned long flags
;
2546 struct xhci_container_ctx
*in_ctx
;
2547 struct completion
*cmd_completion
;
2549 struct xhci_virt_device
*virt_dev
;
2550 union xhci_trb
*cmd_trb
;
2552 spin_lock_irqsave(&xhci
->lock
, flags
);
2553 virt_dev
= xhci
->devs
[udev
->slot_id
];
2556 in_ctx
= command
->in_ctx
;
2558 in_ctx
= virt_dev
->in_ctx
;
2560 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2561 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2562 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2563 xhci_warn(xhci
, "Not enough host resources, "
2564 "active endpoint contexts = %u\n",
2565 xhci
->num_active_eps
);
2568 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2569 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2570 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2571 xhci_free_host_resources(xhci
, in_ctx
);
2572 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2573 xhci_warn(xhci
, "Not enough bandwidth\n");
2578 cmd_completion
= command
->completion
;
2579 cmd_status
= &command
->status
;
2580 command
->command_trb
= xhci
->cmd_ring
->enqueue
;
2582 /* Enqueue pointer can be left pointing to the link TRB,
2583 * we must handle that
2585 if (TRB_TYPE_LINK_LE32(command
->command_trb
->link
.control
))
2586 command
->command_trb
=
2587 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
2589 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2591 cmd_completion
= &virt_dev
->cmd_completion
;
2592 cmd_status
= &virt_dev
->cmd_status
;
2594 init_completion(cmd_completion
);
2596 cmd_trb
= xhci
->cmd_ring
->dequeue
;
2598 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2599 udev
->slot_id
, must_succeed
);
2601 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2602 udev
->slot_id
, must_succeed
);
2605 list_del(&command
->cmd_list
);
2606 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2607 xhci_free_host_resources(xhci
, in_ctx
);
2608 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2609 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2612 xhci_ring_cmd_db(xhci
);
2613 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2615 /* Wait for the configure endpoint command to complete */
2616 timeleft
= wait_for_completion_interruptible_timeout(
2618 XHCI_CMD_DEFAULT_TIMEOUT
);
2619 if (timeleft
<= 0) {
2620 xhci_warn(xhci
, "%s while waiting for %s command\n",
2621 timeleft
== 0 ? "Timeout" : "Signal",
2623 "configure endpoint" :
2624 "evaluate context");
2625 /* cancel the configure endpoint command */
2626 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2633 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2635 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2637 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2638 spin_lock_irqsave(&xhci
->lock
, flags
);
2639 /* If the command failed, remove the reserved resources.
2640 * Otherwise, clean up the estimate to include dropped eps.
2643 xhci_free_host_resources(xhci
, in_ctx
);
2645 xhci_finish_resource_reservation(xhci
, in_ctx
);
2646 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2651 /* Called after one or more calls to xhci_add_endpoint() or
2652 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2653 * to call xhci_reset_bandwidth().
2655 * Since we are in the middle of changing either configuration or
2656 * installing a new alt setting, the USB core won't allow URBs to be
2657 * enqueued for any endpoint on the old config or interface. Nothing
2658 * else should be touching the xhci->devs[slot_id] structure, so we
2659 * don't need to take the xhci->lock for manipulating that.
2661 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2665 struct xhci_hcd
*xhci
;
2666 struct xhci_virt_device
*virt_dev
;
2667 struct xhci_input_control_ctx
*ctrl_ctx
;
2668 struct xhci_slot_ctx
*slot_ctx
;
2670 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2673 xhci
= hcd_to_xhci(hcd
);
2674 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2677 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2678 virt_dev
= xhci
->devs
[udev
->slot_id
];
2680 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2681 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2682 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2683 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2684 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2686 /* Don't issue the command if there's no endpoints to update. */
2687 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2688 ctrl_ctx
->drop_flags
== 0)
2691 xhci_dbg(xhci
, "New Input Control Context:\n");
2692 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2693 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2694 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2696 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2699 /* Callee should call reset_bandwidth() */
2703 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2704 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2705 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2707 /* Free any rings that were dropped, but not changed. */
2708 for (i
= 1; i
< 31; ++i
) {
2709 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2710 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2711 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2713 xhci_zero_in_ctx(xhci
, virt_dev
);
2715 * Install any rings for completely new endpoints or changed endpoints,
2716 * and free or cache any old rings from changed endpoints.
2718 for (i
= 1; i
< 31; ++i
) {
2719 if (!virt_dev
->eps
[i
].new_ring
)
2721 /* Only cache or free the old ring if it exists.
2722 * It may not if this is the first add of an endpoint.
2724 if (virt_dev
->eps
[i
].ring
) {
2725 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2727 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2728 virt_dev
->eps
[i
].new_ring
= NULL
;
2734 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2736 struct xhci_hcd
*xhci
;
2737 struct xhci_virt_device
*virt_dev
;
2740 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2743 xhci
= hcd_to_xhci(hcd
);
2745 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2746 virt_dev
= xhci
->devs
[udev
->slot_id
];
2747 /* Free any rings allocated for added endpoints */
2748 for (i
= 0; i
< 31; ++i
) {
2749 if (virt_dev
->eps
[i
].new_ring
) {
2750 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2751 virt_dev
->eps
[i
].new_ring
= NULL
;
2754 xhci_zero_in_ctx(xhci
, virt_dev
);
2757 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2758 struct xhci_container_ctx
*in_ctx
,
2759 struct xhci_container_ctx
*out_ctx
,
2760 u32 add_flags
, u32 drop_flags
)
2762 struct xhci_input_control_ctx
*ctrl_ctx
;
2763 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2764 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2765 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2766 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2767 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2769 xhci_dbg(xhci
, "Input Context:\n");
2770 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2773 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2774 unsigned int slot_id
, unsigned int ep_index
,
2775 struct xhci_dequeue_state
*deq_state
)
2777 struct xhci_container_ctx
*in_ctx
;
2778 struct xhci_ep_ctx
*ep_ctx
;
2782 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2783 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2784 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2785 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2786 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2787 deq_state
->new_deq_ptr
);
2789 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2790 "reset ep command\n");
2791 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2792 deq_state
->new_deq_seg
,
2793 deq_state
->new_deq_ptr
);
2796 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2798 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2799 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2800 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2803 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2804 struct usb_device
*udev
, unsigned int ep_index
)
2806 struct xhci_dequeue_state deq_state
;
2807 struct xhci_virt_ep
*ep
;
2809 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2810 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2811 /* We need to move the HW's dequeue pointer past this TD,
2812 * or it will attempt to resend it on the next doorbell ring.
2814 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2815 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2818 /* HW with the reset endpoint quirk will use the saved dequeue state to
2819 * issue a configure endpoint command later.
2821 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2822 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2823 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2824 ep_index
, ep
->stopped_stream
, &deq_state
);
2826 /* Better hope no one uses the input context between now and the
2827 * reset endpoint completion!
2828 * XXX: No idea how this hardware will react when stream rings
2831 xhci_dbg(xhci
, "Setting up input context for "
2832 "configure endpoint command\n");
2833 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2834 ep_index
, &deq_state
);
2838 /* Deal with stalled endpoints. The core should have sent the control message
2839 * to clear the halt condition. However, we need to make the xHCI hardware
2840 * reset its sequence number, since a device will expect a sequence number of
2841 * zero after the halt condition is cleared.
2842 * Context: in_interrupt
2844 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2845 struct usb_host_endpoint
*ep
)
2847 struct xhci_hcd
*xhci
;
2848 struct usb_device
*udev
;
2849 unsigned int ep_index
;
2850 unsigned long flags
;
2852 struct xhci_virt_ep
*virt_ep
;
2854 xhci
= hcd_to_xhci(hcd
);
2855 udev
= (struct usb_device
*) ep
->hcpriv
;
2856 /* Called with a root hub endpoint (or an endpoint that wasn't added
2857 * with xhci_add_endpoint()
2861 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2862 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2863 if (!virt_ep
->stopped_td
) {
2864 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
2865 ep
->desc
.bEndpointAddress
);
2868 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2869 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
2873 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
2874 spin_lock_irqsave(&xhci
->lock
, flags
);
2875 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2877 * Can't change the ring dequeue pointer until it's transitioned to the
2878 * stopped state, which is only upon a successful reset endpoint
2879 * command. Better hope that last command worked!
2882 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2883 kfree(virt_ep
->stopped_td
);
2884 xhci_ring_cmd_db(xhci
);
2886 virt_ep
->stopped_td
= NULL
;
2887 virt_ep
->stopped_trb
= NULL
;
2888 virt_ep
->stopped_stream
= 0;
2889 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2892 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2895 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2896 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2897 unsigned int slot_id
)
2900 unsigned int ep_index
;
2901 unsigned int ep_state
;
2905 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2908 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2909 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2910 " descriptor for ep 0x%x does not support streams\n",
2911 ep
->desc
.bEndpointAddress
);
2915 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2916 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2917 if (ep_state
& EP_HAS_STREAMS
||
2918 ep_state
& EP_GETTING_STREAMS
) {
2919 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2920 "already has streams set up.\n",
2921 ep
->desc
.bEndpointAddress
);
2922 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2923 "dynamic stream context array reallocation.\n");
2926 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2927 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2928 "endpoint 0x%x; URBs are pending.\n",
2929 ep
->desc
.bEndpointAddress
);
2935 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2936 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2938 unsigned int max_streams
;
2940 /* The stream context array size must be a power of two */
2941 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2943 * Find out how many primary stream array entries the host controller
2944 * supports. Later we may use secondary stream arrays (similar to 2nd
2945 * level page entries), but that's an optional feature for xHCI host
2946 * controllers. xHCs must support at least 4 stream IDs.
2948 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2949 if (*num_stream_ctxs
> max_streams
) {
2950 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2952 *num_stream_ctxs
= max_streams
;
2953 *num_streams
= max_streams
;
2957 /* Returns an error code if one of the endpoint already has streams.
2958 * This does not change any data structures, it only checks and gathers
2961 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2962 struct usb_device
*udev
,
2963 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2964 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2966 unsigned int max_streams
;
2967 unsigned int endpoint_flag
;
2971 for (i
= 0; i
< num_eps
; i
++) {
2972 ret
= xhci_check_streams_endpoint(xhci
, udev
,
2973 eps
[i
], udev
->slot_id
);
2977 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
2978 if (max_streams
< (*num_streams
- 1)) {
2979 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
2980 eps
[i
]->desc
.bEndpointAddress
,
2982 *num_streams
= max_streams
+1;
2985 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
2986 if (*changed_ep_bitmask
& endpoint_flag
)
2988 *changed_ep_bitmask
|= endpoint_flag
;
2993 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
2994 struct usb_device
*udev
,
2995 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
2997 u32 changed_ep_bitmask
= 0;
2998 unsigned int slot_id
;
2999 unsigned int ep_index
;
3000 unsigned int ep_state
;
3003 slot_id
= udev
->slot_id
;
3004 if (!xhci
->devs
[slot_id
])
3007 for (i
= 0; i
< num_eps
; i
++) {
3008 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3009 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3010 /* Are streams already being freed for the endpoint? */
3011 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3012 xhci_warn(xhci
, "WARN Can't disable streams for "
3014 "streams are being disabled already.",
3015 eps
[i
]->desc
.bEndpointAddress
);
3018 /* Are there actually any streams to free? */
3019 if (!(ep_state
& EP_HAS_STREAMS
) &&
3020 !(ep_state
& EP_GETTING_STREAMS
)) {
3021 xhci_warn(xhci
, "WARN Can't disable streams for "
3023 "streams are already disabled!",
3024 eps
[i
]->desc
.bEndpointAddress
);
3025 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3026 "with non-streams endpoint\n");
3029 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3031 return changed_ep_bitmask
;
3035 * The USB device drivers use this function (though the HCD interface in USB
3036 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3037 * coordinate mass storage command queueing across multiple endpoints (basically
3038 * a stream ID == a task ID).
3040 * Setting up streams involves allocating the same size stream context array
3041 * for each endpoint and issuing a configure endpoint command for all endpoints.
3043 * Don't allow the call to succeed if one endpoint only supports one stream
3044 * (which means it doesn't support streams at all).
3046 * Drivers may get less stream IDs than they asked for, if the host controller
3047 * hardware or endpoints claim they can't support the number of requested
3050 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3051 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3052 unsigned int num_streams
, gfp_t mem_flags
)
3055 struct xhci_hcd
*xhci
;
3056 struct xhci_virt_device
*vdev
;
3057 struct xhci_command
*config_cmd
;
3058 unsigned int ep_index
;
3059 unsigned int num_stream_ctxs
;
3060 unsigned long flags
;
3061 u32 changed_ep_bitmask
= 0;
3066 /* Add one to the number of streams requested to account for
3067 * stream 0 that is reserved for xHCI usage.
3070 xhci
= hcd_to_xhci(hcd
);
3071 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3074 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3076 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3080 /* Check to make sure all endpoints are not already configured for
3081 * streams. While we're at it, find the maximum number of streams that
3082 * all the endpoints will support and check for duplicate endpoints.
3084 spin_lock_irqsave(&xhci
->lock
, flags
);
3085 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3086 num_eps
, &num_streams
, &changed_ep_bitmask
);
3088 xhci_free_command(xhci
, config_cmd
);
3089 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3092 if (num_streams
<= 1) {
3093 xhci_warn(xhci
, "WARN: endpoints can't handle "
3094 "more than one stream.\n");
3095 xhci_free_command(xhci
, config_cmd
);
3096 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3099 vdev
= xhci
->devs
[udev
->slot_id
];
3100 /* Mark each endpoint as being in transition, so
3101 * xhci_urb_enqueue() will reject all URBs.
3103 for (i
= 0; i
< num_eps
; i
++) {
3104 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3105 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3107 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3109 /* Setup internal data structures and allocate HW data structures for
3110 * streams (but don't install the HW structures in the input context
3111 * until we're sure all memory allocation succeeded).
3113 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3114 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3115 num_stream_ctxs
, num_streams
);
3117 for (i
= 0; i
< num_eps
; i
++) {
3118 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3119 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3121 num_streams
, mem_flags
);
3122 if (!vdev
->eps
[ep_index
].stream_info
)
3124 /* Set maxPstreams in endpoint context and update deq ptr to
3125 * point to stream context array. FIXME
3129 /* Set up the input context for a configure endpoint command. */
3130 for (i
= 0; i
< num_eps
; i
++) {
3131 struct xhci_ep_ctx
*ep_ctx
;
3133 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3134 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3136 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3137 vdev
->out_ctx
, ep_index
);
3138 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3139 vdev
->eps
[ep_index
].stream_info
);
3141 /* Tell the HW to drop its old copy of the endpoint context info
3142 * and add the updated copy from the input context.
3144 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3145 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3147 /* Issue and wait for the configure endpoint command */
3148 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3151 /* xHC rejected the configure endpoint command for some reason, so we
3152 * leave the old ring intact and free our internal streams data
3158 spin_lock_irqsave(&xhci
->lock
, flags
);
3159 for (i
= 0; i
< num_eps
; i
++) {
3160 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3161 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3162 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3163 udev
->slot_id
, ep_index
);
3164 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3166 xhci_free_command(xhci
, config_cmd
);
3167 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3169 /* Subtract 1 for stream 0, which drivers can't use */
3170 return num_streams
- 1;
3173 /* If it didn't work, free the streams! */
3174 for (i
= 0; i
< num_eps
; i
++) {
3175 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3176 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3177 vdev
->eps
[ep_index
].stream_info
= NULL
;
3178 /* FIXME Unset maxPstreams in endpoint context and
3179 * update deq ptr to point to normal string ring.
3181 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3182 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3183 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3185 xhci_free_command(xhci
, config_cmd
);
3189 /* Transition the endpoint from using streams to being a "normal" endpoint
3192 * Modify the endpoint context state, submit a configure endpoint command,
3193 * and free all endpoint rings for streams if that completes successfully.
3195 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3196 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3200 struct xhci_hcd
*xhci
;
3201 struct xhci_virt_device
*vdev
;
3202 struct xhci_command
*command
;
3203 unsigned int ep_index
;
3204 unsigned long flags
;
3205 u32 changed_ep_bitmask
;
3207 xhci
= hcd_to_xhci(hcd
);
3208 vdev
= xhci
->devs
[udev
->slot_id
];
3210 /* Set up a configure endpoint command to remove the streams rings */
3211 spin_lock_irqsave(&xhci
->lock
, flags
);
3212 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3213 udev
, eps
, num_eps
);
3214 if (changed_ep_bitmask
== 0) {
3215 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3219 /* Use the xhci_command structure from the first endpoint. We may have
3220 * allocated too many, but the driver may call xhci_free_streams() for
3221 * each endpoint it grouped into one call to xhci_alloc_streams().
3223 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3224 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3225 for (i
= 0; i
< num_eps
; i
++) {
3226 struct xhci_ep_ctx
*ep_ctx
;
3228 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3229 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3230 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3231 EP_GETTING_NO_STREAMS
;
3233 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3234 vdev
->out_ctx
, ep_index
);
3235 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3236 &vdev
->eps
[ep_index
]);
3238 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3239 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3240 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3242 /* Issue and wait for the configure endpoint command,
3243 * which must succeed.
3245 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3248 /* xHC rejected the configure endpoint command for some reason, so we
3249 * leave the streams rings intact.
3254 spin_lock_irqsave(&xhci
->lock
, flags
);
3255 for (i
= 0; i
< num_eps
; i
++) {
3256 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3257 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3258 vdev
->eps
[ep_index
].stream_info
= NULL
;
3259 /* FIXME Unset maxPstreams in endpoint context and
3260 * update deq ptr to point to normal string ring.
3262 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3263 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3265 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3271 * Deletes endpoint resources for endpoints that were active before a Reset
3272 * Device command, or a Disable Slot command. The Reset Device command leaves
3273 * the control endpoint intact, whereas the Disable Slot command deletes it.
3275 * Must be called with xhci->lock held.
3277 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3278 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3281 unsigned int num_dropped_eps
= 0;
3282 unsigned int drop_flags
= 0;
3284 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3285 if (virt_dev
->eps
[i
].ring
) {
3286 drop_flags
|= 1 << i
;
3290 xhci
->num_active_eps
-= num_dropped_eps
;
3291 if (num_dropped_eps
)
3292 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3294 num_dropped_eps
, drop_flags
,
3295 xhci
->num_active_eps
);
3299 * This submits a Reset Device Command, which will set the device state to 0,
3300 * set the device address to 0, and disable all the endpoints except the default
3301 * control endpoint. The USB core should come back and call
3302 * xhci_address_device(), and then re-set up the configuration. If this is
3303 * called because of a usb_reset_and_verify_device(), then the old alternate
3304 * settings will be re-installed through the normal bandwidth allocation
3307 * Wait for the Reset Device command to finish. Remove all structures
3308 * associated with the endpoints that were disabled. Clear the input device
3309 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3311 * If the virt_dev to be reset does not exist or does not match the udev,
3312 * it means the device is lost, possibly due to the xHC restore error and
3313 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3314 * re-allocate the device.
3316 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3319 unsigned long flags
;
3320 struct xhci_hcd
*xhci
;
3321 unsigned int slot_id
;
3322 struct xhci_virt_device
*virt_dev
;
3323 struct xhci_command
*reset_device_cmd
;
3325 int last_freed_endpoint
;
3326 struct xhci_slot_ctx
*slot_ctx
;
3327 int old_active_eps
= 0;
3329 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3332 xhci
= hcd_to_xhci(hcd
);
3333 slot_id
= udev
->slot_id
;
3334 virt_dev
= xhci
->devs
[slot_id
];
3336 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3337 "not exist. Re-allocate the device\n", slot_id
);
3338 ret
= xhci_alloc_dev(hcd
, udev
);
3345 if (virt_dev
->udev
!= udev
) {
3346 /* If the virt_dev and the udev does not match, this virt_dev
3347 * may belong to another udev.
3348 * Re-allocate the device.
3350 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3351 "not match the udev. Re-allocate the device\n",
3353 ret
= xhci_alloc_dev(hcd
, udev
);
3360 /* If device is not setup, there is no point in resetting it */
3361 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3362 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3363 SLOT_STATE_DISABLED
)
3366 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3367 /* Allocate the command structure that holds the struct completion.
3368 * Assume we're in process context, since the normal device reset
3369 * process has to wait for the device anyway. Storage devices are
3370 * reset as part of error handling, so use GFP_NOIO instead of
3373 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3374 if (!reset_device_cmd
) {
3375 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3379 /* Attempt to submit the Reset Device command to the command ring */
3380 spin_lock_irqsave(&xhci
->lock
, flags
);
3381 reset_device_cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
3383 /* Enqueue pointer can be left pointing to the link TRB,
3384 * we must handle that
3386 if (TRB_TYPE_LINK_LE32(reset_device_cmd
->command_trb
->link
.control
))
3387 reset_device_cmd
->command_trb
=
3388 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
3390 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3391 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3393 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3394 list_del(&reset_device_cmd
->cmd_list
);
3395 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3396 goto command_cleanup
;
3398 xhci_ring_cmd_db(xhci
);
3399 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3401 /* Wait for the Reset Device command to finish */
3402 timeleft
= wait_for_completion_interruptible_timeout(
3403 reset_device_cmd
->completion
,
3404 USB_CTRL_SET_TIMEOUT
);
3405 if (timeleft
<= 0) {
3406 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3407 timeleft
== 0 ? "Timeout" : "Signal");
3408 spin_lock_irqsave(&xhci
->lock
, flags
);
3409 /* The timeout might have raced with the event ring handler, so
3410 * only delete from the list if the item isn't poisoned.
3412 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3413 list_del(&reset_device_cmd
->cmd_list
);
3414 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3416 goto command_cleanup
;
3419 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3420 * unless we tried to reset a slot ID that wasn't enabled,
3421 * or the device wasn't in the addressed or configured state.
3423 ret
= reset_device_cmd
->status
;
3425 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3426 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3427 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3429 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3430 xhci_info(xhci
, "Not freeing device rings.\n");
3431 /* Don't treat this as an error. May change my mind later. */
3433 goto command_cleanup
;
3435 xhci_dbg(xhci
, "Successful reset device command.\n");
3438 if (xhci_is_vendor_info_code(xhci
, ret
))
3440 xhci_warn(xhci
, "Unknown completion code %u for "
3441 "reset device command.\n", ret
);
3443 goto command_cleanup
;
3446 /* Free up host controller endpoint resources */
3447 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3448 spin_lock_irqsave(&xhci
->lock
, flags
);
3449 /* Don't delete the default control endpoint resources */
3450 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3451 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3454 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3455 last_freed_endpoint
= 1;
3456 for (i
= 1; i
< 31; ++i
) {
3457 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3459 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3460 xhci_free_stream_info(xhci
, ep
->stream_info
);
3461 ep
->stream_info
= NULL
;
3462 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3466 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3467 last_freed_endpoint
= i
;
3469 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3470 xhci_drop_ep_from_interval_table(xhci
,
3471 &virt_dev
->eps
[i
].bw_info
,
3476 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3478 /* If necessary, update the number of active TTs on this root port */
3479 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3481 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3482 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3486 xhci_free_command(xhci
, reset_device_cmd
);
3491 * At this point, the struct usb_device is about to go away, the device has
3492 * disconnected, and all traffic has been stopped and the endpoints have been
3493 * disabled. Free any HC data structures associated with that device.
3495 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3497 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3498 struct xhci_virt_device
*virt_dev
;
3499 unsigned long flags
;
3503 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3504 /* If the host is halted due to driver unload, we still need to free the
3507 if (ret
<= 0 && ret
!= -ENODEV
)
3510 virt_dev
= xhci
->devs
[udev
->slot_id
];
3512 /* Stop any wayward timer functions (which may grab the lock) */
3513 for (i
= 0; i
< 31; ++i
) {
3514 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3515 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3518 if (udev
->usb2_hw_lpm_enabled
) {
3519 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3520 udev
->usb2_hw_lpm_enabled
= 0;
3523 spin_lock_irqsave(&xhci
->lock
, flags
);
3524 /* Don't disable the slot if the host controller is dead. */
3525 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3526 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3527 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3528 xhci_free_virt_device(xhci
, udev
->slot_id
);
3529 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3533 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3534 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3535 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3538 xhci_ring_cmd_db(xhci
);
3539 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3541 * Event command completion handler will free any data structures
3542 * associated with the slot. XXX Can free sleep?
3547 * Checks if we have enough host controller resources for the default control
3550 * Must be called with xhci->lock held.
3552 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3554 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3555 xhci_dbg(xhci
, "Not enough ep ctxs: "
3556 "%u active, need to add 1, limit is %u.\n",
3557 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3560 xhci
->num_active_eps
+= 1;
3561 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3562 xhci
->num_active_eps
);
3568 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3569 * timed out, or allocating memory failed. Returns 1 on success.
3571 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3573 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3574 unsigned long flags
;
3577 union xhci_trb
*cmd_trb
;
3579 spin_lock_irqsave(&xhci
->lock
, flags
);
3580 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3581 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3583 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3584 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3587 xhci_ring_cmd_db(xhci
);
3588 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3590 /* XXX: how much time for xHC slot assignment? */
3591 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3592 XHCI_CMD_DEFAULT_TIMEOUT
);
3593 if (timeleft
<= 0) {
3594 xhci_warn(xhci
, "%s while waiting for a slot\n",
3595 timeleft
== 0 ? "Timeout" : "Signal");
3596 /* cancel the enable slot request */
3597 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3600 if (!xhci
->slot_id
) {
3601 xhci_err(xhci
, "Error while assigning device slot ID\n");
3605 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3606 spin_lock_irqsave(&xhci
->lock
, flags
);
3607 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3609 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3610 xhci_warn(xhci
, "Not enough host resources, "
3611 "active endpoint contexts = %u\n",
3612 xhci
->num_active_eps
);
3615 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3617 /* Use GFP_NOIO, since this function can be called from
3618 * xhci_discover_or_reset_device(), which may be called as part of
3619 * mass storage driver error handling.
3621 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3622 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3625 udev
->slot_id
= xhci
->slot_id
;
3626 /* Is this a LS or FS device under a HS hub? */
3627 /* Hub or peripherial? */
3631 /* Disable slot, if we can do it without mem alloc */
3632 spin_lock_irqsave(&xhci
->lock
, flags
);
3633 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3634 xhci_ring_cmd_db(xhci
);
3635 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3640 * Issue an Address Device command (which will issue a SetAddress request to
3642 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3643 * we should only issue and wait on one address command at the same time.
3645 * We add one to the device address issued by the hardware because the USB core
3646 * uses address 1 for the root hubs (even though they're not really devices).
3648 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3650 unsigned long flags
;
3652 struct xhci_virt_device
*virt_dev
;
3654 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3655 struct xhci_slot_ctx
*slot_ctx
;
3656 struct xhci_input_control_ctx
*ctrl_ctx
;
3658 union xhci_trb
*cmd_trb
;
3660 if (!udev
->slot_id
) {
3661 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3665 virt_dev
= xhci
->devs
[udev
->slot_id
];
3667 if (WARN_ON(!virt_dev
)) {
3669 * In plug/unplug torture test with an NEC controller,
3670 * a zero-dereference was observed once due to virt_dev = 0.
3671 * Print useful debug rather than crash if it is observed again!
3673 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3678 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3680 * If this is the first Set Address since device plug-in or
3681 * virt_device realloaction after a resume with an xHCI power loss,
3682 * then set up the slot context.
3684 if (!slot_ctx
->dev_info
)
3685 xhci_setup_addressable_virt_dev(xhci
, udev
);
3686 /* Otherwise, update the control endpoint ring enqueue pointer. */
3688 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3689 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3690 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3691 ctrl_ctx
->drop_flags
= 0;
3693 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3694 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3696 spin_lock_irqsave(&xhci
->lock
, flags
);
3697 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3698 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3701 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3702 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3705 xhci_ring_cmd_db(xhci
);
3706 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3708 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3709 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3710 XHCI_CMD_DEFAULT_TIMEOUT
);
3711 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3712 * the SetAddress() "recovery interval" required by USB and aborting the
3713 * command on a timeout.
3715 if (timeleft
<= 0) {
3716 xhci_warn(xhci
, "%s while waiting for address device command\n",
3717 timeleft
== 0 ? "Timeout" : "Signal");
3718 /* cancel the address device command */
3719 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3725 switch (virt_dev
->cmd_status
) {
3726 case COMP_CTX_STATE
:
3728 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3733 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3737 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3738 "device command.\n");
3742 xhci_dbg(xhci
, "Successful Address Device command\n");
3745 xhci_err(xhci
, "ERROR: unexpected command completion "
3746 "code 0x%x.\n", virt_dev
->cmd_status
);
3747 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3748 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3755 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3756 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3757 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3759 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3760 (unsigned long long)
3761 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3762 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3763 (unsigned long long)virt_dev
->out_ctx
->dma
);
3764 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3765 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3766 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3767 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3769 * USB core uses address 1 for the roothubs, so we add one to the
3770 * address given back to us by the HC.
3772 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3773 /* Use kernel assigned address for devices; store xHC assigned
3774 * address locally. */
3775 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3777 /* Zero the input context control for later use */
3778 ctrl_ctx
->add_flags
= 0;
3779 ctrl_ctx
->drop_flags
= 0;
3781 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3787 * Transfer the port index into real index in the HW port status
3788 * registers. Caculate offset between the port's PORTSC register
3789 * and port status base. Divide the number of per port register
3790 * to get the real index. The raw port number bases 1.
3792 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3794 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3795 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3796 __le32 __iomem
*addr
;
3799 if (hcd
->speed
!= HCD_USB3
)
3800 addr
= xhci
->usb2_ports
[port1
- 1];
3802 addr
= xhci
->usb3_ports
[port1
- 1];
3804 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3808 #ifdef CONFIG_PM_RUNTIME
3810 /* BESL to HIRD Encoding array for USB2 LPM */
3811 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3812 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3814 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3815 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3816 struct usb_device
*udev
)
3818 int u2del
, besl
, besl_host
;
3819 int besl_device
= 0;
3822 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3823 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3825 if (field
& USB_BESL_SUPPORT
) {
3826 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3827 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3830 /* Use baseline BESL value as default */
3831 if (field
& USB_BESL_BASELINE_VALID
)
3832 besl_device
= USB_GET_BESL_BASELINE(field
);
3833 else if (field
& USB_BESL_DEEP_VALID
)
3834 besl_device
= USB_GET_BESL_DEEP(field
);
3839 besl_host
= (u2del
- 51) / 75 + 1;
3842 besl
= besl_host
+ besl_device
;
3849 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
3850 struct usb_device
*udev
)
3852 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3853 struct dev_info
*dev_info
;
3854 __le32 __iomem
**port_array
;
3855 __le32 __iomem
*addr
, *pm_addr
;
3857 unsigned int port_num
;
3858 unsigned long flags
;
3862 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
3866 /* we only support lpm for non-hub device connected to root hub yet */
3867 if (!udev
->parent
|| udev
->parent
->parent
||
3868 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3871 spin_lock_irqsave(&xhci
->lock
, flags
);
3873 /* Look for devices in lpm_failed_devs list */
3874 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
3875 le16_to_cpu(udev
->descriptor
.idProduct
);
3876 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
3877 if (dev_info
->dev_id
== dev_id
) {
3883 port_array
= xhci
->usb2_ports
;
3884 port_num
= udev
->portnum
- 1;
3886 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
3887 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
3893 * Test USB 2.0 software LPM.
3894 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3895 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3896 * in the June 2011 errata release.
3898 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
3900 * Set L1 Device Slot and HIRD/BESL.
3901 * Check device's USB 2.0 extension descriptor to determine whether
3902 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3904 pm_addr
= port_array
[port_num
] + 1;
3905 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3906 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
3907 xhci_writel(xhci
, temp
, pm_addr
);
3909 /* Set port link state to U2(L1) */
3910 addr
= port_array
[port_num
];
3911 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
3914 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3916 spin_lock_irqsave(&xhci
->lock
, flags
);
3918 /* Check L1 Status */
3919 ret
= xhci_handshake(xhci
, pm_addr
,
3920 PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
3921 if (ret
!= -ETIMEDOUT
) {
3922 /* enter L1 successfully */
3923 temp
= xhci_readl(xhci
, addr
);
3924 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
3928 temp
= xhci_readl(xhci
, pm_addr
);
3929 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
3930 port_num
, temp
& PORT_L1S_MASK
);
3934 /* Resume the port */
3935 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
3937 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3939 spin_lock_irqsave(&xhci
->lock
, flags
);
3942 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
3944 /* Check PORTSC to make sure the device is in the right state */
3946 temp
= xhci_readl(xhci
, addr
);
3947 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
3948 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
3949 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
3950 xhci_dbg(xhci
, "port L1 resume fail\n");
3956 /* Insert dev to lpm_failed_devs list */
3957 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
3959 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
3964 dev_info
->dev_id
= dev_id
;
3965 INIT_LIST_HEAD(&dev_info
->list
);
3966 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
3968 xhci_ring_device(xhci
, udev
->slot_id
);
3972 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3976 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
3977 struct usb_device
*udev
, int enable
)
3979 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3980 __le32 __iomem
**port_array
;
3981 __le32 __iomem
*pm_addr
;
3983 unsigned int port_num
;
3984 unsigned long flags
;
3987 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
3991 if (!udev
->parent
|| udev
->parent
->parent
||
3992 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3995 if (udev
->usb2_hw_lpm_capable
!= 1)
3998 spin_lock_irqsave(&xhci
->lock
, flags
);
4000 port_array
= xhci
->usb2_ports
;
4001 port_num
= udev
->portnum
- 1;
4002 pm_addr
= port_array
[port_num
] + 1;
4003 temp
= xhci_readl(xhci
, pm_addr
);
4005 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4006 enable
? "enable" : "disable", port_num
);
4008 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4011 temp
&= ~PORT_HIRD_MASK
;
4012 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
4013 xhci_writel(xhci
, temp
, pm_addr
);
4014 temp
= xhci_readl(xhci
, pm_addr
);
4016 xhci_writel(xhci
, temp
, pm_addr
);
4018 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
4019 xhci_writel(xhci
, temp
, pm_addr
);
4022 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4026 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4028 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4031 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
4033 xhci_dbg(xhci
, "software LPM test succeed\n");
4034 if (xhci
->hw_lpm_support
== 1) {
4035 udev
->usb2_hw_lpm_capable
= 1;
4036 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
4038 udev
->usb2_hw_lpm_enabled
= 1;
4047 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4048 struct usb_device
*udev
, int enable
)
4053 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4058 #endif /* CONFIG_PM_RUNTIME */
4060 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4063 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4064 static unsigned long long xhci_service_interval_to_ns(
4065 struct usb_endpoint_descriptor
*desc
)
4067 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4070 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4071 enum usb3_link_state state
)
4073 unsigned long long sel
;
4074 unsigned long long pel
;
4075 unsigned int max_sel_pel
;
4080 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4081 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4082 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4083 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4087 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4088 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4089 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4093 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4095 return USB3_LPM_DISABLED
;
4098 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4099 return USB3_LPM_DEVICE_INITIATED
;
4101 if (sel
> max_sel_pel
)
4102 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4103 "due to long SEL %llu ms\n",
4106 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4107 "due to long PEL %llu\n ms",
4109 return USB3_LPM_DISABLED
;
4112 /* Returns the hub-encoded U1 timeout value.
4113 * The U1 timeout should be the maximum of the following values:
4114 * - For control endpoints, U1 system exit latency (SEL) * 3
4115 * - For bulk endpoints, U1 SEL * 5
4116 * - For interrupt endpoints:
4117 * - Notification EPs, U1 SEL * 3
4118 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4119 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4121 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4122 struct usb_endpoint_descriptor
*desc
)
4124 unsigned long long timeout_ns
;
4128 ep_type
= usb_endpoint_type(desc
);
4130 case USB_ENDPOINT_XFER_CONTROL
:
4131 timeout_ns
= udev
->u1_params
.sel
* 3;
4133 case USB_ENDPOINT_XFER_BULK
:
4134 timeout_ns
= udev
->u1_params
.sel
* 5;
4136 case USB_ENDPOINT_XFER_INT
:
4137 intr_type
= usb_endpoint_interrupt_type(desc
);
4138 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4139 timeout_ns
= udev
->u1_params
.sel
* 3;
4142 /* Otherwise the calculation is the same as isoc eps */
4143 case USB_ENDPOINT_XFER_ISOC
:
4144 timeout_ns
= xhci_service_interval_to_ns(desc
);
4145 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4146 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4147 timeout_ns
= udev
->u1_params
.sel
* 2;
4153 /* The U1 timeout is encoded in 1us intervals. */
4154 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4155 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4156 if (timeout_ns
== USB3_LPM_DISABLED
)
4159 /* If the necessary timeout value is bigger than what we can set in the
4160 * USB 3.0 hub, we have to disable hub-initiated U1.
4162 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4164 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4165 "due to long timeout %llu ms\n", timeout_ns
);
4166 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4169 /* Returns the hub-encoded U2 timeout value.
4170 * The U2 timeout should be the maximum of:
4171 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4172 * - largest bInterval of any active periodic endpoint (to avoid going
4173 * into lower power link states between intervals).
4174 * - the U2 Exit Latency of the device
4176 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4177 struct usb_endpoint_descriptor
*desc
)
4179 unsigned long long timeout_ns
;
4180 unsigned long long u2_del_ns
;
4182 timeout_ns
= 10 * 1000 * 1000;
4184 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4185 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4186 timeout_ns
= xhci_service_interval_to_ns(desc
);
4188 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4189 if (u2_del_ns
> timeout_ns
)
4190 timeout_ns
= u2_del_ns
;
4192 /* The U2 timeout is encoded in 256us intervals */
4193 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4194 /* If the necessary timeout value is bigger than what we can set in the
4195 * USB 3.0 hub, we have to disable hub-initiated U2.
4197 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4199 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4200 "due to long timeout %llu ms\n", timeout_ns
);
4201 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4204 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4205 struct usb_device
*udev
,
4206 struct usb_endpoint_descriptor
*desc
,
4207 enum usb3_link_state state
,
4210 if (state
== USB3_LPM_U1
) {
4211 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4212 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4214 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4215 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4218 return USB3_LPM_DISABLED
;
4221 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4222 struct usb_device
*udev
,
4223 struct usb_endpoint_descriptor
*desc
,
4224 enum usb3_link_state state
,
4229 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4230 desc
, state
, timeout
);
4232 /* If we found we can't enable hub-initiated LPM, or
4233 * the U1 or U2 exit latency was too high to allow
4234 * device-initiated LPM as well, just stop searching.
4236 if (alt_timeout
== USB3_LPM_DISABLED
||
4237 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4238 *timeout
= alt_timeout
;
4241 if (alt_timeout
> *timeout
)
4242 *timeout
= alt_timeout
;
4246 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4247 struct usb_device
*udev
,
4248 struct usb_host_interface
*alt
,
4249 enum usb3_link_state state
,
4254 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4255 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4256 &alt
->endpoint
[j
].desc
, state
, timeout
))
4263 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4264 enum usb3_link_state state
)
4266 struct usb_device
*parent
;
4267 unsigned int num_hubs
;
4269 if (state
== USB3_LPM_U2
)
4272 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4273 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4274 parent
= parent
->parent
)
4280 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4281 " below second-tier hub.\n");
4282 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4283 "to decrease power consumption.\n");
4287 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4288 struct usb_device
*udev
,
4289 enum usb3_link_state state
)
4291 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4292 return xhci_check_intel_tier_policy(udev
, state
);
4296 /* Returns the U1 or U2 timeout that should be enabled.
4297 * If the tier check or timeout setting functions return with a non-zero exit
4298 * code, that means the timeout value has been finalized and we shouldn't look
4299 * at any more endpoints.
4301 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4302 struct usb_device
*udev
, enum usb3_link_state state
)
4304 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4305 struct usb_host_config
*config
;
4308 u16 timeout
= USB3_LPM_DISABLED
;
4310 if (state
== USB3_LPM_U1
)
4312 else if (state
== USB3_LPM_U2
)
4315 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4320 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4323 /* Gather some information about the currently installed configuration
4324 * and alternate interface settings.
4326 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4330 config
= udev
->actconfig
;
4334 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4335 struct usb_driver
*driver
;
4336 struct usb_interface
*intf
= config
->interface
[i
];
4341 /* Check if any currently bound drivers want hub-initiated LPM
4344 if (intf
->dev
.driver
) {
4345 driver
= to_usb_driver(intf
->dev
.driver
);
4346 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4347 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4348 "at request of driver %s\n",
4349 state_name
, driver
->name
);
4350 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4354 /* Not sure how this could happen... */
4355 if (!intf
->cur_altsetting
)
4358 if (xhci_update_timeout_for_interface(xhci
, udev
,
4359 intf
->cur_altsetting
,
4367 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4368 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4370 static int xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
4371 struct usb_device
*udev
, u16 max_exit_latency
)
4373 struct xhci_virt_device
*virt_dev
;
4374 struct xhci_command
*command
;
4375 struct xhci_input_control_ctx
*ctrl_ctx
;
4376 struct xhci_slot_ctx
*slot_ctx
;
4377 unsigned long flags
;
4380 spin_lock_irqsave(&xhci
->lock
, flags
);
4381 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
4382 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4386 /* Attempt to issue an Evaluate Context command to change the MEL. */
4387 virt_dev
= xhci
->devs
[udev
->slot_id
];
4388 command
= xhci
->lpm_command
;
4389 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
4390 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4392 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
4393 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4394 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
4395 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
4396 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
4398 xhci_dbg(xhci
, "Set up evaluate context for LPM MEL change.\n");
4399 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
4400 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
4402 /* Issue and wait for the evaluate context command. */
4403 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
4405 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
4406 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
4409 spin_lock_irqsave(&xhci
->lock
, flags
);
4410 virt_dev
->current_mel
= max_exit_latency
;
4411 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4416 static int calculate_max_exit_latency(struct usb_device
*udev
,
4417 enum usb3_link_state state_changed
,
4418 u16 hub_encoded_timeout
)
4420 unsigned long long u1_mel_us
= 0;
4421 unsigned long long u2_mel_us
= 0;
4422 unsigned long long mel_us
= 0;
4428 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4429 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4430 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4431 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4433 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4434 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4435 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4436 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4438 /* If U1 was already enabled and we're not disabling it,
4439 * or we're going to enable U1, account for the U1 max exit latency.
4441 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4443 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4444 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4446 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4448 if (u1_mel_us
> u2_mel_us
)
4452 /* xHCI host controller max exit latency field is only 16 bits wide. */
4453 if (mel_us
> MAX_EXIT
) {
4454 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4455 "is too big.\n", mel_us
);
4461 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4462 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4463 struct usb_device
*udev
, enum usb3_link_state state
)
4465 struct xhci_hcd
*xhci
;
4466 u16 hub_encoded_timeout
;
4470 xhci
= hcd_to_xhci(hcd
);
4471 /* The LPM timeout values are pretty host-controller specific, so don't
4472 * enable hub-initiated timeouts unless the vendor has provided
4473 * information about their timeout algorithm.
4475 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4476 !xhci
->devs
[udev
->slot_id
])
4477 return USB3_LPM_DISABLED
;
4479 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4480 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4482 /* Max Exit Latency is too big, disable LPM. */
4483 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4487 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4490 return hub_encoded_timeout
;
4493 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4494 struct usb_device
*udev
, enum usb3_link_state state
)
4496 struct xhci_hcd
*xhci
;
4500 xhci
= hcd_to_xhci(hcd
);
4501 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4502 !xhci
->devs
[udev
->slot_id
])
4505 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4506 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4511 #else /* CONFIG_PM */
4513 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4514 struct usb_device
*udev
, enum usb3_link_state state
)
4516 return USB3_LPM_DISABLED
;
4519 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4520 struct usb_device
*udev
, enum usb3_link_state state
)
4524 #endif /* CONFIG_PM */
4526 /*-------------------------------------------------------------------------*/
4528 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4529 * internal data structures for the device.
4531 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4532 struct usb_tt
*tt
, gfp_t mem_flags
)
4534 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4535 struct xhci_virt_device
*vdev
;
4536 struct xhci_command
*config_cmd
;
4537 struct xhci_input_control_ctx
*ctrl_ctx
;
4538 struct xhci_slot_ctx
*slot_ctx
;
4539 unsigned long flags
;
4540 unsigned think_time
;
4543 /* Ignore root hubs */
4547 vdev
= xhci
->devs
[hdev
->slot_id
];
4549 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4552 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4554 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4558 spin_lock_irqsave(&xhci
->lock
, flags
);
4559 if (hdev
->speed
== USB_SPEED_HIGH
&&
4560 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4561 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4562 xhci_free_command(xhci
, config_cmd
);
4563 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4567 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4568 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4569 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4570 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4571 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4573 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4574 if (xhci
->hci_version
> 0x95) {
4575 xhci_dbg(xhci
, "xHCI version %x needs hub "
4576 "TT think time and number of ports\n",
4577 (unsigned int) xhci
->hci_version
);
4578 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4579 /* Set TT think time - convert from ns to FS bit times.
4580 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4581 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4583 * xHCI 1.0: this field shall be 0 if the device is not a
4586 think_time
= tt
->think_time
;
4587 if (think_time
!= 0)
4588 think_time
= (think_time
/ 666) - 1;
4589 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4590 slot_ctx
->tt_info
|=
4591 cpu_to_le32(TT_THINK_TIME(think_time
));
4593 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4594 "TT think time or number of ports\n",
4595 (unsigned int) xhci
->hci_version
);
4597 slot_ctx
->dev_state
= 0;
4598 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4600 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4601 (xhci
->hci_version
> 0x95) ?
4602 "configure endpoint" : "evaluate context");
4603 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4604 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4606 /* Issue and wait for the configure endpoint or
4607 * evaluate context command.
4609 if (xhci
->hci_version
> 0x95)
4610 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4613 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4616 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4617 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4619 xhci_free_command(xhci
, config_cmd
);
4623 int xhci_get_frame(struct usb_hcd
*hcd
)
4625 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4626 /* EHCI mods by the periodic size. Why? */
4627 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4630 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4632 struct xhci_hcd
*xhci
;
4633 struct device
*dev
= hcd
->self
.controller
;
4637 /* Accept arbitrarily long scatter-gather lists */
4638 hcd
->self
.sg_tablesize
= ~0;
4639 /* XHCI controllers don't stop the ep queue on short packets :| */
4640 hcd
->self
.no_stop_on_short
= 1;
4642 if (usb_hcd_is_primary_hcd(hcd
)) {
4643 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4646 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4647 xhci
->main_hcd
= hcd
;
4648 /* Mark the first roothub as being USB 2.0.
4649 * The xHCI driver will register the USB 3.0 roothub.
4651 hcd
->speed
= HCD_USB2
;
4652 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4654 * USB 2.0 roothub under xHCI has an integrated TT,
4655 * (rate matching hub) as opposed to having an OHCI/UHCI
4656 * companion controller.
4660 /* xHCI private pointer was set in xhci_pci_probe for the second
4661 * registered roothub.
4663 xhci
= hcd_to_xhci(hcd
);
4664 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4665 if (HCC_64BIT_ADDR(temp
)) {
4666 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4667 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4669 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4674 xhci
->cap_regs
= hcd
->regs
;
4675 xhci
->op_regs
= hcd
->regs
+
4676 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4677 xhci
->run_regs
= hcd
->regs
+
4678 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4679 /* Cache read-only capability registers */
4680 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4681 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4682 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4683 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4684 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4685 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4686 xhci_print_registers(xhci
);
4688 get_quirks(dev
, xhci
);
4690 /* Make sure the HC is halted. */
4691 retval
= xhci_halt(xhci
);
4695 xhci_dbg(xhci
, "Resetting HCD\n");
4696 /* Reset the internal HC memory state and registers. */
4697 retval
= xhci_reset(xhci
);
4700 xhci_dbg(xhci
, "Reset complete\n");
4702 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4703 if (HCC_64BIT_ADDR(temp
)) {
4704 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4705 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4707 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4710 xhci_dbg(xhci
, "Calling HCD init\n");
4711 /* Initialize HCD and host controller data structures. */
4712 retval
= xhci_init(hcd
);
4715 xhci_dbg(xhci
, "Called HCD init\n");
4722 MODULE_DESCRIPTION(DRIVER_DESC
);
4723 MODULE_AUTHOR(DRIVER_AUTHOR
);
4724 MODULE_LICENSE("GPL");
4726 static int __init
xhci_hcd_init(void)
4730 retval
= xhci_register_pci();
4732 printk(KERN_DEBUG
"Problem registering PCI driver.");
4735 retval
= xhci_register_plat();
4737 printk(KERN_DEBUG
"Problem registering platform driver.");
4741 * Check the compiler generated sizes of structures that must be laid
4742 * out in specific ways for hardware access.
4744 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4745 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4746 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4747 /* xhci_device_control has eight fields, and also
4748 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4750 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4751 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4752 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4753 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4754 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4755 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4756 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4759 xhci_unregister_pci();
4762 module_init(xhci_hcd_init
);
4764 static void __exit
xhci_hcd_cleanup(void)
4766 xhci_unregister_pci();
4767 xhci_unregister_plat();
4769 module_exit(xhci_hcd_cleanup
);