2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #ifdef CONFIG_MTK_XHCI
34 #include <asm/uaccess.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/platform_device.h>
37 #include <linux/xhci/xhci-mtk-scheduler.h>
38 #include <linux/xhci/xhci-mtk-power.h>
39 #include <linux/xhci/xhci-mtk.h>
41 #ifdef CONFIG_USBIF_COMPLIANCE
42 #include <linux/proc_fs.h>
43 #include <asm/uaccess.h>
44 #include <linux/seq_file.h>
45 #include <linux/kobject.h>
46 #include <linux/miscdevice.h>
48 static struct miscdevice mu3h_uevent_device
= {
49 .minor
= MISC_DYNAMIC_MINOR
,
50 .name
= "usbif_u3h_uevent",
56 #define DRIVER_AUTHOR "Sarah Sharp"
57 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
59 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
60 static int link_quirk
;
61 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
62 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
64 #ifdef CONFIG_USBIF_COMPLIANCE
65 int usbif_u3h_send_event(char* event
)
68 char *envp
[] = {udev_event
, NULL
};
71 snprintf(udev_event
, 128, "USBIF_EVENT=%s",event
);
72 printk("usbif_u3h_send_event - sending event - %s in %s\n", udev_event
, kobject_get_path(&mu3h_uevent_device
.this_device
->kobj
, GFP_KERNEL
));
73 ret
= kobject_uevent_env(&mu3h_uevent_device
.this_device
->kobj
, KOBJ_CHANGE
, envp
);
75 printk("usbif_u3h_send_event sending failed with ret = %d, \n", ret
);
81 /* TODO: copied from ehci-hcd.c - can this be refactored? */
83 * xhci_handshake - spin reading hc until handshake completes or fails
84 * @ptr: address of hc register to be read
85 * @mask: bits to look at in result of read
86 * @done: value of those bits when handshake succeeds
87 * @usec: timeout in microseconds
89 * Returns negative errno, or zero on success
91 * Success happens when the "mask" bits have the specified value (hardware
92 * handshake done). There are two failure modes: "usec" have passed (major
93 * hardware flakeout), or the register reads as all-ones (hardware removed).
95 int xhci_handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
96 u32 mask
, u32 done
, int usec
)
101 result
= xhci_readl(xhci
, ptr
);
102 if (result
== ~(u32
)0) /* card removed */
114 * Disable interrupts and begin the xHCI halting process.
116 void xhci_quiesce(struct xhci_hcd
*xhci
)
123 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
127 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
129 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
133 * Force HC into halt state.
135 * Disable any IRQs and clear the run/stop bit.
136 * HC will complete any current and actively pipelined transactions, and
137 * should halt within 16 ms of the run/stop bit being cleared.
138 * Read HC Halted bit in the status register to see when the HC is finished.
140 int xhci_halt(struct xhci_hcd
*xhci
)
143 xhci_dbg(xhci
, "// Halt the HC\n");
146 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
147 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
149 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
150 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
152 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
158 * Set the run bit and wait for the host to be running.
160 static int xhci_start(struct xhci_hcd
*xhci
)
165 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
167 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
169 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
172 * Wait for the HCHalted Status bit to be 0 to indicate the host is
175 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
176 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
177 if (ret
== -ETIMEDOUT
)
178 xhci_err(xhci
, "Host took too long to start, "
179 "waited %u microseconds.\n",
182 /* clear state flags. Including dying, halted or removing */
191 * This resets pipelines, timers, counters, state machines, etc.
192 * Transactions will be terminated immediately, and operational registers
193 * will be set to their defaults.
195 int xhci_reset(struct xhci_hcd
*xhci
)
201 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
202 if ((state
& STS_HALT
) == 0) {
203 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
207 xhci_dbg(xhci
, "// Reset the HC\n");
208 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
209 command
|= CMD_RESET
;
210 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
212 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->command
,
213 CMD_RESET
, 0, 10 * 1000 * 1000);
217 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
219 * xHCI cannot write to any doorbells or operational registers other
220 * than status until the "Controller Not Ready" flag is cleared.
222 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
223 STS_CNR
, 0, 10 * 1000 * 1000);
225 for (i
= 0; i
< 2; ++i
) {
226 xhci
->bus_state
[i
].port_c_suspend
= 0;
227 xhci
->bus_state
[i
].suspended_ports
= 0;
228 xhci
->bus_state
[i
].resuming_ports
= 0;
235 static int xhci_free_msi(struct xhci_hcd
*xhci
)
239 if (!xhci
->msix_entries
)
242 for (i
= 0; i
< xhci
->msix_count
; i
++)
243 if (xhci
->msix_entries
[i
].vector
)
244 free_irq(xhci
->msix_entries
[i
].vector
,
252 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
255 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
257 ret
= pci_enable_msi(pdev
);
259 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
263 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
264 0, "xhci_hcd", xhci_to_hcd(xhci
));
266 xhci_dbg(xhci
, "disable MSI interrupt\n");
267 pci_disable_msi(pdev
);
275 * free all IRQs request
277 static void xhci_free_irq(struct xhci_hcd
*xhci
)
279 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
282 /* return if using legacy interrupt */
283 if (xhci_to_hcd(xhci
)->irq
> 0)
286 ret
= xhci_free_msi(xhci
);
290 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
298 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
301 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
302 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
305 * calculate number of msi-x vectors supported.
306 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
307 * with max number of interrupters based on the xhci HCSPARAMS1.
308 * - num_online_cpus: maximum msi-x vectors per CPUs core.
309 * Add additional 1 vector to ensure always available interrupt.
311 xhci
->msix_count
= min(num_online_cpus() + 1,
312 HCS_MAX_INTRS(xhci
->hcs_params1
));
315 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
317 if (!xhci
->msix_entries
) {
318 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
322 for (i
= 0; i
< xhci
->msix_count
; i
++) {
323 xhci
->msix_entries
[i
].entry
= i
;
324 xhci
->msix_entries
[i
].vector
= 0;
327 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
329 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
333 for (i
= 0; i
< xhci
->msix_count
; i
++) {
334 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
335 (irq_handler_t
)xhci_msi_irq
,
336 0, "xhci_hcd", xhci_to_hcd(xhci
));
341 hcd
->msix_enabled
= 1;
345 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
347 pci_disable_msix(pdev
);
349 kfree(xhci
->msix_entries
);
350 xhci
->msix_entries
= NULL
;
354 /* Free any IRQs and disable MSI-X */
355 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
357 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
358 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
360 if (xhci
->quirks
& XHCI_PLAT
)
365 if (xhci
->msix_entries
) {
366 pci_disable_msix(pdev
);
367 kfree(xhci
->msix_entries
);
368 xhci
->msix_entries
= NULL
;
370 pci_disable_msi(pdev
);
373 hcd
->msix_enabled
= 0;
377 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
381 if (xhci
->msix_entries
) {
382 for (i
= 0; i
< xhci
->msix_count
; i
++)
383 synchronize_irq(xhci
->msix_entries
[i
].vector
);
387 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
389 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
390 struct pci_dev
*pdev
;
393 /* The xhci platform device has set up IRQs through usb_add_hcd. */
394 if (xhci
->quirks
& XHCI_PLAT
)
397 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
399 * Some Fresco Logic host controllers advertise MSI, but fail to
400 * generate interrupts. Don't even try to enable MSI.
402 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
405 /* unregister the legacy interrupt */
407 free_irq(hcd
->irq
, hcd
);
410 ret
= xhci_setup_msix(xhci
);
412 /* fall back to msi*/
413 ret
= xhci_setup_msi(xhci
);
416 /* hcd->irq is 0, we have MSI */
420 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
425 /* fall back to legacy interrupt*/
426 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
427 hcd
->irq_descr
, hcd
);
429 xhci_err(xhci
, "request interrupt %d failed\n",
433 hcd
->irq
= pdev
->irq
;
439 static inline int xhci_try_enable_msi(struct usb_hcd
*hcd
)
444 static inline void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
448 static inline void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
454 static void compliance_mode_recovery(unsigned long arg
)
456 struct xhci_hcd
*xhci
;
461 xhci
= (struct xhci_hcd
*)arg
;
463 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
464 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
465 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
467 * Compliance Mode Detected. Letting USB Core
468 * handle the Warm Reset
470 xhci_dbg(xhci
, "Compliance mode detected->port %d\n",
472 xhci_dbg(xhci
, "Attempting compliance mode recovery\n");
473 hcd
= xhci
->shared_hcd
;
475 if (hcd
->state
== HC_STATE_SUSPENDED
)
476 usb_hcd_resume_root_hub(hcd
);
478 usb_hcd_poll_rh_status(hcd
);
482 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
483 mod_timer(&xhci
->comp_mode_recovery_timer
,
484 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
488 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
489 * that causes ports behind that hardware to enter compliance mode sometimes.
490 * The quirk creates a timer that polls every 2 seconds the link state of
491 * each host controller's port and recovers it by issuing a Warm reset
492 * if Compliance mode is detected, otherwise the port will become "dead" (no
493 * device connections or disconnections will be detected anymore). Becasue no
494 * status event is generated when entering compliance mode (per xhci spec),
495 * this quirk is needed on systems that have the failing hardware installed.
497 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
499 xhci
->port_status_u0
= 0;
500 init_timer(&xhci
->comp_mode_recovery_timer
);
502 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
503 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
504 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
505 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
507 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
508 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
509 add_timer(&xhci
->comp_mode_recovery_timer
);
510 xhci_dbg(xhci
, "Compliance mode recovery timer initialized\n");
514 * This function identifies the systems that have installed the SN65LVPE502CP
515 * USB3.0 re-driver and that need the Compliance Mode Quirk.
517 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
519 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
521 const char *dmi_product_name
, *dmi_sys_vendor
;
523 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
524 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
525 if (!dmi_product_name
|| !dmi_sys_vendor
)
528 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
531 if (strstr(dmi_product_name
, "Z420") ||
532 strstr(dmi_product_name
, "Z620") ||
533 strstr(dmi_product_name
, "Z820") ||
534 strstr(dmi_product_name
, "Z1 Workstation"))
540 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
542 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
547 * Initialize memory for HCD and xHC (one-time init).
549 * Program the PAGESIZE register, initialize the device context array, create
550 * device contexts (?), set up a command ring segment (or two?), create event
551 * ring (one for now).
553 int xhci_init(struct usb_hcd
*hcd
)
555 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
558 xhci_dbg(xhci
, "xhci_init\n");
559 spin_lock_init(&xhci
->lock
);
560 if (xhci
->hci_version
== 0x95 && link_quirk
) {
561 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
562 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
564 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
567 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
568 xhci_dbg(xhci
, "Finished xhci_init\n");
570 /* Initializing Compliance Mode Recovery Data If Needed */
571 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
572 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
573 compliance_mode_recovery_timer_init(xhci
);
579 /*-------------------------------------------------------------------------*/
582 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
583 static void xhci_event_ring_work(unsigned long arg
)
588 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
591 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
593 spin_lock_irqsave(&xhci
->lock
, flags
);
594 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
595 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
596 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
597 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
598 xhci_dbg(xhci
, "HW died, polling stopped.\n");
599 spin_unlock_irqrestore(&xhci
->lock
, flags
);
603 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
604 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
605 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
606 xhci
->error_bitmask
= 0;
607 xhci_dbg(xhci
, "Event ring:\n");
608 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
609 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
610 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
611 temp_64
&= ~ERST_PTR_MASK
;
612 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
613 xhci_dbg(xhci
, "Command ring:\n");
614 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
615 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
616 xhci_dbg_cmd_ptrs(xhci
);
617 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
620 for (j
= 0; j
< 31; ++j
) {
621 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
624 spin_unlock_irqrestore(&xhci
->lock
, flags
);
627 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
629 xhci_dbg(xhci
, "Quit polling the event ring.\n");
633 static int xhci_run_finished(struct xhci_hcd
*xhci
)
635 if (xhci_start(xhci
)) {
640 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
641 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
643 if (xhci
->quirks
& XHCI_NEC_HOST
)
644 xhci_ring_cmd_db(xhci
);
646 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
652 * Start the HC after it was halted.
654 * This function is called by the USB core when the HC driver is added.
655 * Its opposite is xhci_stop().
657 * xhci_init() must be called once before this function can be called.
658 * Reset the HC, enable device slot contexts, program DCBAAP, and
659 * set command ring pointer and event ring pointer.
661 * Setup MSI-X vectors and enable interrupts.
663 int xhci_run(struct usb_hcd
*hcd
)
668 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
670 /* Start the xHCI host controller running only after the USB 2.0 roothub
674 hcd
->uses_new_polling
= 1;
675 if (!usb_hcd_is_primary_hcd(hcd
))
676 return xhci_run_finished(xhci
);
678 xhci_dbg(xhci
, "xhci_run\n");
680 ret
= xhci_try_enable_msi(hcd
);
684 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
685 init_timer(&xhci
->event_ring_timer
);
686 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
687 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
688 /* Poll the event ring */
689 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
691 xhci_dbg(xhci
, "Setting event ring polling timer\n");
692 add_timer(&xhci
->event_ring_timer
);
695 xhci_dbg(xhci
, "Command ring memory map follows:\n");
696 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
697 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
698 xhci_dbg_cmd_ptrs(xhci
);
700 xhci_dbg(xhci
, "ERST memory map follows:\n");
701 xhci_dbg_erst(xhci
, &xhci
->erst
);
702 xhci_dbg(xhci
, "Event ring:\n");
703 xhci_debug_ring(xhci
, xhci
->event_ring
);
704 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
705 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
706 temp_64
&= ~ERST_PTR_MASK
;
707 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
709 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
710 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
711 temp
&= ~ER_IRQ_INTERVAL_MASK
;
713 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
715 /* Set the HCD state before we enable the irqs */
716 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
718 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
720 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
722 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
723 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
724 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
725 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
726 &xhci
->ir_set
->irq_pending
);
727 xhci_print_ir_set(xhci
, 0);
729 if (xhci
->quirks
& XHCI_NEC_HOST
)
730 xhci_queue_vendor_command(xhci
, 0, 0, 0,
731 TRB_TYPE(TRB_NEC_GET_FW
));
733 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
737 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
739 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
741 spin_lock_irq(&xhci
->lock
);
744 /* The shared_hcd is going to be deallocated shortly (the USB core only
745 * calls this function when allocation fails in usb_add_hcd(), or
746 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
748 xhci
->shared_hcd
= NULL
;
749 spin_unlock_irq(&xhci
->lock
);
755 * This function is called by the USB core when the HC driver is removed.
756 * Its opposite is xhci_run().
758 * Disable device contexts, disable IRQs, and quiesce the HC.
759 * Reset the HC, finish any completed transactions, and cleanup memory.
761 void xhci_stop(struct usb_hcd
*hcd
)
764 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
766 if (!usb_hcd_is_primary_hcd(hcd
)) {
767 xhci_only_stop_hcd(xhci
->shared_hcd
);
771 spin_lock_irq(&xhci
->lock
);
772 /* Make sure the xHC is halted for a USB3 roothub
773 * (xhci_stop() could be called as part of failed init).
777 spin_unlock_irq(&xhci
->lock
);
779 xhci_cleanup_msix(xhci
);
781 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
782 /* Tell the event ring poll function not to reschedule */
784 del_timer_sync(&xhci
->event_ring_timer
);
787 /* Deleting Compliance Mode Recovery Timer */
788 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
789 (!(xhci_all_ports_seen_u0(xhci
)))) {
790 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
791 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
794 #ifndef CONFIG_MTK_XHCI
795 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
798 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
799 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
800 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
801 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
802 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
803 &xhci
->ir_set
->irq_pending
);
804 xhci_print_ir_set(xhci
, 0);
806 xhci_dbg(xhci
, "cleaning up memory\n");
807 xhci_mem_cleanup(xhci
);
808 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
809 xhci_readl(xhci
, &xhci
->op_regs
->status
));
813 * Shutdown HC (not bus-specific)
815 * This is called when the machine is rebooting or halting. We assume that the
816 * machine will be powered off, and the HC's internal state will be reset.
817 * Don't bother to free memory.
819 * This will only ever be called with the main usb_hcd (the USB3 roothub).
821 void xhci_shutdown(struct usb_hcd
*hcd
)
823 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
825 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
826 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
828 spin_lock_irq(&xhci
->lock
);
830 spin_unlock_irq(&xhci
->lock
);
832 xhci_cleanup_msix(xhci
);
834 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
835 xhci_readl(xhci
, &xhci
->op_regs
->status
));
839 static void xhci_save_registers(struct xhci_hcd
*xhci
)
841 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
842 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
843 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
844 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
845 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
846 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
847 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
848 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
849 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
852 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
854 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
855 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
856 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
857 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
858 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
859 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
860 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
861 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
862 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
865 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
869 /* step 2: initialize command ring buffer */
870 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
871 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
872 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
873 xhci
->cmd_ring
->dequeue
) &
874 (u64
) ~CMD_RING_RSVD_BITS
) |
875 xhci
->cmd_ring
->cycle_state
;
876 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
877 (long unsigned long) val_64
);
878 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
882 * The whole command ring must be cleared to zero when we suspend the host.
884 * The host doesn't save the command ring pointer in the suspend well, so we
885 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
886 * aligned, because of the reserved bits in the command ring dequeue pointer
887 * register. Therefore, we can't just set the dequeue pointer back in the
888 * middle of the ring (TRBs are 16-byte aligned).
890 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
892 struct xhci_ring
*ring
;
893 struct xhci_segment
*seg
;
895 ring
= xhci
->cmd_ring
;
899 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
900 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
901 cpu_to_le32(~TRB_CYCLE
);
903 } while (seg
!= ring
->deq_seg
);
905 /* Reset the software enqueue and dequeue pointers */
906 ring
->deq_seg
= ring
->first_seg
;
907 ring
->dequeue
= ring
->first_seg
->trbs
;
908 ring
->enq_seg
= ring
->deq_seg
;
909 ring
->enqueue
= ring
->dequeue
;
911 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
913 * Ring is now zeroed, so the HW should look for change of ownership
914 * when the cycle bit is set to 1.
916 ring
->cycle_state
= 1;
919 * Reset the hardware dequeue pointer.
920 * Yes, this will need to be re-written after resume, but we're paranoid
921 * and want to make sure the hardware doesn't access bogus memory
922 * because, say, the BIOS or an SMI started the host without changing
923 * the command ring pointers.
925 xhci_set_cmd_ring_deq(xhci
);
929 * Stop HC (not bus-specific)
931 * This is called when the machine transition into S3/S4 mode.
934 int xhci_suspend(struct xhci_hcd
*xhci
)
937 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
940 if (hcd
->state
!= HC_STATE_SUSPENDED
||
941 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
944 /* Don't poll the roothubs on bus suspend. */
945 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
946 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
947 del_timer_sync(&hcd
->rh_timer
);
949 spin_lock_irq(&xhci
->lock
);
950 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
951 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
952 /* step 1: stop endpoint */
953 /* skipped assuming that port suspend has done */
955 /* step 2: clear Run/Stop bit */
956 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
958 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
959 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
960 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
)) {
961 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
962 spin_unlock_irq(&xhci
->lock
);
965 xhci_clear_command_ring(xhci
);
967 /* step 3: save registers */
968 xhci_save_registers(xhci
);
970 /* step 4: set CSS flag */
971 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
973 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
974 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
975 STS_SAVE
, 0, 10 * 1000)) {
976 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
977 spin_unlock_irq(&xhci
->lock
);
980 spin_unlock_irq(&xhci
->lock
);
983 * Deleting Compliance Mode Recovery Timer because the xHCI Host
984 * is about to be suspended.
986 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
987 (!(xhci_all_ports_seen_u0(xhci
)))) {
988 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
989 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
993 /* step 5: remove core well power */
994 /* synchronize irq when using MSI-X */
995 xhci_msix_sync_irqs(xhci
);
1001 * start xHC (not bus-specific)
1003 * This is called when the machine transition from S3/S4 mode.
1006 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
1008 u32 command
, temp
= 0, status
;
1009 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
1010 struct usb_hcd
*secondary_hcd
;
1012 bool comp_timer_running
= false;
1014 /* Wait a bit if either of the roothubs need to settle from the
1015 * transition into bus suspend.
1017 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
1018 time_before(jiffies
,
1019 xhci
->bus_state
[1].next_statechange
))
1022 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
1023 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
1025 spin_lock_irq(&xhci
->lock
);
1026 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
1030 /* step 1: restore register */
1031 xhci_restore_registers(xhci
);
1032 /* step 2: initialize command ring buffer */
1033 xhci_set_cmd_ring_deq(xhci
);
1034 /* step 3: restore state and start state*/
1035 /* step 3: set CRS flag */
1036 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1038 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1039 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
1040 STS_RESTORE
, 0, 10 * 1000)) {
1041 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
1042 spin_unlock_irq(&xhci
->lock
);
1045 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1048 /* If restore operation fails, re-initialize the HC during resume */
1049 if ((temp
& STS_SRE
) || hibernated
) {
1051 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
1052 !(xhci_all_ports_seen_u0(xhci
))) {
1053 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
1054 xhci_dbg(xhci
, "Compliance Mode Recovery Timer deleted!\n");
1057 /* Let the USB core know _both_ roothubs lost power. */
1058 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
1059 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
1061 xhci_dbg(xhci
, "Stop HCD\n");
1064 spin_unlock_irq(&xhci
->lock
);
1065 xhci_cleanup_msix(xhci
);
1067 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1068 /* Tell the event ring poll function not to reschedule */
1070 del_timer_sync(&xhci
->event_ring_timer
);
1073 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
1074 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1075 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
1076 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
1077 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
1078 &xhci
->ir_set
->irq_pending
);
1079 xhci_print_ir_set(xhci
, 0);
1081 xhci_dbg(xhci
, "cleaning up memory\n");
1082 xhci_mem_cleanup(xhci
);
1083 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1084 xhci_readl(xhci
, &xhci
->op_regs
->status
));
1086 /* USB core calls the PCI reinit and start functions twice:
1087 * first with the primary HCD, and then with the secondary HCD.
1088 * If we don't do the same, the host will never be started.
1090 if (!usb_hcd_is_primary_hcd(hcd
))
1091 secondary_hcd
= hcd
;
1093 secondary_hcd
= xhci
->shared_hcd
;
1095 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1096 retval
= xhci_init(hcd
->primary_hcd
);
1099 comp_timer_running
= true;
1101 xhci_dbg(xhci
, "Start the primary HCD\n");
1102 retval
= xhci_run(hcd
->primary_hcd
);
1104 xhci_dbg(xhci
, "Start the secondary HCD\n");
1105 retval
= xhci_run(secondary_hcd
);
1107 hcd
->state
= HC_STATE_SUSPENDED
;
1108 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1112 /* step 4: set Run/Stop bit */
1113 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1115 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1116 xhci_handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1119 /* step 5: walk topology and initialize portsc,
1120 * portpmsc and portli
1122 /* this is done in bus_resume */
1124 /* step 6: restart each of the previously
1125 * Running endpoints by ringing their doorbells
1128 spin_unlock_irq(&xhci
->lock
);
1132 /* Resume root hubs only when have pending events. */
1133 status
= readl(&xhci
->op_regs
->status
);
1134 if (status
& STS_EINT
) {
1135 usb_hcd_resume_root_hub(hcd
);
1136 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1141 * If system is subject to the Quirk, Compliance Mode Timer needs to
1142 * be re-initialized Always after a system resume. Ports are subject
1143 * to suffer the Compliance Mode issue again. It doesn't matter if
1144 * ports have entered previously to U0 before system's suspension.
1146 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1147 compliance_mode_recovery_timer_init(xhci
);
1149 /* Re-enable port polling. */
1150 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1151 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1152 usb_hcd_poll_rh_status(hcd
);
1156 #endif /* CONFIG_PM */
1158 /*-------------------------------------------------------------------------*/
1161 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1162 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1163 * value to right shift 1 for the bitmask.
1165 * Index = (epnum * 2) + direction - 1,
1166 * where direction = 0 for OUT, 1 for IN.
1167 * For control endpoints, the IN index is used (OUT index is unused), so
1168 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1170 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1173 if (usb_endpoint_xfer_control(desc
))
1174 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1176 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1177 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1181 /* Find the flag for this endpoint (for use in the control context). Use the
1182 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1185 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1187 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1190 /* Find the flag for this endpoint (for use in the control context). Use the
1191 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1194 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1196 return 1 << (ep_index
+ 1);
1199 /* Compute the last valid endpoint context index. Basically, this is the
1200 * endpoint index plus one. For slot contexts with more than valid endpoint,
1201 * we find the most significant bit set in the added contexts flags.
1202 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1203 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1205 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1207 return fls(added_ctxs
) - 1;
1210 /* Returns 1 if the arguments are OK;
1211 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1213 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1214 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1216 struct xhci_hcd
*xhci
;
1217 struct xhci_virt_device
*virt_dev
;
1219 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1220 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1224 if (!udev
->parent
) {
1225 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1230 xhci
= hcd_to_xhci(hcd
);
1231 if (check_virt_dev
) {
1232 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1233 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1238 virt_dev
= xhci
->devs
[udev
->slot_id
];
1239 if (virt_dev
->udev
!= udev
) {
1240 printk(KERN_DEBUG
"xHCI %s called with udev and "
1241 "virt_dev does not match\n", func
);
1246 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1252 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1253 struct usb_device
*udev
, struct xhci_command
*command
,
1254 bool ctx_change
, bool must_succeed
);
1257 * Full speed devices may have a max packet size greater than 8 bytes, but the
1258 * USB core doesn't know that until it reads the first 8 bytes of the
1259 * descriptor. If the usb_device's max packet size changes after that point,
1260 * we need to issue an evaluate context command and wait on it.
1262 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1263 unsigned int ep_index
, struct urb
*urb
)
1265 struct xhci_container_ctx
*in_ctx
;
1266 struct xhci_container_ctx
*out_ctx
;
1267 struct xhci_input_control_ctx
*ctrl_ctx
;
1268 struct xhci_ep_ctx
*ep_ctx
;
1269 int max_packet_size
;
1270 int hw_max_packet_size
;
1273 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1274 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1275 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1276 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1277 if (hw_max_packet_size
!= max_packet_size
) {
1278 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1279 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1281 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1282 hw_max_packet_size
);
1283 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1285 /* Set up the modified control endpoint 0 */
1286 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1287 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1288 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1289 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1290 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1291 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1293 /* Set up the input context flags for the command */
1294 /* FIXME: This won't work if a non-default control endpoint
1295 * changes max packet sizes.
1297 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1298 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1299 ctrl_ctx
->drop_flags
= 0;
1301 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1302 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1303 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1304 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1306 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1309 /* Clean up the input context for later use by bandwidth
1312 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1318 * non-error returns are a promise to giveback() the urb later
1319 * we drop ownership so next owner (or urb unlink) can get it
1321 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1323 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1324 struct xhci_td
*buffer
;
1325 unsigned long flags
;
1327 unsigned int slot_id
, ep_index
;
1328 struct urb_priv
*urb_priv
;
1331 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1332 true, true, __func__
) <= 0)
1335 slot_id
= urb
->dev
->slot_id
;
1336 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1338 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1339 if (!in_interrupt())
1340 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1345 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1346 size
= urb
->number_of_packets
;
1347 else if (usb_endpoint_is_bulk_out(&urb
->ep
->desc
) &&
1348 urb
->transfer_buffer_length
> 0 &&
1349 urb
->transfer_flags
& URB_ZERO_PACKET
&&
1350 !(urb
->transfer_buffer_length
% usb_endpoint_maxp(&urb
->ep
->desc
)))
1355 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1356 size
* sizeof(struct xhci_td
*), mem_flags
);
1360 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1366 for (i
= 0; i
< size
; i
++) {
1367 urb_priv
->td
[i
] = buffer
;
1371 urb_priv
->length
= size
;
1372 urb_priv
->td_cnt
= 0;
1373 urb
->hcpriv
= urb_priv
;
1375 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1376 /* Check to see if the max packet size for the default control
1377 * endpoint changed during FS device enumeration
1379 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1380 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1383 xhci_urb_free_priv(xhci
, urb_priv
);
1389 /* We have a spinlock and interrupts disabled, so we must pass
1390 * atomic context to this function, which may allocate memory.
1392 spin_lock_irqsave(&xhci
->lock
, flags
);
1393 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1395 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1399 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1400 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1401 spin_lock_irqsave(&xhci
->lock
, flags
);
1402 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1404 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1405 EP_GETTING_STREAMS
) {
1406 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1407 "is transitioning to using streams.\n");
1409 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1410 EP_GETTING_NO_STREAMS
) {
1411 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1412 "is transitioning to "
1413 "not having streams.\n");
1416 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1421 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1422 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1423 spin_lock_irqsave(&xhci
->lock
, flags
);
1424 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1426 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1430 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1432 spin_lock_irqsave(&xhci
->lock
, flags
);
1433 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1435 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1439 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1444 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1445 "non-responsive xHCI host.\n",
1446 urb
->ep
->desc
.bEndpointAddress
, urb
);
1449 xhci_urb_free_priv(xhci
, urb_priv
);
1451 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1455 /* Get the right ring for the given URB.
1456 * If the endpoint supports streams, boundary check the URB's stream ID.
1457 * If the endpoint doesn't support streams, return the singular endpoint ring.
1459 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1462 unsigned int slot_id
;
1463 unsigned int ep_index
;
1464 unsigned int stream_id
;
1465 struct xhci_virt_ep
*ep
;
1467 slot_id
= urb
->dev
->slot_id
;
1468 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1469 stream_id
= urb
->stream_id
;
1470 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1471 /* Common case: no streams */
1472 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1475 if (stream_id
== 0) {
1477 "WARN: Slot ID %u, ep index %u has streams, "
1478 "but URB has no stream ID.\n",
1483 if (stream_id
< ep
->stream_info
->num_streams
)
1484 return ep
->stream_info
->stream_rings
[stream_id
];
1487 "WARN: Slot ID %u, ep index %u has "
1488 "stream IDs 1 to %u allocated, "
1489 "but stream ID %u is requested.\n",
1491 ep
->stream_info
->num_streams
- 1,
1497 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1498 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1499 * should pick up where it left off in the TD, unless a Set Transfer Ring
1500 * Dequeue Pointer is issued.
1502 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1503 * the ring. Since the ring is a contiguous structure, they can't be physically
1504 * removed. Instead, there are two options:
1506 * 1) If the HC is in the middle of processing the URB to be canceled, we
1507 * simply move the ring's dequeue pointer past those TRBs using the Set
1508 * Transfer Ring Dequeue Pointer command. This will be the common case,
1509 * when drivers timeout on the last submitted URB and attempt to cancel.
1511 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1512 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1513 * HC will need to invalidate the any TRBs it has cached after the stop
1514 * endpoint command, as noted in the xHCI 0.95 errata.
1516 * 3) The TD may have completed by the time the Stop Endpoint Command
1517 * completes, so software needs to handle that case too.
1519 * This function should protect against the TD enqueueing code ringing the
1520 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1521 * It also needs to account for multiple cancellations on happening at the same
1522 * time for the same endpoint.
1524 * Note that this function can be called in any context, or so says
1525 * usb_hcd_unlink_urb()
1527 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1529 unsigned long flags
;
1532 struct xhci_hcd
*xhci
;
1533 struct urb_priv
*urb_priv
;
1535 unsigned int ep_index
;
1536 struct xhci_ring
*ep_ring
;
1537 struct xhci_virt_ep
*ep
;
1539 xhci
= hcd_to_xhci(hcd
);
1540 spin_lock_irqsave(&xhci
->lock
, flags
);
1541 /* Make sure the URB hasn't completed or been unlinked already */
1542 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1543 if (ret
|| !urb
->hcpriv
)
1545 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1546 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1547 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1548 urb_priv
= urb
->hcpriv
;
1549 for (i
= urb_priv
->td_cnt
;
1550 i
< urb_priv
->length
&& xhci
->devs
[urb
->dev
->slot_id
];
1552 td
= urb_priv
->td
[i
];
1553 if (!list_empty(&td
->td_list
))
1554 list_del_init(&td
->td_list
);
1555 if (!list_empty(&td
->cancelled_td_list
))
1556 list_del_init(&td
->cancelled_td_list
);
1559 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1560 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1561 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1562 xhci_urb_free_priv(xhci
, urb_priv
);
1565 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1566 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1567 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1568 "non-responsive xHCI host.\n",
1569 urb
->ep
->desc
.bEndpointAddress
, urb
);
1570 /* Let the stop endpoint command watchdog timer (which set this
1571 * state) finish cleaning up the endpoint TD lists. We must
1572 * have caught it in the middle of dropping a lock and giving
1578 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1579 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1580 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1586 urb_priv
= urb
->hcpriv
;
1587 i
= urb_priv
->td_cnt
;
1588 if (i
< urb_priv
->length
)
1589 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1590 "starting at offset 0x%llx\n",
1591 urb
, urb
->dev
->devpath
,
1592 urb
->ep
->desc
.bEndpointAddress
,
1593 (unsigned long long) xhci_trb_virt_to_dma(
1594 urb_priv
->td
[i
]->start_seg
,
1595 urb_priv
->td
[i
]->first_trb
));
1597 for (; i
< urb_priv
->length
; i
++) {
1598 td
= urb_priv
->td
[i
];
1599 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1602 /* Queue a stop endpoint command, but only if this is
1603 * the first cancellation to be handled.
1605 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1606 ep
->ep_state
|= EP_HALT_PENDING
;
1607 ep
->stop_cmds_pending
++;
1608 ep
->stop_cmd_timer
.expires
= jiffies
+
1609 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1610 add_timer(&ep
->stop_cmd_timer
);
1611 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1612 xhci_ring_cmd_db(xhci
);
1615 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1619 /* Drop an endpoint from a new bandwidth configuration for this device.
1620 * Only one call to this function is allowed per endpoint before
1621 * check_bandwidth() or reset_bandwidth() must be called.
1622 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1623 * add the endpoint to the schedule with possibly new parameters denoted by a
1624 * different endpoint descriptor in usb_host_endpoint.
1625 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1628 * The USB core will not allow URBs to be queued to an endpoint that is being
1629 * disabled, so there's no need for mutual exclusion to protect
1630 * the xhci->devs[slot_id] structure.
1632 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1633 struct usb_host_endpoint
*ep
)
1635 struct xhci_hcd
*xhci
;
1636 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1637 struct xhci_input_control_ctx
*ctrl_ctx
;
1638 struct xhci_slot_ctx
*slot_ctx
;
1639 unsigned int last_ctx
;
1640 unsigned int ep_index
;
1641 struct xhci_ep_ctx
*ep_ctx
;
1643 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1645 #ifdef CONFIG_MTK_XHCI
1646 struct sch_ep
*sch_ep
= NULL
;
1651 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1654 xhci
= hcd_to_xhci(hcd
);
1655 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1658 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1659 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1660 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1661 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1662 __func__
, drop_flag
);
1666 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1667 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1668 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1669 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1670 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1671 /* If the HC already knows the endpoint is disabled,
1672 * or the HCD has noted it is disabled, ignore this request
1674 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1675 cpu_to_le32(EP_STATE_DISABLED
)) ||
1676 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1677 xhci_get_endpoint_flag(&ep
->desc
)) {
1678 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1683 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1684 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1686 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1687 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1689 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1690 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1691 /* Update the last valid endpoint context, if we deleted the last one */
1692 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1693 LAST_CTX(last_ctx
)) {
1694 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1695 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1697 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1699 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1701 #ifdef CONFIG_MTK_XHCI
1702 slot_ctx
= xhci_get_slot_ctx(xhci
, xhci
->devs
[udev
->slot_id
]->out_ctx
);
1703 if((slot_ctx
->tt_info
& 0xff) > 0){
1709 if(usb_endpoint_xfer_int(&ep
->desc
)){
1710 ep_type
= USB_EP_INT
;
1712 else if(usb_endpoint_xfer_isoc(&ep
->desc
)){
1713 ep_type
= USB_EP_ISOC
;
1715 else if(usb_endpoint_xfer_bulk(&ep
->desc
)){
1716 ep_type
= USB_EP_BULK
;
1718 sch_ep
= mtk_xhci_scheduler_remove_ep(udev
->speed
, usb_endpoint_dir_in(&ep
->desc
)
1719 , isTT
, ep_type
, (mtk_u32
*)ep
);
1724 xhci_warn(xhci
, "[MTK]Doesn't find ep_sch instance when removing endpoint\n");
1728 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1729 (unsigned int) ep
->desc
.bEndpointAddress
,
1731 (unsigned int) new_drop_flags
,
1732 (unsigned int) new_add_flags
,
1733 (unsigned int) new_slot_info
);
1735 #if defined(CONFIG_MTK_XHCI) && defined(CONFIG_USB_MTK_DUALMODE)
1742 /* Add an endpoint to a new possible bandwidth configuration for this device.
1743 * Only one call to this function is allowed per endpoint before
1744 * check_bandwidth() or reset_bandwidth() must be called.
1745 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1746 * add the endpoint to the schedule with possibly new parameters denoted by a
1747 * different endpoint descriptor in usb_host_endpoint.
1748 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1751 * The USB core will not allow URBs to be queued to an endpoint until the
1752 * configuration or alt setting is installed in the device, so there's no need
1753 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1755 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1756 struct usb_host_endpoint
*ep
)
1758 struct xhci_hcd
*xhci
;
1759 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1760 unsigned int ep_index
;
1761 struct xhci_slot_ctx
*slot_ctx
;
1762 struct xhci_input_control_ctx
*ctrl_ctx
;
1764 unsigned int last_ctx
;
1765 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1766 struct xhci_virt_device
*virt_dev
;
1768 #ifdef CONFIG_MTK_XHCI
1769 struct xhci_ep_ctx
*in_ep_ctx
;
1770 struct sch_ep
*sch_ep
;
1779 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1781 /* So we won't queue a reset ep command for a root hub */
1785 xhci
= hcd_to_xhci(hcd
);
1786 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1789 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1790 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1791 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1792 /* FIXME when we have to issue an evaluate endpoint command to
1793 * deal with ep0 max packet size changing once we get the
1796 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1797 __func__
, added_ctxs
);
1801 virt_dev
= xhci
->devs
[udev
->slot_id
];
1802 in_ctx
= virt_dev
->in_ctx
;
1803 out_ctx
= virt_dev
->out_ctx
;
1804 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1805 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1807 /* If this endpoint is already in use, and the upper layers are trying
1808 * to add it again without dropping it, reject the addition.
1810 if (virt_dev
->eps
[ep_index
].ring
&&
1811 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1812 xhci_get_endpoint_flag(&ep
->desc
))) {
1813 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1814 "without dropping it.\n",
1815 (unsigned int) ep
->desc
.bEndpointAddress
);
1819 /* If the HCD has already noted the endpoint is enabled,
1820 * ignore this request.
1822 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1823 xhci_get_endpoint_flag(&ep
->desc
)) {
1824 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1830 * Configuration and alternate setting changes must be done in
1831 * process context, not interrupt context (or so documenation
1832 * for usb_set_interface() and usb_set_configuration() claim).
1834 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1835 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1836 __func__
, ep
->desc
.bEndpointAddress
);
1840 #ifdef CONFIG_MTK_XHCI
1841 in_ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1842 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
1844 if((slot_ctx
->tt_info
& 0xff) > 0){
1850 if(usb_endpoint_xfer_int(&ep
->desc
)){
1851 ep_type
= USB_EP_INT
;
1853 else if(usb_endpoint_xfer_isoc(&ep
->desc
)){
1854 ep_type
= USB_EP_ISOC
;
1856 else if(usb_endpoint_xfer_bulk(&ep
->desc
)){
1857 ep_type
= USB_EP_BULK
;
1859 if(udev
->speed
== USB_SPEED_FULL
|| udev
->speed
== USB_SPEED_HIGH
1860 || udev
->speed
== USB_SPEED_LOW
){
1861 maxp
= ep
->desc
.wMaxPacketSize
& 0x7FF;
1862 burst
= ep
->desc
.wMaxPacketSize
>> 11;
1865 else if(udev
->speed
== USB_SPEED_SUPER
){
1866 maxp
= ep
->desc
.wMaxPacketSize
& 0x7FF;
1867 burst
= ep
->ss_ep_comp
.bMaxBurst
;
1868 mult
= ep
->ss_ep_comp
.bmAttributes
& 0x3;
1870 interval
= (1 << ((in_ep_ctx
->ep_info
>> 16) & 0xff));
1871 sch_ep
= kmalloc(sizeof(struct sch_ep
), GFP_KERNEL
);
1872 if(mtk_xhci_scheduler_add_ep(udev
->speed
, usb_endpoint_dir_in(&ep
->desc
),
1873 isTT
, ep_type
, maxp
, interval
, burst
, mult
, (mtk_u32
*)ep
1874 , (mtk_u32
*)in_ep_ctx
, sch_ep
) != SCH_SUCCESS
){
1875 xhci_err(xhci
, "[MTK] not enough bandwidth\n");
1880 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1881 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1883 /* If xhci_endpoint_disable() was called for this endpoint, but the
1884 * xHC hasn't been notified yet through the check_bandwidth() call,
1885 * this re-adds a new state for the endpoint from the new endpoint
1886 * descriptors. We must drop and re-add this endpoint, so we leave the
1889 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1891 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1892 /* Update the last valid endpoint context, if we just added one past */
1893 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1894 LAST_CTX(last_ctx
)) {
1895 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1896 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1898 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1900 /* Store the usb_device pointer for later use */
1903 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1904 (unsigned int) ep
->desc
.bEndpointAddress
,
1906 (unsigned int) new_drop_flags
,
1907 (unsigned int) new_add_flags
,
1908 (unsigned int) new_slot_info
);
1910 #if defined(CONFIG_MTK_XHCI) && defined(CONFIG_USB_MTK_DUALMODE)
1917 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1919 struct xhci_input_control_ctx
*ctrl_ctx
;
1920 struct xhci_ep_ctx
*ep_ctx
;
1921 struct xhci_slot_ctx
*slot_ctx
;
1924 /* When a device's add flag and drop flag are zero, any subsequent
1925 * configure endpoint command will leave that endpoint's state
1926 * untouched. Make sure we don't leave any old state in the input
1927 * endpoint contexts.
1929 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1930 ctrl_ctx
->drop_flags
= 0;
1931 ctrl_ctx
->add_flags
= 0;
1932 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1933 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1934 /* Endpoint 0 is always valid */
1935 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1936 for (i
= 1; i
< 31; ++i
) {
1937 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1938 ep_ctx
->ep_info
= 0;
1939 ep_ctx
->ep_info2
= 0;
1941 ep_ctx
->tx_info
= 0;
1945 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1946 struct usb_device
*udev
, u32
*cmd_status
)
1950 switch (*cmd_status
) {
1952 dev_warn(&udev
->dev
, "Not enough host controller resources "
1953 "for new device state.\n");
1955 /* FIXME: can we allocate more resources for the HC? */
1958 case COMP_2ND_BW_ERR
:
1959 dev_warn(&udev
->dev
, "Not enough bandwidth "
1960 "for new device state.\n");
1962 /* FIXME: can we go back to the old state? */
1965 /* the HCD set up something wrong */
1966 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1968 "and endpoint is not disabled.\n");
1972 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1973 "configure command.\n");
1977 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1981 xhci_err(xhci
, "ERROR: unexpected command completion "
1982 "code 0x%x.\n", *cmd_status
);
1989 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1990 struct usb_device
*udev
, u32
*cmd_status
)
1993 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1995 switch (*cmd_status
) {
1997 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1998 "context command.\n");
2002 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
2003 "evaluate context command.\n");
2006 case COMP_CTX_STATE
:
2007 dev_warn(&udev
->dev
, "WARN: invalid context state for "
2008 "evaluate context command.\n");
2009 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
2013 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
2014 "context command.\n");
2018 /* Max Exit Latency too large error */
2019 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
2023 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
2027 xhci_err(xhci
, "ERROR: unexpected command completion "
2028 "code 0x%x.\n", *cmd_status
);
2035 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
2036 struct xhci_container_ctx
*in_ctx
)
2038 struct xhci_input_control_ctx
*ctrl_ctx
;
2039 u32 valid_add_flags
;
2040 u32 valid_drop_flags
;
2042 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2043 /* Ignore the slot flag (bit 0), and the default control endpoint flag
2044 * (bit 1). The default control endpoint is added during the Address
2045 * Device command and is never removed until the slot is disabled.
2047 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
2048 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
2050 /* Use hweight32 to count the number of ones in the add flags, or
2051 * number of endpoints added. Don't count endpoints that are changed
2052 * (both added and dropped).
2054 return hweight32(valid_add_flags
) -
2055 hweight32(valid_add_flags
& valid_drop_flags
);
2058 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
2059 struct xhci_container_ctx
*in_ctx
)
2061 struct xhci_input_control_ctx
*ctrl_ctx
;
2062 u32 valid_add_flags
;
2063 u32 valid_drop_flags
;
2065 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2066 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
2067 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
2069 return hweight32(valid_drop_flags
) -
2070 hweight32(valid_add_flags
& valid_drop_flags
);
2074 * We need to reserve the new number of endpoints before the configure endpoint
2075 * command completes. We can't subtract the dropped endpoints from the number
2076 * of active endpoints until the command completes because we can oversubscribe
2077 * the host in this case:
2079 * - the first configure endpoint command drops more endpoints than it adds
2080 * - a second configure endpoint command that adds more endpoints is queued
2081 * - the first configure endpoint command fails, so the config is unchanged
2082 * - the second command may succeed, even though there isn't enough resources
2084 * Must be called with xhci->lock held.
2086 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
2087 struct xhci_container_ctx
*in_ctx
)
2091 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
2092 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
2093 xhci_dbg(xhci
, "Not enough ep ctxs: "
2094 "%u active, need to add %u, limit is %u.\n",
2095 xhci
->num_active_eps
, added_eps
,
2096 xhci
->limit_active_eps
);
2099 xhci
->num_active_eps
+= added_eps
;
2100 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
2101 xhci
->num_active_eps
);
2106 * The configure endpoint was failed by the xHC for some other reason, so we
2107 * need to revert the resources that failed configuration would have used.
2109 * Must be called with xhci->lock held.
2111 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
2112 struct xhci_container_ctx
*in_ctx
)
2116 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
2117 xhci
->num_active_eps
-= num_failed_eps
;
2118 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
2120 xhci
->num_active_eps
);
2124 * Now that the command has completed, clean up the active endpoint count by
2125 * subtracting out the endpoints that were dropped (but not changed).
2127 * Must be called with xhci->lock held.
2129 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
2130 struct xhci_container_ctx
*in_ctx
)
2132 u32 num_dropped_eps
;
2134 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
2135 xhci
->num_active_eps
-= num_dropped_eps
;
2136 if (num_dropped_eps
)
2137 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
2139 xhci
->num_active_eps
);
2142 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
2144 switch (udev
->speed
) {
2146 case USB_SPEED_FULL
:
2148 case USB_SPEED_HIGH
:
2150 case USB_SPEED_SUPER
:
2152 case USB_SPEED_UNKNOWN
:
2153 case USB_SPEED_WIRELESS
:
2155 /* Should never happen */
2161 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2163 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2165 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2170 /* If we are changing a LS/FS device under a HS hub,
2171 * make sure (if we are activating a new TT) that the HS bus has enough
2172 * bandwidth for this new TT.
2174 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2175 struct xhci_virt_device
*virt_dev
,
2178 struct xhci_interval_bw_table
*bw_table
;
2179 struct xhci_tt_bw_info
*tt_info
;
2181 /* Find the bandwidth table for the root port this TT is attached to. */
2182 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2183 tt_info
= virt_dev
->tt_info
;
2184 /* If this TT already had active endpoints, the bandwidth for this TT
2185 * has already been added. Removing all periodic endpoints (and thus
2186 * making the TT enactive) will only decrease the bandwidth used.
2190 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2191 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2195 /* Not sure why we would have no new active endpoints...
2197 * Maybe because of an Evaluate Context change for a hub update or a
2198 * control endpoint 0 max packet size change?
2199 * FIXME: skip the bandwidth calculation in that case.
2204 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2205 struct xhci_virt_device
*virt_dev
)
2207 unsigned int bw_reserved
;
2209 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2210 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2213 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2214 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2221 * This algorithm is a very conservative estimate of the worst-case scheduling
2222 * scenario for any one interval. The hardware dynamically schedules the
2223 * packets, so we can't tell which microframe could be the limiting factor in
2224 * the bandwidth scheduling. This only takes into account periodic endpoints.
2226 * Obviously, we can't solve an NP complete problem to find the minimum worst
2227 * case scenario. Instead, we come up with an estimate that is no less than
2228 * the worst case bandwidth used for any one microframe, but may be an
2231 * We walk the requirements for each endpoint by interval, starting with the
2232 * smallest interval, and place packets in the schedule where there is only one
2233 * possible way to schedule packets for that interval. In order to simplify
2234 * this algorithm, we record the largest max packet size for each interval, and
2235 * assume all packets will be that size.
2237 * For interval 0, we obviously must schedule all packets for each interval.
2238 * The bandwidth for interval 0 is just the amount of data to be transmitted
2239 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2240 * the number of packets).
2242 * For interval 1, we have two possible microframes to schedule those packets
2243 * in. For this algorithm, if we can schedule the same number of packets for
2244 * each possible scheduling opportunity (each microframe), we will do so. The
2245 * remaining number of packets will be saved to be transmitted in the gaps in
2246 * the next interval's scheduling sequence.
2248 * As we move those remaining packets to be scheduled with interval 2 packets,
2249 * we have to double the number of remaining packets to transmit. This is
2250 * because the intervals are actually powers of 2, and we would be transmitting
2251 * the previous interval's packets twice in this interval. We also have to be
2252 * sure that when we look at the largest max packet size for this interval, we
2253 * also look at the largest max packet size for the remaining packets and take
2254 * the greater of the two.
2256 * The algorithm continues to evenly distribute packets in each scheduling
2257 * opportunity, and push the remaining packets out, until we get to the last
2258 * interval. Then those packets and their associated overhead are just added
2259 * to the bandwidth used.
2261 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2262 struct xhci_virt_device
*virt_dev
,
2265 unsigned int bw_reserved
;
2266 unsigned int max_bandwidth
;
2267 unsigned int bw_used
;
2268 unsigned int block_size
;
2269 struct xhci_interval_bw_table
*bw_table
;
2270 unsigned int packet_size
= 0;
2271 unsigned int overhead
= 0;
2272 unsigned int packets_transmitted
= 0;
2273 unsigned int packets_remaining
= 0;
2276 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2277 return xhci_check_ss_bw(xhci
, virt_dev
);
2279 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2280 max_bandwidth
= HS_BW_LIMIT
;
2281 /* Convert percent of bus BW reserved to blocks reserved */
2282 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2284 max_bandwidth
= FS_BW_LIMIT
;
2285 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2288 bw_table
= virt_dev
->bw_table
;
2289 /* We need to translate the max packet size and max ESIT payloads into
2290 * the units the hardware uses.
2292 block_size
= xhci_get_block_size(virt_dev
->udev
);
2294 /* If we are manipulating a LS/FS device under a HS hub, double check
2295 * that the HS bus has enough bandwidth if we are activing a new TT.
2297 if (virt_dev
->tt_info
) {
2298 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2299 virt_dev
->real_port
);
2300 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2301 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2302 "newly activated TT.\n");
2305 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
2306 virt_dev
->tt_info
->slot_id
,
2307 virt_dev
->tt_info
->ttport
);
2309 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2310 virt_dev
->real_port
);
2313 /* Add in how much bandwidth will be used for interval zero, or the
2314 * rounded max ESIT payload + number of packets * largest overhead.
2316 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2317 bw_table
->interval_bw
[0].num_packets
*
2318 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2320 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2321 unsigned int bw_added
;
2322 unsigned int largest_mps
;
2323 unsigned int interval_overhead
;
2326 * How many packets could we transmit in this interval?
2327 * If packets didn't fit in the previous interval, we will need
2328 * to transmit that many packets twice within this interval.
2330 packets_remaining
= 2 * packets_remaining
+
2331 bw_table
->interval_bw
[i
].num_packets
;
2333 /* Find the largest max packet size of this or the previous
2336 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2339 struct xhci_virt_ep
*virt_ep
;
2340 struct list_head
*ep_entry
;
2342 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2343 virt_ep
= list_entry(ep_entry
,
2344 struct xhci_virt_ep
, bw_endpoint_list
);
2345 /* Convert to blocks, rounding up */
2346 largest_mps
= DIV_ROUND_UP(
2347 virt_ep
->bw_info
.max_packet_size
,
2350 if (largest_mps
> packet_size
)
2351 packet_size
= largest_mps
;
2353 /* Use the larger overhead of this or the previous interval. */
2354 interval_overhead
= xhci_get_largest_overhead(
2355 &bw_table
->interval_bw
[i
]);
2356 if (interval_overhead
> overhead
)
2357 overhead
= interval_overhead
;
2359 /* How many packets can we evenly distribute across
2360 * (1 << (i + 1)) possible scheduling opportunities?
2362 packets_transmitted
= packets_remaining
>> (i
+ 1);
2364 /* Add in the bandwidth used for those scheduled packets */
2365 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2367 /* How many packets do we have remaining to transmit? */
2368 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2370 /* What largest max packet size should those packets have? */
2371 /* If we've transmitted all packets, don't carry over the
2372 * largest packet size.
2374 if (packets_remaining
== 0) {
2377 } else if (packets_transmitted
> 0) {
2378 /* Otherwise if we do have remaining packets, and we've
2379 * scheduled some packets in this interval, take the
2380 * largest max packet size from endpoints with this
2383 packet_size
= largest_mps
;
2384 overhead
= interval_overhead
;
2386 /* Otherwise carry over packet_size and overhead from the last
2387 * time we had a remainder.
2389 bw_used
+= bw_added
;
2390 if (bw_used
> max_bandwidth
) {
2391 xhci_warn(xhci
, "Not enough bandwidth. "
2392 "Proposed: %u, Max: %u\n",
2393 bw_used
, max_bandwidth
);
2398 * Ok, we know we have some packets left over after even-handedly
2399 * scheduling interval 15. We don't know which microframes they will
2400 * fit into, so we over-schedule and say they will be scheduled every
2403 if (packets_remaining
> 0)
2404 bw_used
+= overhead
+ packet_size
;
2406 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2407 unsigned int port_index
= virt_dev
->real_port
- 1;
2409 /* OK, we're manipulating a HS device attached to a
2410 * root port bandwidth domain. Include the number of active TTs
2411 * in the bandwidth used.
2413 bw_used
+= TT_HS_OVERHEAD
*
2414 xhci
->rh_bw
[port_index
].num_active_tts
;
2417 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2418 "Available: %u " "percent\n",
2419 bw_used
, max_bandwidth
, bw_reserved
,
2420 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2423 bw_used
+= bw_reserved
;
2424 if (bw_used
> max_bandwidth
) {
2425 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2426 bw_used
, max_bandwidth
);
2430 bw_table
->bw_used
= bw_used
;
2434 static bool xhci_is_async_ep(unsigned int ep_type
)
2436 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2437 ep_type
!= ISOC_IN_EP
&&
2438 ep_type
!= INT_IN_EP
);
2441 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2443 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2446 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2448 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2450 if (ep_bw
->ep_interval
== 0)
2451 return SS_OVERHEAD_BURST
+
2452 (ep_bw
->mult
* ep_bw
->num_packets
*
2453 (SS_OVERHEAD
+ mps
));
2454 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2455 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2456 1 << ep_bw
->ep_interval
);
2460 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2461 struct xhci_bw_info
*ep_bw
,
2462 struct xhci_interval_bw_table
*bw_table
,
2463 struct usb_device
*udev
,
2464 struct xhci_virt_ep
*virt_ep
,
2465 struct xhci_tt_bw_info
*tt_info
)
2467 struct xhci_interval_bw
*interval_bw
;
2468 int normalized_interval
;
2470 if (xhci_is_async_ep(ep_bw
->type
))
2473 if (udev
->speed
== USB_SPEED_SUPER
) {
2474 if (xhci_is_sync_in_ep(ep_bw
->type
))
2475 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2476 xhci_get_ss_bw_consumed(ep_bw
);
2478 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2479 xhci_get_ss_bw_consumed(ep_bw
);
2483 /* SuperSpeed endpoints never get added to intervals in the table, so
2484 * this check is only valid for HS/FS/LS devices.
2486 if (list_empty(&virt_ep
->bw_endpoint_list
))
2488 /* For LS/FS devices, we need to translate the interval expressed in
2489 * microframes to frames.
2491 if (udev
->speed
== USB_SPEED_HIGH
)
2492 normalized_interval
= ep_bw
->ep_interval
;
2494 normalized_interval
= ep_bw
->ep_interval
- 3;
2496 if (normalized_interval
== 0)
2497 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2498 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2499 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2500 switch (udev
->speed
) {
2502 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2504 case USB_SPEED_FULL
:
2505 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2507 case USB_SPEED_HIGH
:
2508 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2510 case USB_SPEED_SUPER
:
2511 case USB_SPEED_UNKNOWN
:
2512 case USB_SPEED_WIRELESS
:
2513 /* Should never happen because only LS/FS/HS endpoints will get
2514 * added to the endpoint list.
2519 tt_info
->active_eps
-= 1;
2520 list_del_init(&virt_ep
->bw_endpoint_list
);
2523 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2524 struct xhci_bw_info
*ep_bw
,
2525 struct xhci_interval_bw_table
*bw_table
,
2526 struct usb_device
*udev
,
2527 struct xhci_virt_ep
*virt_ep
,
2528 struct xhci_tt_bw_info
*tt_info
)
2530 struct xhci_interval_bw
*interval_bw
;
2531 struct xhci_virt_ep
*smaller_ep
;
2532 int normalized_interval
;
2534 if (xhci_is_async_ep(ep_bw
->type
))
2537 if (udev
->speed
== USB_SPEED_SUPER
) {
2538 if (xhci_is_sync_in_ep(ep_bw
->type
))
2539 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2540 xhci_get_ss_bw_consumed(ep_bw
);
2542 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2543 xhci_get_ss_bw_consumed(ep_bw
);
2547 /* For LS/FS devices, we need to translate the interval expressed in
2548 * microframes to frames.
2550 if (udev
->speed
== USB_SPEED_HIGH
)
2551 normalized_interval
= ep_bw
->ep_interval
;
2553 normalized_interval
= ep_bw
->ep_interval
- 3;
2555 if (normalized_interval
== 0)
2556 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2557 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2558 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2559 switch (udev
->speed
) {
2561 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2563 case USB_SPEED_FULL
:
2564 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2566 case USB_SPEED_HIGH
:
2567 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2569 case USB_SPEED_SUPER
:
2570 case USB_SPEED_UNKNOWN
:
2571 case USB_SPEED_WIRELESS
:
2572 /* Should never happen because only LS/FS/HS endpoints will get
2573 * added to the endpoint list.
2579 tt_info
->active_eps
+= 1;
2580 /* Insert the endpoint into the list, largest max packet size first. */
2581 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2583 if (ep_bw
->max_packet_size
>=
2584 smaller_ep
->bw_info
.max_packet_size
) {
2585 /* Add the new ep before the smaller endpoint */
2586 list_add_tail(&virt_ep
->bw_endpoint_list
,
2587 &smaller_ep
->bw_endpoint_list
);
2591 /* Add the new endpoint at the end of the list. */
2592 list_add_tail(&virt_ep
->bw_endpoint_list
,
2593 &interval_bw
->endpoints
);
2596 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2597 struct xhci_virt_device
*virt_dev
,
2600 struct xhci_root_port_bw_info
*rh_bw_info
;
2601 if (!virt_dev
->tt_info
)
2604 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2605 if (old_active_eps
== 0 &&
2606 virt_dev
->tt_info
->active_eps
!= 0) {
2607 rh_bw_info
->num_active_tts
+= 1;
2608 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2609 } else if (old_active_eps
!= 0 &&
2610 virt_dev
->tt_info
->active_eps
== 0) {
2611 rh_bw_info
->num_active_tts
-= 1;
2612 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2616 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2617 struct xhci_virt_device
*virt_dev
,
2618 struct xhci_container_ctx
*in_ctx
)
2620 struct xhci_bw_info ep_bw_info
[31];
2622 struct xhci_input_control_ctx
*ctrl_ctx
;
2623 int old_active_eps
= 0;
2625 if (virt_dev
->tt_info
)
2626 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2628 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2630 for (i
= 0; i
< 31; i
++) {
2631 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2634 /* Make a copy of the BW info in case we need to revert this */
2635 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2636 sizeof(ep_bw_info
[i
]));
2637 /* Drop the endpoint from the interval table if the endpoint is
2638 * being dropped or changed.
2640 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2641 xhci_drop_ep_from_interval_table(xhci
,
2642 &virt_dev
->eps
[i
].bw_info
,
2648 /* Overwrite the information stored in the endpoints' bw_info */
2649 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2650 for (i
= 0; i
< 31; i
++) {
2651 /* Add any changed or added endpoints to the interval table */
2652 if (EP_IS_ADDED(ctrl_ctx
, i
))
2653 xhci_add_ep_to_interval_table(xhci
,
2654 &virt_dev
->eps
[i
].bw_info
,
2661 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2662 /* Ok, this fits in the bandwidth we have.
2663 * Update the number of active TTs.
2665 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2669 /* We don't have enough bandwidth for this, revert the stored info. */
2670 for (i
= 0; i
< 31; i
++) {
2671 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2674 /* Drop the new copies of any added or changed endpoints from
2675 * the interval table.
2677 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2678 xhci_drop_ep_from_interval_table(xhci
,
2679 &virt_dev
->eps
[i
].bw_info
,
2685 /* Revert the endpoint back to its old information */
2686 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2687 sizeof(ep_bw_info
[i
]));
2688 /* Add any changed or dropped endpoints back into the table */
2689 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2690 xhci_add_ep_to_interval_table(xhci
,
2691 &virt_dev
->eps
[i
].bw_info
,
2701 /* Issue a configure endpoint command or evaluate context command
2702 * and wait for it to finish.
2704 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2705 struct usb_device
*udev
,
2706 struct xhci_command
*command
,
2707 bool ctx_change
, bool must_succeed
)
2711 unsigned long flags
;
2712 struct xhci_container_ctx
*in_ctx
;
2713 struct completion
*cmd_completion
;
2715 struct xhci_virt_device
*virt_dev
;
2716 union xhci_trb
*cmd_trb
;
2718 spin_lock_irqsave(&xhci
->lock
, flags
);
2719 virt_dev
= xhci
->devs
[udev
->slot_id
];
2722 in_ctx
= command
->in_ctx
;
2724 in_ctx
= virt_dev
->in_ctx
;
2726 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2727 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2728 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2729 xhci_warn(xhci
, "Not enough host resources, "
2730 "active endpoint contexts = %u\n",
2731 xhci
->num_active_eps
);
2734 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2735 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2736 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2737 xhci_free_host_resources(xhci
, in_ctx
);
2738 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2739 xhci_warn(xhci
, "Not enough bandwidth\n");
2744 cmd_completion
= command
->completion
;
2745 cmd_status
= &command
->status
;
2746 command
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2747 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2749 cmd_completion
= &virt_dev
->cmd_completion
;
2750 cmd_status
= &virt_dev
->cmd_status
;
2752 init_completion(cmd_completion
);
2754 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2756 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2757 udev
->slot_id
, must_succeed
);
2759 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2760 udev
->slot_id
, must_succeed
);
2763 list_del(&command
->cmd_list
);
2764 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2765 xhci_free_host_resources(xhci
, in_ctx
);
2766 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2767 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2770 xhci_ring_cmd_db(xhci
);
2771 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2773 /* Wait for the configure endpoint command to complete */
2774 timeleft
= wait_for_completion_interruptible_timeout(
2776 XHCI_CMD_DEFAULT_TIMEOUT
);
2777 if (timeleft
<= 0) {
2778 xhci_warn(xhci
, "%s while waiting for %s command\n",
2779 timeleft
== 0 ? "Timeout" : "Signal",
2781 "configure endpoint" :
2782 "evaluate context");
2783 /* cancel the configure endpoint command */
2784 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2791 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2793 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2795 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2796 spin_lock_irqsave(&xhci
->lock
, flags
);
2797 /* If the command failed, remove the reserved resources.
2798 * Otherwise, clean up the estimate to include dropped eps.
2801 xhci_free_host_resources(xhci
, in_ctx
);
2803 xhci_finish_resource_reservation(xhci
, in_ctx
);
2804 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2809 /* Called after one or more calls to xhci_add_endpoint() or
2810 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2811 * to call xhci_reset_bandwidth().
2813 * Since we are in the middle of changing either configuration or
2814 * installing a new alt setting, the USB core won't allow URBs to be
2815 * enqueued for any endpoint on the old config or interface. Nothing
2816 * else should be touching the xhci->devs[slot_id] structure, so we
2817 * don't need to take the xhci->lock for manipulating that.
2819 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2823 struct xhci_hcd
*xhci
;
2824 struct xhci_virt_device
*virt_dev
;
2825 struct xhci_input_control_ctx
*ctrl_ctx
;
2826 struct xhci_slot_ctx
*slot_ctx
;
2828 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2831 xhci
= hcd_to_xhci(hcd
);
2832 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
2833 (xhci
->xhc_state
& XHCI_STATE_REMOVING
))
2836 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2837 virt_dev
= xhci
->devs
[udev
->slot_id
];
2839 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2840 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2841 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2842 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2843 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2845 /* Don't issue the command if there's no endpoints to update. */
2846 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2847 ctrl_ctx
->drop_flags
== 0)
2850 xhci_dbg(xhci
, "New Input Control Context:\n");
2851 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2852 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2853 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2855 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2858 /* Callee should call reset_bandwidth() */
2862 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2863 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2864 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2866 /* Free any rings that were dropped, but not changed. */
2867 for (i
= 1; i
< 31; ++i
) {
2868 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2869 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2870 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2872 xhci_zero_in_ctx(xhci
, virt_dev
);
2874 * Install any rings for completely new endpoints or changed endpoints,
2875 * and free or cache any old rings from changed endpoints.
2877 for (i
= 1; i
< 31; ++i
) {
2878 if (!virt_dev
->eps
[i
].new_ring
)
2880 /* Only cache or free the old ring if it exists.
2881 * It may not if this is the first add of an endpoint.
2883 if (virt_dev
->eps
[i
].ring
) {
2884 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2886 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2887 virt_dev
->eps
[i
].new_ring
= NULL
;
2893 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2895 struct xhci_hcd
*xhci
;
2896 struct xhci_virt_device
*virt_dev
;
2899 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2902 xhci
= hcd_to_xhci(hcd
);
2904 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2905 virt_dev
= xhci
->devs
[udev
->slot_id
];
2906 /* Free any rings allocated for added endpoints */
2907 for (i
= 0; i
< 31; ++i
) {
2908 if (virt_dev
->eps
[i
].new_ring
) {
2909 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2910 virt_dev
->eps
[i
].new_ring
= NULL
;
2913 xhci_zero_in_ctx(xhci
, virt_dev
);
2916 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2917 struct xhci_container_ctx
*in_ctx
,
2918 struct xhci_container_ctx
*out_ctx
,
2919 u32 add_flags
, u32 drop_flags
)
2921 struct xhci_input_control_ctx
*ctrl_ctx
;
2922 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2923 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2924 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2925 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2926 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2928 xhci_dbg(xhci
, "Input Context:\n");
2929 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2932 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2933 unsigned int slot_id
, unsigned int ep_index
,
2934 struct xhci_dequeue_state
*deq_state
)
2936 struct xhci_container_ctx
*in_ctx
;
2937 struct xhci_ep_ctx
*ep_ctx
;
2941 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2942 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2943 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2944 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2945 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2946 deq_state
->new_deq_ptr
);
2948 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2949 "reset ep command\n");
2950 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2951 deq_state
->new_deq_seg
,
2952 deq_state
->new_deq_ptr
);
2955 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2957 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2958 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2959 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2962 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2963 struct usb_device
*udev
, unsigned int ep_index
)
2965 struct xhci_dequeue_state deq_state
;
2966 struct xhci_virt_ep
*ep
;
2968 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2969 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2970 /* We need to move the HW's dequeue pointer past this TD,
2971 * or it will attempt to resend it on the next doorbell ring.
2973 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2974 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2977 /* HW with the reset endpoint quirk will use the saved dequeue state to
2978 * issue a configure endpoint command later.
2980 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2981 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2982 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2983 ep_index
, ep
->stopped_stream
, &deq_state
);
2985 /* Better hope no one uses the input context between now and the
2986 * reset endpoint completion!
2987 * XXX: No idea how this hardware will react when stream rings
2990 xhci_dbg(xhci
, "Setting up input context for "
2991 "configure endpoint command\n");
2992 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2993 ep_index
, &deq_state
);
2997 /* Deal with stalled endpoints. The core should have sent the control message
2998 * to clear the halt condition. However, we need to make the xHCI hardware
2999 * reset its sequence number, since a device will expect a sequence number of
3000 * zero after the halt condition is cleared.
3001 * Context: in_interrupt
3003 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
3004 struct usb_host_endpoint
*ep
)
3006 struct xhci_hcd
*xhci
;
3007 struct usb_device
*udev
;
3008 unsigned int ep_index
;
3009 unsigned long flags
;
3011 struct xhci_virt_ep
*virt_ep
;
3013 xhci
= hcd_to_xhci(hcd
);
3014 udev
= (struct usb_device
*) ep
->hcpriv
;
3015 /* Called with a root hub endpoint (or an endpoint that wasn't added
3016 * with xhci_add_endpoint()
3020 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
3021 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
3022 if (!virt_ep
->stopped_td
) {
3023 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
3024 ep
->desc
.bEndpointAddress
);
3027 if (usb_endpoint_xfer_control(&ep
->desc
)) {
3028 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
3032 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
3033 spin_lock_irqsave(&xhci
->lock
, flags
);
3034 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
3036 * Can't change the ring dequeue pointer until it's transitioned to the
3037 * stopped state, which is only upon a successful reset endpoint
3038 * command. Better hope that last command worked!
3041 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
3042 kfree(virt_ep
->stopped_td
);
3043 xhci_ring_cmd_db(xhci
);
3045 virt_ep
->stopped_td
= NULL
;
3046 virt_ep
->stopped_trb
= NULL
;
3047 virt_ep
->stopped_stream
= 0;
3048 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3051 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
3054 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
3055 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
3056 unsigned int slot_id
)
3059 unsigned int ep_index
;
3060 unsigned int ep_state
;
3064 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
3067 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
3068 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
3069 " descriptor for ep 0x%x does not support streams\n",
3070 ep
->desc
.bEndpointAddress
);
3074 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
3075 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3076 if (ep_state
& EP_HAS_STREAMS
||
3077 ep_state
& EP_GETTING_STREAMS
) {
3078 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
3079 "already has streams set up.\n",
3080 ep
->desc
.bEndpointAddress
);
3081 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
3082 "dynamic stream context array reallocation.\n");
3085 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
3086 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
3087 "endpoint 0x%x; URBs are pending.\n",
3088 ep
->desc
.bEndpointAddress
);
3094 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
3095 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
3097 unsigned int max_streams
;
3099 /* The stream context array size must be a power of two */
3100 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
3102 * Find out how many primary stream array entries the host controller
3103 * supports. Later we may use secondary stream arrays (similar to 2nd
3104 * level page entries), but that's an optional feature for xHCI host
3105 * controllers. xHCs must support at least 4 stream IDs.
3107 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
3108 if (*num_stream_ctxs
> max_streams
) {
3109 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
3111 *num_stream_ctxs
= max_streams
;
3112 *num_streams
= max_streams
;
3116 /* Returns an error code if one of the endpoint already has streams.
3117 * This does not change any data structures, it only checks and gathers
3120 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
3121 struct usb_device
*udev
,
3122 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3123 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
3125 unsigned int max_streams
;
3126 unsigned int endpoint_flag
;
3130 for (i
= 0; i
< num_eps
; i
++) {
3131 ret
= xhci_check_streams_endpoint(xhci
, udev
,
3132 eps
[i
], udev
->slot_id
);
3136 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3137 if (max_streams
< (*num_streams
- 1)) {
3138 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3139 eps
[i
]->desc
.bEndpointAddress
,
3141 *num_streams
= max_streams
+1;
3144 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3145 if (*changed_ep_bitmask
& endpoint_flag
)
3147 *changed_ep_bitmask
|= endpoint_flag
;
3152 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3153 struct usb_device
*udev
,
3154 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3156 u32 changed_ep_bitmask
= 0;
3157 unsigned int slot_id
;
3158 unsigned int ep_index
;
3159 unsigned int ep_state
;
3162 slot_id
= udev
->slot_id
;
3163 if (!xhci
->devs
[slot_id
])
3166 for (i
= 0; i
< num_eps
; i
++) {
3167 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3168 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3169 /* Are streams already being freed for the endpoint? */
3170 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3171 xhci_warn(xhci
, "WARN Can't disable streams for "
3173 "streams are being disabled already.",
3174 eps
[i
]->desc
.bEndpointAddress
);
3177 /* Are there actually any streams to free? */
3178 if (!(ep_state
& EP_HAS_STREAMS
) &&
3179 !(ep_state
& EP_GETTING_STREAMS
)) {
3180 xhci_warn(xhci
, "WARN Can't disable streams for "
3182 "streams are already disabled!",
3183 eps
[i
]->desc
.bEndpointAddress
);
3184 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3185 "with non-streams endpoint\n");
3188 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3190 return changed_ep_bitmask
;
3194 * The USB device drivers use this function (though the HCD interface in USB
3195 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3196 * coordinate mass storage command queueing across multiple endpoints (basically
3197 * a stream ID == a task ID).
3199 * Setting up streams involves allocating the same size stream context array
3200 * for each endpoint and issuing a configure endpoint command for all endpoints.
3202 * Don't allow the call to succeed if one endpoint only supports one stream
3203 * (which means it doesn't support streams at all).
3205 * Drivers may get less stream IDs than they asked for, if the host controller
3206 * hardware or endpoints claim they can't support the number of requested
3209 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3210 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3211 unsigned int num_streams
, gfp_t mem_flags
)
3214 struct xhci_hcd
*xhci
;
3215 struct xhci_virt_device
*vdev
;
3216 struct xhci_command
*config_cmd
;
3217 unsigned int ep_index
;
3218 unsigned int num_stream_ctxs
;
3219 unsigned long flags
;
3220 u32 changed_ep_bitmask
= 0;
3225 /* Add one to the number of streams requested to account for
3226 * stream 0 that is reserved for xHCI usage.
3229 xhci
= hcd_to_xhci(hcd
);
3230 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3233 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3235 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3239 /* Check to make sure all endpoints are not already configured for
3240 * streams. While we're at it, find the maximum number of streams that
3241 * all the endpoints will support and check for duplicate endpoints.
3243 spin_lock_irqsave(&xhci
->lock
, flags
);
3244 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3245 num_eps
, &num_streams
, &changed_ep_bitmask
);
3247 xhci_free_command(xhci
, config_cmd
);
3248 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3251 if (num_streams
<= 1) {
3252 xhci_warn(xhci
, "WARN: endpoints can't handle "
3253 "more than one stream.\n");
3254 xhci_free_command(xhci
, config_cmd
);
3255 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3258 vdev
= xhci
->devs
[udev
->slot_id
];
3259 /* Mark each endpoint as being in transition, so
3260 * xhci_urb_enqueue() will reject all URBs.
3262 for (i
= 0; i
< num_eps
; i
++) {
3263 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3264 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3266 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3268 /* Setup internal data structures and allocate HW data structures for
3269 * streams (but don't install the HW structures in the input context
3270 * until we're sure all memory allocation succeeded).
3272 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3273 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3274 num_stream_ctxs
, num_streams
);
3276 for (i
= 0; i
< num_eps
; i
++) {
3277 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3278 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3280 num_streams
, mem_flags
);
3281 if (!vdev
->eps
[ep_index
].stream_info
)
3283 /* Set maxPstreams in endpoint context and update deq ptr to
3284 * point to stream context array. FIXME
3288 /* Set up the input context for a configure endpoint command. */
3289 for (i
= 0; i
< num_eps
; i
++) {
3290 struct xhci_ep_ctx
*ep_ctx
;
3292 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3293 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3295 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3296 vdev
->out_ctx
, ep_index
);
3297 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3298 vdev
->eps
[ep_index
].stream_info
);
3300 /* Tell the HW to drop its old copy of the endpoint context info
3301 * and add the updated copy from the input context.
3303 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3304 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3306 /* Issue and wait for the configure endpoint command */
3307 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3310 /* xHC rejected the configure endpoint command for some reason, so we
3311 * leave the old ring intact and free our internal streams data
3317 spin_lock_irqsave(&xhci
->lock
, flags
);
3318 for (i
= 0; i
< num_eps
; i
++) {
3319 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3320 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3321 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3322 udev
->slot_id
, ep_index
);
3323 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3325 xhci_free_command(xhci
, config_cmd
);
3326 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3328 /* Subtract 1 for stream 0, which drivers can't use */
3329 return num_streams
- 1;
3332 /* If it didn't work, free the streams! */
3333 for (i
= 0; i
< num_eps
; i
++) {
3334 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3335 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3336 vdev
->eps
[ep_index
].stream_info
= NULL
;
3337 /* FIXME Unset maxPstreams in endpoint context and
3338 * update deq ptr to point to normal string ring.
3340 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3341 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3342 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3344 xhci_free_command(xhci
, config_cmd
);
3348 /* Transition the endpoint from using streams to being a "normal" endpoint
3351 * Modify the endpoint context state, submit a configure endpoint command,
3352 * and free all endpoint rings for streams if that completes successfully.
3354 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3355 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3359 struct xhci_hcd
*xhci
;
3360 struct xhci_virt_device
*vdev
;
3361 struct xhci_command
*command
;
3362 unsigned int ep_index
;
3363 unsigned long flags
;
3364 u32 changed_ep_bitmask
;
3366 xhci
= hcd_to_xhci(hcd
);
3367 vdev
= xhci
->devs
[udev
->slot_id
];
3369 /* Set up a configure endpoint command to remove the streams rings */
3370 spin_lock_irqsave(&xhci
->lock
, flags
);
3371 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3372 udev
, eps
, num_eps
);
3373 if (changed_ep_bitmask
== 0) {
3374 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3378 /* Use the xhci_command structure from the first endpoint. We may have
3379 * allocated too many, but the driver may call xhci_free_streams() for
3380 * each endpoint it grouped into one call to xhci_alloc_streams().
3382 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3383 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3384 for (i
= 0; i
< num_eps
; i
++) {
3385 struct xhci_ep_ctx
*ep_ctx
;
3387 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3388 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3389 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3390 EP_GETTING_NO_STREAMS
;
3392 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3393 vdev
->out_ctx
, ep_index
);
3394 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3395 &vdev
->eps
[ep_index
]);
3397 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3398 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3399 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3401 /* Issue and wait for the configure endpoint command,
3402 * which must succeed.
3404 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3407 /* xHC rejected the configure endpoint command for some reason, so we
3408 * leave the streams rings intact.
3413 spin_lock_irqsave(&xhci
->lock
, flags
);
3414 for (i
= 0; i
< num_eps
; i
++) {
3415 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3416 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3417 vdev
->eps
[ep_index
].stream_info
= NULL
;
3418 /* FIXME Unset maxPstreams in endpoint context and
3419 * update deq ptr to point to normal string ring.
3421 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3422 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3424 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3430 * Deletes endpoint resources for endpoints that were active before a Reset
3431 * Device command, or a Disable Slot command. The Reset Device command leaves
3432 * the control endpoint intact, whereas the Disable Slot command deletes it.
3434 * Must be called with xhci->lock held.
3436 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3437 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3440 unsigned int num_dropped_eps
= 0;
3441 unsigned int drop_flags
= 0;
3443 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3444 if (virt_dev
->eps
[i
].ring
) {
3445 drop_flags
|= 1 << i
;
3449 xhci
->num_active_eps
-= num_dropped_eps
;
3450 if (num_dropped_eps
)
3451 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3453 num_dropped_eps
, drop_flags
,
3454 xhci
->num_active_eps
);
3458 * This submits a Reset Device Command, which will set the device state to 0,
3459 * set the device address to 0, and disable all the endpoints except the default
3460 * control endpoint. The USB core should come back and call
3461 * xhci_address_device(), and then re-set up the configuration. If this is
3462 * called because of a usb_reset_and_verify_device(), then the old alternate
3463 * settings will be re-installed through the normal bandwidth allocation
3466 * Wait for the Reset Device command to finish. Remove all structures
3467 * associated with the endpoints that were disabled. Clear the input device
3468 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3470 * If the virt_dev to be reset does not exist or does not match the udev,
3471 * it means the device is lost, possibly due to the xHC restore error and
3472 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3473 * re-allocate the device.
3475 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3478 unsigned long flags
;
3479 struct xhci_hcd
*xhci
;
3480 unsigned int slot_id
;
3481 struct xhci_virt_device
*virt_dev
;
3482 struct xhci_command
*reset_device_cmd
;
3484 int last_freed_endpoint
;
3485 struct xhci_slot_ctx
*slot_ctx
;
3486 int old_active_eps
= 0;
3488 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3491 xhci
= hcd_to_xhci(hcd
);
3492 slot_id
= udev
->slot_id
;
3493 virt_dev
= xhci
->devs
[slot_id
];
3495 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3496 "not exist. Re-allocate the device\n", slot_id
);
3497 ret
= xhci_alloc_dev(hcd
, udev
);
3504 if (virt_dev
->tt_info
)
3505 old_active_eps
= virt_dev
->tt_info
->active_eps
;
3507 if (virt_dev
->udev
!= udev
) {
3508 /* If the virt_dev and the udev does not match, this virt_dev
3509 * may belong to another udev.
3510 * Re-allocate the device.
3512 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3513 "not match the udev. Re-allocate the device\n",
3515 ret
= xhci_alloc_dev(hcd
, udev
);
3522 /* If device is not setup, there is no point in resetting it */
3523 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3524 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3525 SLOT_STATE_DISABLED
)
3528 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3529 /* Allocate the command structure that holds the struct completion.
3530 * Assume we're in process context, since the normal device reset
3531 * process has to wait for the device anyway. Storage devices are
3532 * reset as part of error handling, so use GFP_NOIO instead of
3535 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3536 if (!reset_device_cmd
) {
3537 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3541 /* Attempt to submit the Reset Device command to the command ring */
3542 spin_lock_irqsave(&xhci
->lock
, flags
);
3543 reset_device_cmd
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3545 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3546 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3548 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3549 list_del(&reset_device_cmd
->cmd_list
);
3550 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3551 goto command_cleanup
;
3553 xhci_ring_cmd_db(xhci
);
3554 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3556 /* Wait for the Reset Device command to finish */
3557 timeleft
= wait_for_completion_interruptible_timeout(
3558 reset_device_cmd
->completion
,
3559 USB_CTRL_SET_TIMEOUT
);
3560 if (timeleft
<= 0) {
3561 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3562 timeleft
== 0 ? "Timeout" : "Signal");
3563 spin_lock_irqsave(&xhci
->lock
, flags
);
3564 /* The timeout might have raced with the event ring handler, so
3565 * only delete from the list if the item isn't poisoned.
3567 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3568 list_del(&reset_device_cmd
->cmd_list
);
3569 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3571 goto command_cleanup
;
3574 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3575 * unless we tried to reset a slot ID that wasn't enabled,
3576 * or the device wasn't in the addressed or configured state.
3578 ret
= reset_device_cmd
->status
;
3580 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3581 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3582 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3584 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3585 xhci_info(xhci
, "Not freeing device rings.\n");
3586 /* Don't treat this as an error. May change my mind later. */
3588 goto command_cleanup
;
3590 xhci_dbg(xhci
, "Successful reset device command.\n");
3593 if (xhci_is_vendor_info_code(xhci
, ret
))
3595 xhci_warn(xhci
, "Unknown completion code %u for "
3596 "reset device command.\n", ret
);
3598 goto command_cleanup
;
3601 /* Free up host controller endpoint resources */
3602 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3603 spin_lock_irqsave(&xhci
->lock
, flags
);
3604 /* Don't delete the default control endpoint resources */
3605 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3606 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3609 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3610 last_freed_endpoint
= 1;
3611 for (i
= 1; i
< 31; ++i
) {
3612 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3614 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3615 xhci_free_stream_info(xhci
, ep
->stream_info
);
3616 ep
->stream_info
= NULL
;
3617 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3621 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3622 last_freed_endpoint
= i
;
3624 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3625 xhci_drop_ep_from_interval_table(xhci
,
3626 &virt_dev
->eps
[i
].bw_info
,
3631 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3633 /* If necessary, update the number of active TTs on this root port */
3634 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3636 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3637 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3641 xhci_free_command(xhci
, reset_device_cmd
);
3646 * At this point, the struct usb_device is about to go away, the device has
3647 * disconnected, and all traffic has been stopped and the endpoints have been
3648 * disabled. Free any HC data structures associated with that device.
3650 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3652 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3653 struct xhci_virt_device
*virt_dev
;
3654 #ifndef CONFIG_USB_DEFAULT_PERSIST
3655 struct device
*dev
= hcd
->self
.controller
;
3657 unsigned long flags
;
3661 #ifndef CONFIG_USB_DEFAULT_PERSIST
3663 * We called pm_runtime_get_noresume when the device was attached.
3664 * Decrement the counter here to allow controller to runtime suspend
3665 * if no devices remain.
3667 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3668 pm_runtime_put_noidle(dev
);
3671 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3672 /* If the host is halted due to driver unload, we still need to free the
3675 if (ret
<= 0 && ret
!= -ENODEV
)
3678 virt_dev
= xhci
->devs
[udev
->slot_id
];
3680 /* Stop any wayward timer functions (which may grab the lock) */
3681 for (i
= 0; i
< 31; ++i
) {
3682 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3683 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3686 if (udev
->usb2_hw_lpm_enabled
) {
3687 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3688 udev
->usb2_hw_lpm_enabled
= 0;
3691 spin_lock_irqsave(&xhci
->lock
, flags
);
3692 /* Don't disable the slot if the host controller is dead. */
3693 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3694 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3695 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3696 xhci_free_virt_device(xhci
, udev
->slot_id
);
3697 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3701 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3702 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3703 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3706 xhci_ring_cmd_db(xhci
);
3707 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3709 * Event command completion handler will free any data structures
3710 * associated with the slot. XXX Can free sleep?
3715 * Checks if we have enough host controller resources for the default control
3718 * Must be called with xhci->lock held.
3720 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3722 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3723 xhci_dbg(xhci
, "Not enough ep ctxs: "
3724 "%u active, need to add 1, limit is %u.\n",
3725 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3728 xhci
->num_active_eps
+= 1;
3729 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3730 xhci
->num_active_eps
);
3736 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3737 * timed out, or allocating memory failed. Returns 1 on success.
3739 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3741 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3742 struct device
*dev
= hcd
->self
.controller
;
3743 unsigned long flags
;
3746 union xhci_trb
*cmd_trb
;
3748 spin_lock_irqsave(&xhci
->lock
, flags
);
3749 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3750 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3752 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3753 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3756 xhci_ring_cmd_db(xhci
);
3757 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3759 /* XXX: how much time for xHC slot assignment? */
3760 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3761 XHCI_CMD_DEFAULT_TIMEOUT
);
3762 if (timeleft
<= 0) {
3763 xhci_warn(xhci
, "%s while waiting for a slot\n",
3764 timeleft
== 0 ? "Timeout" : "Signal");
3765 /* cancel the enable slot request */
3766 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3769 if (!xhci
->slot_id
) {
3770 xhci_err(xhci
, "Error while assigning device slot ID\n");
3774 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3775 spin_lock_irqsave(&xhci
->lock
, flags
);
3776 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3778 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3779 xhci_warn(xhci
, "Not enough host resources, "
3780 "active endpoint contexts = %u\n",
3781 xhci
->num_active_eps
);
3784 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3786 /* Use GFP_NOIO, since this function can be called from
3787 * xhci_discover_or_reset_device(), which may be called as part of
3788 * mass storage driver error handling.
3790 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3791 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3794 udev
->slot_id
= xhci
->slot_id
;
3796 #ifndef CONFIG_USB_DEFAULT_PERSIST
3798 * If resetting upon resume, we can't put the controller into runtime
3799 * suspend if there is a device attached.
3801 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3802 pm_runtime_get_noresume(dev
);
3805 /* Is this a LS or FS device under a HS hub? */
3806 /* Hub or peripherial? */
3810 /* Disable slot, if we can do it without mem alloc */
3811 spin_lock_irqsave(&xhci
->lock
, flags
);
3812 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3813 xhci_ring_cmd_db(xhci
);
3814 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3819 * Issue an Address Device command (which will issue a SetAddress request to
3821 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3822 * we should only issue and wait on one address command at the same time.
3824 * We add one to the device address issued by the hardware because the USB core
3825 * uses address 1 for the root hubs (even though they're not really devices).
3827 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3829 unsigned long flags
;
3831 struct xhci_virt_device
*virt_dev
;
3833 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3834 struct xhci_slot_ctx
*slot_ctx
;
3835 struct xhci_input_control_ctx
*ctrl_ctx
;
3837 union xhci_trb
*cmd_trb
;
3839 if (!udev
->slot_id
) {
3840 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3844 virt_dev
= xhci
->devs
[udev
->slot_id
];
3846 if (WARN_ON(!virt_dev
)) {
3848 * In plug/unplug torture test with an NEC controller,
3849 * a zero-dereference was observed once due to virt_dev = 0.
3850 * Print useful debug rather than crash if it is observed again!
3852 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3857 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3859 * If this is the first Set Address since device plug-in or
3860 * virt_device realloaction after a resume with an xHCI power loss,
3861 * then set up the slot context.
3863 if (!slot_ctx
->dev_info
)
3864 xhci_setup_addressable_virt_dev(xhci
, udev
);
3865 /* Otherwise, update the control endpoint ring enqueue pointer. */
3867 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3868 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3869 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3870 ctrl_ctx
->drop_flags
= 0;
3872 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3873 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3875 spin_lock_irqsave(&xhci
->lock
, flags
);
3876 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3877 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3880 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3881 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3884 xhci_ring_cmd_db(xhci
);
3885 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3887 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3888 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3889 XHCI_CMD_DEFAULT_TIMEOUT
);
3890 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3891 * the SetAddress() "recovery interval" required by USB and aborting the
3892 * command on a timeout.
3894 if (timeleft
<= 0) {
3895 xhci_warn(xhci
, "%s while waiting for address device command\n",
3896 timeleft
== 0 ? "Timeout" : "Signal");
3897 /* cancel the address device command */
3898 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3904 switch (virt_dev
->cmd_status
) {
3905 case COMP_CTX_STATE
:
3907 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3912 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3916 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3917 "device command.\n");
3921 xhci_dbg(xhci
, "Successful Address Device command\n");
3924 xhci_err(xhci
, "ERROR: unexpected command completion "
3925 "code 0x%x.\n", virt_dev
->cmd_status
);
3926 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3927 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3934 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3935 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3936 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3938 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3939 (unsigned long long)
3940 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3941 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3942 (unsigned long long)virt_dev
->out_ctx
->dma
);
3943 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3944 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3945 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3946 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3948 * USB core uses address 1 for the roothubs, so we add one to the
3949 * address given back to us by the HC.
3951 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3952 /* Use kernel assigned address for devices; store xHC assigned
3953 * address locally. */
3954 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3956 /* Zero the input context control for later use */
3957 ctrl_ctx
->add_flags
= 0;
3958 ctrl_ctx
->drop_flags
= 0;
3960 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3966 * Transfer the port index into real index in the HW port status
3967 * registers. Caculate offset between the port's PORTSC register
3968 * and port status base. Divide the number of per port register
3969 * to get the real index. The raw port number bases 1.
3971 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3973 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3974 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3975 __le32 __iomem
*addr
;
3978 if (hcd
->speed
!= HCD_USB3
)
3979 addr
= xhci
->usb2_ports
[port1
- 1];
3981 addr
= xhci
->usb3_ports
[port1
- 1];
3983 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3987 #ifdef CONFIG_PM_RUNTIME
3989 /* BESL to HIRD Encoding array for USB2 LPM */
3990 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3991 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3993 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3994 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3995 struct usb_device
*udev
)
3997 int u2del
, besl
, besl_host
;
3998 int besl_device
= 0;
4001 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
4002 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4004 if (field
& USB_BESL_SUPPORT
) {
4005 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
4006 if (xhci_besl_encoding
[besl_host
] >= u2del
)
4009 /* Use baseline BESL value as default */
4010 if (field
& USB_BESL_BASELINE_VALID
)
4011 besl_device
= USB_GET_BESL_BASELINE(field
);
4012 else if (field
& USB_BESL_DEEP_VALID
)
4013 besl_device
= USB_GET_BESL_DEEP(field
);
4018 besl_host
= (u2del
- 51) / 75 + 1;
4021 besl
= besl_host
+ besl_device
;
4028 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
4029 struct usb_device
*udev
)
4031 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4032 struct dev_info
*dev_info
;
4033 __le32 __iomem
**port_array
;
4034 __le32 __iomem
*addr
, *pm_addr
;
4036 unsigned int port_num
;
4037 unsigned long flags
;
4041 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
4045 /* we only support lpm for non-hub device connected to root hub yet */
4046 if (!udev
->parent
|| udev
->parent
->parent
||
4047 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4050 spin_lock_irqsave(&xhci
->lock
, flags
);
4052 /* Look for devices in lpm_failed_devs list */
4053 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
4054 le16_to_cpu(udev
->descriptor
.idProduct
);
4055 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
4056 if (dev_info
->dev_id
== dev_id
) {
4062 port_array
= xhci
->usb2_ports
;
4063 port_num
= udev
->portnum
- 1;
4065 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
4066 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
4072 * Test USB 2.0 software LPM.
4073 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4074 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4075 * in the June 2011 errata release.
4077 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
4079 * Set L1 Device Slot and HIRD/BESL.
4080 * Check device's USB 2.0 extension descriptor to determine whether
4081 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4083 pm_addr
= port_array
[port_num
] + 1;
4084 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4085 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
4086 xhci_writel(xhci
, temp
, pm_addr
);
4088 /* Set port link state to U2(L1) */
4089 addr
= port_array
[port_num
];
4090 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
4093 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4095 spin_lock_irqsave(&xhci
->lock
, flags
);
4097 /* Check L1 Status */
4098 ret
= xhci_handshake(xhci
, pm_addr
,
4099 PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
4100 if (ret
!= -ETIMEDOUT
) {
4101 /* enter L1 successfully */
4102 temp
= xhci_readl(xhci
, addr
);
4103 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
4107 temp
= xhci_readl(xhci
, pm_addr
);
4108 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
4109 port_num
, temp
& PORT_L1S_MASK
);
4113 /* Resume the port */
4114 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
4116 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4118 spin_lock_irqsave(&xhci
->lock
, flags
);
4121 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
4123 /* Check PORTSC to make sure the device is in the right state */
4125 temp
= xhci_readl(xhci
, addr
);
4126 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
4127 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
4128 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
4129 xhci_dbg(xhci
, "port L1 resume fail\n");
4135 /* Insert dev to lpm_failed_devs list */
4136 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
4138 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
4143 dev_info
->dev_id
= dev_id
;
4144 INIT_LIST_HEAD(&dev_info
->list
);
4145 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
4147 xhci_ring_device(xhci
, udev
->slot_id
);
4151 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4155 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4156 struct usb_device
*udev
, int enable
)
4158 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4159 __le32 __iomem
**port_array
;
4160 __le32 __iomem
*pm_addr
;
4162 unsigned int port_num
;
4163 unsigned long flags
;
4166 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
4170 if (!udev
->parent
|| udev
->parent
->parent
||
4171 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4174 if (udev
->usb2_hw_lpm_capable
!= 1)
4177 spin_lock_irqsave(&xhci
->lock
, flags
);
4179 port_array
= xhci
->usb2_ports
;
4180 port_num
= udev
->portnum
- 1;
4181 pm_addr
= port_array
[port_num
] + 1;
4182 temp
= xhci_readl(xhci
, pm_addr
);
4184 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4185 enable
? "enable" : "disable", port_num
);
4187 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4190 temp
&= ~PORT_HIRD_MASK
;
4191 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
4192 xhci_writel(xhci
, temp
, pm_addr
);
4193 temp
= xhci_readl(xhci
, pm_addr
);
4195 xhci_writel(xhci
, temp
, pm_addr
);
4197 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
4198 xhci_writel(xhci
, temp
, pm_addr
);
4201 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4205 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4207 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4210 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
4212 xhci_dbg(xhci
, "software LPM test succeed\n");
4213 if (xhci
->hw_lpm_support
== 1) {
4214 udev
->usb2_hw_lpm_capable
= 1;
4215 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
4217 udev
->usb2_hw_lpm_enabled
= 1;
4226 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4227 struct usb_device
*udev
, int enable
)
4232 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4237 #endif /* CONFIG_PM_RUNTIME */
4239 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4242 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4243 static unsigned long long xhci_service_interval_to_ns(
4244 struct usb_endpoint_descriptor
*desc
)
4246 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4249 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4250 enum usb3_link_state state
)
4252 unsigned long long sel
;
4253 unsigned long long pel
;
4254 unsigned int max_sel_pel
;
4259 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4260 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4261 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4262 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4266 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4267 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4268 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4272 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4274 return USB3_LPM_DISABLED
;
4277 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4278 return USB3_LPM_DEVICE_INITIATED
;
4280 if (sel
> max_sel_pel
)
4281 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4282 "due to long SEL %llu ms\n",
4285 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4286 "due to long PEL %llu\n ms",
4288 return USB3_LPM_DISABLED
;
4291 /* Returns the hub-encoded U1 timeout value.
4292 * The U1 timeout should be the maximum of the following values:
4293 * - For control endpoints, U1 system exit latency (SEL) * 3
4294 * - For bulk endpoints, U1 SEL * 5
4295 * - For interrupt endpoints:
4296 * - Notification EPs, U1 SEL * 3
4297 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4298 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4300 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4301 struct usb_endpoint_descriptor
*desc
)
4303 unsigned long long timeout_ns
;
4307 ep_type
= usb_endpoint_type(desc
);
4309 case USB_ENDPOINT_XFER_CONTROL
:
4310 timeout_ns
= udev
->u1_params
.sel
* 3;
4312 case USB_ENDPOINT_XFER_BULK
:
4313 timeout_ns
= udev
->u1_params
.sel
* 5;
4315 case USB_ENDPOINT_XFER_INT
:
4316 intr_type
= usb_endpoint_interrupt_type(desc
);
4317 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4318 timeout_ns
= udev
->u1_params
.sel
* 3;
4321 /* Otherwise the calculation is the same as isoc eps */
4322 case USB_ENDPOINT_XFER_ISOC
:
4323 timeout_ns
= xhci_service_interval_to_ns(desc
);
4324 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4325 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4326 timeout_ns
= udev
->u1_params
.sel
* 2;
4332 /* The U1 timeout is encoded in 1us intervals. */
4333 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4334 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4335 if (timeout_ns
== USB3_LPM_DISABLED
)
4338 /* If the necessary timeout value is bigger than what we can set in the
4339 * USB 3.0 hub, we have to disable hub-initiated U1.
4341 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4343 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4344 "due to long timeout %llu ms\n", timeout_ns
);
4345 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4348 /* Returns the hub-encoded U2 timeout value.
4349 * The U2 timeout should be the maximum of:
4350 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4351 * - largest bInterval of any active periodic endpoint (to avoid going
4352 * into lower power link states between intervals).
4353 * - the U2 Exit Latency of the device
4355 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4356 struct usb_endpoint_descriptor
*desc
)
4358 unsigned long long timeout_ns
;
4359 unsigned long long u2_del_ns
;
4361 timeout_ns
= 10 * 1000 * 1000;
4363 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4364 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4365 timeout_ns
= xhci_service_interval_to_ns(desc
);
4367 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4368 if (u2_del_ns
> timeout_ns
)
4369 timeout_ns
= u2_del_ns
;
4371 /* The U2 timeout is encoded in 256us intervals */
4372 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4373 /* If the necessary timeout value is bigger than what we can set in the
4374 * USB 3.0 hub, we have to disable hub-initiated U2.
4376 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4378 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4379 "due to long timeout %llu ms\n", timeout_ns
);
4380 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4383 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4384 struct usb_device
*udev
,
4385 struct usb_endpoint_descriptor
*desc
,
4386 enum usb3_link_state state
,
4389 if (state
== USB3_LPM_U1
) {
4390 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4391 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4393 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4394 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4397 return USB3_LPM_DISABLED
;
4400 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4401 struct usb_device
*udev
,
4402 struct usb_endpoint_descriptor
*desc
,
4403 enum usb3_link_state state
,
4408 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4409 desc
, state
, timeout
);
4411 /* If we found we can't enable hub-initiated LPM, or
4412 * the U1 or U2 exit latency was too high to allow
4413 * device-initiated LPM as well, just stop searching.
4415 if (alt_timeout
== USB3_LPM_DISABLED
||
4416 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4417 *timeout
= alt_timeout
;
4420 if (alt_timeout
> *timeout
)
4421 *timeout
= alt_timeout
;
4425 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4426 struct usb_device
*udev
,
4427 struct usb_host_interface
*alt
,
4428 enum usb3_link_state state
,
4433 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4434 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4435 &alt
->endpoint
[j
].desc
, state
, timeout
))
4442 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4443 enum usb3_link_state state
)
4445 struct usb_device
*parent
;
4446 unsigned int num_hubs
;
4448 if (state
== USB3_LPM_U2
)
4451 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4452 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4453 parent
= parent
->parent
)
4459 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4460 " below second-tier hub.\n");
4461 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4462 "to decrease power consumption.\n");
4466 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4467 struct usb_device
*udev
,
4468 enum usb3_link_state state
)
4470 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4471 return xhci_check_intel_tier_policy(udev
, state
);
4475 /* Returns the U1 or U2 timeout that should be enabled.
4476 * If the tier check or timeout setting functions return with a non-zero exit
4477 * code, that means the timeout value has been finalized and we shouldn't look
4478 * at any more endpoints.
4480 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4481 struct usb_device
*udev
, enum usb3_link_state state
)
4483 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4484 struct usb_host_config
*config
;
4487 u16 timeout
= USB3_LPM_DISABLED
;
4489 if (state
== USB3_LPM_U1
)
4491 else if (state
== USB3_LPM_U2
)
4494 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4499 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4502 /* Gather some information about the currently installed configuration
4503 * and alternate interface settings.
4505 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4509 config
= udev
->actconfig
;
4513 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4514 struct usb_driver
*driver
;
4515 struct usb_interface
*intf
= config
->interface
[i
];
4520 /* Check if any currently bound drivers want hub-initiated LPM
4523 if (intf
->dev
.driver
) {
4524 driver
= to_usb_driver(intf
->dev
.driver
);
4525 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4526 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4527 "at request of driver %s\n",
4528 state_name
, driver
->name
);
4529 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4533 /* Not sure how this could happen... */
4534 if (!intf
->cur_altsetting
)
4537 if (xhci_update_timeout_for_interface(xhci
, udev
,
4538 intf
->cur_altsetting
,
4546 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4547 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4549 static int xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
4550 struct usb_device
*udev
, u16 max_exit_latency
)
4552 struct xhci_virt_device
*virt_dev
;
4553 struct xhci_command
*command
;
4554 struct xhci_input_control_ctx
*ctrl_ctx
;
4555 struct xhci_slot_ctx
*slot_ctx
;
4556 unsigned long flags
;
4559 spin_lock_irqsave(&xhci
->lock
, flags
);
4561 virt_dev
= xhci
->devs
[udev
->slot_id
];
4564 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
4565 * xHC was re-initialized. Exit latency will be set later after
4566 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
4569 if (!virt_dev
|| max_exit_latency
== virt_dev
->current_mel
) {
4570 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4574 /* Attempt to issue an Evaluate Context command to change the MEL. */
4575 command
= xhci
->lpm_command
;
4576 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
4577 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4579 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
4580 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4581 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
4582 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
4583 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
4585 xhci_dbg(xhci
, "Set up evaluate context for LPM MEL change.\n");
4586 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
4587 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
4589 /* Issue and wait for the evaluate context command. */
4590 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
4592 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
4593 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
4596 spin_lock_irqsave(&xhci
->lock
, flags
);
4597 virt_dev
->current_mel
= max_exit_latency
;
4598 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4603 static int calculate_max_exit_latency(struct usb_device
*udev
,
4604 enum usb3_link_state state_changed
,
4605 u16 hub_encoded_timeout
)
4607 unsigned long long u1_mel_us
= 0;
4608 unsigned long long u2_mel_us
= 0;
4609 unsigned long long mel_us
= 0;
4615 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4616 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4617 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4618 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4620 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4621 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4622 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4623 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4625 /* If U1 was already enabled and we're not disabling it,
4626 * or we're going to enable U1, account for the U1 max exit latency.
4628 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4630 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4631 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4633 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4635 if (u1_mel_us
> u2_mel_us
)
4639 /* xHCI host controller max exit latency field is only 16 bits wide. */
4640 if (mel_us
> MAX_EXIT
) {
4641 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4642 "is too big.\n", mel_us
);
4648 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4649 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4650 struct usb_device
*udev
, enum usb3_link_state state
)
4652 struct xhci_hcd
*xhci
;
4653 u16 hub_encoded_timeout
;
4657 xhci
= hcd_to_xhci(hcd
);
4658 /* The LPM timeout values are pretty host-controller specific, so don't
4659 * enable hub-initiated timeouts unless the vendor has provided
4660 * information about their timeout algorithm.
4662 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4663 !xhci
->devs
[udev
->slot_id
])
4664 return USB3_LPM_DISABLED
;
4666 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4667 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4669 /* Max Exit Latency is too big, disable LPM. */
4670 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4674 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4677 return hub_encoded_timeout
;
4680 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4681 struct usb_device
*udev
, enum usb3_link_state state
)
4683 struct xhci_hcd
*xhci
;
4687 xhci
= hcd_to_xhci(hcd
);
4688 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4689 !xhci
->devs
[udev
->slot_id
])
4692 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4693 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4698 #else /* CONFIG_PM */
4700 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4701 struct usb_device
*udev
, enum usb3_link_state state
)
4703 return USB3_LPM_DISABLED
;
4706 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4707 struct usb_device
*udev
, enum usb3_link_state state
)
4711 #endif /* CONFIG_PM */
4713 /*-------------------------------------------------------------------------*/
4715 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4716 * internal data structures for the device.
4718 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4719 struct usb_tt
*tt
, gfp_t mem_flags
)
4721 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4722 struct xhci_virt_device
*vdev
;
4723 struct xhci_command
*config_cmd
;
4724 struct xhci_input_control_ctx
*ctrl_ctx
;
4725 struct xhci_slot_ctx
*slot_ctx
;
4726 unsigned long flags
;
4727 unsigned think_time
;
4730 /* Ignore root hubs */
4734 vdev
= xhci
->devs
[hdev
->slot_id
];
4736 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4739 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4741 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4745 spin_lock_irqsave(&xhci
->lock
, flags
);
4746 if (hdev
->speed
== USB_SPEED_HIGH
&&
4747 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4748 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4749 xhci_free_command(xhci
, config_cmd
);
4750 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4754 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4755 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4756 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4757 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4758 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4760 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4761 * but it may be already set to 1 when setup an xHCI virtual
4762 * device, so clear it anyway.
4765 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4766 else if (hdev
->speed
== USB_SPEED_FULL
)
4767 slot_ctx
->dev_info
&= cpu_to_le32(~DEV_MTT
);
4769 if (xhci
->hci_version
> 0x95) {
4770 xhci_dbg(xhci
, "xHCI version %x needs hub "
4771 "TT think time and number of ports\n",
4772 (unsigned int) xhci
->hci_version
);
4773 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4774 /* Set TT think time - convert from ns to FS bit times.
4775 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4776 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4778 * xHCI 1.0: this field shall be 0 if the device is not a
4781 think_time
= tt
->think_time
;
4782 if (think_time
!= 0)
4783 think_time
= (think_time
/ 666) - 1;
4784 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4785 slot_ctx
->tt_info
|=
4786 cpu_to_le32(TT_THINK_TIME(think_time
));
4788 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4789 "TT think time or number of ports\n",
4790 (unsigned int) xhci
->hci_version
);
4792 slot_ctx
->dev_state
= 0;
4793 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4795 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4796 (xhci
->hci_version
> 0x95) ?
4797 "configure endpoint" : "evaluate context");
4798 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4799 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4801 /* Issue and wait for the configure endpoint or
4802 * evaluate context command.
4804 if (xhci
->hci_version
> 0x95)
4805 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4808 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4811 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4812 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4814 xhci_free_command(xhci
, config_cmd
);
4818 int xhci_get_frame(struct usb_hcd
*hcd
)
4820 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4821 /* EHCI mods by the periodic size. Why? */
4822 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4825 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4827 struct xhci_hcd
*xhci
;
4828 struct device
*dev
= hcd
->self
.controller
;
4832 /* Accept arbitrarily long scatter-gather lists */
4833 hcd
->self
.sg_tablesize
= ~0;
4834 /* XHCI controllers don't stop the ep queue on short packets :| */
4835 hcd
->self
.no_stop_on_short
= 1;
4837 if (usb_hcd_is_primary_hcd(hcd
)) {
4838 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4841 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4842 xhci
->main_hcd
= hcd
;
4843 /* Mark the first roothub as being USB 2.0.
4844 * The xHCI driver will register the USB 3.0 roothub.
4846 hcd
->speed
= HCD_USB2
;
4847 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4849 * USB 2.0 roothub under xHCI has an integrated TT,
4850 * (rate matching hub) as opposed to having an OHCI/UHCI
4851 * companion controller.
4855 /* xHCI private pointer was set in xhci_pci_probe for the second
4856 * registered roothub.
4858 xhci
= hcd_to_xhci(hcd
);
4859 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4860 if (HCC_64BIT_ADDR(temp
)) {
4861 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4862 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4864 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4869 #ifdef CONFIG_MTK_XHCI
4870 retval
= mtk_xhci_ip_init(hcd
, xhci
);
4875 xhci
->cap_regs
= hcd
->regs
;
4876 xhci
->op_regs
= hcd
->regs
+
4877 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4878 xhci
->run_regs
= hcd
->regs
+
4879 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4880 /* Cache read-only capability registers */
4881 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4882 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4883 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4884 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4885 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4886 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4887 xhci_print_registers(xhci
);
4889 get_quirks(dev
, xhci
);
4891 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4892 * success event after a short transfer. This quirk will ignore such
4895 if (xhci
->hci_version
> 0x96)
4896 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4898 /* Make sure the HC is halted. */
4899 retval
= xhci_halt(xhci
);
4903 xhci_dbg(xhci
, "Resetting HCD\n");
4904 /* Reset the internal HC memory state and registers. */
4905 retval
= xhci_reset(xhci
);
4908 xhci_dbg(xhci
, "Reset complete\n");
4910 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4911 if (HCC_64BIT_ADDR(temp
)) {
4912 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4913 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4915 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4918 xhci_dbg(xhci
, "Calling HCD init\n");
4919 /* Initialize HCD and host controller data structures. */
4920 retval
= xhci_init(hcd
);
4923 xhci_dbg(xhci
, "Called HCD init\n");
4925 printk("%s(%d): do mtk_xhci_set\n", __func__
, __LINE__
);
4933 MODULE_DESCRIPTION(DRIVER_DESC
);
4934 MODULE_AUTHOR(DRIVER_AUTHOR
);
4935 MODULE_LICENSE("GPL");
4937 #ifdef CONFIG_USBIF_COMPLIANCE
4938 #ifndef CONFIG_USB_MTK_DUALMODE
4939 static int xhci_hcd_driver_init(void)
4943 retval
= xhci_register_pci();
4945 printk(KERN_DEBUG
"Problem registering PCI driver.");
4949 #ifdef CONFIG_MTK_XHCI
4953 retval
= xhci_register_plat();
4955 printk(KERN_DEBUG
"Problem registering platform driver.");
4959 #ifdef CONFIG_MTK_XHCI
4960 retval
= xhci_attrs_init();
4962 printk(KERN_DEBUG
"Problem creating xhci attributes.");
4966 mtk_xhci_wakelock_init();
4970 * Check the compiler generated sizes of structures that must be laid
4971 * out in specific ways for hardware access.
4973 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4974 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4975 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4976 /* xhci_device_control has eight fields, and also
4977 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4979 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4980 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4981 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4982 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4983 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4984 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4985 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4988 #ifdef CONFIG_MTK_XHCI
4990 xhci_unregister_plat();
4993 xhci_unregister_pci();
4997 static void xhci_hcd_driver_cleanup(void)
4999 xhci_unregister_pci();
5000 xhci_unregister_plat();
5004 static int xhci_hcd_driver_init(void)
5006 // init in mt_devs.c
5007 mtk_xhci_eint_iddig_init();
5008 mtk_xhci_switch_init();
5009 //mtk_xhci_wakelock_init();
5013 static void xhci_hcd_driver_cleanup(void)
5015 mtk_xhci_eint_iddig_deinit() ;
5020 static int mu3h_normal_driver_on
= 0 ;
5022 static int xhci_mu3h_proc_show(struct seq_file
*seq
, void *v
)
5024 seq_printf(seq
, "xhci_mu3h_proc_show, mu3h is %d (on:1, off:0)\n", mu3h_normal_driver_on
);
5028 static int xhci_mu3h_proc_open(struct inode
*inode
, struct file
*file
)
5030 return single_open(file
, xhci_mu3h_proc_show
, inode
->i_private
);
5033 static ssize_t
xhci_mu3h_proc_write(struct file
*file
, const char __user
*buf
, size_t length
, loff_t
*ppos
)
5039 if (length
>= sizeof(msg
)) {
5040 printk( "xhci_mu3h_proc_write length error, the error len is %d\n", (unsigned int)length
);
5043 if (copy_from_user(msg
, buf
, length
))
5048 printk("xhci_mu3h_proc_write: %s, current driver on/off: %d\n", msg
, mu3h_normal_driver_on
);
5050 if ((msg
[0] == '1') && (mu3h_normal_driver_on
== 0)){
5051 xhci_hcd_driver_init() ;
5052 mu3h_normal_driver_on
= 1 ;
5053 printk("registe mu3h driver : m3h xhci driver\n");
5054 }else if ((msg
[0] == '0') && (mu3h_normal_driver_on
== 1)){
5055 xhci_hcd_driver_cleanup();
5056 mu3h_normal_driver_on
= 0 ;
5057 printk("unregiste m3h xhci driver.\n");
5059 printk("xhci_mu3h_proc_write write faile !\n");
5064 static const struct file_operations mu3h_proc_fops
= {
5065 .owner
= THIS_MODULE
,
5066 .open
= xhci_mu3h_proc_open
,
5067 .write
= xhci_mu3h_proc_write
,
5069 .llseek
= seq_lseek
,
5073 static int __init
xhci_hcd_init(void)
5075 struct proc_dir_entry
*prEntry
;
5077 printk(KERN_DEBUG
"xhci_hcd_init");
5079 // set xhci up at boot up
5080 xhci_hcd_driver_init() ;
5081 mtk_xhci_wakelock_init();
5082 mu3h_normal_driver_on
= 1;
5085 prEntry
= proc_create("mu3h_driver_init", 0666, NULL
, &mu3h_proc_fops
);
5088 printk("create the mu3h init proc OK!\n") ;
5090 printk("[ERROR] create the mu3h init proc FAIL\n") ;
5093 #ifdef CONFIG_MTK_XHCI
5095 if (!misc_register(&mu3h_uevent_device
)){
5096 printk("create the mu3h_uevent_device uevent device OK!\n") ;
5099 printk("[ERROR] create the mu3h_uevent_device uevent device fail\n") ;
5107 module_init(xhci_hcd_init
);
5109 static void __exit
xhci_hcd_cleanup(void)
5111 #ifdef CONFIG_MTK_XHCI
5112 misc_deregister(&mu3h_uevent_device
);
5114 printk(KERN_DEBUG
"xhci_hcd_cleanup");
5116 module_exit(xhci_hcd_cleanup
);
5119 #ifndef CONFIG_USB_MTK_DUALMODE
5120 static int __init
xhci_hcd_init(void)
5127 retval
= xhci_register_pci();
5129 printk(KERN_DEBUG
"Problem registering PCI driver.");
5132 retval
= xhci_register_plat();
5134 printk(KERN_DEBUG
"Problem registering platform driver.");
5138 #ifdef CONFIG_MTK_XHCI
5139 retval
= xhci_attrs_init();
5141 printk(KERN_DEBUG
"Problem creating xhci attributes.");
5145 mtk_xhci_wakelock_init();
5149 * Check the compiler generated sizes of structures that must be laid
5150 * out in specific ways for hardware access.
5152 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
5153 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
5154 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
5155 /* xhci_device_control has eight fields, and also
5156 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5158 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
5159 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
5160 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
5161 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
5162 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
5163 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5164 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
5168 #ifdef CONFIG_MTK_XHCI
5170 xhci_unregister_plat();
5173 xhci_unregister_pci();
5176 module_init(xhci_hcd_init
);
5178 static void __exit
xhci_hcd_cleanup(void)
5180 xhci_unregister_pci();
5181 xhci_unregister_plat();
5184 module_exit(xhci_hcd_cleanup
);
5186 static int __init
xhci_hcd_init(void)
5188 mtk_xhci_eint_iddig_init();
5189 mtk_xhci_switch_init();
5190 mtk_xhci_wakelock_init();
5193 module_init(xhci_hcd_init
);
5195 static void __exit
xhci_hcd_cleanup(void)
5198 module_exit(xhci_hcd_cleanup
);