2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #ifdef CONFIG_MTK_XHCI
34 #include <asm/uaccess.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/platform_device.h>
37 #include <linux/xhci/xhci-mtk-scheduler.h>
38 #include <linux/xhci/xhci-mtk-power.h>
39 #include <linux/xhci/xhci-mtk.h>
41 #ifdef CONFIG_USBIF_COMPLIANCE
42 #include <linux/proc_fs.h>
43 #include <asm/uaccess.h>
44 #include <linux/seq_file.h>
45 #include <linux/kobject.h>
46 #include <linux/miscdevice.h>
48 static struct miscdevice mu3h_uevent_device
= {
49 .minor
= MISC_DYNAMIC_MINOR
,
50 .name
= "usbif_u3h_uevent",
56 #define DRIVER_AUTHOR "Sarah Sharp"
57 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
59 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
60 static int link_quirk
;
61 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
62 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
64 #ifdef CONFIG_USBIF_COMPLIANCE
65 int usbif_u3h_send_event(char* event
)
68 char *envp
[] = {udev_event
, NULL
};
71 snprintf(udev_event
, 128, "USBIF_EVENT=%s",event
);
72 printk("usbif_u3h_send_event - sending event - %s in %s\n", udev_event
, kobject_get_path(&mu3h_uevent_device
.this_device
->kobj
, GFP_KERNEL
));
73 ret
= kobject_uevent_env(&mu3h_uevent_device
.this_device
->kobj
, KOBJ_CHANGE
, envp
);
75 printk("usbif_u3h_send_event sending failed with ret = %d, \n", ret
);
81 /* TODO: copied from ehci-hcd.c - can this be refactored? */
83 * xhci_handshake - spin reading hc until handshake completes or fails
84 * @ptr: address of hc register to be read
85 * @mask: bits to look at in result of read
86 * @done: value of those bits when handshake succeeds
87 * @usec: timeout in microseconds
89 * Returns negative errno, or zero on success
91 * Success happens when the "mask" bits have the specified value (hardware
92 * handshake done). There are two failure modes: "usec" have passed (major
93 * hardware flakeout), or the register reads as all-ones (hardware removed).
95 int xhci_handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
96 u32 mask
, u32 done
, int usec
)
101 result
= xhci_readl(xhci
, ptr
);
102 if (result
== ~(u32
)0) /* card removed */
114 * Disable interrupts and begin the xHCI halting process.
116 void xhci_quiesce(struct xhci_hcd
*xhci
)
123 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
127 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
129 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
133 * Force HC into halt state.
135 * Disable any IRQs and clear the run/stop bit.
136 * HC will complete any current and actively pipelined transactions, and
137 * should halt within 16 ms of the run/stop bit being cleared.
138 * Read HC Halted bit in the status register to see when the HC is finished.
140 int xhci_halt(struct xhci_hcd
*xhci
)
143 xhci_dbg(xhci
, "// Halt the HC\n");
146 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
147 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
149 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
150 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
152 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
158 * Set the run bit and wait for the host to be running.
160 static int xhci_start(struct xhci_hcd
*xhci
)
165 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
167 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
169 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
172 * Wait for the HCHalted Status bit to be 0 to indicate the host is
175 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
176 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
177 if (ret
== -ETIMEDOUT
)
178 xhci_err(xhci
, "Host took too long to start, "
179 "waited %u microseconds.\n",
182 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
190 * This resets pipelines, timers, counters, state machines, etc.
191 * Transactions will be terminated immediately, and operational registers
192 * will be set to their defaults.
194 int xhci_reset(struct xhci_hcd
*xhci
)
200 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
201 if ((state
& STS_HALT
) == 0) {
202 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
206 xhci_dbg(xhci
, "// Reset the HC\n");
207 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
208 command
|= CMD_RESET
;
209 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
211 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->command
,
212 CMD_RESET
, 0, 10 * 1000 * 1000);
216 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
218 * xHCI cannot write to any doorbells or operational registers other
219 * than status until the "Controller Not Ready" flag is cleared.
221 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
222 STS_CNR
, 0, 10 * 1000 * 1000);
224 for (i
= 0; i
< 2; ++i
) {
225 xhci
->bus_state
[i
].port_c_suspend
= 0;
226 xhci
->bus_state
[i
].suspended_ports
= 0;
227 xhci
->bus_state
[i
].resuming_ports
= 0;
234 static int xhci_free_msi(struct xhci_hcd
*xhci
)
238 if (!xhci
->msix_entries
)
241 for (i
= 0; i
< xhci
->msix_count
; i
++)
242 if (xhci
->msix_entries
[i
].vector
)
243 free_irq(xhci
->msix_entries
[i
].vector
,
251 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
254 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
256 ret
= pci_enable_msi(pdev
);
258 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
262 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
263 0, "xhci_hcd", xhci_to_hcd(xhci
));
265 xhci_dbg(xhci
, "disable MSI interrupt\n");
266 pci_disable_msi(pdev
);
274 * free all IRQs request
276 static void xhci_free_irq(struct xhci_hcd
*xhci
)
278 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
281 /* return if using legacy interrupt */
282 if (xhci_to_hcd(xhci
)->irq
> 0)
285 ret
= xhci_free_msi(xhci
);
289 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
297 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
300 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
301 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
304 * calculate number of msi-x vectors supported.
305 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
306 * with max number of interrupters based on the xhci HCSPARAMS1.
307 * - num_online_cpus: maximum msi-x vectors per CPUs core.
308 * Add additional 1 vector to ensure always available interrupt.
310 xhci
->msix_count
= min(num_online_cpus() + 1,
311 HCS_MAX_INTRS(xhci
->hcs_params1
));
314 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
316 if (!xhci
->msix_entries
) {
317 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
321 for (i
= 0; i
< xhci
->msix_count
; i
++) {
322 xhci
->msix_entries
[i
].entry
= i
;
323 xhci
->msix_entries
[i
].vector
= 0;
326 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
328 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
332 for (i
= 0; i
< xhci
->msix_count
; i
++) {
333 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
334 (irq_handler_t
)xhci_msi_irq
,
335 0, "xhci_hcd", xhci_to_hcd(xhci
));
340 hcd
->msix_enabled
= 1;
344 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
346 pci_disable_msix(pdev
);
348 kfree(xhci
->msix_entries
);
349 xhci
->msix_entries
= NULL
;
353 /* Free any IRQs and disable MSI-X */
354 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
356 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
357 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
359 if (xhci
->quirks
& XHCI_PLAT
)
364 if (xhci
->msix_entries
) {
365 pci_disable_msix(pdev
);
366 kfree(xhci
->msix_entries
);
367 xhci
->msix_entries
= NULL
;
369 pci_disable_msi(pdev
);
372 hcd
->msix_enabled
= 0;
376 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
380 if (xhci
->msix_entries
) {
381 for (i
= 0; i
< xhci
->msix_count
; i
++)
382 synchronize_irq(xhci
->msix_entries
[i
].vector
);
386 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
388 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
389 struct pci_dev
*pdev
;
392 /* The xhci platform device has set up IRQs through usb_add_hcd. */
393 if (xhci
->quirks
& XHCI_PLAT
)
396 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
398 * Some Fresco Logic host controllers advertise MSI, but fail to
399 * generate interrupts. Don't even try to enable MSI.
401 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
404 /* unregister the legacy interrupt */
406 free_irq(hcd
->irq
, hcd
);
409 ret
= xhci_setup_msix(xhci
);
411 /* fall back to msi*/
412 ret
= xhci_setup_msi(xhci
);
415 /* hcd->irq is 0, we have MSI */
419 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
424 /* fall back to legacy interrupt*/
425 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
426 hcd
->irq_descr
, hcd
);
428 xhci_err(xhci
, "request interrupt %d failed\n",
432 hcd
->irq
= pdev
->irq
;
438 static inline int xhci_try_enable_msi(struct usb_hcd
*hcd
)
443 static inline void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
447 static inline void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
453 static void compliance_mode_recovery(unsigned long arg
)
455 struct xhci_hcd
*xhci
;
460 xhci
= (struct xhci_hcd
*)arg
;
462 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
463 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
464 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
466 * Compliance Mode Detected. Letting USB Core
467 * handle the Warm Reset
469 xhci_dbg(xhci
, "Compliance mode detected->port %d\n",
471 xhci_dbg(xhci
, "Attempting compliance mode recovery\n");
472 hcd
= xhci
->shared_hcd
;
474 if (hcd
->state
== HC_STATE_SUSPENDED
)
475 usb_hcd_resume_root_hub(hcd
);
477 usb_hcd_poll_rh_status(hcd
);
481 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
482 mod_timer(&xhci
->comp_mode_recovery_timer
,
483 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
487 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
488 * that causes ports behind that hardware to enter compliance mode sometimes.
489 * The quirk creates a timer that polls every 2 seconds the link state of
490 * each host controller's port and recovers it by issuing a Warm reset
491 * if Compliance mode is detected, otherwise the port will become "dead" (no
492 * device connections or disconnections will be detected anymore). Becasue no
493 * status event is generated when entering compliance mode (per xhci spec),
494 * this quirk is needed on systems that have the failing hardware installed.
496 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
498 xhci
->port_status_u0
= 0;
499 init_timer(&xhci
->comp_mode_recovery_timer
);
501 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
502 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
503 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
504 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
506 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
507 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
508 add_timer(&xhci
->comp_mode_recovery_timer
);
509 xhci_dbg(xhci
, "Compliance mode recovery timer initialized\n");
513 * This function identifies the systems that have installed the SN65LVPE502CP
514 * USB3.0 re-driver and that need the Compliance Mode Quirk.
516 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
518 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
520 const char *dmi_product_name
, *dmi_sys_vendor
;
522 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
523 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
524 if (!dmi_product_name
|| !dmi_sys_vendor
)
527 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
530 if (strstr(dmi_product_name
, "Z420") ||
531 strstr(dmi_product_name
, "Z620") ||
532 strstr(dmi_product_name
, "Z820") ||
533 strstr(dmi_product_name
, "Z1 Workstation"))
539 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
541 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
546 * Initialize memory for HCD and xHC (one-time init).
548 * Program the PAGESIZE register, initialize the device context array, create
549 * device contexts (?), set up a command ring segment (or two?), create event
550 * ring (one for now).
552 int xhci_init(struct usb_hcd
*hcd
)
554 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
557 xhci_dbg(xhci
, "xhci_init\n");
558 spin_lock_init(&xhci
->lock
);
559 if (xhci
->hci_version
== 0x95 && link_quirk
) {
560 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
561 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
563 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
566 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
567 xhci_dbg(xhci
, "Finished xhci_init\n");
569 /* Initializing Compliance Mode Recovery Data If Needed */
570 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
571 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
572 compliance_mode_recovery_timer_init(xhci
);
578 /*-------------------------------------------------------------------------*/
581 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
582 static void xhci_event_ring_work(unsigned long arg
)
587 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
590 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
592 spin_lock_irqsave(&xhci
->lock
, flags
);
593 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
594 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
595 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
596 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
597 xhci_dbg(xhci
, "HW died, polling stopped.\n");
598 spin_unlock_irqrestore(&xhci
->lock
, flags
);
602 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
603 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
604 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
605 xhci
->error_bitmask
= 0;
606 xhci_dbg(xhci
, "Event ring:\n");
607 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
608 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
609 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
610 temp_64
&= ~ERST_PTR_MASK
;
611 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
612 xhci_dbg(xhci
, "Command ring:\n");
613 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
614 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
615 xhci_dbg_cmd_ptrs(xhci
);
616 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
619 for (j
= 0; j
< 31; ++j
) {
620 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
623 spin_unlock_irqrestore(&xhci
->lock
, flags
);
626 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
628 xhci_dbg(xhci
, "Quit polling the event ring.\n");
632 static int xhci_run_finished(struct xhci_hcd
*xhci
)
634 if (xhci_start(xhci
)) {
639 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
640 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
642 if (xhci
->quirks
& XHCI_NEC_HOST
)
643 xhci_ring_cmd_db(xhci
);
645 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
651 * Start the HC after it was halted.
653 * This function is called by the USB core when the HC driver is added.
654 * Its opposite is xhci_stop().
656 * xhci_init() must be called once before this function can be called.
657 * Reset the HC, enable device slot contexts, program DCBAAP, and
658 * set command ring pointer and event ring pointer.
660 * Setup MSI-X vectors and enable interrupts.
662 int xhci_run(struct usb_hcd
*hcd
)
667 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
669 /* Start the xHCI host controller running only after the USB 2.0 roothub
673 hcd
->uses_new_polling
= 1;
674 if (!usb_hcd_is_primary_hcd(hcd
))
675 return xhci_run_finished(xhci
);
677 xhci_dbg(xhci
, "xhci_run\n");
679 ret
= xhci_try_enable_msi(hcd
);
683 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
684 init_timer(&xhci
->event_ring_timer
);
685 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
686 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
687 /* Poll the event ring */
688 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
690 xhci_dbg(xhci
, "Setting event ring polling timer\n");
691 add_timer(&xhci
->event_ring_timer
);
694 xhci_dbg(xhci
, "Command ring memory map follows:\n");
695 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
696 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
697 xhci_dbg_cmd_ptrs(xhci
);
699 xhci_dbg(xhci
, "ERST memory map follows:\n");
700 xhci_dbg_erst(xhci
, &xhci
->erst
);
701 xhci_dbg(xhci
, "Event ring:\n");
702 xhci_debug_ring(xhci
, xhci
->event_ring
);
703 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
704 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
705 temp_64
&= ~ERST_PTR_MASK
;
706 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
708 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
709 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
710 temp
&= ~ER_IRQ_INTERVAL_MASK
;
712 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
714 /* Set the HCD state before we enable the irqs */
715 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
717 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
719 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
721 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
722 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
723 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
724 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
725 &xhci
->ir_set
->irq_pending
);
726 xhci_print_ir_set(xhci
, 0);
728 if (xhci
->quirks
& XHCI_NEC_HOST
)
729 xhci_queue_vendor_command(xhci
, 0, 0, 0,
730 TRB_TYPE(TRB_NEC_GET_FW
));
732 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
736 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
738 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
740 spin_lock_irq(&xhci
->lock
);
743 /* The shared_hcd is going to be deallocated shortly (the USB core only
744 * calls this function when allocation fails in usb_add_hcd(), or
745 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
747 xhci
->shared_hcd
= NULL
;
748 spin_unlock_irq(&xhci
->lock
);
754 * This function is called by the USB core when the HC driver is removed.
755 * Its opposite is xhci_run().
757 * Disable device contexts, disable IRQs, and quiesce the HC.
758 * Reset the HC, finish any completed transactions, and cleanup memory.
760 void xhci_stop(struct usb_hcd
*hcd
)
763 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
765 if (!usb_hcd_is_primary_hcd(hcd
)) {
766 xhci_only_stop_hcd(xhci
->shared_hcd
);
770 spin_lock_irq(&xhci
->lock
);
771 /* Make sure the xHC is halted for a USB3 roothub
772 * (xhci_stop() could be called as part of failed init).
776 spin_unlock_irq(&xhci
->lock
);
778 xhci_cleanup_msix(xhci
);
780 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
781 /* Tell the event ring poll function not to reschedule */
783 del_timer_sync(&xhci
->event_ring_timer
);
786 /* Deleting Compliance Mode Recovery Timer */
787 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
788 (!(xhci_all_ports_seen_u0(xhci
)))) {
789 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
790 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
793 #ifndef CONFIG_MTK_XHCI
794 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
797 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
798 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
799 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
800 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
801 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
802 &xhci
->ir_set
->irq_pending
);
803 xhci_print_ir_set(xhci
, 0);
805 xhci_dbg(xhci
, "cleaning up memory\n");
806 xhci_mem_cleanup(xhci
);
807 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
808 xhci_readl(xhci
, &xhci
->op_regs
->status
));
812 * Shutdown HC (not bus-specific)
814 * This is called when the machine is rebooting or halting. We assume that the
815 * machine will be powered off, and the HC's internal state will be reset.
816 * Don't bother to free memory.
818 * This will only ever be called with the main usb_hcd (the USB3 roothub).
820 void xhci_shutdown(struct usb_hcd
*hcd
)
822 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
824 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
825 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
827 spin_lock_irq(&xhci
->lock
);
829 spin_unlock_irq(&xhci
->lock
);
831 xhci_cleanup_msix(xhci
);
833 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
834 xhci_readl(xhci
, &xhci
->op_regs
->status
));
838 static void xhci_save_registers(struct xhci_hcd
*xhci
)
840 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
841 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
842 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
843 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
844 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
845 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
846 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
847 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
848 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
851 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
853 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
854 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
855 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
856 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
857 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
858 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
859 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
860 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
861 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
864 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
868 /* step 2: initialize command ring buffer */
869 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
870 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
871 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
872 xhci
->cmd_ring
->dequeue
) &
873 (u64
) ~CMD_RING_RSVD_BITS
) |
874 xhci
->cmd_ring
->cycle_state
;
875 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
876 (long unsigned long) val_64
);
877 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
881 * The whole command ring must be cleared to zero when we suspend the host.
883 * The host doesn't save the command ring pointer in the suspend well, so we
884 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
885 * aligned, because of the reserved bits in the command ring dequeue pointer
886 * register. Therefore, we can't just set the dequeue pointer back in the
887 * middle of the ring (TRBs are 16-byte aligned).
889 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
891 struct xhci_ring
*ring
;
892 struct xhci_segment
*seg
;
894 ring
= xhci
->cmd_ring
;
898 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
899 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
900 cpu_to_le32(~TRB_CYCLE
);
902 } while (seg
!= ring
->deq_seg
);
904 /* Reset the software enqueue and dequeue pointers */
905 ring
->deq_seg
= ring
->first_seg
;
906 ring
->dequeue
= ring
->first_seg
->trbs
;
907 ring
->enq_seg
= ring
->deq_seg
;
908 ring
->enqueue
= ring
->dequeue
;
910 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
912 * Ring is now zeroed, so the HW should look for change of ownership
913 * when the cycle bit is set to 1.
915 ring
->cycle_state
= 1;
918 * Reset the hardware dequeue pointer.
919 * Yes, this will need to be re-written after resume, but we're paranoid
920 * and want to make sure the hardware doesn't access bogus memory
921 * because, say, the BIOS or an SMI started the host without changing
922 * the command ring pointers.
924 xhci_set_cmd_ring_deq(xhci
);
928 * Stop HC (not bus-specific)
930 * This is called when the machine transition into S3/S4 mode.
933 int xhci_suspend(struct xhci_hcd
*xhci
)
936 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
939 if (hcd
->state
!= HC_STATE_SUSPENDED
||
940 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
943 /* Don't poll the roothubs on bus suspend. */
944 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
945 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
946 del_timer_sync(&hcd
->rh_timer
);
948 spin_lock_irq(&xhci
->lock
);
949 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
950 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
951 /* step 1: stop endpoint */
952 /* skipped assuming that port suspend has done */
954 /* step 2: clear Run/Stop bit */
955 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
957 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
958 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
959 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
)) {
960 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
961 spin_unlock_irq(&xhci
->lock
);
964 xhci_clear_command_ring(xhci
);
966 /* step 3: save registers */
967 xhci_save_registers(xhci
);
969 /* step 4: set CSS flag */
970 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
972 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
973 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
974 STS_SAVE
, 0, 10 * 1000)) {
975 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
976 spin_unlock_irq(&xhci
->lock
);
979 spin_unlock_irq(&xhci
->lock
);
982 * Deleting Compliance Mode Recovery Timer because the xHCI Host
983 * is about to be suspended.
985 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
986 (!(xhci_all_ports_seen_u0(xhci
)))) {
987 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
988 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
992 /* step 5: remove core well power */
993 /* synchronize irq when using MSI-X */
994 xhci_msix_sync_irqs(xhci
);
1000 * start xHC (not bus-specific)
1002 * This is called when the machine transition from S3/S4 mode.
1005 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
1007 u32 command
, temp
= 0, status
;
1008 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
1009 struct usb_hcd
*secondary_hcd
;
1011 bool comp_timer_running
= false;
1013 /* Wait a bit if either of the roothubs need to settle from the
1014 * transition into bus suspend.
1016 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
1017 time_before(jiffies
,
1018 xhci
->bus_state
[1].next_statechange
))
1021 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
1022 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
1024 spin_lock_irq(&xhci
->lock
);
1025 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
1029 /* step 1: restore register */
1030 xhci_restore_registers(xhci
);
1031 /* step 2: initialize command ring buffer */
1032 xhci_set_cmd_ring_deq(xhci
);
1033 /* step 3: restore state and start state*/
1034 /* step 3: set CRS flag */
1035 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1037 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1038 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
1039 STS_RESTORE
, 0, 10 * 1000)) {
1040 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
1041 spin_unlock_irq(&xhci
->lock
);
1044 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1047 /* If restore operation fails, re-initialize the HC during resume */
1048 if ((temp
& STS_SRE
) || hibernated
) {
1050 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
1051 !(xhci_all_ports_seen_u0(xhci
))) {
1052 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
1053 xhci_dbg(xhci
, "Compliance Mode Recovery Timer deleted!\n");
1056 /* Let the USB core know _both_ roothubs lost power. */
1057 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
1058 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
1060 xhci_dbg(xhci
, "Stop HCD\n");
1063 spin_unlock_irq(&xhci
->lock
);
1064 xhci_cleanup_msix(xhci
);
1066 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1067 /* Tell the event ring poll function not to reschedule */
1069 del_timer_sync(&xhci
->event_ring_timer
);
1072 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
1073 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1074 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
1075 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
1076 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
1077 &xhci
->ir_set
->irq_pending
);
1078 xhci_print_ir_set(xhci
, 0);
1080 xhci_dbg(xhci
, "cleaning up memory\n");
1081 xhci_mem_cleanup(xhci
);
1082 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1083 xhci_readl(xhci
, &xhci
->op_regs
->status
));
1085 /* USB core calls the PCI reinit and start functions twice:
1086 * first with the primary HCD, and then with the secondary HCD.
1087 * If we don't do the same, the host will never be started.
1089 if (!usb_hcd_is_primary_hcd(hcd
))
1090 secondary_hcd
= hcd
;
1092 secondary_hcd
= xhci
->shared_hcd
;
1094 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1095 retval
= xhci_init(hcd
->primary_hcd
);
1098 comp_timer_running
= true;
1100 xhci_dbg(xhci
, "Start the primary HCD\n");
1101 retval
= xhci_run(hcd
->primary_hcd
);
1103 xhci_dbg(xhci
, "Start the secondary HCD\n");
1104 retval
= xhci_run(secondary_hcd
);
1106 hcd
->state
= HC_STATE_SUSPENDED
;
1107 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1111 /* step 4: set Run/Stop bit */
1112 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1114 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1115 xhci_handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1118 /* step 5: walk topology and initialize portsc,
1119 * portpmsc and portli
1121 /* this is done in bus_resume */
1123 /* step 6: restart each of the previously
1124 * Running endpoints by ringing their doorbells
1127 spin_unlock_irq(&xhci
->lock
);
1131 /* Resume root hubs only when have pending events. */
1132 status
= readl(&xhci
->op_regs
->status
);
1133 if (status
& STS_EINT
) {
1134 usb_hcd_resume_root_hub(hcd
);
1135 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1140 * If system is subject to the Quirk, Compliance Mode Timer needs to
1141 * be re-initialized Always after a system resume. Ports are subject
1142 * to suffer the Compliance Mode issue again. It doesn't matter if
1143 * ports have entered previously to U0 before system's suspension.
1145 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1146 compliance_mode_recovery_timer_init(xhci
);
1148 /* Re-enable port polling. */
1149 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1150 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1151 usb_hcd_poll_rh_status(hcd
);
1155 #endif /* CONFIG_PM */
1157 /*-------------------------------------------------------------------------*/
1160 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1161 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1162 * value to right shift 1 for the bitmask.
1164 * Index = (epnum * 2) + direction - 1,
1165 * where direction = 0 for OUT, 1 for IN.
1166 * For control endpoints, the IN index is used (OUT index is unused), so
1167 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1169 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1172 if (usb_endpoint_xfer_control(desc
))
1173 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1175 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1176 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1180 /* Find the flag for this endpoint (for use in the control context). Use the
1181 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1184 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1186 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1189 /* Find the flag for this endpoint (for use in the control context). Use the
1190 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1193 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1195 return 1 << (ep_index
+ 1);
1198 /* Compute the last valid endpoint context index. Basically, this is the
1199 * endpoint index plus one. For slot contexts with more than valid endpoint,
1200 * we find the most significant bit set in the added contexts flags.
1201 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1202 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1204 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1206 return fls(added_ctxs
) - 1;
1209 /* Returns 1 if the arguments are OK;
1210 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1212 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1213 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1215 struct xhci_hcd
*xhci
;
1216 struct xhci_virt_device
*virt_dev
;
1218 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1219 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1223 if (!udev
->parent
) {
1224 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1229 xhci
= hcd_to_xhci(hcd
);
1230 if (check_virt_dev
) {
1231 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1232 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1237 virt_dev
= xhci
->devs
[udev
->slot_id
];
1238 if (virt_dev
->udev
!= udev
) {
1239 printk(KERN_DEBUG
"xHCI %s called with udev and "
1240 "virt_dev does not match\n", func
);
1245 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1251 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1252 struct usb_device
*udev
, struct xhci_command
*command
,
1253 bool ctx_change
, bool must_succeed
);
1256 * Full speed devices may have a max packet size greater than 8 bytes, but the
1257 * USB core doesn't know that until it reads the first 8 bytes of the
1258 * descriptor. If the usb_device's max packet size changes after that point,
1259 * we need to issue an evaluate context command and wait on it.
1261 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1262 unsigned int ep_index
, struct urb
*urb
)
1264 struct xhci_container_ctx
*in_ctx
;
1265 struct xhci_container_ctx
*out_ctx
;
1266 struct xhci_input_control_ctx
*ctrl_ctx
;
1267 struct xhci_ep_ctx
*ep_ctx
;
1268 int max_packet_size
;
1269 int hw_max_packet_size
;
1272 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1273 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1274 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1275 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1276 if (hw_max_packet_size
!= max_packet_size
) {
1277 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1278 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1280 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1281 hw_max_packet_size
);
1282 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1284 /* Set up the modified control endpoint 0 */
1285 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1286 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1287 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1288 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1289 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1290 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1292 /* Set up the input context flags for the command */
1293 /* FIXME: This won't work if a non-default control endpoint
1294 * changes max packet sizes.
1296 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1297 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1298 ctrl_ctx
->drop_flags
= 0;
1300 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1301 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1302 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1303 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1305 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1308 /* Clean up the input context for later use by bandwidth
1311 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1317 * non-error returns are a promise to giveback() the urb later
1318 * we drop ownership so next owner (or urb unlink) can get it
1320 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1322 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1323 struct xhci_td
*buffer
;
1324 unsigned long flags
;
1326 unsigned int slot_id
, ep_index
;
1327 struct urb_priv
*urb_priv
;
1330 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1331 true, true, __func__
) <= 0)
1334 slot_id
= urb
->dev
->slot_id
;
1335 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1337 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1338 if (!in_interrupt())
1339 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1344 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1345 size
= urb
->number_of_packets
;
1349 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1350 size
* sizeof(struct xhci_td
*), mem_flags
);
1354 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1360 for (i
= 0; i
< size
; i
++) {
1361 urb_priv
->td
[i
] = buffer
;
1365 urb_priv
->length
= size
;
1366 urb_priv
->td_cnt
= 0;
1367 urb
->hcpriv
= urb_priv
;
1369 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1370 /* Check to see if the max packet size for the default control
1371 * endpoint changed during FS device enumeration
1373 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1374 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1377 xhci_urb_free_priv(xhci
, urb_priv
);
1383 /* We have a spinlock and interrupts disabled, so we must pass
1384 * atomic context to this function, which may allocate memory.
1386 spin_lock_irqsave(&xhci
->lock
, flags
);
1387 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1389 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1393 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1394 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1395 spin_lock_irqsave(&xhci
->lock
, flags
);
1396 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1398 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1399 EP_GETTING_STREAMS
) {
1400 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1401 "is transitioning to using streams.\n");
1403 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1404 EP_GETTING_NO_STREAMS
) {
1405 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1406 "is transitioning to "
1407 "not having streams.\n");
1410 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1415 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1416 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1417 spin_lock_irqsave(&xhci
->lock
, flags
);
1418 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1420 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1424 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1426 spin_lock_irqsave(&xhci
->lock
, flags
);
1427 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1429 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1433 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1438 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1439 "non-responsive xHCI host.\n",
1440 urb
->ep
->desc
.bEndpointAddress
, urb
);
1443 xhci_urb_free_priv(xhci
, urb_priv
);
1445 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1449 /* Get the right ring for the given URB.
1450 * If the endpoint supports streams, boundary check the URB's stream ID.
1451 * If the endpoint doesn't support streams, return the singular endpoint ring.
1453 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1456 unsigned int slot_id
;
1457 unsigned int ep_index
;
1458 unsigned int stream_id
;
1459 struct xhci_virt_ep
*ep
;
1461 slot_id
= urb
->dev
->slot_id
;
1462 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1463 stream_id
= urb
->stream_id
;
1464 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1465 /* Common case: no streams */
1466 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1469 if (stream_id
== 0) {
1471 "WARN: Slot ID %u, ep index %u has streams, "
1472 "but URB has no stream ID.\n",
1477 if (stream_id
< ep
->stream_info
->num_streams
)
1478 return ep
->stream_info
->stream_rings
[stream_id
];
1481 "WARN: Slot ID %u, ep index %u has "
1482 "stream IDs 1 to %u allocated, "
1483 "but stream ID %u is requested.\n",
1485 ep
->stream_info
->num_streams
- 1,
1491 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1492 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1493 * should pick up where it left off in the TD, unless a Set Transfer Ring
1494 * Dequeue Pointer is issued.
1496 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1497 * the ring. Since the ring is a contiguous structure, they can't be physically
1498 * removed. Instead, there are two options:
1500 * 1) If the HC is in the middle of processing the URB to be canceled, we
1501 * simply move the ring's dequeue pointer past those TRBs using the Set
1502 * Transfer Ring Dequeue Pointer command. This will be the common case,
1503 * when drivers timeout on the last submitted URB and attempt to cancel.
1505 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1506 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1507 * HC will need to invalidate the any TRBs it has cached after the stop
1508 * endpoint command, as noted in the xHCI 0.95 errata.
1510 * 3) The TD may have completed by the time the Stop Endpoint Command
1511 * completes, so software needs to handle that case too.
1513 * This function should protect against the TD enqueueing code ringing the
1514 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1515 * It also needs to account for multiple cancellations on happening at the same
1516 * time for the same endpoint.
1518 * Note that this function can be called in any context, or so says
1519 * usb_hcd_unlink_urb()
1521 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1523 unsigned long flags
;
1526 struct xhci_hcd
*xhci
;
1527 struct urb_priv
*urb_priv
;
1529 unsigned int ep_index
;
1530 struct xhci_ring
*ep_ring
;
1531 struct xhci_virt_ep
*ep
;
1533 xhci
= hcd_to_xhci(hcd
);
1534 spin_lock_irqsave(&xhci
->lock
, flags
);
1535 /* Make sure the URB hasn't completed or been unlinked already */
1536 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1537 if (ret
|| !urb
->hcpriv
)
1539 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1540 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1541 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1542 urb_priv
= urb
->hcpriv
;
1543 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1544 td
= urb_priv
->td
[i
];
1545 if (!list_empty(&td
->td_list
))
1546 list_del_init(&td
->td_list
);
1547 if (!list_empty(&td
->cancelled_td_list
))
1548 list_del_init(&td
->cancelled_td_list
);
1551 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1552 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1553 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1554 xhci_urb_free_priv(xhci
, urb_priv
);
1557 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1558 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1559 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1560 "non-responsive xHCI host.\n",
1561 urb
->ep
->desc
.bEndpointAddress
, urb
);
1562 /* Let the stop endpoint command watchdog timer (which set this
1563 * state) finish cleaning up the endpoint TD lists. We must
1564 * have caught it in the middle of dropping a lock and giving
1570 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1571 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1572 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1578 urb_priv
= urb
->hcpriv
;
1579 i
= urb_priv
->td_cnt
;
1580 if (i
< urb_priv
->length
)
1581 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1582 "starting at offset 0x%llx\n",
1583 urb
, urb
->dev
->devpath
,
1584 urb
->ep
->desc
.bEndpointAddress
,
1585 (unsigned long long) xhci_trb_virt_to_dma(
1586 urb_priv
->td
[i
]->start_seg
,
1587 urb_priv
->td
[i
]->first_trb
));
1589 for (; i
< urb_priv
->length
; i
++) {
1590 td
= urb_priv
->td
[i
];
1591 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1594 /* Queue a stop endpoint command, but only if this is
1595 * the first cancellation to be handled.
1597 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1598 ep
->ep_state
|= EP_HALT_PENDING
;
1599 ep
->stop_cmds_pending
++;
1600 ep
->stop_cmd_timer
.expires
= jiffies
+
1601 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1602 add_timer(&ep
->stop_cmd_timer
);
1603 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1604 xhci_ring_cmd_db(xhci
);
1607 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1611 /* Drop an endpoint from a new bandwidth configuration for this device.
1612 * Only one call to this function is allowed per endpoint before
1613 * check_bandwidth() or reset_bandwidth() must be called.
1614 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1615 * add the endpoint to the schedule with possibly new parameters denoted by a
1616 * different endpoint descriptor in usb_host_endpoint.
1617 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1620 * The USB core will not allow URBs to be queued to an endpoint that is being
1621 * disabled, so there's no need for mutual exclusion to protect
1622 * the xhci->devs[slot_id] structure.
1624 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1625 struct usb_host_endpoint
*ep
)
1627 struct xhci_hcd
*xhci
;
1628 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1629 struct xhci_input_control_ctx
*ctrl_ctx
;
1630 struct xhci_slot_ctx
*slot_ctx
;
1631 unsigned int last_ctx
;
1632 unsigned int ep_index
;
1633 struct xhci_ep_ctx
*ep_ctx
;
1635 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1637 #ifdef CONFIG_MTK_XHCI
1638 struct sch_ep
*sch_ep
= NULL
;
1643 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1646 xhci
= hcd_to_xhci(hcd
);
1647 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1650 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1651 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1652 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1653 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1654 __func__
, drop_flag
);
1658 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1659 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1660 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1661 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1662 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1663 /* If the HC already knows the endpoint is disabled,
1664 * or the HCD has noted it is disabled, ignore this request
1666 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1667 cpu_to_le32(EP_STATE_DISABLED
)) ||
1668 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1669 xhci_get_endpoint_flag(&ep
->desc
)) {
1670 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1675 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1676 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1678 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1679 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1681 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1682 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1683 /* Update the last valid endpoint context, if we deleted the last one */
1684 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1685 LAST_CTX(last_ctx
)) {
1686 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1687 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1689 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1691 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1693 #ifdef CONFIG_MTK_XHCI
1694 slot_ctx
= xhci_get_slot_ctx(xhci
, xhci
->devs
[udev
->slot_id
]->out_ctx
);
1695 if((slot_ctx
->tt_info
& 0xff) > 0){
1701 if(usb_endpoint_xfer_int(&ep
->desc
)){
1702 ep_type
= USB_EP_INT
;
1704 else if(usb_endpoint_xfer_isoc(&ep
->desc
)){
1705 ep_type
= USB_EP_ISOC
;
1707 else if(usb_endpoint_xfer_bulk(&ep
->desc
)){
1708 ep_type
= USB_EP_BULK
;
1710 sch_ep
= mtk_xhci_scheduler_remove_ep(udev
->speed
, usb_endpoint_dir_in(&ep
->desc
)
1711 , isTT
, ep_type
, (mtk_u32
*)ep
);
1716 xhci_warn(xhci
, "[MTK]Doesn't find ep_sch instance when removing endpoint\n");
1720 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1721 (unsigned int) ep
->desc
.bEndpointAddress
,
1723 (unsigned int) new_drop_flags
,
1724 (unsigned int) new_add_flags
,
1725 (unsigned int) new_slot_info
);
1727 #if defined(CONFIG_MTK_XHCI) && defined(CONFIG_USB_MTK_DUALMODE)
1734 /* Add an endpoint to a new possible bandwidth configuration for this device.
1735 * Only one call to this function is allowed per endpoint before
1736 * check_bandwidth() or reset_bandwidth() must be called.
1737 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1738 * add the endpoint to the schedule with possibly new parameters denoted by a
1739 * different endpoint descriptor in usb_host_endpoint.
1740 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1743 * The USB core will not allow URBs to be queued to an endpoint until the
1744 * configuration or alt setting is installed in the device, so there's no need
1745 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1747 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1748 struct usb_host_endpoint
*ep
)
1750 struct xhci_hcd
*xhci
;
1751 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1752 unsigned int ep_index
;
1753 struct xhci_slot_ctx
*slot_ctx
;
1754 struct xhci_input_control_ctx
*ctrl_ctx
;
1756 unsigned int last_ctx
;
1757 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1758 struct xhci_virt_device
*virt_dev
;
1760 #ifdef CONFIG_MTK_XHCI
1761 struct xhci_ep_ctx
*in_ep_ctx
;
1762 struct sch_ep
*sch_ep
;
1771 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1773 /* So we won't queue a reset ep command for a root hub */
1777 xhci
= hcd_to_xhci(hcd
);
1778 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1781 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1782 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1783 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1784 /* FIXME when we have to issue an evaluate endpoint command to
1785 * deal with ep0 max packet size changing once we get the
1788 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1789 __func__
, added_ctxs
);
1793 virt_dev
= xhci
->devs
[udev
->slot_id
];
1794 in_ctx
= virt_dev
->in_ctx
;
1795 out_ctx
= virt_dev
->out_ctx
;
1796 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1797 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1799 /* If this endpoint is already in use, and the upper layers are trying
1800 * to add it again without dropping it, reject the addition.
1802 if (virt_dev
->eps
[ep_index
].ring
&&
1803 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1804 xhci_get_endpoint_flag(&ep
->desc
))) {
1805 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1806 "without dropping it.\n",
1807 (unsigned int) ep
->desc
.bEndpointAddress
);
1811 /* If the HCD has already noted the endpoint is enabled,
1812 * ignore this request.
1814 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1815 xhci_get_endpoint_flag(&ep
->desc
)) {
1816 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1822 * Configuration and alternate setting changes must be done in
1823 * process context, not interrupt context (or so documenation
1824 * for usb_set_interface() and usb_set_configuration() claim).
1826 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1827 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1828 __func__
, ep
->desc
.bEndpointAddress
);
1832 #ifdef CONFIG_MTK_XHCI
1833 in_ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1834 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
1836 if((slot_ctx
->tt_info
& 0xff) > 0){
1842 if(usb_endpoint_xfer_int(&ep
->desc
)){
1843 ep_type
= USB_EP_INT
;
1845 else if(usb_endpoint_xfer_isoc(&ep
->desc
)){
1846 ep_type
= USB_EP_ISOC
;
1848 else if(usb_endpoint_xfer_bulk(&ep
->desc
)){
1849 ep_type
= USB_EP_BULK
;
1851 if(udev
->speed
== USB_SPEED_FULL
|| udev
->speed
== USB_SPEED_HIGH
1852 || udev
->speed
== USB_SPEED_LOW
){
1853 maxp
= ep
->desc
.wMaxPacketSize
& 0x7FF;
1854 burst
= ep
->desc
.wMaxPacketSize
>> 11;
1857 else if(udev
->speed
== USB_SPEED_SUPER
){
1858 maxp
= ep
->desc
.wMaxPacketSize
& 0x7FF;
1859 burst
= ep
->ss_ep_comp
.bMaxBurst
;
1860 mult
= ep
->ss_ep_comp
.bmAttributes
& 0x3;
1862 interval
= (1 << ((in_ep_ctx
->ep_info
>> 16) & 0xff));
1863 sch_ep
= kmalloc(sizeof(struct sch_ep
), GFP_KERNEL
);
1864 if(mtk_xhci_scheduler_add_ep(udev
->speed
, usb_endpoint_dir_in(&ep
->desc
),
1865 isTT
, ep_type
, maxp
, interval
, burst
, mult
, (mtk_u32
*)ep
1866 , (mtk_u32
*)in_ep_ctx
, sch_ep
) != SCH_SUCCESS
){
1867 xhci_err(xhci
, "[MTK] not enough bandwidth\n");
1872 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1873 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1875 /* If xhci_endpoint_disable() was called for this endpoint, but the
1876 * xHC hasn't been notified yet through the check_bandwidth() call,
1877 * this re-adds a new state for the endpoint from the new endpoint
1878 * descriptors. We must drop and re-add this endpoint, so we leave the
1881 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1883 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1884 /* Update the last valid endpoint context, if we just added one past */
1885 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1886 LAST_CTX(last_ctx
)) {
1887 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1888 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1890 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1892 /* Store the usb_device pointer for later use */
1895 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1896 (unsigned int) ep
->desc
.bEndpointAddress
,
1898 (unsigned int) new_drop_flags
,
1899 (unsigned int) new_add_flags
,
1900 (unsigned int) new_slot_info
);
1902 #if defined(CONFIG_MTK_XHCI) && defined(CONFIG_USB_MTK_DUALMODE)
1909 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1911 struct xhci_input_control_ctx
*ctrl_ctx
;
1912 struct xhci_ep_ctx
*ep_ctx
;
1913 struct xhci_slot_ctx
*slot_ctx
;
1916 /* When a device's add flag and drop flag are zero, any subsequent
1917 * configure endpoint command will leave that endpoint's state
1918 * untouched. Make sure we don't leave any old state in the input
1919 * endpoint contexts.
1921 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1922 ctrl_ctx
->drop_flags
= 0;
1923 ctrl_ctx
->add_flags
= 0;
1924 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1925 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1926 /* Endpoint 0 is always valid */
1927 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1928 for (i
= 1; i
< 31; ++i
) {
1929 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1930 ep_ctx
->ep_info
= 0;
1931 ep_ctx
->ep_info2
= 0;
1933 ep_ctx
->tx_info
= 0;
1937 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1938 struct usb_device
*udev
, u32
*cmd_status
)
1942 switch (*cmd_status
) {
1944 dev_warn(&udev
->dev
, "Not enough host controller resources "
1945 "for new device state.\n");
1947 /* FIXME: can we allocate more resources for the HC? */
1950 case COMP_2ND_BW_ERR
:
1951 dev_warn(&udev
->dev
, "Not enough bandwidth "
1952 "for new device state.\n");
1954 /* FIXME: can we go back to the old state? */
1957 /* the HCD set up something wrong */
1958 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1960 "and endpoint is not disabled.\n");
1964 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1965 "configure command.\n");
1969 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1973 xhci_err(xhci
, "ERROR: unexpected command completion "
1974 "code 0x%x.\n", *cmd_status
);
1981 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1982 struct usb_device
*udev
, u32
*cmd_status
)
1985 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1987 switch (*cmd_status
) {
1989 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1990 "context command.\n");
1994 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1995 "evaluate context command.\n");
1998 case COMP_CTX_STATE
:
1999 dev_warn(&udev
->dev
, "WARN: invalid context state for "
2000 "evaluate context command.\n");
2001 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
2005 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
2006 "context command.\n");
2010 /* Max Exit Latency too large error */
2011 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
2015 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
2019 xhci_err(xhci
, "ERROR: unexpected command completion "
2020 "code 0x%x.\n", *cmd_status
);
2027 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
2028 struct xhci_container_ctx
*in_ctx
)
2030 struct xhci_input_control_ctx
*ctrl_ctx
;
2031 u32 valid_add_flags
;
2032 u32 valid_drop_flags
;
2034 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2035 /* Ignore the slot flag (bit 0), and the default control endpoint flag
2036 * (bit 1). The default control endpoint is added during the Address
2037 * Device command and is never removed until the slot is disabled.
2039 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
2040 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
2042 /* Use hweight32 to count the number of ones in the add flags, or
2043 * number of endpoints added. Don't count endpoints that are changed
2044 * (both added and dropped).
2046 return hweight32(valid_add_flags
) -
2047 hweight32(valid_add_flags
& valid_drop_flags
);
2050 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
2051 struct xhci_container_ctx
*in_ctx
)
2053 struct xhci_input_control_ctx
*ctrl_ctx
;
2054 u32 valid_add_flags
;
2055 u32 valid_drop_flags
;
2057 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2058 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
2059 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
2061 return hweight32(valid_drop_flags
) -
2062 hweight32(valid_add_flags
& valid_drop_flags
);
2066 * We need to reserve the new number of endpoints before the configure endpoint
2067 * command completes. We can't subtract the dropped endpoints from the number
2068 * of active endpoints until the command completes because we can oversubscribe
2069 * the host in this case:
2071 * - the first configure endpoint command drops more endpoints than it adds
2072 * - a second configure endpoint command that adds more endpoints is queued
2073 * - the first configure endpoint command fails, so the config is unchanged
2074 * - the second command may succeed, even though there isn't enough resources
2076 * Must be called with xhci->lock held.
2078 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
2079 struct xhci_container_ctx
*in_ctx
)
2083 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
2084 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
2085 xhci_dbg(xhci
, "Not enough ep ctxs: "
2086 "%u active, need to add %u, limit is %u.\n",
2087 xhci
->num_active_eps
, added_eps
,
2088 xhci
->limit_active_eps
);
2091 xhci
->num_active_eps
+= added_eps
;
2092 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
2093 xhci
->num_active_eps
);
2098 * The configure endpoint was failed by the xHC for some other reason, so we
2099 * need to revert the resources that failed configuration would have used.
2101 * Must be called with xhci->lock held.
2103 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
2104 struct xhci_container_ctx
*in_ctx
)
2108 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
2109 xhci
->num_active_eps
-= num_failed_eps
;
2110 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
2112 xhci
->num_active_eps
);
2116 * Now that the command has completed, clean up the active endpoint count by
2117 * subtracting out the endpoints that were dropped (but not changed).
2119 * Must be called with xhci->lock held.
2121 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
2122 struct xhci_container_ctx
*in_ctx
)
2124 u32 num_dropped_eps
;
2126 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
2127 xhci
->num_active_eps
-= num_dropped_eps
;
2128 if (num_dropped_eps
)
2129 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
2131 xhci
->num_active_eps
);
2134 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
2136 switch (udev
->speed
) {
2138 case USB_SPEED_FULL
:
2140 case USB_SPEED_HIGH
:
2142 case USB_SPEED_SUPER
:
2144 case USB_SPEED_UNKNOWN
:
2145 case USB_SPEED_WIRELESS
:
2147 /* Should never happen */
2153 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2155 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2157 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2162 /* If we are changing a LS/FS device under a HS hub,
2163 * make sure (if we are activating a new TT) that the HS bus has enough
2164 * bandwidth for this new TT.
2166 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2167 struct xhci_virt_device
*virt_dev
,
2170 struct xhci_interval_bw_table
*bw_table
;
2171 struct xhci_tt_bw_info
*tt_info
;
2173 /* Find the bandwidth table for the root port this TT is attached to. */
2174 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2175 tt_info
= virt_dev
->tt_info
;
2176 /* If this TT already had active endpoints, the bandwidth for this TT
2177 * has already been added. Removing all periodic endpoints (and thus
2178 * making the TT enactive) will only decrease the bandwidth used.
2182 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2183 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2187 /* Not sure why we would have no new active endpoints...
2189 * Maybe because of an Evaluate Context change for a hub update or a
2190 * control endpoint 0 max packet size change?
2191 * FIXME: skip the bandwidth calculation in that case.
2196 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2197 struct xhci_virt_device
*virt_dev
)
2199 unsigned int bw_reserved
;
2201 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2202 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2205 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2206 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2213 * This algorithm is a very conservative estimate of the worst-case scheduling
2214 * scenario for any one interval. The hardware dynamically schedules the
2215 * packets, so we can't tell which microframe could be the limiting factor in
2216 * the bandwidth scheduling. This only takes into account periodic endpoints.
2218 * Obviously, we can't solve an NP complete problem to find the minimum worst
2219 * case scenario. Instead, we come up with an estimate that is no less than
2220 * the worst case bandwidth used for any one microframe, but may be an
2223 * We walk the requirements for each endpoint by interval, starting with the
2224 * smallest interval, and place packets in the schedule where there is only one
2225 * possible way to schedule packets for that interval. In order to simplify
2226 * this algorithm, we record the largest max packet size for each interval, and
2227 * assume all packets will be that size.
2229 * For interval 0, we obviously must schedule all packets for each interval.
2230 * The bandwidth for interval 0 is just the amount of data to be transmitted
2231 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2232 * the number of packets).
2234 * For interval 1, we have two possible microframes to schedule those packets
2235 * in. For this algorithm, if we can schedule the same number of packets for
2236 * each possible scheduling opportunity (each microframe), we will do so. The
2237 * remaining number of packets will be saved to be transmitted in the gaps in
2238 * the next interval's scheduling sequence.
2240 * As we move those remaining packets to be scheduled with interval 2 packets,
2241 * we have to double the number of remaining packets to transmit. This is
2242 * because the intervals are actually powers of 2, and we would be transmitting
2243 * the previous interval's packets twice in this interval. We also have to be
2244 * sure that when we look at the largest max packet size for this interval, we
2245 * also look at the largest max packet size for the remaining packets and take
2246 * the greater of the two.
2248 * The algorithm continues to evenly distribute packets in each scheduling
2249 * opportunity, and push the remaining packets out, until we get to the last
2250 * interval. Then those packets and their associated overhead are just added
2251 * to the bandwidth used.
2253 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2254 struct xhci_virt_device
*virt_dev
,
2257 unsigned int bw_reserved
;
2258 unsigned int max_bandwidth
;
2259 unsigned int bw_used
;
2260 unsigned int block_size
;
2261 struct xhci_interval_bw_table
*bw_table
;
2262 unsigned int packet_size
= 0;
2263 unsigned int overhead
= 0;
2264 unsigned int packets_transmitted
= 0;
2265 unsigned int packets_remaining
= 0;
2268 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2269 return xhci_check_ss_bw(xhci
, virt_dev
);
2271 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2272 max_bandwidth
= HS_BW_LIMIT
;
2273 /* Convert percent of bus BW reserved to blocks reserved */
2274 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2276 max_bandwidth
= FS_BW_LIMIT
;
2277 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2280 bw_table
= virt_dev
->bw_table
;
2281 /* We need to translate the max packet size and max ESIT payloads into
2282 * the units the hardware uses.
2284 block_size
= xhci_get_block_size(virt_dev
->udev
);
2286 /* If we are manipulating a LS/FS device under a HS hub, double check
2287 * that the HS bus has enough bandwidth if we are activing a new TT.
2289 if (virt_dev
->tt_info
) {
2290 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2291 virt_dev
->real_port
);
2292 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2293 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2294 "newly activated TT.\n");
2297 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
2298 virt_dev
->tt_info
->slot_id
,
2299 virt_dev
->tt_info
->ttport
);
2301 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2302 virt_dev
->real_port
);
2305 /* Add in how much bandwidth will be used for interval zero, or the
2306 * rounded max ESIT payload + number of packets * largest overhead.
2308 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2309 bw_table
->interval_bw
[0].num_packets
*
2310 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2312 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2313 unsigned int bw_added
;
2314 unsigned int largest_mps
;
2315 unsigned int interval_overhead
;
2318 * How many packets could we transmit in this interval?
2319 * If packets didn't fit in the previous interval, we will need
2320 * to transmit that many packets twice within this interval.
2322 packets_remaining
= 2 * packets_remaining
+
2323 bw_table
->interval_bw
[i
].num_packets
;
2325 /* Find the largest max packet size of this or the previous
2328 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2331 struct xhci_virt_ep
*virt_ep
;
2332 struct list_head
*ep_entry
;
2334 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2335 virt_ep
= list_entry(ep_entry
,
2336 struct xhci_virt_ep
, bw_endpoint_list
);
2337 /* Convert to blocks, rounding up */
2338 largest_mps
= DIV_ROUND_UP(
2339 virt_ep
->bw_info
.max_packet_size
,
2342 if (largest_mps
> packet_size
)
2343 packet_size
= largest_mps
;
2345 /* Use the larger overhead of this or the previous interval. */
2346 interval_overhead
= xhci_get_largest_overhead(
2347 &bw_table
->interval_bw
[i
]);
2348 if (interval_overhead
> overhead
)
2349 overhead
= interval_overhead
;
2351 /* How many packets can we evenly distribute across
2352 * (1 << (i + 1)) possible scheduling opportunities?
2354 packets_transmitted
= packets_remaining
>> (i
+ 1);
2356 /* Add in the bandwidth used for those scheduled packets */
2357 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2359 /* How many packets do we have remaining to transmit? */
2360 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2362 /* What largest max packet size should those packets have? */
2363 /* If we've transmitted all packets, don't carry over the
2364 * largest packet size.
2366 if (packets_remaining
== 0) {
2369 } else if (packets_transmitted
> 0) {
2370 /* Otherwise if we do have remaining packets, and we've
2371 * scheduled some packets in this interval, take the
2372 * largest max packet size from endpoints with this
2375 packet_size
= largest_mps
;
2376 overhead
= interval_overhead
;
2378 /* Otherwise carry over packet_size and overhead from the last
2379 * time we had a remainder.
2381 bw_used
+= bw_added
;
2382 if (bw_used
> max_bandwidth
) {
2383 xhci_warn(xhci
, "Not enough bandwidth. "
2384 "Proposed: %u, Max: %u\n",
2385 bw_used
, max_bandwidth
);
2390 * Ok, we know we have some packets left over after even-handedly
2391 * scheduling interval 15. We don't know which microframes they will
2392 * fit into, so we over-schedule and say they will be scheduled every
2395 if (packets_remaining
> 0)
2396 bw_used
+= overhead
+ packet_size
;
2398 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2399 unsigned int port_index
= virt_dev
->real_port
- 1;
2401 /* OK, we're manipulating a HS device attached to a
2402 * root port bandwidth domain. Include the number of active TTs
2403 * in the bandwidth used.
2405 bw_used
+= TT_HS_OVERHEAD
*
2406 xhci
->rh_bw
[port_index
].num_active_tts
;
2409 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2410 "Available: %u " "percent\n",
2411 bw_used
, max_bandwidth
, bw_reserved
,
2412 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2415 bw_used
+= bw_reserved
;
2416 if (bw_used
> max_bandwidth
) {
2417 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2418 bw_used
, max_bandwidth
);
2422 bw_table
->bw_used
= bw_used
;
2426 static bool xhci_is_async_ep(unsigned int ep_type
)
2428 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2429 ep_type
!= ISOC_IN_EP
&&
2430 ep_type
!= INT_IN_EP
);
2433 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2435 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2438 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2440 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2442 if (ep_bw
->ep_interval
== 0)
2443 return SS_OVERHEAD_BURST
+
2444 (ep_bw
->mult
* ep_bw
->num_packets
*
2445 (SS_OVERHEAD
+ mps
));
2446 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2447 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2448 1 << ep_bw
->ep_interval
);
2452 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2453 struct xhci_bw_info
*ep_bw
,
2454 struct xhci_interval_bw_table
*bw_table
,
2455 struct usb_device
*udev
,
2456 struct xhci_virt_ep
*virt_ep
,
2457 struct xhci_tt_bw_info
*tt_info
)
2459 struct xhci_interval_bw
*interval_bw
;
2460 int normalized_interval
;
2462 if (xhci_is_async_ep(ep_bw
->type
))
2465 if (udev
->speed
== USB_SPEED_SUPER
) {
2466 if (xhci_is_sync_in_ep(ep_bw
->type
))
2467 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2468 xhci_get_ss_bw_consumed(ep_bw
);
2470 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2471 xhci_get_ss_bw_consumed(ep_bw
);
2475 /* SuperSpeed endpoints never get added to intervals in the table, so
2476 * this check is only valid for HS/FS/LS devices.
2478 if (list_empty(&virt_ep
->bw_endpoint_list
))
2480 /* For LS/FS devices, we need to translate the interval expressed in
2481 * microframes to frames.
2483 if (udev
->speed
== USB_SPEED_HIGH
)
2484 normalized_interval
= ep_bw
->ep_interval
;
2486 normalized_interval
= ep_bw
->ep_interval
- 3;
2488 if (normalized_interval
== 0)
2489 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2490 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2491 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2492 switch (udev
->speed
) {
2494 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2496 case USB_SPEED_FULL
:
2497 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2499 case USB_SPEED_HIGH
:
2500 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2502 case USB_SPEED_SUPER
:
2503 case USB_SPEED_UNKNOWN
:
2504 case USB_SPEED_WIRELESS
:
2505 /* Should never happen because only LS/FS/HS endpoints will get
2506 * added to the endpoint list.
2511 tt_info
->active_eps
-= 1;
2512 list_del_init(&virt_ep
->bw_endpoint_list
);
2515 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2516 struct xhci_bw_info
*ep_bw
,
2517 struct xhci_interval_bw_table
*bw_table
,
2518 struct usb_device
*udev
,
2519 struct xhci_virt_ep
*virt_ep
,
2520 struct xhci_tt_bw_info
*tt_info
)
2522 struct xhci_interval_bw
*interval_bw
;
2523 struct xhci_virt_ep
*smaller_ep
;
2524 int normalized_interval
;
2526 if (xhci_is_async_ep(ep_bw
->type
))
2529 if (udev
->speed
== USB_SPEED_SUPER
) {
2530 if (xhci_is_sync_in_ep(ep_bw
->type
))
2531 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2532 xhci_get_ss_bw_consumed(ep_bw
);
2534 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2535 xhci_get_ss_bw_consumed(ep_bw
);
2539 /* For LS/FS devices, we need to translate the interval expressed in
2540 * microframes to frames.
2542 if (udev
->speed
== USB_SPEED_HIGH
)
2543 normalized_interval
= ep_bw
->ep_interval
;
2545 normalized_interval
= ep_bw
->ep_interval
- 3;
2547 if (normalized_interval
== 0)
2548 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2549 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2550 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2551 switch (udev
->speed
) {
2553 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2555 case USB_SPEED_FULL
:
2556 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2558 case USB_SPEED_HIGH
:
2559 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2561 case USB_SPEED_SUPER
:
2562 case USB_SPEED_UNKNOWN
:
2563 case USB_SPEED_WIRELESS
:
2564 /* Should never happen because only LS/FS/HS endpoints will get
2565 * added to the endpoint list.
2571 tt_info
->active_eps
+= 1;
2572 /* Insert the endpoint into the list, largest max packet size first. */
2573 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2575 if (ep_bw
->max_packet_size
>=
2576 smaller_ep
->bw_info
.max_packet_size
) {
2577 /* Add the new ep before the smaller endpoint */
2578 list_add_tail(&virt_ep
->bw_endpoint_list
,
2579 &smaller_ep
->bw_endpoint_list
);
2583 /* Add the new endpoint at the end of the list. */
2584 list_add_tail(&virt_ep
->bw_endpoint_list
,
2585 &interval_bw
->endpoints
);
2588 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2589 struct xhci_virt_device
*virt_dev
,
2592 struct xhci_root_port_bw_info
*rh_bw_info
;
2593 if (!virt_dev
->tt_info
)
2596 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2597 if (old_active_eps
== 0 &&
2598 virt_dev
->tt_info
->active_eps
!= 0) {
2599 rh_bw_info
->num_active_tts
+= 1;
2600 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2601 } else if (old_active_eps
!= 0 &&
2602 virt_dev
->tt_info
->active_eps
== 0) {
2603 rh_bw_info
->num_active_tts
-= 1;
2604 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2608 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2609 struct xhci_virt_device
*virt_dev
,
2610 struct xhci_container_ctx
*in_ctx
)
2612 struct xhci_bw_info ep_bw_info
[31];
2614 struct xhci_input_control_ctx
*ctrl_ctx
;
2615 int old_active_eps
= 0;
2617 if (virt_dev
->tt_info
)
2618 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2620 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2622 for (i
= 0; i
< 31; i
++) {
2623 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2626 /* Make a copy of the BW info in case we need to revert this */
2627 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2628 sizeof(ep_bw_info
[i
]));
2629 /* Drop the endpoint from the interval table if the endpoint is
2630 * being dropped or changed.
2632 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2633 xhci_drop_ep_from_interval_table(xhci
,
2634 &virt_dev
->eps
[i
].bw_info
,
2640 /* Overwrite the information stored in the endpoints' bw_info */
2641 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2642 for (i
= 0; i
< 31; i
++) {
2643 /* Add any changed or added endpoints to the interval table */
2644 if (EP_IS_ADDED(ctrl_ctx
, i
))
2645 xhci_add_ep_to_interval_table(xhci
,
2646 &virt_dev
->eps
[i
].bw_info
,
2653 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2654 /* Ok, this fits in the bandwidth we have.
2655 * Update the number of active TTs.
2657 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2661 /* We don't have enough bandwidth for this, revert the stored info. */
2662 for (i
= 0; i
< 31; i
++) {
2663 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2666 /* Drop the new copies of any added or changed endpoints from
2667 * the interval table.
2669 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2670 xhci_drop_ep_from_interval_table(xhci
,
2671 &virt_dev
->eps
[i
].bw_info
,
2677 /* Revert the endpoint back to its old information */
2678 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2679 sizeof(ep_bw_info
[i
]));
2680 /* Add any changed or dropped endpoints back into the table */
2681 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2682 xhci_add_ep_to_interval_table(xhci
,
2683 &virt_dev
->eps
[i
].bw_info
,
2693 /* Issue a configure endpoint command or evaluate context command
2694 * and wait for it to finish.
2696 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2697 struct usb_device
*udev
,
2698 struct xhci_command
*command
,
2699 bool ctx_change
, bool must_succeed
)
2703 unsigned long flags
;
2704 struct xhci_container_ctx
*in_ctx
;
2705 struct completion
*cmd_completion
;
2707 struct xhci_virt_device
*virt_dev
;
2708 union xhci_trb
*cmd_trb
;
2710 spin_lock_irqsave(&xhci
->lock
, flags
);
2711 virt_dev
= xhci
->devs
[udev
->slot_id
];
2714 in_ctx
= command
->in_ctx
;
2716 in_ctx
= virt_dev
->in_ctx
;
2718 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2719 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2720 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2721 xhci_warn(xhci
, "Not enough host resources, "
2722 "active endpoint contexts = %u\n",
2723 xhci
->num_active_eps
);
2726 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2727 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2728 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2729 xhci_free_host_resources(xhci
, in_ctx
);
2730 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2731 xhci_warn(xhci
, "Not enough bandwidth\n");
2736 cmd_completion
= command
->completion
;
2737 cmd_status
= &command
->status
;
2738 command
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2739 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2741 cmd_completion
= &virt_dev
->cmd_completion
;
2742 cmd_status
= &virt_dev
->cmd_status
;
2744 init_completion(cmd_completion
);
2746 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2748 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2749 udev
->slot_id
, must_succeed
);
2751 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2752 udev
->slot_id
, must_succeed
);
2755 list_del(&command
->cmd_list
);
2756 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2757 xhci_free_host_resources(xhci
, in_ctx
);
2758 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2759 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2762 xhci_ring_cmd_db(xhci
);
2763 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2765 /* Wait for the configure endpoint command to complete */
2766 timeleft
= wait_for_completion_interruptible_timeout(
2768 XHCI_CMD_DEFAULT_TIMEOUT
);
2769 if (timeleft
<= 0) {
2770 xhci_warn(xhci
, "%s while waiting for %s command\n",
2771 timeleft
== 0 ? "Timeout" : "Signal",
2773 "configure endpoint" :
2774 "evaluate context");
2775 /* cancel the configure endpoint command */
2776 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2783 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2785 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2787 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2788 spin_lock_irqsave(&xhci
->lock
, flags
);
2789 /* If the command failed, remove the reserved resources.
2790 * Otherwise, clean up the estimate to include dropped eps.
2793 xhci_free_host_resources(xhci
, in_ctx
);
2795 xhci_finish_resource_reservation(xhci
, in_ctx
);
2796 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2801 /* Called after one or more calls to xhci_add_endpoint() or
2802 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2803 * to call xhci_reset_bandwidth().
2805 * Since we are in the middle of changing either configuration or
2806 * installing a new alt setting, the USB core won't allow URBs to be
2807 * enqueued for any endpoint on the old config or interface. Nothing
2808 * else should be touching the xhci->devs[slot_id] structure, so we
2809 * don't need to take the xhci->lock for manipulating that.
2811 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2815 struct xhci_hcd
*xhci
;
2816 struct xhci_virt_device
*virt_dev
;
2817 struct xhci_input_control_ctx
*ctrl_ctx
;
2818 struct xhci_slot_ctx
*slot_ctx
;
2820 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2823 xhci
= hcd_to_xhci(hcd
);
2824 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2827 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2828 virt_dev
= xhci
->devs
[udev
->slot_id
];
2830 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2831 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2832 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2833 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2834 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2836 /* Don't issue the command if there's no endpoints to update. */
2837 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2838 ctrl_ctx
->drop_flags
== 0)
2841 xhci_dbg(xhci
, "New Input Control Context:\n");
2842 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2843 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2844 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2846 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2849 /* Callee should call reset_bandwidth() */
2853 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2854 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2855 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2857 /* Free any rings that were dropped, but not changed. */
2858 for (i
= 1; i
< 31; ++i
) {
2859 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2860 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2861 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2863 xhci_zero_in_ctx(xhci
, virt_dev
);
2865 * Install any rings for completely new endpoints or changed endpoints,
2866 * and free or cache any old rings from changed endpoints.
2868 for (i
= 1; i
< 31; ++i
) {
2869 if (!virt_dev
->eps
[i
].new_ring
)
2871 /* Only cache or free the old ring if it exists.
2872 * It may not if this is the first add of an endpoint.
2874 if (virt_dev
->eps
[i
].ring
) {
2875 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2877 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2878 virt_dev
->eps
[i
].new_ring
= NULL
;
2884 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2886 struct xhci_hcd
*xhci
;
2887 struct xhci_virt_device
*virt_dev
;
2890 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2893 xhci
= hcd_to_xhci(hcd
);
2895 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2896 virt_dev
= xhci
->devs
[udev
->slot_id
];
2897 /* Free any rings allocated for added endpoints */
2898 for (i
= 0; i
< 31; ++i
) {
2899 if (virt_dev
->eps
[i
].new_ring
) {
2900 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2901 virt_dev
->eps
[i
].new_ring
= NULL
;
2904 xhci_zero_in_ctx(xhci
, virt_dev
);
2907 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2908 struct xhci_container_ctx
*in_ctx
,
2909 struct xhci_container_ctx
*out_ctx
,
2910 u32 add_flags
, u32 drop_flags
)
2912 struct xhci_input_control_ctx
*ctrl_ctx
;
2913 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2914 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2915 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2916 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2917 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2919 xhci_dbg(xhci
, "Input Context:\n");
2920 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2923 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2924 unsigned int slot_id
, unsigned int ep_index
,
2925 struct xhci_dequeue_state
*deq_state
)
2927 struct xhci_container_ctx
*in_ctx
;
2928 struct xhci_ep_ctx
*ep_ctx
;
2932 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2933 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2934 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2935 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2936 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2937 deq_state
->new_deq_ptr
);
2939 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2940 "reset ep command\n");
2941 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2942 deq_state
->new_deq_seg
,
2943 deq_state
->new_deq_ptr
);
2946 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2948 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2949 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2950 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2953 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2954 struct usb_device
*udev
, unsigned int ep_index
)
2956 struct xhci_dequeue_state deq_state
;
2957 struct xhci_virt_ep
*ep
;
2959 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2960 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2961 /* We need to move the HW's dequeue pointer past this TD,
2962 * or it will attempt to resend it on the next doorbell ring.
2964 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2965 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2968 /* HW with the reset endpoint quirk will use the saved dequeue state to
2969 * issue a configure endpoint command later.
2971 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2972 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2973 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2974 ep_index
, ep
->stopped_stream
, &deq_state
);
2976 /* Better hope no one uses the input context between now and the
2977 * reset endpoint completion!
2978 * XXX: No idea how this hardware will react when stream rings
2981 xhci_dbg(xhci
, "Setting up input context for "
2982 "configure endpoint command\n");
2983 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2984 ep_index
, &deq_state
);
2988 /* Deal with stalled endpoints. The core should have sent the control message
2989 * to clear the halt condition. However, we need to make the xHCI hardware
2990 * reset its sequence number, since a device will expect a sequence number of
2991 * zero after the halt condition is cleared.
2992 * Context: in_interrupt
2994 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2995 struct usb_host_endpoint
*ep
)
2997 struct xhci_hcd
*xhci
;
2998 struct usb_device
*udev
;
2999 unsigned int ep_index
;
3000 unsigned long flags
;
3002 struct xhci_virt_ep
*virt_ep
;
3004 xhci
= hcd_to_xhci(hcd
);
3005 udev
= (struct usb_device
*) ep
->hcpriv
;
3006 /* Called with a root hub endpoint (or an endpoint that wasn't added
3007 * with xhci_add_endpoint()
3011 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
3012 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
3013 if (!virt_ep
->stopped_td
) {
3014 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
3015 ep
->desc
.bEndpointAddress
);
3018 if (usb_endpoint_xfer_control(&ep
->desc
)) {
3019 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
3023 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
3024 spin_lock_irqsave(&xhci
->lock
, flags
);
3025 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
3027 * Can't change the ring dequeue pointer until it's transitioned to the
3028 * stopped state, which is only upon a successful reset endpoint
3029 * command. Better hope that last command worked!
3032 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
3033 kfree(virt_ep
->stopped_td
);
3034 xhci_ring_cmd_db(xhci
);
3036 virt_ep
->stopped_td
= NULL
;
3037 virt_ep
->stopped_trb
= NULL
;
3038 virt_ep
->stopped_stream
= 0;
3039 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3042 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
3045 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
3046 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
3047 unsigned int slot_id
)
3050 unsigned int ep_index
;
3051 unsigned int ep_state
;
3055 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
3058 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
3059 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
3060 " descriptor for ep 0x%x does not support streams\n",
3061 ep
->desc
.bEndpointAddress
);
3065 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
3066 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3067 if (ep_state
& EP_HAS_STREAMS
||
3068 ep_state
& EP_GETTING_STREAMS
) {
3069 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
3070 "already has streams set up.\n",
3071 ep
->desc
.bEndpointAddress
);
3072 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
3073 "dynamic stream context array reallocation.\n");
3076 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
3077 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
3078 "endpoint 0x%x; URBs are pending.\n",
3079 ep
->desc
.bEndpointAddress
);
3085 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
3086 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
3088 unsigned int max_streams
;
3090 /* The stream context array size must be a power of two */
3091 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
3093 * Find out how many primary stream array entries the host controller
3094 * supports. Later we may use secondary stream arrays (similar to 2nd
3095 * level page entries), but that's an optional feature for xHCI host
3096 * controllers. xHCs must support at least 4 stream IDs.
3098 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
3099 if (*num_stream_ctxs
> max_streams
) {
3100 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
3102 *num_stream_ctxs
= max_streams
;
3103 *num_streams
= max_streams
;
3107 /* Returns an error code if one of the endpoint already has streams.
3108 * This does not change any data structures, it only checks and gathers
3111 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
3112 struct usb_device
*udev
,
3113 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3114 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
3116 unsigned int max_streams
;
3117 unsigned int endpoint_flag
;
3121 for (i
= 0; i
< num_eps
; i
++) {
3122 ret
= xhci_check_streams_endpoint(xhci
, udev
,
3123 eps
[i
], udev
->slot_id
);
3127 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3128 if (max_streams
< (*num_streams
- 1)) {
3129 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3130 eps
[i
]->desc
.bEndpointAddress
,
3132 *num_streams
= max_streams
+1;
3135 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3136 if (*changed_ep_bitmask
& endpoint_flag
)
3138 *changed_ep_bitmask
|= endpoint_flag
;
3143 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3144 struct usb_device
*udev
,
3145 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3147 u32 changed_ep_bitmask
= 0;
3148 unsigned int slot_id
;
3149 unsigned int ep_index
;
3150 unsigned int ep_state
;
3153 slot_id
= udev
->slot_id
;
3154 if (!xhci
->devs
[slot_id
])
3157 for (i
= 0; i
< num_eps
; i
++) {
3158 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3159 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3160 /* Are streams already being freed for the endpoint? */
3161 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3162 xhci_warn(xhci
, "WARN Can't disable streams for "
3164 "streams are being disabled already.",
3165 eps
[i
]->desc
.bEndpointAddress
);
3168 /* Are there actually any streams to free? */
3169 if (!(ep_state
& EP_HAS_STREAMS
) &&
3170 !(ep_state
& EP_GETTING_STREAMS
)) {
3171 xhci_warn(xhci
, "WARN Can't disable streams for "
3173 "streams are already disabled!",
3174 eps
[i
]->desc
.bEndpointAddress
);
3175 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3176 "with non-streams endpoint\n");
3179 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3181 return changed_ep_bitmask
;
3185 * The USB device drivers use this function (though the HCD interface in USB
3186 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3187 * coordinate mass storage command queueing across multiple endpoints (basically
3188 * a stream ID == a task ID).
3190 * Setting up streams involves allocating the same size stream context array
3191 * for each endpoint and issuing a configure endpoint command for all endpoints.
3193 * Don't allow the call to succeed if one endpoint only supports one stream
3194 * (which means it doesn't support streams at all).
3196 * Drivers may get less stream IDs than they asked for, if the host controller
3197 * hardware or endpoints claim they can't support the number of requested
3200 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3201 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3202 unsigned int num_streams
, gfp_t mem_flags
)
3205 struct xhci_hcd
*xhci
;
3206 struct xhci_virt_device
*vdev
;
3207 struct xhci_command
*config_cmd
;
3208 unsigned int ep_index
;
3209 unsigned int num_stream_ctxs
;
3210 unsigned long flags
;
3211 u32 changed_ep_bitmask
= 0;
3216 /* Add one to the number of streams requested to account for
3217 * stream 0 that is reserved for xHCI usage.
3220 xhci
= hcd_to_xhci(hcd
);
3221 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3224 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3226 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3230 /* Check to make sure all endpoints are not already configured for
3231 * streams. While we're at it, find the maximum number of streams that
3232 * all the endpoints will support and check for duplicate endpoints.
3234 spin_lock_irqsave(&xhci
->lock
, flags
);
3235 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3236 num_eps
, &num_streams
, &changed_ep_bitmask
);
3238 xhci_free_command(xhci
, config_cmd
);
3239 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3242 if (num_streams
<= 1) {
3243 xhci_warn(xhci
, "WARN: endpoints can't handle "
3244 "more than one stream.\n");
3245 xhci_free_command(xhci
, config_cmd
);
3246 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3249 vdev
= xhci
->devs
[udev
->slot_id
];
3250 /* Mark each endpoint as being in transition, so
3251 * xhci_urb_enqueue() will reject all URBs.
3253 for (i
= 0; i
< num_eps
; i
++) {
3254 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3255 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3257 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3259 /* Setup internal data structures and allocate HW data structures for
3260 * streams (but don't install the HW structures in the input context
3261 * until we're sure all memory allocation succeeded).
3263 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3264 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3265 num_stream_ctxs
, num_streams
);
3267 for (i
= 0; i
< num_eps
; i
++) {
3268 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3269 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3271 num_streams
, mem_flags
);
3272 if (!vdev
->eps
[ep_index
].stream_info
)
3274 /* Set maxPstreams in endpoint context and update deq ptr to
3275 * point to stream context array. FIXME
3279 /* Set up the input context for a configure endpoint command. */
3280 for (i
= 0; i
< num_eps
; i
++) {
3281 struct xhci_ep_ctx
*ep_ctx
;
3283 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3284 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3286 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3287 vdev
->out_ctx
, ep_index
);
3288 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3289 vdev
->eps
[ep_index
].stream_info
);
3291 /* Tell the HW to drop its old copy of the endpoint context info
3292 * and add the updated copy from the input context.
3294 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3295 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3297 /* Issue and wait for the configure endpoint command */
3298 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3301 /* xHC rejected the configure endpoint command for some reason, so we
3302 * leave the old ring intact and free our internal streams data
3308 spin_lock_irqsave(&xhci
->lock
, flags
);
3309 for (i
= 0; i
< num_eps
; i
++) {
3310 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3311 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3312 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3313 udev
->slot_id
, ep_index
);
3314 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3316 xhci_free_command(xhci
, config_cmd
);
3317 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3319 /* Subtract 1 for stream 0, which drivers can't use */
3320 return num_streams
- 1;
3323 /* If it didn't work, free the streams! */
3324 for (i
= 0; i
< num_eps
; i
++) {
3325 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3326 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3327 vdev
->eps
[ep_index
].stream_info
= NULL
;
3328 /* FIXME Unset maxPstreams in endpoint context and
3329 * update deq ptr to point to normal string ring.
3331 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3332 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3333 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3335 xhci_free_command(xhci
, config_cmd
);
3339 /* Transition the endpoint from using streams to being a "normal" endpoint
3342 * Modify the endpoint context state, submit a configure endpoint command,
3343 * and free all endpoint rings for streams if that completes successfully.
3345 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3346 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3350 struct xhci_hcd
*xhci
;
3351 struct xhci_virt_device
*vdev
;
3352 struct xhci_command
*command
;
3353 unsigned int ep_index
;
3354 unsigned long flags
;
3355 u32 changed_ep_bitmask
;
3357 xhci
= hcd_to_xhci(hcd
);
3358 vdev
= xhci
->devs
[udev
->slot_id
];
3360 /* Set up a configure endpoint command to remove the streams rings */
3361 spin_lock_irqsave(&xhci
->lock
, flags
);
3362 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3363 udev
, eps
, num_eps
);
3364 if (changed_ep_bitmask
== 0) {
3365 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3369 /* Use the xhci_command structure from the first endpoint. We may have
3370 * allocated too many, but the driver may call xhci_free_streams() for
3371 * each endpoint it grouped into one call to xhci_alloc_streams().
3373 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3374 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3375 for (i
= 0; i
< num_eps
; i
++) {
3376 struct xhci_ep_ctx
*ep_ctx
;
3378 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3379 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3380 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3381 EP_GETTING_NO_STREAMS
;
3383 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3384 vdev
->out_ctx
, ep_index
);
3385 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3386 &vdev
->eps
[ep_index
]);
3388 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3389 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3390 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3392 /* Issue and wait for the configure endpoint command,
3393 * which must succeed.
3395 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3398 /* xHC rejected the configure endpoint command for some reason, so we
3399 * leave the streams rings intact.
3404 spin_lock_irqsave(&xhci
->lock
, flags
);
3405 for (i
= 0; i
< num_eps
; i
++) {
3406 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3407 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3408 vdev
->eps
[ep_index
].stream_info
= NULL
;
3409 /* FIXME Unset maxPstreams in endpoint context and
3410 * update deq ptr to point to normal string ring.
3412 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3413 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3415 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3421 * Deletes endpoint resources for endpoints that were active before a Reset
3422 * Device command, or a Disable Slot command. The Reset Device command leaves
3423 * the control endpoint intact, whereas the Disable Slot command deletes it.
3425 * Must be called with xhci->lock held.
3427 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3428 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3431 unsigned int num_dropped_eps
= 0;
3432 unsigned int drop_flags
= 0;
3434 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3435 if (virt_dev
->eps
[i
].ring
) {
3436 drop_flags
|= 1 << i
;
3440 xhci
->num_active_eps
-= num_dropped_eps
;
3441 if (num_dropped_eps
)
3442 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3444 num_dropped_eps
, drop_flags
,
3445 xhci
->num_active_eps
);
3449 * This submits a Reset Device Command, which will set the device state to 0,
3450 * set the device address to 0, and disable all the endpoints except the default
3451 * control endpoint. The USB core should come back and call
3452 * xhci_address_device(), and then re-set up the configuration. If this is
3453 * called because of a usb_reset_and_verify_device(), then the old alternate
3454 * settings will be re-installed through the normal bandwidth allocation
3457 * Wait for the Reset Device command to finish. Remove all structures
3458 * associated with the endpoints that were disabled. Clear the input device
3459 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3461 * If the virt_dev to be reset does not exist or does not match the udev,
3462 * it means the device is lost, possibly due to the xHC restore error and
3463 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3464 * re-allocate the device.
3466 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3469 unsigned long flags
;
3470 struct xhci_hcd
*xhci
;
3471 unsigned int slot_id
;
3472 struct xhci_virt_device
*virt_dev
;
3473 struct xhci_command
*reset_device_cmd
;
3475 int last_freed_endpoint
;
3476 struct xhci_slot_ctx
*slot_ctx
;
3477 int old_active_eps
= 0;
3479 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3482 xhci
= hcd_to_xhci(hcd
);
3483 slot_id
= udev
->slot_id
;
3484 virt_dev
= xhci
->devs
[slot_id
];
3486 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3487 "not exist. Re-allocate the device\n", slot_id
);
3488 ret
= xhci_alloc_dev(hcd
, udev
);
3495 if (virt_dev
->udev
!= udev
) {
3496 /* If the virt_dev and the udev does not match, this virt_dev
3497 * may belong to another udev.
3498 * Re-allocate the device.
3500 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3501 "not match the udev. Re-allocate the device\n",
3503 ret
= xhci_alloc_dev(hcd
, udev
);
3510 /* If device is not setup, there is no point in resetting it */
3511 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3512 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3513 SLOT_STATE_DISABLED
)
3516 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3517 /* Allocate the command structure that holds the struct completion.
3518 * Assume we're in process context, since the normal device reset
3519 * process has to wait for the device anyway. Storage devices are
3520 * reset as part of error handling, so use GFP_NOIO instead of
3523 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3524 if (!reset_device_cmd
) {
3525 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3529 /* Attempt to submit the Reset Device command to the command ring */
3530 spin_lock_irqsave(&xhci
->lock
, flags
);
3531 reset_device_cmd
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3533 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3534 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3536 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3537 list_del(&reset_device_cmd
->cmd_list
);
3538 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3539 goto command_cleanup
;
3541 xhci_ring_cmd_db(xhci
);
3542 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3544 /* Wait for the Reset Device command to finish */
3545 timeleft
= wait_for_completion_interruptible_timeout(
3546 reset_device_cmd
->completion
,
3547 USB_CTRL_SET_TIMEOUT
);
3548 if (timeleft
<= 0) {
3549 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3550 timeleft
== 0 ? "Timeout" : "Signal");
3551 spin_lock_irqsave(&xhci
->lock
, flags
);
3552 /* The timeout might have raced with the event ring handler, so
3553 * only delete from the list if the item isn't poisoned.
3555 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3556 list_del(&reset_device_cmd
->cmd_list
);
3557 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3559 goto command_cleanup
;
3562 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3563 * unless we tried to reset a slot ID that wasn't enabled,
3564 * or the device wasn't in the addressed or configured state.
3566 ret
= reset_device_cmd
->status
;
3568 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3569 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3570 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3572 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3573 xhci_info(xhci
, "Not freeing device rings.\n");
3574 /* Don't treat this as an error. May change my mind later. */
3576 goto command_cleanup
;
3578 xhci_dbg(xhci
, "Successful reset device command.\n");
3581 if (xhci_is_vendor_info_code(xhci
, ret
))
3583 xhci_warn(xhci
, "Unknown completion code %u for "
3584 "reset device command.\n", ret
);
3586 goto command_cleanup
;
3589 /* Free up host controller endpoint resources */
3590 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3591 spin_lock_irqsave(&xhci
->lock
, flags
);
3592 /* Don't delete the default control endpoint resources */
3593 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3594 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3597 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3598 last_freed_endpoint
= 1;
3599 for (i
= 1; i
< 31; ++i
) {
3600 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3602 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3603 xhci_free_stream_info(xhci
, ep
->stream_info
);
3604 ep
->stream_info
= NULL
;
3605 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3609 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3610 last_freed_endpoint
= i
;
3612 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3613 xhci_drop_ep_from_interval_table(xhci
,
3614 &virt_dev
->eps
[i
].bw_info
,
3619 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3621 /* If necessary, update the number of active TTs on this root port */
3622 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3624 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3625 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3629 xhci_free_command(xhci
, reset_device_cmd
);
3634 * At this point, the struct usb_device is about to go away, the device has
3635 * disconnected, and all traffic has been stopped and the endpoints have been
3636 * disabled. Free any HC data structures associated with that device.
3638 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3640 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3641 struct xhci_virt_device
*virt_dev
;
3642 #ifndef CONFIG_USB_DEFAULT_PERSIST
3643 struct device
*dev
= hcd
->self
.controller
;
3645 unsigned long flags
;
3649 #ifndef CONFIG_USB_DEFAULT_PERSIST
3651 * We called pm_runtime_get_noresume when the device was attached.
3652 * Decrement the counter here to allow controller to runtime suspend
3653 * if no devices remain.
3655 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3656 pm_runtime_put_noidle(dev
);
3659 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3660 /* If the host is halted due to driver unload, we still need to free the
3663 if (ret
<= 0 && ret
!= -ENODEV
)
3666 virt_dev
= xhci
->devs
[udev
->slot_id
];
3668 /* Stop any wayward timer functions (which may grab the lock) */
3669 for (i
= 0; i
< 31; ++i
) {
3670 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3671 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3674 if (udev
->usb2_hw_lpm_enabled
) {
3675 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3676 udev
->usb2_hw_lpm_enabled
= 0;
3679 spin_lock_irqsave(&xhci
->lock
, flags
);
3680 /* Don't disable the slot if the host controller is dead. */
3681 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3682 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3683 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3684 xhci_free_virt_device(xhci
, udev
->slot_id
);
3685 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3689 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3690 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3691 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3694 xhci_ring_cmd_db(xhci
);
3695 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3697 * Event command completion handler will free any data structures
3698 * associated with the slot. XXX Can free sleep?
3703 * Checks if we have enough host controller resources for the default control
3706 * Must be called with xhci->lock held.
3708 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3710 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3711 xhci_dbg(xhci
, "Not enough ep ctxs: "
3712 "%u active, need to add 1, limit is %u.\n",
3713 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3716 xhci
->num_active_eps
+= 1;
3717 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3718 xhci
->num_active_eps
);
3724 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3725 * timed out, or allocating memory failed. Returns 1 on success.
3727 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3729 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3730 struct device
*dev
= hcd
->self
.controller
;
3731 unsigned long flags
;
3734 union xhci_trb
*cmd_trb
;
3736 spin_lock_irqsave(&xhci
->lock
, flags
);
3737 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3738 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3740 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3741 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3744 xhci_ring_cmd_db(xhci
);
3745 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3747 /* XXX: how much time for xHC slot assignment? */
3748 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3749 XHCI_CMD_DEFAULT_TIMEOUT
);
3750 if (timeleft
<= 0) {
3751 xhci_warn(xhci
, "%s while waiting for a slot\n",
3752 timeleft
== 0 ? "Timeout" : "Signal");
3753 /* cancel the enable slot request */
3754 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3757 if (!xhci
->slot_id
) {
3758 xhci_err(xhci
, "Error while assigning device slot ID\n");
3762 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3763 spin_lock_irqsave(&xhci
->lock
, flags
);
3764 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3766 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3767 xhci_warn(xhci
, "Not enough host resources, "
3768 "active endpoint contexts = %u\n",
3769 xhci
->num_active_eps
);
3772 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3774 /* Use GFP_NOIO, since this function can be called from
3775 * xhci_discover_or_reset_device(), which may be called as part of
3776 * mass storage driver error handling.
3778 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3779 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3782 udev
->slot_id
= xhci
->slot_id
;
3784 #ifndef CONFIG_USB_DEFAULT_PERSIST
3786 * If resetting upon resume, we can't put the controller into runtime
3787 * suspend if there is a device attached.
3789 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3790 pm_runtime_get_noresume(dev
);
3793 /* Is this a LS or FS device under a HS hub? */
3794 /* Hub or peripherial? */
3798 /* Disable slot, if we can do it without mem alloc */
3799 spin_lock_irqsave(&xhci
->lock
, flags
);
3800 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3801 xhci_ring_cmd_db(xhci
);
3802 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3807 * Issue an Address Device command (which will issue a SetAddress request to
3809 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3810 * we should only issue and wait on one address command at the same time.
3812 * We add one to the device address issued by the hardware because the USB core
3813 * uses address 1 for the root hubs (even though they're not really devices).
3815 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3817 unsigned long flags
;
3819 struct xhci_virt_device
*virt_dev
;
3821 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3822 struct xhci_slot_ctx
*slot_ctx
;
3823 struct xhci_input_control_ctx
*ctrl_ctx
;
3825 union xhci_trb
*cmd_trb
;
3827 if (!udev
->slot_id
) {
3828 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3832 virt_dev
= xhci
->devs
[udev
->slot_id
];
3834 if (WARN_ON(!virt_dev
)) {
3836 * In plug/unplug torture test with an NEC controller,
3837 * a zero-dereference was observed once due to virt_dev = 0.
3838 * Print useful debug rather than crash if it is observed again!
3840 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3845 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3847 * If this is the first Set Address since device plug-in or
3848 * virt_device realloaction after a resume with an xHCI power loss,
3849 * then set up the slot context.
3851 if (!slot_ctx
->dev_info
)
3852 xhci_setup_addressable_virt_dev(xhci
, udev
);
3853 /* Otherwise, update the control endpoint ring enqueue pointer. */
3855 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3856 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3857 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3858 ctrl_ctx
->drop_flags
= 0;
3860 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3861 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3863 spin_lock_irqsave(&xhci
->lock
, flags
);
3864 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3865 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3868 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3869 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3872 xhci_ring_cmd_db(xhci
);
3873 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3875 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3876 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3877 XHCI_CMD_DEFAULT_TIMEOUT
);
3878 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3879 * the SetAddress() "recovery interval" required by USB and aborting the
3880 * command on a timeout.
3882 if (timeleft
<= 0) {
3883 xhci_warn(xhci
, "%s while waiting for address device command\n",
3884 timeleft
== 0 ? "Timeout" : "Signal");
3885 /* cancel the address device command */
3886 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3892 switch (virt_dev
->cmd_status
) {
3893 case COMP_CTX_STATE
:
3895 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3900 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3904 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3905 "device command.\n");
3909 xhci_dbg(xhci
, "Successful Address Device command\n");
3912 xhci_err(xhci
, "ERROR: unexpected command completion "
3913 "code 0x%x.\n", virt_dev
->cmd_status
);
3914 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3915 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3922 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3923 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3924 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3926 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3927 (unsigned long long)
3928 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3929 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3930 (unsigned long long)virt_dev
->out_ctx
->dma
);
3931 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3932 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3933 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3934 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3936 * USB core uses address 1 for the roothubs, so we add one to the
3937 * address given back to us by the HC.
3939 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3940 /* Use kernel assigned address for devices; store xHC assigned
3941 * address locally. */
3942 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3944 /* Zero the input context control for later use */
3945 ctrl_ctx
->add_flags
= 0;
3946 ctrl_ctx
->drop_flags
= 0;
3948 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3954 * Transfer the port index into real index in the HW port status
3955 * registers. Caculate offset between the port's PORTSC register
3956 * and port status base. Divide the number of per port register
3957 * to get the real index. The raw port number bases 1.
3959 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3961 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3962 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3963 __le32 __iomem
*addr
;
3966 if (hcd
->speed
!= HCD_USB3
)
3967 addr
= xhci
->usb2_ports
[port1
- 1];
3969 addr
= xhci
->usb3_ports
[port1
- 1];
3971 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3975 #ifdef CONFIG_PM_RUNTIME
3977 /* BESL to HIRD Encoding array for USB2 LPM */
3978 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3979 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3981 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3982 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3983 struct usb_device
*udev
)
3985 int u2del
, besl
, besl_host
;
3986 int besl_device
= 0;
3989 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3990 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3992 if (field
& USB_BESL_SUPPORT
) {
3993 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3994 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3997 /* Use baseline BESL value as default */
3998 if (field
& USB_BESL_BASELINE_VALID
)
3999 besl_device
= USB_GET_BESL_BASELINE(field
);
4000 else if (field
& USB_BESL_DEEP_VALID
)
4001 besl_device
= USB_GET_BESL_DEEP(field
);
4006 besl_host
= (u2del
- 51) / 75 + 1;
4009 besl
= besl_host
+ besl_device
;
4016 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
4017 struct usb_device
*udev
)
4019 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4020 struct dev_info
*dev_info
;
4021 __le32 __iomem
**port_array
;
4022 __le32 __iomem
*addr
, *pm_addr
;
4024 unsigned int port_num
;
4025 unsigned long flags
;
4029 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
4033 /* we only support lpm for non-hub device connected to root hub yet */
4034 if (!udev
->parent
|| udev
->parent
->parent
||
4035 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4038 spin_lock_irqsave(&xhci
->lock
, flags
);
4040 /* Look for devices in lpm_failed_devs list */
4041 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
4042 le16_to_cpu(udev
->descriptor
.idProduct
);
4043 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
4044 if (dev_info
->dev_id
== dev_id
) {
4050 port_array
= xhci
->usb2_ports
;
4051 port_num
= udev
->portnum
- 1;
4053 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
4054 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
4060 * Test USB 2.0 software LPM.
4061 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4062 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4063 * in the June 2011 errata release.
4065 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
4067 * Set L1 Device Slot and HIRD/BESL.
4068 * Check device's USB 2.0 extension descriptor to determine whether
4069 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4071 pm_addr
= port_array
[port_num
] + 1;
4072 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4073 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
4074 xhci_writel(xhci
, temp
, pm_addr
);
4076 /* Set port link state to U2(L1) */
4077 addr
= port_array
[port_num
];
4078 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
4081 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4083 spin_lock_irqsave(&xhci
->lock
, flags
);
4085 /* Check L1 Status */
4086 ret
= xhci_handshake(xhci
, pm_addr
,
4087 PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
4088 if (ret
!= -ETIMEDOUT
) {
4089 /* enter L1 successfully */
4090 temp
= xhci_readl(xhci
, addr
);
4091 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
4095 temp
= xhci_readl(xhci
, pm_addr
);
4096 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
4097 port_num
, temp
& PORT_L1S_MASK
);
4101 /* Resume the port */
4102 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
4104 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4106 spin_lock_irqsave(&xhci
->lock
, flags
);
4109 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
4111 /* Check PORTSC to make sure the device is in the right state */
4113 temp
= xhci_readl(xhci
, addr
);
4114 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
4115 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
4116 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
4117 xhci_dbg(xhci
, "port L1 resume fail\n");
4123 /* Insert dev to lpm_failed_devs list */
4124 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
4126 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
4131 dev_info
->dev_id
= dev_id
;
4132 INIT_LIST_HEAD(&dev_info
->list
);
4133 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
4135 xhci_ring_device(xhci
, udev
->slot_id
);
4139 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4143 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4144 struct usb_device
*udev
, int enable
)
4146 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4147 __le32 __iomem
**port_array
;
4148 __le32 __iomem
*pm_addr
;
4150 unsigned int port_num
;
4151 unsigned long flags
;
4154 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
4158 if (!udev
->parent
|| udev
->parent
->parent
||
4159 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4162 if (udev
->usb2_hw_lpm_capable
!= 1)
4165 spin_lock_irqsave(&xhci
->lock
, flags
);
4167 port_array
= xhci
->usb2_ports
;
4168 port_num
= udev
->portnum
- 1;
4169 pm_addr
= port_array
[port_num
] + 1;
4170 temp
= xhci_readl(xhci
, pm_addr
);
4172 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4173 enable
? "enable" : "disable", port_num
);
4175 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4178 temp
&= ~PORT_HIRD_MASK
;
4179 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
4180 xhci_writel(xhci
, temp
, pm_addr
);
4181 temp
= xhci_readl(xhci
, pm_addr
);
4183 xhci_writel(xhci
, temp
, pm_addr
);
4185 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
4186 xhci_writel(xhci
, temp
, pm_addr
);
4189 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4193 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4195 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4198 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
4200 xhci_dbg(xhci
, "software LPM test succeed\n");
4201 if (xhci
->hw_lpm_support
== 1) {
4202 udev
->usb2_hw_lpm_capable
= 1;
4203 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
4205 udev
->usb2_hw_lpm_enabled
= 1;
4214 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4215 struct usb_device
*udev
, int enable
)
4220 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4225 #endif /* CONFIG_PM_RUNTIME */
4227 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4230 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4231 static unsigned long long xhci_service_interval_to_ns(
4232 struct usb_endpoint_descriptor
*desc
)
4234 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4237 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4238 enum usb3_link_state state
)
4240 unsigned long long sel
;
4241 unsigned long long pel
;
4242 unsigned int max_sel_pel
;
4247 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4248 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4249 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4250 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4254 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4255 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4256 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4260 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4262 return USB3_LPM_DISABLED
;
4265 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4266 return USB3_LPM_DEVICE_INITIATED
;
4268 if (sel
> max_sel_pel
)
4269 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4270 "due to long SEL %llu ms\n",
4273 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4274 "due to long PEL %llu\n ms",
4276 return USB3_LPM_DISABLED
;
4279 /* Returns the hub-encoded U1 timeout value.
4280 * The U1 timeout should be the maximum of the following values:
4281 * - For control endpoints, U1 system exit latency (SEL) * 3
4282 * - For bulk endpoints, U1 SEL * 5
4283 * - For interrupt endpoints:
4284 * - Notification EPs, U1 SEL * 3
4285 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4286 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4288 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4289 struct usb_endpoint_descriptor
*desc
)
4291 unsigned long long timeout_ns
;
4295 ep_type
= usb_endpoint_type(desc
);
4297 case USB_ENDPOINT_XFER_CONTROL
:
4298 timeout_ns
= udev
->u1_params
.sel
* 3;
4300 case USB_ENDPOINT_XFER_BULK
:
4301 timeout_ns
= udev
->u1_params
.sel
* 5;
4303 case USB_ENDPOINT_XFER_INT
:
4304 intr_type
= usb_endpoint_interrupt_type(desc
);
4305 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4306 timeout_ns
= udev
->u1_params
.sel
* 3;
4309 /* Otherwise the calculation is the same as isoc eps */
4310 case USB_ENDPOINT_XFER_ISOC
:
4311 timeout_ns
= xhci_service_interval_to_ns(desc
);
4312 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4313 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4314 timeout_ns
= udev
->u1_params
.sel
* 2;
4320 /* The U1 timeout is encoded in 1us intervals. */
4321 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4322 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4323 if (timeout_ns
== USB3_LPM_DISABLED
)
4326 /* If the necessary timeout value is bigger than what we can set in the
4327 * USB 3.0 hub, we have to disable hub-initiated U1.
4329 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4331 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4332 "due to long timeout %llu ms\n", timeout_ns
);
4333 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4336 /* Returns the hub-encoded U2 timeout value.
4337 * The U2 timeout should be the maximum of:
4338 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4339 * - largest bInterval of any active periodic endpoint (to avoid going
4340 * into lower power link states between intervals).
4341 * - the U2 Exit Latency of the device
4343 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4344 struct usb_endpoint_descriptor
*desc
)
4346 unsigned long long timeout_ns
;
4347 unsigned long long u2_del_ns
;
4349 timeout_ns
= 10 * 1000 * 1000;
4351 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4352 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4353 timeout_ns
= xhci_service_interval_to_ns(desc
);
4355 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4356 if (u2_del_ns
> timeout_ns
)
4357 timeout_ns
= u2_del_ns
;
4359 /* The U2 timeout is encoded in 256us intervals */
4360 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4361 /* If the necessary timeout value is bigger than what we can set in the
4362 * USB 3.0 hub, we have to disable hub-initiated U2.
4364 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4366 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4367 "due to long timeout %llu ms\n", timeout_ns
);
4368 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4371 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4372 struct usb_device
*udev
,
4373 struct usb_endpoint_descriptor
*desc
,
4374 enum usb3_link_state state
,
4377 if (state
== USB3_LPM_U1
) {
4378 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4379 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4381 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4382 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4385 return USB3_LPM_DISABLED
;
4388 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4389 struct usb_device
*udev
,
4390 struct usb_endpoint_descriptor
*desc
,
4391 enum usb3_link_state state
,
4396 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4397 desc
, state
, timeout
);
4399 /* If we found we can't enable hub-initiated LPM, or
4400 * the U1 or U2 exit latency was too high to allow
4401 * device-initiated LPM as well, just stop searching.
4403 if (alt_timeout
== USB3_LPM_DISABLED
||
4404 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4405 *timeout
= alt_timeout
;
4408 if (alt_timeout
> *timeout
)
4409 *timeout
= alt_timeout
;
4413 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4414 struct usb_device
*udev
,
4415 struct usb_host_interface
*alt
,
4416 enum usb3_link_state state
,
4421 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4422 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4423 &alt
->endpoint
[j
].desc
, state
, timeout
))
4430 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4431 enum usb3_link_state state
)
4433 struct usb_device
*parent
;
4434 unsigned int num_hubs
;
4436 if (state
== USB3_LPM_U2
)
4439 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4440 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4441 parent
= parent
->parent
)
4447 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4448 " below second-tier hub.\n");
4449 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4450 "to decrease power consumption.\n");
4454 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4455 struct usb_device
*udev
,
4456 enum usb3_link_state state
)
4458 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4459 return xhci_check_intel_tier_policy(udev
, state
);
4463 /* Returns the U1 or U2 timeout that should be enabled.
4464 * If the tier check or timeout setting functions return with a non-zero exit
4465 * code, that means the timeout value has been finalized and we shouldn't look
4466 * at any more endpoints.
4468 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4469 struct usb_device
*udev
, enum usb3_link_state state
)
4471 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4472 struct usb_host_config
*config
;
4475 u16 timeout
= USB3_LPM_DISABLED
;
4477 if (state
== USB3_LPM_U1
)
4479 else if (state
== USB3_LPM_U2
)
4482 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4487 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4490 /* Gather some information about the currently installed configuration
4491 * and alternate interface settings.
4493 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4497 config
= udev
->actconfig
;
4501 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4502 struct usb_driver
*driver
;
4503 struct usb_interface
*intf
= config
->interface
[i
];
4508 /* Check if any currently bound drivers want hub-initiated LPM
4511 if (intf
->dev
.driver
) {
4512 driver
= to_usb_driver(intf
->dev
.driver
);
4513 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4514 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4515 "at request of driver %s\n",
4516 state_name
, driver
->name
);
4517 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4521 /* Not sure how this could happen... */
4522 if (!intf
->cur_altsetting
)
4525 if (xhci_update_timeout_for_interface(xhci
, udev
,
4526 intf
->cur_altsetting
,
4534 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4535 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4537 static int xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
4538 struct usb_device
*udev
, u16 max_exit_latency
)
4540 struct xhci_virt_device
*virt_dev
;
4541 struct xhci_command
*command
;
4542 struct xhci_input_control_ctx
*ctrl_ctx
;
4543 struct xhci_slot_ctx
*slot_ctx
;
4544 unsigned long flags
;
4547 spin_lock_irqsave(&xhci
->lock
, flags
);
4548 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
4549 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4553 /* Attempt to issue an Evaluate Context command to change the MEL. */
4554 virt_dev
= xhci
->devs
[udev
->slot_id
];
4555 command
= xhci
->lpm_command
;
4556 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
4557 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4559 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
4560 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4561 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
4562 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
4563 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
4565 xhci_dbg(xhci
, "Set up evaluate context for LPM MEL change.\n");
4566 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
4567 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
4569 /* Issue and wait for the evaluate context command. */
4570 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
4572 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
4573 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
4576 spin_lock_irqsave(&xhci
->lock
, flags
);
4577 virt_dev
->current_mel
= max_exit_latency
;
4578 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4583 static int calculate_max_exit_latency(struct usb_device
*udev
,
4584 enum usb3_link_state state_changed
,
4585 u16 hub_encoded_timeout
)
4587 unsigned long long u1_mel_us
= 0;
4588 unsigned long long u2_mel_us
= 0;
4589 unsigned long long mel_us
= 0;
4595 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4596 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4597 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4598 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4600 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4601 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4602 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4603 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4605 /* If U1 was already enabled and we're not disabling it,
4606 * or we're going to enable U1, account for the U1 max exit latency.
4608 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4610 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4611 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4613 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4615 if (u1_mel_us
> u2_mel_us
)
4619 /* xHCI host controller max exit latency field is only 16 bits wide. */
4620 if (mel_us
> MAX_EXIT
) {
4621 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4622 "is too big.\n", mel_us
);
4628 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4629 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4630 struct usb_device
*udev
, enum usb3_link_state state
)
4632 struct xhci_hcd
*xhci
;
4633 u16 hub_encoded_timeout
;
4637 xhci
= hcd_to_xhci(hcd
);
4638 /* The LPM timeout values are pretty host-controller specific, so don't
4639 * enable hub-initiated timeouts unless the vendor has provided
4640 * information about their timeout algorithm.
4642 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4643 !xhci
->devs
[udev
->slot_id
])
4644 return USB3_LPM_DISABLED
;
4646 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4647 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4649 /* Max Exit Latency is too big, disable LPM. */
4650 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4654 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4657 return hub_encoded_timeout
;
4660 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4661 struct usb_device
*udev
, enum usb3_link_state state
)
4663 struct xhci_hcd
*xhci
;
4667 xhci
= hcd_to_xhci(hcd
);
4668 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4669 !xhci
->devs
[udev
->slot_id
])
4672 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4673 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4678 #else /* CONFIG_PM */
4680 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4681 struct usb_device
*udev
, enum usb3_link_state state
)
4683 return USB3_LPM_DISABLED
;
4686 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4687 struct usb_device
*udev
, enum usb3_link_state state
)
4691 #endif /* CONFIG_PM */
4693 /*-------------------------------------------------------------------------*/
4695 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4696 * internal data structures for the device.
4698 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4699 struct usb_tt
*tt
, gfp_t mem_flags
)
4701 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4702 struct xhci_virt_device
*vdev
;
4703 struct xhci_command
*config_cmd
;
4704 struct xhci_input_control_ctx
*ctrl_ctx
;
4705 struct xhci_slot_ctx
*slot_ctx
;
4706 unsigned long flags
;
4707 unsigned think_time
;
4710 /* Ignore root hubs */
4714 vdev
= xhci
->devs
[hdev
->slot_id
];
4716 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4719 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4721 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4725 spin_lock_irqsave(&xhci
->lock
, flags
);
4726 if (hdev
->speed
== USB_SPEED_HIGH
&&
4727 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4728 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4729 xhci_free_command(xhci
, config_cmd
);
4730 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4734 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4735 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4736 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4737 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4738 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4740 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4741 if (xhci
->hci_version
> 0x95) {
4742 xhci_dbg(xhci
, "xHCI version %x needs hub "
4743 "TT think time and number of ports\n",
4744 (unsigned int) xhci
->hci_version
);
4745 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4746 /* Set TT think time - convert from ns to FS bit times.
4747 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4748 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4750 * xHCI 1.0: this field shall be 0 if the device is not a
4753 think_time
= tt
->think_time
;
4754 if (think_time
!= 0)
4755 think_time
= (think_time
/ 666) - 1;
4756 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4757 slot_ctx
->tt_info
|=
4758 cpu_to_le32(TT_THINK_TIME(think_time
));
4760 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4761 "TT think time or number of ports\n",
4762 (unsigned int) xhci
->hci_version
);
4764 slot_ctx
->dev_state
= 0;
4765 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4767 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4768 (xhci
->hci_version
> 0x95) ?
4769 "configure endpoint" : "evaluate context");
4770 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4771 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4773 /* Issue and wait for the configure endpoint or
4774 * evaluate context command.
4776 if (xhci
->hci_version
> 0x95)
4777 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4780 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4783 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4784 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4786 xhci_free_command(xhci
, config_cmd
);
4790 int xhci_get_frame(struct usb_hcd
*hcd
)
4792 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4793 /* EHCI mods by the periodic size. Why? */
4794 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4797 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4799 struct xhci_hcd
*xhci
;
4800 struct device
*dev
= hcd
->self
.controller
;
4804 /* Accept arbitrarily long scatter-gather lists */
4805 hcd
->self
.sg_tablesize
= ~0;
4806 /* XHCI controllers don't stop the ep queue on short packets :| */
4807 hcd
->self
.no_stop_on_short
= 1;
4809 if (usb_hcd_is_primary_hcd(hcd
)) {
4810 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4813 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4814 xhci
->main_hcd
= hcd
;
4815 /* Mark the first roothub as being USB 2.0.
4816 * The xHCI driver will register the USB 3.0 roothub.
4818 hcd
->speed
= HCD_USB2
;
4819 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4821 * USB 2.0 roothub under xHCI has an integrated TT,
4822 * (rate matching hub) as opposed to having an OHCI/UHCI
4823 * companion controller.
4827 /* xHCI private pointer was set in xhci_pci_probe for the second
4828 * registered roothub.
4830 xhci
= hcd_to_xhci(hcd
);
4831 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4832 if (HCC_64BIT_ADDR(temp
)) {
4833 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4834 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4836 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4841 #ifdef CONFIG_MTK_XHCI
4842 retval
= mtk_xhci_ip_init(hcd
, xhci
);
4847 xhci
->cap_regs
= hcd
->regs
;
4848 xhci
->op_regs
= hcd
->regs
+
4849 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4850 xhci
->run_regs
= hcd
->regs
+
4851 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4852 /* Cache read-only capability registers */
4853 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4854 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4855 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4856 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4857 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4858 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4859 xhci_print_registers(xhci
);
4861 get_quirks(dev
, xhci
);
4863 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4864 * success event after a short transfer. This quirk will ignore such
4867 if (xhci
->hci_version
> 0x96)
4868 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4870 /* Make sure the HC is halted. */
4871 retval
= xhci_halt(xhci
);
4875 xhci_dbg(xhci
, "Resetting HCD\n");
4876 /* Reset the internal HC memory state and registers. */
4877 retval
= xhci_reset(xhci
);
4880 xhci_dbg(xhci
, "Reset complete\n");
4882 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4883 if (HCC_64BIT_ADDR(temp
)) {
4884 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4885 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4887 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4890 xhci_dbg(xhci
, "Calling HCD init\n");
4891 /* Initialize HCD and host controller data structures. */
4892 retval
= xhci_init(hcd
);
4895 xhci_dbg(xhci
, "Called HCD init\n");
4897 printk("%s(%d): do mtk_xhci_set\n", __func__
, __LINE__
);
4905 MODULE_DESCRIPTION(DRIVER_DESC
);
4906 MODULE_AUTHOR(DRIVER_AUTHOR
);
4907 MODULE_LICENSE("GPL");
4909 #ifdef CONFIG_USBIF_COMPLIANCE
4910 #ifndef CONFIG_USB_MTK_DUALMODE
4911 static int xhci_hcd_driver_init(void)
4915 retval
= xhci_register_pci();
4917 printk(KERN_DEBUG
"Problem registering PCI driver.");
4921 #ifdef CONFIG_MTK_XHCI
4925 retval
= xhci_register_plat();
4927 printk(KERN_DEBUG
"Problem registering platform driver.");
4931 #ifdef CONFIG_MTK_XHCI
4932 retval
= xhci_attrs_init();
4934 printk(KERN_DEBUG
"Problem creating xhci attributes.");
4938 mtk_xhci_wakelock_init();
4942 * Check the compiler generated sizes of structures that must be laid
4943 * out in specific ways for hardware access.
4945 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4946 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4947 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4948 /* xhci_device_control has eight fields, and also
4949 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4951 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4952 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4953 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4954 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4955 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4956 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4957 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4960 #ifdef CONFIG_MTK_XHCI
4962 xhci_unregister_plat();
4965 xhci_unregister_pci();
4969 static void xhci_hcd_driver_cleanup(void)
4971 xhci_unregister_pci();
4972 xhci_unregister_plat();
4976 static int xhci_hcd_driver_init(void)
4978 // init in mt_devs.c
4979 mtk_xhci_eint_iddig_init();
4980 mtk_xhci_switch_init();
4981 //mtk_xhci_wakelock_init();
4985 static void xhci_hcd_driver_cleanup(void)
4987 mtk_xhci_eint_iddig_deinit() ;
4992 static int mu3h_normal_driver_on
= 0 ;
4994 static int xhci_mu3h_proc_show(struct seq_file
*seq
, void *v
)
4996 seq_printf(seq
, "xhci_mu3h_proc_show, mu3h is %d (on:1, off:0)\n", mu3h_normal_driver_on
);
5000 static int xhci_mu3h_proc_open(struct inode
*inode
, struct file
*file
)
5002 return single_open(file
, xhci_mu3h_proc_show
, inode
->i_private
);
5005 static ssize_t
xhci_mu3h_proc_write(struct file
*file
, const char __user
*buf
, size_t length
, loff_t
*ppos
)
5011 if (length
>= sizeof(msg
)) {
5012 printk( "xhci_mu3h_proc_write length error, the error len is %d\n", (unsigned int)length
);
5015 if (copy_from_user(msg
, buf
, length
))
5020 printk("xhci_mu3h_proc_write: %s, current driver on/off: %d\n", msg
, mu3h_normal_driver_on
);
5022 if ((msg
[0] == '1') && (mu3h_normal_driver_on
== 0)){
5023 xhci_hcd_driver_init() ;
5024 mu3h_normal_driver_on
= 1 ;
5025 printk("registe mu3h driver : m3h xhci driver\n");
5026 }else if ((msg
[0] == '0') && (mu3h_normal_driver_on
== 1)){
5027 xhci_hcd_driver_cleanup();
5028 mu3h_normal_driver_on
= 0 ;
5029 printk("unregiste m3h xhci driver.\n");
5031 printk("xhci_mu3h_proc_write write faile !\n");
5036 static const struct file_operations mu3h_proc_fops
= {
5037 .owner
= THIS_MODULE
,
5038 .open
= xhci_mu3h_proc_open
,
5039 .write
= xhci_mu3h_proc_write
,
5041 .llseek
= seq_lseek
,
5045 static int __init
xhci_hcd_init(void)
5047 struct proc_dir_entry
*prEntry
;
5049 printk(KERN_DEBUG
"xhci_hcd_init");
5051 // set xhci up at boot up
5052 xhci_hcd_driver_init() ;
5053 mtk_xhci_wakelock_init();
5054 mu3h_normal_driver_on
= 1;
5057 prEntry
= proc_create("mu3h_driver_init", 0666, NULL
, &mu3h_proc_fops
);
5060 printk("create the mu3h init proc OK!\n") ;
5062 printk("[ERROR] create the mu3h init proc FAIL\n") ;
5065 #ifdef CONFIG_MTK_XHCI
5067 if (!misc_register(&mu3h_uevent_device
)){
5068 printk("create the mu3h_uevent_device uevent device OK!\n") ;
5071 printk("[ERROR] create the mu3h_uevent_device uevent device fail\n") ;
5079 module_init(xhci_hcd_init
);
5081 static void __exit
xhci_hcd_cleanup(void)
5083 #ifdef CONFIG_MTK_XHCI
5084 misc_deregister(&mu3h_uevent_device
);
5086 printk(KERN_DEBUG
"xhci_hcd_cleanup");
5088 module_exit(xhci_hcd_cleanup
);
5091 #ifndef CONFIG_USB_MTK_DUALMODE
5092 static int __init
xhci_hcd_init(void)
5096 retval
= xhci_register_pci();
5098 printk(KERN_DEBUG
"Problem registering PCI driver.");
5101 retval
= xhci_register_plat();
5103 printk(KERN_DEBUG
"Problem registering platform driver.");
5107 #ifdef CONFIG_MTK_XHCI
5108 retval
= xhci_attrs_init();
5110 printk(KERN_DEBUG
"Problem creating xhci attributes.");
5114 mtk_xhci_wakelock_init();
5118 * Check the compiler generated sizes of structures that must be laid
5119 * out in specific ways for hardware access.
5121 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
5122 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
5123 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
5124 /* xhci_device_control has eight fields, and also
5125 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5127 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
5128 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
5129 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
5130 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
5131 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
5132 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5133 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
5136 #ifdef CONFIG_MTK_XHCI
5138 xhci_unregister_plat();
5141 xhci_unregister_pci();
5144 module_init(xhci_hcd_init
);
5146 static void __exit
xhci_hcd_cleanup(void)
5148 xhci_unregister_pci();
5149 xhci_unregister_plat();
5152 module_exit(xhci_hcd_cleanup
);
5154 static int __init
xhci_hcd_init(void)
5156 mtk_xhci_eint_iddig_init();
5157 mtk_xhci_switch_init();
5158 mtk_xhci_wakelock_init();
5161 module_init(xhci_hcd_init
);
5163 static void __exit
xhci_hcd_cleanup(void)
5166 module_exit(xhci_hcd_cleanup
);