drivers/usb/host/xhci-pci.c

   1 /*
   2  * xHCI host controller driver PCI Bus Glue.
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25 #include <linux/module.h>
  26
  27 #include "xhci.h"
  28
  29 /* Device for a quirk */
  30 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
  33
  34 #define PCI_VENDOR_ID_ETRON             0x1b6f
  35 #define PCI_DEVICE_ID_ASROCK_P67        0x7023
  36
  37 static const char hcd_name[] = "xhci_hcd";
  38
  39 /* called after powerup, by probe or system-pm "wakeup" */
  40 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  41 {
  42         /*
  43          * TODO: Implement finding debug ports later.
  44          * TODO: see if there are any quirks that need to be added to handle
  45          * new extended capabilities.
  46          */
  47
  48         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  49         if (!pci_set_mwi(pdev))
  50                 xhci_dbg(xhci, "MWI active\n");
  51
  52         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  53         return 0;
  54 }
  55
  56 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
  57 {
  58         struct pci_dev          *pdev = to_pci_dev(dev);
  59
  60         /* Look for vendor-specific quirks */
  61         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  62                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
  63                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
  64                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  65                                 pdev->revision == 0x0) {
  66                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
  67                         xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
  68                                         " endpoint cmd after reset endpoint\n");
  69                 }
  70                 /* Fresco Logic confirms: all revisions of this chip do not
  71                  * support MSI, even though some of them claim to in their PCI
  72                  * capabilities.
  73                  */
  74                 xhci->quirks |= XHCI_BROKEN_MSI;
  75                 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
  76                                 "has broken MSI implementation\n",
  77                                 pdev->revision);
  78                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
  79         }
  80
  81         if (pdev->vendor == PCI_VENDOR_ID_NEC)
  82                 xhci->quirks |= XHCI_NEC_HOST;
  83
  84         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
  85                 xhci->quirks |= XHCI_AMD_0x96_HOST;
  86
  87         /* AMD PLL quirk */
  88         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
  89                 xhci->quirks |= XHCI_AMD_PLL_FIX;
  90
  91         if (pdev->vendor == PCI_VENDOR_ID_AMD)
  92                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
  93
  94         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
  95                 xhci->quirks |= XHCI_LPM_SUPPORT;
  96                 xhci->quirks |= XHCI_INTEL_HOST;
  97                 xhci->quirks |= XHCI_AVOID_BEI;
  98         }
  99         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 100                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
 101                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
 102                 xhci->limit_active_eps = 64;
 103                 xhci->quirks |= XHCI_SW_BW_CHECKING;
 104                 /*
 105                  * PPT desktop boards DH77EB and DH77DF will power back on after
 106                  * a few seconds of being shutdown.  The fix for this is to
 107                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
 108                  * DMI information to find those particular boards (since each
 109                  * vendor will change the board name), so we have to key off all
 110                  * PPT chipsets.
 111                  */
 112                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 113         }
 114         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 115                         pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
 116                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 117                 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
 118                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 119         }
 120         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
 121                         pdev->device == 0x0015)
 122                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 123         if (pdev->vendor == PCI_VENDOR_ID_VIA)
 124                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 125 }
 126
 127 /* called during probe() after chip reset completes */
 128 static int xhci_pci_setup(struct usb_hcd *hcd)
 129 {
 130         struct xhci_hcd         *xhci;
 131         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 132         int                     retval;
 133
 134         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
 135         if (retval)
 136                 return retval;
 137
 138         xhci = hcd_to_xhci(hcd);
 139         if (!usb_hcd_is_primary_hcd(hcd))
 140                 return 0;
 141
 142         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 143         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 144
 145         /* Find any debug ports */
 146         retval = xhci_pci_reinit(xhci, pdev);
 147         if (!retval)
 148                 return retval;
 149
 150         kfree(xhci);
 151         return retval;
 152 }
 153
 154 /*
 155  * We need to register our own PCI probe function (instead of the USB core's
 156  * function) in order to create a second roothub under xHCI.
 157  */
 158 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 159 {
 160         int retval;
 161         struct xhci_hcd *xhci;
 162         struct hc_driver *driver;
 163         struct usb_hcd *hcd;
 164
 165         driver = (struct hc_driver *)id->driver_data;
 166
 167         /* Prevent runtime suspending between USB-2 and USB-3 initialization */
 168         pm_runtime_get_noresume(&dev->dev);
 169
 170         /* Register the USB 2.0 roothub.
 171          * FIXME: USB core must know to register the USB 2.0 roothub first.
 172          * This is sort of silly, because we could just set the HCD driver flags
 173          * to say USB 2.0, but I'm not sure what the implications would be in
 174          * the other parts of the HCD code.
 175          */
 176         retval = usb_hcd_pci_probe(dev, id);
 177
 178         if (retval)
 179                 goto put_runtime_pm;
 180
 181         /* USB 2.0 roothub is stored in the PCI device now. */
 182         hcd = dev_get_drvdata(&dev->dev);
 183         xhci = hcd_to_xhci(hcd);
 184         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 185                                 pci_name(dev), hcd);
 186         if (!xhci->shared_hcd) {
 187                 retval = -ENOMEM;
 188                 goto dealloc_usb2_hcd;
 189         }
 190
 191         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
 192          * is called by usb_add_hcd().
 193          */
 194         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
 195
 196         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 197                         IRQF_SHARED);
 198         if (retval)
 199                 goto put_usb3_hcd;
 200         /* Roothub already marked as USB 3.0 speed */
 201
 202         /* We know the LPM timeout algorithms for this host, let the USB core
 203          * enable and disable LPM for devices under the USB 3.0 roothub.
 204          */
 205         if (xhci->quirks & XHCI_LPM_SUPPORT)
 206                 hcd_to_bus(xhci->shared_hcd)->root_hub->lpm_capable = 1;
 207
 208         /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
 209         pm_runtime_put_noidle(&dev->dev);
 210
 211         return 0;
 212
 213 put_usb3_hcd:
 214         usb_put_hcd(xhci->shared_hcd);
 215 dealloc_usb2_hcd:
 216         usb_hcd_pci_remove(dev);
 217 put_runtime_pm:
 218         pm_runtime_put_noidle(&dev->dev);
 219         return retval;
 220 }
 221
 222 static void xhci_pci_remove(struct pci_dev *dev)
 223 {
 224         struct xhci_hcd *xhci;
 225
 226         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 227         if (xhci->shared_hcd) {
 228                 usb_remove_hcd(xhci->shared_hcd);
 229                 usb_put_hcd(xhci->shared_hcd);
 230         }
 231         usb_hcd_pci_remove(dev);
 232         kfree(xhci);
 233 }
 234
 235 #ifdef CONFIG_PM
 236 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 237 {
 238         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 239         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 240
 241         /*
 242          * Systems with the TI redriver that loses port status change events
 243          * need to have the registers polled during D3, so avoid D3cold.
 244          */
 245         if (xhci_compliance_mode_recovery_timer_quirk_check())
 246                 pdev->no_d3cold = true;
 247
 248         return xhci_suspend(xhci);
 249 }
 250
 251 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 252 {
 253         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 254         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 255         int                     retval = 0;
 256
 257         /* The BIOS on systems with the Intel Panther Point chipset may or may
 258          * not support xHCI natively.  That means that during system resume, it
 259          * may switch the ports back to EHCI so that users can use their
 260          * keyboard to select a kernel from GRUB after resume from hibernate.
 261          *
 262          * The BIOS is supposed to remember whether the OS had xHCI ports
 263          * enabled before resume, and switch the ports back to xHCI when the
 264          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
 265          * writers.
 266          *
 267          * Unconditionally switch the ports back to xHCI after a system resume.
 268          * We can't tell whether the EHCI or xHCI controller will be resumed
 269          * first, so we have to do the port switchover in both drivers.  Writing
 270          * a '1' to the port switchover registers should have no effect if the
 271          * port was already switched over.
 272          */
 273         if (usb_is_intel_switchable_xhci(pdev))
 274                 usb_enable_xhci_ports(pdev);
 275
 276         retval = xhci_resume(xhci, hibernated);
 277         return retval;
 278 }
 279 #endif /* CONFIG_PM */
 280
 281 static const struct hc_driver xhci_pci_hc_driver = {
 282         .description =          hcd_name,
 283         .product_desc =         "xHCI Host Controller",
 284         .hcd_priv_size =        sizeof(struct xhci_hcd *),
 285
 286         /*
 287          * generic hardware linkage
 288          */
 289         .irq =                  xhci_irq,
 290         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
 291
 292         /*
 293          * basic lifecycle operations
 294          */
 295         .reset =                xhci_pci_setup,
 296         .start =                xhci_run,
 297 #ifdef CONFIG_PM
 298         .pci_suspend =          xhci_pci_suspend,
 299         .pci_resume =           xhci_pci_resume,
 300 #endif
 301         .stop =                 xhci_stop,
 302         .shutdown =             xhci_shutdown,
 303
 304         /*
 305          * managing i/o requests and associated device resources
 306          */
 307         .urb_enqueue =          xhci_urb_enqueue,
 308         .urb_dequeue =          xhci_urb_dequeue,
 309         .alloc_dev =            xhci_alloc_dev,
 310         .free_dev =             xhci_free_dev,
 311         .alloc_streams =        xhci_alloc_streams,
 312         .free_streams =         xhci_free_streams,
 313         .add_endpoint =         xhci_add_endpoint,
 314         .drop_endpoint =        xhci_drop_endpoint,
 315         .endpoint_reset =       xhci_endpoint_reset,
 316         .check_bandwidth =      xhci_check_bandwidth,
 317         .reset_bandwidth =      xhci_reset_bandwidth,
 318         .address_device =       xhci_address_device,
 319         .update_hub_device =    xhci_update_hub_device,
 320         .reset_device =         xhci_discover_or_reset_device,
 321
 322         /*
 323          * scheduling support
 324          */
 325         .get_frame_number =     xhci_get_frame,
 326
 327         /* Root hub support */
 328         .hub_control =          xhci_hub_control,
 329         .hub_status_data =      xhci_hub_status_data,
 330         .bus_suspend =          xhci_bus_suspend,
 331         .bus_resume =           xhci_bus_resume,
 332         /*
 333          * call back when device connected and addressed
 334          */
 335         .update_device =        xhci_update_device,
 336         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
 337         .enable_usb3_lpm_timeout =      xhci_enable_usb3_lpm_timeout,
 338         .disable_usb3_lpm_timeout =     xhci_disable_usb3_lpm_timeout,
 339         .find_raw_port_number = xhci_find_raw_port_number,
 340 };
 341
 342 /*-------------------------------------------------------------------------*/
 343
 344 /* PCI driver selection metadata; PCI hotplugging uses this */
 345 static const struct pci_device_id pci_ids[] = { {
 346         /* handle any USB 3.0 xHCI controller */
 347         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 348         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 349         },
 350         { /* end: all zeroes */ }
 351 };
 352 MODULE_DEVICE_TABLE(pci, pci_ids);
 353
 354 /* pci driver glue; this is a "new style" PCI driver module */
 355 static struct pci_driver xhci_pci_driver = {
 356         .name =         (char *) hcd_name,
 357         .id_table =     pci_ids,
 358
 359         .probe =        xhci_pci_probe,
 360         .remove =       xhci_pci_remove,
 361         /* suspend and resume implemented later */
 362
 363         .shutdown =     usb_hcd_pci_shutdown,
 364 #ifdef CONFIG_PM
 365         .driver = {
 366                 .pm = &usb_hcd_pci_pm_ops
 367         },
 368 #endif
 369 };
 370
 371 int __init xhci_register_pci(void)
 372 {
 373         return pci_register_driver(&xhci_pci_driver);
 374 }
 375
 376 void xhci_unregister_pci(void)
 377 {
 378         pci_unregister_driver(&xhci_pci_driver);
 379 }