module_param: make bool parameters really bool (drivers & misc)
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / uhci-hcd.c
1 /*
2 * Universal Host Controller Interface driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5 *
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
17 *
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
22 *
23 */
24
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
37 #include <linux/pm.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/usb/hcd.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
44
45 #include <asm/uaccess.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/system.h>
49
50 #include "uhci-hcd.h"
51
52 /*
53 * Version Information
54 */
55 #define DRIVER_AUTHOR \
56 "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, " \
57 "Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, " \
58 "Roman Weissgaerber, Alan Stern"
59 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
60
61 /* for flakey hardware, ignore overcurrent indicators */
62 static bool ignore_oc;
63 module_param(ignore_oc, bool, S_IRUGO);
64 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
65
66 /*
67 * debug = 0, no debugging messages
68 * debug = 1, dump failed URBs except for stalls
69 * debug = 2, dump all failed URBs (including stalls)
70 * show all queues in /sys/kernel/debug/uhci/[pci_addr]
71 * debug = 3, show all TDs in URBs when dumping
72 */
73 #ifdef DEBUG
74 #define DEBUG_CONFIGURED 1
75 static int debug = 1;
76 module_param(debug, int, S_IRUGO | S_IWUSR);
77 MODULE_PARM_DESC(debug, "Debug level");
78
79 #else
80 #define DEBUG_CONFIGURED 0
81 #define debug 0
82 #endif
83
84 static char *errbuf;
85 #define ERRBUF_LEN (32 * 1024)
86
87 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
88
89 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
90 static void wakeup_rh(struct uhci_hcd *uhci);
91 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
92
93 /*
94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
95 */
96 static __hc32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
97 {
98 int skelnum;
99
100 /*
101 * The interrupt queues will be interleaved as evenly as possible.
102 * There's not much to be done about period-1 interrupts; they have
103 * to occur in every frame. But we can schedule period-2 interrupts
104 * in odd-numbered frames, period-4 interrupts in frames congruent
105 * to 2 (mod 4), and so on. This way each frame only has two
106 * interrupt QHs, which will help spread out bandwidth utilization.
107 *
108 * ffs (Find First bit Set) does exactly what we need:
109 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
110 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
111 * ffs >= 7 => not on any high-period queue, so use
112 * period-1 QH = skelqh[9].
113 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
114 */
115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
116 if (skelnum <= 1)
117 skelnum = 9;
118 return LINK_TO_QH(uhci, uhci->skelqh[skelnum]);
119 }
120
121 #include "uhci-debug.c"
122 #include "uhci-q.c"
123 #include "uhci-hub.c"
124
125 /*
126 * Finish up a host controller reset and update the recorded state.
127 */
128 static void finish_reset(struct uhci_hcd *uhci)
129 {
130 int port;
131
132 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
133 * bits in the port status and control registers.
134 * We have to clear them by hand.
135 */
136 for (port = 0; port < uhci->rh_numports; ++port)
137 uhci_writew(uhci, 0, USBPORTSC1 + (port * 2));
138
139 uhci->port_c_suspend = uhci->resuming_ports = 0;
140 uhci->rh_state = UHCI_RH_RESET;
141 uhci->is_stopped = UHCI_IS_STOPPED;
142 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
143 }
144
145 /*
146 * Last rites for a defunct/nonfunctional controller
147 * or one we don't want to use any more.
148 */
149 static void uhci_hc_died(struct uhci_hcd *uhci)
150 {
151 uhci_get_current_frame_number(uhci);
152 uhci->reset_hc(uhci);
153 finish_reset(uhci);
154 uhci->dead = 1;
155
156 /* The current frame may already be partway finished */
157 ++uhci->frame_number;
158 }
159
160 /*
161 * Initialize a controller that was newly discovered or has lost power
162 * or otherwise been reset while it was suspended. In none of these cases
163 * can we be sure of its previous state.
164 */
165 static void check_and_reset_hc(struct uhci_hcd *uhci)
166 {
167 if (uhci->check_and_reset_hc(uhci))
168 finish_reset(uhci);
169 }
170
171 #if defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC)
172 /*
173 * The two functions below are generic reset functions that are used on systems
174 * that do not have keyboard and mouse legacy support. We assume that we are
175 * running on such a system if CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC is defined.
176 */
177
178 /*
179 * Make sure the controller is completely inactive, unable to
180 * generate interrupts or do DMA.
181 */
182 static void uhci_generic_reset_hc(struct uhci_hcd *uhci)
183 {
184 /* Reset the HC - this will force us to get a
185 * new notification of any already connected
186 * ports due to the virtual disconnect that it
187 * implies.
188 */
189 uhci_writew(uhci, USBCMD_HCRESET, USBCMD);
190 mb();
191 udelay(5);
192 if (uhci_readw(uhci, USBCMD) & USBCMD_HCRESET)
193 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
194
195 /* Just to be safe, disable interrupt requests and
196 * make sure the controller is stopped.
197 */
198 uhci_writew(uhci, 0, USBINTR);
199 uhci_writew(uhci, 0, USBCMD);
200 }
201
202 /*
203 * Initialize a controller that was newly discovered or has just been
204 * resumed. In either case we can't be sure of its previous state.
205 *
206 * Returns: 1 if the controller was reset, 0 otherwise.
207 */
208 static int uhci_generic_check_and_reset_hc(struct uhci_hcd *uhci)
209 {
210 unsigned int cmd, intr;
211
212 /*
213 * When restarting a suspended controller, we expect all the
214 * settings to be the same as we left them:
215 *
216 * Controller is stopped and configured with EGSM set;
217 * No interrupts enabled except possibly Resume Detect.
218 *
219 * If any of these conditions are violated we do a complete reset.
220 */
221
222 cmd = uhci_readw(uhci, USBCMD);
223 if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
224 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
225 __func__, cmd);
226 goto reset_needed;
227 }
228
229 intr = uhci_readw(uhci, USBINTR);
230 if (intr & (~USBINTR_RESUME)) {
231 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
232 __func__, intr);
233 goto reset_needed;
234 }
235 return 0;
236
237 reset_needed:
238 dev_dbg(uhci_dev(uhci), "Performing full reset\n");
239 uhci_generic_reset_hc(uhci);
240 return 1;
241 }
242 #endif /* CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC */
243
244 /*
245 * Store the basic register settings needed by the controller.
246 */
247 static void configure_hc(struct uhci_hcd *uhci)
248 {
249 /* Set the frame length to the default: 1 ms exactly */
250 uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF);
251
252 /* Store the frame list base address */
253 uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD);
254
255 /* Set the current frame number */
256 uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER,
257 USBFRNUM);
258
259 /* perform any arch/bus specific configuration */
260 if (uhci->configure_hc)
261 uhci->configure_hc(uhci);
262 }
263
264 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
265 {
266 /* If we have to ignore overcurrent events then almost by definition
267 * we can't depend on resume-detect interrupts. */
268 if (ignore_oc)
269 return 1;
270
271 return uhci->resume_detect_interrupts_are_broken ?
272 uhci->resume_detect_interrupts_are_broken(uhci) : 0;
273 }
274
275 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
276 {
277 return uhci->global_suspend_mode_is_broken ?
278 uhci->global_suspend_mode_is_broken(uhci) : 0;
279 }
280
281 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
282 __releases(uhci->lock)
283 __acquires(uhci->lock)
284 {
285 int auto_stop;
286 int int_enable, egsm_enable, wakeup_enable;
287 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
288
289 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
290 dev_dbg(&rhdev->dev, "%s%s\n", __func__,
291 (auto_stop ? " (auto-stop)" : ""));
292
293 /* Start off by assuming Resume-Detect interrupts and EGSM work
294 * and that remote wakeups should be enabled.
295 */
296 egsm_enable = USBCMD_EGSM;
297 int_enable = USBINTR_RESUME;
298 wakeup_enable = 1;
299
300 /*
301 * In auto-stop mode, we must be able to detect new connections.
302 * The user can force us to poll by disabling remote wakeup;
303 * otherwise we will use the EGSM/RD mechanism.
304 */
305 if (auto_stop) {
306 if (!device_may_wakeup(&rhdev->dev))
307 egsm_enable = int_enable = 0;
308 }
309
310 #ifdef CONFIG_PM
311 /*
312 * In bus-suspend mode, we use the wakeup setting specified
313 * for the root hub.
314 */
315 else {
316 if (!rhdev->do_remote_wakeup)
317 wakeup_enable = 0;
318 }
319 #endif
320
321 /*
322 * UHCI doesn't distinguish between wakeup requests from downstream
323 * devices and local connect/disconnect events. There's no way to
324 * enable one without the other; both are controlled by EGSM. Thus
325 * if wakeups are disallowed then EGSM must be turned off -- in which
326 * case remote wakeup requests from downstream during system sleep
327 * will be lost.
328 *
329 * In addition, if EGSM is broken then we can't use it. Likewise,
330 * if Resume-Detect interrupts are broken then we can't use them.
331 *
332 * Finally, neither EGSM nor RD is useful by itself. Without EGSM,
333 * the RD status bit will never get set. Without RD, the controller
334 * won't generate interrupts to tell the system about wakeup events.
335 */
336 if (!wakeup_enable || global_suspend_mode_is_broken(uhci) ||
337 resume_detect_interrupts_are_broken(uhci))
338 egsm_enable = int_enable = 0;
339
340 uhci->RD_enable = !!int_enable;
341 uhci_writew(uhci, int_enable, USBINTR);
342 uhci_writew(uhci, egsm_enable | USBCMD_CF, USBCMD);
343 mb();
344 udelay(5);
345
346 /* If we're auto-stopping then no devices have been attached
347 * for a while, so there shouldn't be any active URBs and the
348 * controller should stop after a few microseconds. Otherwise
349 * we will give the controller one frame to stop.
350 */
351 if (!auto_stop && !(uhci_readw(uhci, USBSTS) & USBSTS_HCH)) {
352 uhci->rh_state = UHCI_RH_SUSPENDING;
353 spin_unlock_irq(&uhci->lock);
354 msleep(1);
355 spin_lock_irq(&uhci->lock);
356 if (uhci->dead)
357 return;
358 }
359 if (!(uhci_readw(uhci, USBSTS) & USBSTS_HCH))
360 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
361
362 uhci_get_current_frame_number(uhci);
363
364 uhci->rh_state = new_state;
365 uhci->is_stopped = UHCI_IS_STOPPED;
366
367 /*
368 * If remote wakeup is enabled but either EGSM or RD interrupts
369 * doesn't work, then we won't get an interrupt when a wakeup event
370 * occurs. Thus the suspended root hub needs to be polled.
371 */
372 if (wakeup_enable && (!int_enable || !egsm_enable))
373 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
374 else
375 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
376
377 uhci_scan_schedule(uhci);
378 uhci_fsbr_off(uhci);
379 }
380
381 static void start_rh(struct uhci_hcd *uhci)
382 {
383 uhci->is_stopped = 0;
384
385 /* Mark it configured and running with a 64-byte max packet.
386 * All interrupts are enabled, even though RESUME won't do anything.
387 */
388 uhci_writew(uhci, USBCMD_RS | USBCMD_CF | USBCMD_MAXP, USBCMD);
389 uhci_writew(uhci, USBINTR_TIMEOUT | USBINTR_RESUME |
390 USBINTR_IOC | USBINTR_SP, USBINTR);
391 mb();
392 uhci->rh_state = UHCI_RH_RUNNING;
393 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
394 }
395
396 static void wakeup_rh(struct uhci_hcd *uhci)
397 __releases(uhci->lock)
398 __acquires(uhci->lock)
399 {
400 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
401 "%s%s\n", __func__,
402 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
403 " (auto-start)" : "");
404
405 /* If we are auto-stopped then no devices are attached so there's
406 * no need for wakeup signals. Otherwise we send Global Resume
407 * for 20 ms.
408 */
409 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
410 unsigned egsm;
411
412 /* Keep EGSM on if it was set before */
413 egsm = uhci_readw(uhci, USBCMD) & USBCMD_EGSM;
414 uhci->rh_state = UHCI_RH_RESUMING;
415 uhci_writew(uhci, USBCMD_FGR | USBCMD_CF | egsm, USBCMD);
416 spin_unlock_irq(&uhci->lock);
417 msleep(20);
418 spin_lock_irq(&uhci->lock);
419 if (uhci->dead)
420 return;
421
422 /* End Global Resume and wait for EOP to be sent */
423 uhci_writew(uhci, USBCMD_CF, USBCMD);
424 mb();
425 udelay(4);
426 if (uhci_readw(uhci, USBCMD) & USBCMD_FGR)
427 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
428 }
429
430 start_rh(uhci);
431
432 /* Restart root hub polling */
433 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
434 }
435
436 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
437 {
438 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
439 unsigned short status;
440
441 /*
442 * Read the interrupt status, and write it back to clear the
443 * interrupt cause. Contrary to the UHCI specification, the
444 * "HC Halted" status bit is persistent: it is RO, not R/WC.
445 */
446 status = uhci_readw(uhci, USBSTS);
447 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
448 return IRQ_NONE;
449 uhci_writew(uhci, status, USBSTS); /* Clear it */
450
451 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
452 if (status & USBSTS_HSE)
453 dev_err(uhci_dev(uhci), "host system error, "
454 "PCI problems?\n");
455 if (status & USBSTS_HCPE)
456 dev_err(uhci_dev(uhci), "host controller process "
457 "error, something bad happened!\n");
458 if (status & USBSTS_HCH) {
459 spin_lock(&uhci->lock);
460 if (uhci->rh_state >= UHCI_RH_RUNNING) {
461 dev_err(uhci_dev(uhci),
462 "host controller halted, "
463 "very bad!\n");
464 if (debug > 1 && errbuf) {
465 /* Print the schedule for debugging */
466 uhci_sprint_schedule(uhci,
467 errbuf, ERRBUF_LEN);
468 lprintk(errbuf);
469 }
470 uhci_hc_died(uhci);
471 usb_hc_died(hcd);
472
473 /* Force a callback in case there are
474 * pending unlinks */
475 mod_timer(&hcd->rh_timer, jiffies);
476 }
477 spin_unlock(&uhci->lock);
478 }
479 }
480
481 if (status & USBSTS_RD)
482 usb_hcd_poll_rh_status(hcd);
483 else {
484 spin_lock(&uhci->lock);
485 uhci_scan_schedule(uhci);
486 spin_unlock(&uhci->lock);
487 }
488
489 return IRQ_HANDLED;
490 }
491
492 /*
493 * Store the current frame number in uhci->frame_number if the controller
494 * is running. Expand from 11 bits (of which we use only 10) to a
495 * full-sized integer.
496 *
497 * Like many other parts of the driver, this code relies on being polled
498 * more than once per second as long as the controller is running.
499 */
500 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
501 {
502 if (!uhci->is_stopped) {
503 unsigned delta;
504
505 delta = (uhci_readw(uhci, USBFRNUM) - uhci->frame_number) &
506 (UHCI_NUMFRAMES - 1);
507 uhci->frame_number += delta;
508 }
509 }
510
511 /*
512 * De-allocate all resources
513 */
514 static void release_uhci(struct uhci_hcd *uhci)
515 {
516 int i;
517
518 if (DEBUG_CONFIGURED) {
519 spin_lock_irq(&uhci->lock);
520 uhci->is_initialized = 0;
521 spin_unlock_irq(&uhci->lock);
522
523 debugfs_remove(uhci->dentry);
524 }
525
526 for (i = 0; i < UHCI_NUM_SKELQH; i++)
527 uhci_free_qh(uhci, uhci->skelqh[i]);
528
529 uhci_free_td(uhci, uhci->term_td);
530
531 dma_pool_destroy(uhci->qh_pool);
532
533 dma_pool_destroy(uhci->td_pool);
534
535 kfree(uhci->frame_cpu);
536
537 dma_free_coherent(uhci_dev(uhci),
538 UHCI_NUMFRAMES * sizeof(*uhci->frame),
539 uhci->frame, uhci->frame_dma_handle);
540 }
541
542 /*
543 * Allocate a frame list, and then setup the skeleton
544 *
545 * The hardware doesn't really know any difference
546 * in the queues, but the order does matter for the
547 * protocols higher up. The order in which the queues
548 * are encountered by the hardware is:
549 *
550 * - All isochronous events are handled before any
551 * of the queues. We don't do that here, because
552 * we'll create the actual TD entries on demand.
553 * - The first queue is the high-period interrupt queue.
554 * - The second queue is the period-1 interrupt and async
555 * (low-speed control, full-speed control, then bulk) queue.
556 * - The third queue is the terminating bandwidth reclamation queue,
557 * which contains no members, loops back to itself, and is present
558 * only when FSBR is on and there are no full-speed control or bulk QHs.
559 */
560 static int uhci_start(struct usb_hcd *hcd)
561 {
562 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
563 int retval = -EBUSY;
564 int i;
565 struct dentry __maybe_unused *dentry;
566
567 hcd->uses_new_polling = 1;
568
569 spin_lock_init(&uhci->lock);
570 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
571 (unsigned long) uhci);
572 INIT_LIST_HEAD(&uhci->idle_qh_list);
573 init_waitqueue_head(&uhci->waitqh);
574
575 #ifdef UHCI_DEBUG_OPS
576 dentry = debugfs_create_file(hcd->self.bus_name,
577 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
578 uhci, &uhci_debug_operations);
579 if (!dentry) {
580 dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
581 return -ENOMEM;
582 }
583 uhci->dentry = dentry;
584 #endif
585
586 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
587 UHCI_NUMFRAMES * sizeof(*uhci->frame),
588 &uhci->frame_dma_handle, 0);
589 if (!uhci->frame) {
590 dev_err(uhci_dev(uhci), "unable to allocate "
591 "consistent memory for frame list\n");
592 goto err_alloc_frame;
593 }
594 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
595
596 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
597 GFP_KERNEL);
598 if (!uhci->frame_cpu) {
599 dev_err(uhci_dev(uhci), "unable to allocate "
600 "memory for frame pointers\n");
601 goto err_alloc_frame_cpu;
602 }
603
604 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
605 sizeof(struct uhci_td), 16, 0);
606 if (!uhci->td_pool) {
607 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
608 goto err_create_td_pool;
609 }
610
611 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
612 sizeof(struct uhci_qh), 16, 0);
613 if (!uhci->qh_pool) {
614 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
615 goto err_create_qh_pool;
616 }
617
618 uhci->term_td = uhci_alloc_td(uhci);
619 if (!uhci->term_td) {
620 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
621 goto err_alloc_term_td;
622 }
623
624 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
625 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
626 if (!uhci->skelqh[i]) {
627 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
628 goto err_alloc_skelqh;
629 }
630 }
631
632 /*
633 * 8 Interrupt queues; link all higher int queues to int1 = async
634 */
635 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
636 uhci->skelqh[i]->link = LINK_TO_QH(uhci, uhci->skel_async_qh);
637 uhci->skel_async_qh->link = UHCI_PTR_TERM(uhci);
638 uhci->skel_term_qh->link = LINK_TO_QH(uhci, uhci->skel_term_qh);
639
640 /* This dummy TD is to work around a bug in Intel PIIX controllers */
641 uhci_fill_td(uhci, uhci->term_td, 0, uhci_explen(0) |
642 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
643 uhci->term_td->link = UHCI_PTR_TERM(uhci);
644 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
645 LINK_TO_TD(uhci, uhci->term_td);
646
647 /*
648 * Fill the frame list: make all entries point to the proper
649 * interrupt queue.
650 */
651 for (i = 0; i < UHCI_NUMFRAMES; i++) {
652
653 /* Only place we don't use the frame list routines */
654 uhci->frame[i] = uhci_frame_skel_link(uhci, i);
655 }
656
657 /*
658 * Some architectures require a full mb() to enforce completion of
659 * the memory writes above before the I/O transfers in configure_hc().
660 */
661 mb();
662
663 configure_hc(uhci);
664 uhci->is_initialized = 1;
665 spin_lock_irq(&uhci->lock);
666 start_rh(uhci);
667 spin_unlock_irq(&uhci->lock);
668 return 0;
669
670 /*
671 * error exits:
672 */
673 err_alloc_skelqh:
674 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
675 if (uhci->skelqh[i])
676 uhci_free_qh(uhci, uhci->skelqh[i]);
677 }
678
679 uhci_free_td(uhci, uhci->term_td);
680
681 err_alloc_term_td:
682 dma_pool_destroy(uhci->qh_pool);
683
684 err_create_qh_pool:
685 dma_pool_destroy(uhci->td_pool);
686
687 err_create_td_pool:
688 kfree(uhci->frame_cpu);
689
690 err_alloc_frame_cpu:
691 dma_free_coherent(uhci_dev(uhci),
692 UHCI_NUMFRAMES * sizeof(*uhci->frame),
693 uhci->frame, uhci->frame_dma_handle);
694
695 err_alloc_frame:
696 debugfs_remove(uhci->dentry);
697
698 return retval;
699 }
700
701 static void uhci_stop(struct usb_hcd *hcd)
702 {
703 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
704
705 spin_lock_irq(&uhci->lock);
706 if (HCD_HW_ACCESSIBLE(hcd) && !uhci->dead)
707 uhci_hc_died(uhci);
708 uhci_scan_schedule(uhci);
709 spin_unlock_irq(&uhci->lock);
710 synchronize_irq(hcd->irq);
711
712 del_timer_sync(&uhci->fsbr_timer);
713 release_uhci(uhci);
714 }
715
716 #ifdef CONFIG_PM
717 static int uhci_rh_suspend(struct usb_hcd *hcd)
718 {
719 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
720 int rc = 0;
721
722 spin_lock_irq(&uhci->lock);
723 if (!HCD_HW_ACCESSIBLE(hcd))
724 rc = -ESHUTDOWN;
725 else if (uhci->dead)
726 ; /* Dead controllers tell no tales */
727
728 /* Once the controller is stopped, port resumes that are already
729 * in progress won't complete. Hence if remote wakeup is enabled
730 * for the root hub and any ports are in the middle of a resume or
731 * remote wakeup, we must fail the suspend.
732 */
733 else if (hcd->self.root_hub->do_remote_wakeup &&
734 uhci->resuming_ports) {
735 dev_dbg(uhci_dev(uhci), "suspend failed because a port "
736 "is resuming\n");
737 rc = -EBUSY;
738 } else
739 suspend_rh(uhci, UHCI_RH_SUSPENDED);
740 spin_unlock_irq(&uhci->lock);
741 return rc;
742 }
743
744 static int uhci_rh_resume(struct usb_hcd *hcd)
745 {
746 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
747 int rc = 0;
748
749 spin_lock_irq(&uhci->lock);
750 if (!HCD_HW_ACCESSIBLE(hcd))
751 rc = -ESHUTDOWN;
752 else if (!uhci->dead)
753 wakeup_rh(uhci);
754 spin_unlock_irq(&uhci->lock);
755 return rc;
756 }
757
758 #endif
759
760 /* Wait until a particular device/endpoint's QH is idle, and free it */
761 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
762 struct usb_host_endpoint *hep)
763 {
764 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
765 struct uhci_qh *qh;
766
767 spin_lock_irq(&uhci->lock);
768 qh = (struct uhci_qh *) hep->hcpriv;
769 if (qh == NULL)
770 goto done;
771
772 while (qh->state != QH_STATE_IDLE) {
773 ++uhci->num_waiting;
774 spin_unlock_irq(&uhci->lock);
775 wait_event_interruptible(uhci->waitqh,
776 qh->state == QH_STATE_IDLE);
777 spin_lock_irq(&uhci->lock);
778 --uhci->num_waiting;
779 }
780
781 uhci_free_qh(uhci, qh);
782 done:
783 spin_unlock_irq(&uhci->lock);
784 }
785
786 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
787 {
788 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
789 unsigned frame_number;
790 unsigned delta;
791
792 /* Minimize latency by avoiding the spinlock */
793 frame_number = uhci->frame_number;
794 barrier();
795 delta = (uhci_readw(uhci, USBFRNUM) - frame_number) &
796 (UHCI_NUMFRAMES - 1);
797 return frame_number + delta;
798 }
799
800 /* Determines number of ports on controller */
801 static int uhci_count_ports(struct usb_hcd *hcd)
802 {
803 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
804 unsigned io_size = (unsigned) hcd->rsrc_len;
805 int port;
806
807 /* The UHCI spec says devices must have 2 ports, and goes on to say
808 * they may have more but gives no way to determine how many there
809 * are. However according to the UHCI spec, Bit 7 of the port
810 * status and control register is always set to 1. So we try to
811 * use this to our advantage. Another common failure mode when
812 * a nonexistent register is addressed is to return all ones, so
813 * we test for that also.
814 */
815 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
816 unsigned int portstatus;
817
818 portstatus = uhci_readw(uhci, USBPORTSC1 + (port * 2));
819 if (!(portstatus & 0x0080) || portstatus == 0xffff)
820 break;
821 }
822 if (debug)
823 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
824
825 /* Anything greater than 7 is weird so we'll ignore it. */
826 if (port > UHCI_RH_MAXCHILD) {
827 dev_info(uhci_dev(uhci), "port count misdetected? "
828 "forcing to 2 ports\n");
829 port = 2;
830 }
831
832 return port;
833 }
834
835 static const char hcd_name[] = "uhci_hcd";
836
837 #ifdef CONFIG_PCI
838 #include "uhci-pci.c"
839 #define PCI_DRIVER uhci_pci_driver
840 #endif
841
842 #ifdef CONFIG_SPARC_LEON
843 #include "uhci-grlib.c"
844 #define PLATFORM_DRIVER uhci_grlib_driver
845 #endif
846
847 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER)
848 #error "missing bus glue for uhci-hcd"
849 #endif
850
851 static int __init uhci_hcd_init(void)
852 {
853 int retval = -ENOMEM;
854
855 if (usb_disabled())
856 return -ENODEV;
857
858 printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n",
859 ignore_oc ? ", overcurrent ignored" : "");
860 set_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
861
862 if (DEBUG_CONFIGURED) {
863 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
864 if (!errbuf)
865 goto errbuf_failed;
866 uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root);
867 if (!uhci_debugfs_root)
868 goto debug_failed;
869 }
870
871 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
872 sizeof(struct urb_priv), 0, 0, NULL);
873 if (!uhci_up_cachep)
874 goto up_failed;
875
876 #ifdef PLATFORM_DRIVER
877 retval = platform_driver_register(&PLATFORM_DRIVER);
878 if (retval < 0)
879 goto clean0;
880 #endif
881
882 #ifdef PCI_DRIVER
883 retval = pci_register_driver(&PCI_DRIVER);
884 if (retval < 0)
885 goto clean1;
886 #endif
887
888 return 0;
889
890 #ifdef PCI_DRIVER
891 clean1:
892 #endif
893 #ifdef PLATFORM_DRIVER
894 platform_driver_unregister(&PLATFORM_DRIVER);
895 clean0:
896 #endif
897 kmem_cache_destroy(uhci_up_cachep);
898
899 up_failed:
900 debugfs_remove(uhci_debugfs_root);
901
902 debug_failed:
903 kfree(errbuf);
904
905 errbuf_failed:
906
907 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
908 return retval;
909 }
910
911 static void __exit uhci_hcd_cleanup(void)
912 {
913 #ifdef PLATFORM_DRIVER
914 platform_driver_unregister(&PLATFORM_DRIVER);
915 #endif
916 #ifdef PCI_DRIVER
917 pci_unregister_driver(&PCI_DRIVER);
918 #endif
919 kmem_cache_destroy(uhci_up_cachep);
920 debugfs_remove(uhci_debugfs_root);
921 kfree(errbuf);
922 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
923 }
924
925 module_init(uhci_hcd_init);
926 module_exit(uhci_hcd_cleanup);
927
928 MODULE_AUTHOR(DRIVER_AUTHOR);
929 MODULE_DESCRIPTION(DRIVER_DESC);
930 MODULE_LICENSE("GPL");