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Merge master.kernel.org:/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / ohci-dbg.c
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * This file is licenced under the GPL.
8 */
9
10 /*-------------------------------------------------------------------------*/
11
12 #ifdef DEBUG
13
14 #define edstring(ed_type) ({ char *temp; \
15 switch (ed_type) { \
16 case PIPE_CONTROL: temp = "ctrl"; break; \
17 case PIPE_BULK: temp = "bulk"; break; \
18 case PIPE_INTERRUPT: temp = "intr"; break; \
19 default: temp = "isoc"; break; \
20 }; temp;})
21 #define pipestring(pipe) edstring(usb_pipetype(pipe))
22
23 /* debug| print the main components of an URB
24 * small: 0) header + data packets 1) just header
25 */
26 static void __attribute__((unused))
27 urb_print (struct urb * urb, char * str, int small)
28 {
29 unsigned int pipe= urb->pipe;
30
31 if (!urb->dev || !urb->dev->bus) {
32 dbg("%s URB: no dev", str);
33 return;
34 }
35
36 #ifndef OHCI_VERBOSE_DEBUG
37 if (urb->status != 0)
38 #endif
39 dbg("%s %p dev=%d ep=%d%s-%s flags=%x len=%d/%d stat=%d",
40 str,
41 urb,
42 usb_pipedevice (pipe),
43 usb_pipeendpoint (pipe),
44 usb_pipeout (pipe)? "out" : "in",
45 pipestring (pipe),
46 urb->transfer_flags,
47 urb->actual_length,
48 urb->transfer_buffer_length,
49 urb->status);
50
51 #ifdef OHCI_VERBOSE_DEBUG
52 if (!small) {
53 int i, len;
54
55 if (usb_pipecontrol (pipe)) {
56 printk (KERN_DEBUG __FILE__ ": setup(8):");
57 for (i = 0; i < 8 ; i++)
58 printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
59 printk ("\n");
60 }
61 if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
62 printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
63 urb->actual_length,
64 urb->transfer_buffer_length);
65 len = usb_pipeout (pipe)?
66 urb->transfer_buffer_length: urb->actual_length;
67 for (i = 0; i < 16 && i < len; i++)
68 printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
69 printk ("%s stat:%d\n", i < len? "...": "", urb->status);
70 }
71 }
72 #endif
73 }
74
75 #define ohci_dbg_sw(ohci, next, size, format, arg...) \
76 do { \
77 if (next) { \
78 unsigned s_len; \
79 s_len = scnprintf (*next, *size, format, ## arg ); \
80 *size -= s_len; *next += s_len; \
81 } else \
82 ohci_dbg(ohci,format, ## arg ); \
83 } while (0);
84
85
86 static void ohci_dump_intr_mask (
87 struct ohci_hcd *ohci,
88 char *label,
89 u32 mask,
90 char **next,
91 unsigned *size)
92 {
93 ohci_dbg_sw (ohci, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s\n",
94 label,
95 mask,
96 (mask & OHCI_INTR_MIE) ? " MIE" : "",
97 (mask & OHCI_INTR_OC) ? " OC" : "",
98 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
99 (mask & OHCI_INTR_FNO) ? " FNO" : "",
100 (mask & OHCI_INTR_UE) ? " UE" : "",
101 (mask & OHCI_INTR_RD) ? " RD" : "",
102 (mask & OHCI_INTR_SF) ? " SF" : "",
103 (mask & OHCI_INTR_WDH) ? " WDH" : "",
104 (mask & OHCI_INTR_SO) ? " SO" : ""
105 );
106 }
107
108 static void maybe_print_eds (
109 struct ohci_hcd *ohci,
110 char *label,
111 u32 value,
112 char **next,
113 unsigned *size)
114 {
115 if (value)
116 ohci_dbg_sw (ohci, next, size, "%s %08x\n", label, value);
117 }
118
119 static char *hcfs2string (int state)
120 {
121 switch (state) {
122 case OHCI_USB_RESET: return "reset";
123 case OHCI_USB_RESUME: return "resume";
124 case OHCI_USB_OPER: return "operational";
125 case OHCI_USB_SUSPEND: return "suspend";
126 }
127 return "?";
128 }
129
130 // dump control and status registers
131 static void
132 ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
133 {
134 struct ohci_regs __iomem *regs = controller->regs;
135 u32 temp;
136
137 temp = ohci_readl (controller, &regs->revision) & 0xff;
138 ohci_dbg_sw (controller, next, size,
139 "OHCI %d.%d, %s legacy support registers\n",
140 0x03 & (temp >> 4), (temp & 0x0f),
141 (temp & 0x0100) ? "with" : "NO");
142
143 temp = ohci_readl (controller, &regs->control);
144 ohci_dbg_sw (controller, next, size,
145 "control 0x%03x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\n",
146 temp,
147 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
148 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
149 (temp & OHCI_CTRL_IR) ? " IR" : "",
150 hcfs2string (temp & OHCI_CTRL_HCFS),
151 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
152 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
153 (temp & OHCI_CTRL_IE) ? " IE" : "",
154 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
155 temp & OHCI_CTRL_CBSR
156 );
157
158 temp = ohci_readl (controller, &regs->cmdstatus);
159 ohci_dbg_sw (controller, next, size,
160 "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp,
161 (temp & OHCI_SOC) >> 16,
162 (temp & OHCI_OCR) ? " OCR" : "",
163 (temp & OHCI_BLF) ? " BLF" : "",
164 (temp & OHCI_CLF) ? " CLF" : "",
165 (temp & OHCI_HCR) ? " HCR" : ""
166 );
167
168 ohci_dump_intr_mask (controller, "intrstatus",
169 ohci_readl (controller, &regs->intrstatus),
170 next, size);
171 ohci_dump_intr_mask (controller, "intrenable",
172 ohci_readl (controller, &regs->intrenable),
173 next, size);
174 // intrdisable always same as intrenable
175
176 maybe_print_eds (controller, "ed_periodcurrent",
177 ohci_readl (controller, &regs->ed_periodcurrent),
178 next, size);
179
180 maybe_print_eds (controller, "ed_controlhead",
181 ohci_readl (controller, &regs->ed_controlhead),
182 next, size);
183 maybe_print_eds (controller, "ed_controlcurrent",
184 ohci_readl (controller, &regs->ed_controlcurrent),
185 next, size);
186
187 maybe_print_eds (controller, "ed_bulkhead",
188 ohci_readl (controller, &regs->ed_bulkhead),
189 next, size);
190 maybe_print_eds (controller, "ed_bulkcurrent",
191 ohci_readl (controller, &regs->ed_bulkcurrent),
192 next, size);
193
194 maybe_print_eds (controller, "donehead",
195 ohci_readl (controller, &regs->donehead), next, size);
196
197 /* broken fminterval means traffic won't flow! */
198 ohci_dbg (controller, "fminterval %08x\n",
199 ohci_readl (controller, &regs->fminterval));
200 }
201
202 #define dbg_port_sw(hc,num,value,next,size) \
203 ohci_dbg_sw (hc, next, size, \
204 "roothub.portstatus [%d] " \
205 "0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
206 num, temp, \
207 (temp & RH_PS_PRSC) ? " PRSC" : "", \
208 (temp & RH_PS_OCIC) ? " OCIC" : "", \
209 (temp & RH_PS_PSSC) ? " PSSC" : "", \
210 (temp & RH_PS_PESC) ? " PESC" : "", \
211 (temp & RH_PS_CSC) ? " CSC" : "", \
212 \
213 (temp & RH_PS_LSDA) ? " LSDA" : "", \
214 (temp & RH_PS_PPS) ? " PPS" : "", \
215 (temp & RH_PS_PRS) ? " PRS" : "", \
216 (temp & RH_PS_POCI) ? " POCI" : "", \
217 (temp & RH_PS_PSS) ? " PSS" : "", \
218 \
219 (temp & RH_PS_PES) ? " PES" : "", \
220 (temp & RH_PS_CCS) ? " CCS" : "" \
221 );
222
223
224 static void
225 ohci_dump_roothub (
226 struct ohci_hcd *controller,
227 int verbose,
228 char **next,
229 unsigned *size)
230 {
231 u32 temp, i;
232
233 temp = roothub_a (controller);
234 if (temp == ~(u32)0)
235 return;
236
237 if (verbose) {
238 ohci_dbg_sw (controller, next, size,
239 "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d(%d)\n", temp,
240 ((temp & RH_A_POTPGT) >> 24) & 0xff,
241 (temp & RH_A_NOCP) ? " NOCP" : "",
242 (temp & RH_A_OCPM) ? " OCPM" : "",
243 (temp & RH_A_DT) ? " DT" : "",
244 (temp & RH_A_NPS) ? " NPS" : "",
245 (temp & RH_A_PSM) ? " PSM" : "",
246 (temp & RH_A_NDP), controller->num_ports
247 );
248 temp = roothub_b (controller);
249 ohci_dbg_sw (controller, next, size,
250 "roothub.b %08x PPCM=%04x DR=%04x\n",
251 temp,
252 (temp & RH_B_PPCM) >> 16,
253 (temp & RH_B_DR)
254 );
255 temp = roothub_status (controller);
256 ohci_dbg_sw (controller, next, size,
257 "roothub.status %08x%s%s%s%s%s%s\n",
258 temp,
259 (temp & RH_HS_CRWE) ? " CRWE" : "",
260 (temp & RH_HS_OCIC) ? " OCIC" : "",
261 (temp & RH_HS_LPSC) ? " LPSC" : "",
262 (temp & RH_HS_DRWE) ? " DRWE" : "",
263 (temp & RH_HS_OCI) ? " OCI" : "",
264 (temp & RH_HS_LPS) ? " LPS" : ""
265 );
266 }
267
268 for (i = 0; i < controller->num_ports; i++) {
269 temp = roothub_portstatus (controller, i);
270 dbg_port_sw (controller, i, temp, next, size);
271 }
272 }
273
274 static void ohci_dump (struct ohci_hcd *controller, int verbose)
275 {
276 ohci_dbg (controller, "OHCI controller state\n");
277
278 // dumps some of the state we know about
279 ohci_dump_status (controller, NULL, NULL);
280 if (controller->hcca)
281 ohci_dbg (controller,
282 "hcca frame #%04x\n", ohci_frame_no(controller));
283 ohci_dump_roothub (controller, 1, NULL, NULL);
284 }
285
286 static const char data0 [] = "DATA0";
287 static const char data1 [] = "DATA1";
288
289 static void ohci_dump_td (const struct ohci_hcd *ohci, const char *label,
290 const struct td *td)
291 {
292 u32 tmp = hc32_to_cpup (ohci, &td->hwINFO);
293
294 ohci_dbg (ohci, "%s td %p%s; urb %p index %d; hw next td %08x\n",
295 label, td,
296 (tmp & TD_DONE) ? " (DONE)" : "",
297 td->urb, td->index,
298 hc32_to_cpup (ohci, &td->hwNextTD));
299 if ((tmp & TD_ISO) == 0) {
300 const char *toggle, *pid;
301 u32 cbp, be;
302
303 switch (tmp & TD_T) {
304 case TD_T_DATA0: toggle = data0; break;
305 case TD_T_DATA1: toggle = data1; break;
306 case TD_T_TOGGLE: toggle = "(CARRY)"; break;
307 default: toggle = "(?)"; break;
308 }
309 switch (tmp & TD_DP) {
310 case TD_DP_SETUP: pid = "SETUP"; break;
311 case TD_DP_IN: pid = "IN"; break;
312 case TD_DP_OUT: pid = "OUT"; break;
313 default: pid = "(bad pid)"; break;
314 }
315 ohci_dbg (ohci, " info %08x CC=%x %s DI=%d %s %s\n", tmp,
316 TD_CC_GET(tmp), /* EC, */ toggle,
317 (tmp & TD_DI) >> 21, pid,
318 (tmp & TD_R) ? "R" : "");
319 cbp = hc32_to_cpup (ohci, &td->hwCBP);
320 be = hc32_to_cpup (ohci, &td->hwBE);
321 ohci_dbg (ohci, " cbp %08x be %08x (len %d)\n", cbp, be,
322 cbp ? (be + 1 - cbp) : 0);
323 } else {
324 unsigned i;
325 ohci_dbg (ohci, " info %08x CC=%x FC=%d DI=%d SF=%04x\n", tmp,
326 TD_CC_GET(tmp),
327 (tmp >> 24) & 0x07,
328 (tmp & TD_DI) >> 21,
329 tmp & 0x0000ffff);
330 ohci_dbg (ohci, " bp0 %08x be %08x\n",
331 hc32_to_cpup (ohci, &td->hwCBP) & ~0x0fff,
332 hc32_to_cpup (ohci, &td->hwBE));
333 for (i = 0; i < MAXPSW; i++) {
334 u16 psw = ohci_hwPSW (ohci, td, i);
335 int cc = (psw >> 12) & 0x0f;
336 ohci_dbg (ohci, " psw [%d] = %2x, CC=%x %s=%d\n", i,
337 psw, cc,
338 (cc >= 0x0e) ? "OFFSET" : "SIZE",
339 psw & 0x0fff);
340 }
341 }
342 }
343
344 /* caller MUST own hcd spinlock if verbose is set! */
345 static void __attribute__((unused))
346 ohci_dump_ed (const struct ohci_hcd *ohci, const char *label,
347 const struct ed *ed, int verbose)
348 {
349 u32 tmp = hc32_to_cpu (ohci, ed->hwINFO);
350 char *type = "";
351
352 ohci_dbg (ohci, "%s, ed %p state 0x%x type %s; next ed %08x\n",
353 label,
354 ed, ed->state, edstring (ed->type),
355 hc32_to_cpup (ohci, &ed->hwNextED));
356 switch (tmp & (ED_IN|ED_OUT)) {
357 case ED_OUT: type = "-OUT"; break;
358 case ED_IN: type = "-IN"; break;
359 /* else from TDs ... control */
360 }
361 ohci_dbg (ohci,
362 " info %08x MAX=%d%s%s%s%s EP=%d%s DEV=%d\n", tmp,
363 0x03ff & (tmp >> 16),
364 (tmp & ED_DEQUEUE) ? " DQ" : "",
365 (tmp & ED_ISO) ? " ISO" : "",
366 (tmp & ED_SKIP) ? " SKIP" : "",
367 (tmp & ED_LOWSPEED) ? " LOW" : "",
368 0x000f & (tmp >> 7),
369 type,
370 0x007f & tmp);
371 tmp = hc32_to_cpup (ohci, &ed->hwHeadP);
372 ohci_dbg (ohci, " tds: head %08x %s%s tail %08x%s\n",
373 tmp,
374 (tmp & ED_C) ? data1 : data0,
375 (tmp & ED_H) ? " HALT" : "",
376 hc32_to_cpup (ohci, &ed->hwTailP),
377 verbose ? "" : " (not listing)");
378 if (verbose) {
379 struct list_head *tmp;
380
381 /* use ed->td_list because HC concurrently modifies
382 * hwNextTD as it accumulates ed_donelist.
383 */
384 list_for_each (tmp, &ed->td_list) {
385 struct td *td;
386 td = list_entry (tmp, struct td, td_list);
387 ohci_dump_td (ohci, " ->", td);
388 }
389 }
390 }
391
392 #else
393 static inline void ohci_dump (struct ohci_hcd *controller, int verbose) {}
394
395 #undef OHCI_VERBOSE_DEBUG
396
397 #endif /* DEBUG */
398
399 /*-------------------------------------------------------------------------*/
400
401 #ifdef STUB_DEBUG_FILES
402
403 static inline void create_debug_files (struct ohci_hcd *bus) { }
404 static inline void remove_debug_files (struct ohci_hcd *bus) { }
405
406 #else
407
408 static ssize_t
409 show_list (struct ohci_hcd *ohci, char *buf, size_t count, struct ed *ed)
410 {
411 unsigned temp, size = count;
412
413 if (!ed)
414 return 0;
415
416 /* print first --> last */
417 while (ed->ed_prev)
418 ed = ed->ed_prev;
419
420 /* dump a snapshot of the bulk or control schedule */
421 while (ed) {
422 u32 info = hc32_to_cpu (ohci, ed->hwINFO);
423 u32 headp = hc32_to_cpu (ohci, ed->hwHeadP);
424 struct list_head *entry;
425 struct td *td;
426
427 temp = scnprintf (buf, size,
428 "ed/%p %cs dev%d ep%d%s max %d %08x%s%s %s",
429 ed,
430 (info & ED_LOWSPEED) ? 'l' : 'f',
431 info & 0x7f,
432 (info >> 7) & 0xf,
433 (info & ED_IN) ? "in" : "out",
434 0x03ff & (info >> 16),
435 info,
436 (info & ED_SKIP) ? " s" : "",
437 (headp & ED_H) ? " H" : "",
438 (headp & ED_C) ? data1 : data0);
439 size -= temp;
440 buf += temp;
441
442 list_for_each (entry, &ed->td_list) {
443 u32 cbp, be;
444
445 td = list_entry (entry, struct td, td_list);
446 info = hc32_to_cpup (ohci, &td->hwINFO);
447 cbp = hc32_to_cpup (ohci, &td->hwCBP);
448 be = hc32_to_cpup (ohci, &td->hwBE);
449 temp = scnprintf (buf, size,
450 "\n\ttd %p %s %d cc=%x urb %p (%08x)",
451 td,
452 ({ char *pid;
453 switch (info & TD_DP) {
454 case TD_DP_SETUP: pid = "setup"; break;
455 case TD_DP_IN: pid = "in"; break;
456 case TD_DP_OUT: pid = "out"; break;
457 default: pid = "(?)"; break;
458 } pid;}),
459 cbp ? (be + 1 - cbp) : 0,
460 TD_CC_GET (info), td->urb, info);
461 size -= temp;
462 buf += temp;
463 }
464
465 temp = scnprintf (buf, size, "\n");
466 size -= temp;
467 buf += temp;
468
469 ed = ed->ed_next;
470 }
471 return count - size;
472 }
473
474 static ssize_t
475 show_async (struct class_device *class_dev, char *buf)
476 {
477 struct usb_bus *bus;
478 struct usb_hcd *hcd;
479 struct ohci_hcd *ohci;
480 size_t temp;
481 unsigned long flags;
482
483 bus = class_get_devdata(class_dev);
484 hcd = bus->hcpriv;
485 ohci = hcd_to_ohci(hcd);
486
487 /* display control and bulk lists together, for simplicity */
488 spin_lock_irqsave (&ohci->lock, flags);
489 temp = show_list (ohci, buf, PAGE_SIZE, ohci->ed_controltail);
490 temp += show_list (ohci, buf + temp, PAGE_SIZE - temp, ohci->ed_bulktail);
491 spin_unlock_irqrestore (&ohci->lock, flags);
492
493 return temp;
494 }
495 static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
496
497
498 #define DBG_SCHED_LIMIT 64
499
500 static ssize_t
501 show_periodic (struct class_device *class_dev, char *buf)
502 {
503 struct usb_bus *bus;
504 struct usb_hcd *hcd;
505 struct ohci_hcd *ohci;
506 struct ed **seen, *ed;
507 unsigned long flags;
508 unsigned temp, size, seen_count;
509 char *next;
510 unsigned i;
511
512 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC)))
513 return 0;
514 seen_count = 0;
515
516 bus = class_get_devdata(class_dev);
517 hcd = bus->hcpriv;
518 ohci = hcd_to_ohci(hcd);
519 next = buf;
520 size = PAGE_SIZE;
521
522 temp = scnprintf (next, size, "size = %d\n", NUM_INTS);
523 size -= temp;
524 next += temp;
525
526 /* dump a snapshot of the periodic schedule (and load) */
527 spin_lock_irqsave (&ohci->lock, flags);
528 for (i = 0; i < NUM_INTS; i++) {
529 if (!(ed = ohci->periodic [i]))
530 continue;
531
532 temp = scnprintf (next, size, "%2d [%3d]:", i, ohci->load [i]);
533 size -= temp;
534 next += temp;
535
536 do {
537 temp = scnprintf (next, size, " ed%d/%p",
538 ed->interval, ed);
539 size -= temp;
540 next += temp;
541 for (temp = 0; temp < seen_count; temp++) {
542 if (seen [temp] == ed)
543 break;
544 }
545
546 /* show more info the first time around */
547 if (temp == seen_count) {
548 u32 info = hc32_to_cpu (ohci, ed->hwINFO);
549 struct list_head *entry;
550 unsigned qlen = 0;
551
552 /* qlen measured here in TDs, not urbs */
553 list_for_each (entry, &ed->td_list)
554 qlen++;
555
556 temp = scnprintf (next, size,
557 " (%cs dev%d ep%d%s-%s qlen %u"
558 " max %d %08x%s%s)",
559 (info & ED_LOWSPEED) ? 'l' : 'f',
560 info & 0x7f,
561 (info >> 7) & 0xf,
562 (info & ED_IN) ? "in" : "out",
563 (info & ED_ISO) ? "iso" : "int",
564 qlen,
565 0x03ff & (info >> 16),
566 info,
567 (info & ED_SKIP) ? " K" : "",
568 (ed->hwHeadP &
569 cpu_to_hc32(ohci, ED_H)) ?
570 " H" : "");
571 size -= temp;
572 next += temp;
573
574 if (seen_count < DBG_SCHED_LIMIT)
575 seen [seen_count++] = ed;
576
577 ed = ed->ed_next;
578
579 } else {
580 /* we've seen it and what's after */
581 temp = 0;
582 ed = NULL;
583 }
584
585 } while (ed);
586
587 temp = scnprintf (next, size, "\n");
588 size -= temp;
589 next += temp;
590 }
591 spin_unlock_irqrestore (&ohci->lock, flags);
592 kfree (seen);
593
594 return PAGE_SIZE - size;
595 }
596 static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
597
598
599 #undef DBG_SCHED_LIMIT
600
601 static ssize_t
602 show_registers (struct class_device *class_dev, char *buf)
603 {
604 struct usb_bus *bus;
605 struct usb_hcd *hcd;
606 struct ohci_hcd *ohci;
607 struct ohci_regs __iomem *regs;
608 unsigned long flags;
609 unsigned temp, size;
610 char *next;
611 u32 rdata;
612
613 bus = class_get_devdata(class_dev);
614 hcd = bus->hcpriv;
615 ohci = hcd_to_ohci(hcd);
616 regs = ohci->regs;
617 next = buf;
618 size = PAGE_SIZE;
619
620 spin_lock_irqsave (&ohci->lock, flags);
621
622 /* dump driver info, then registers in spec order */
623
624 ohci_dbg_sw (ohci, &next, &size,
625 "bus %s, device %s\n"
626 "%s\n"
627 "%s version " DRIVER_VERSION "\n",
628 hcd->self.controller->bus->name,
629 hcd->self.controller->bus_id,
630 hcd->product_desc,
631 hcd_name);
632
633 if (bus->controller->power.power_state.event) {
634 size -= scnprintf (next, size,
635 "SUSPENDED (no register access)\n");
636 goto done;
637 }
638
639 ohci_dump_status(ohci, &next, &size);
640
641 /* hcca */
642 if (ohci->hcca)
643 ohci_dbg_sw (ohci, &next, &size,
644 "hcca frame 0x%04x\n", ohci_frame_no(ohci));
645
646 /* other registers mostly affect frame timings */
647 rdata = ohci_readl (ohci, &regs->fminterval);
648 temp = scnprintf (next, size,
649 "fmintvl 0x%08x %sFSMPS=0x%04x FI=0x%04x\n",
650 rdata, (rdata >> 31) ? "FIT " : "",
651 (rdata >> 16) & 0xefff, rdata & 0xffff);
652 size -= temp;
653 next += temp;
654
655 rdata = ohci_readl (ohci, &regs->fmremaining);
656 temp = scnprintf (next, size, "fmremaining 0x%08x %sFR=0x%04x\n",
657 rdata, (rdata >> 31) ? "FRT " : "",
658 rdata & 0x3fff);
659 size -= temp;
660 next += temp;
661
662 rdata = ohci_readl (ohci, &regs->periodicstart);
663 temp = scnprintf (next, size, "periodicstart 0x%04x\n",
664 rdata & 0x3fff);
665 size -= temp;
666 next += temp;
667
668 rdata = ohci_readl (ohci, &regs->lsthresh);
669 temp = scnprintf (next, size, "lsthresh 0x%04x\n",
670 rdata & 0x3fff);
671 size -= temp;
672 next += temp;
673
674 /* roothub */
675 ohci_dump_roothub (ohci, 1, &next, &size);
676
677 done:
678 spin_unlock_irqrestore (&ohci->lock, flags);
679 return PAGE_SIZE - size;
680 }
681 static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
682
683
684 static inline void create_debug_files (struct ohci_hcd *ohci)
685 {
686 struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
687
688 class_device_create_file(cldev, &class_device_attr_async);
689 class_device_create_file(cldev, &class_device_attr_periodic);
690 class_device_create_file(cldev, &class_device_attr_registers);
691 ohci_dbg (ohci, "created debug files\n");
692 }
693
694 static inline void remove_debug_files (struct ohci_hcd *ohci)
695 {
696 struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
697
698 class_device_remove_file(cldev, &class_device_attr_async);
699 class_device_remove_file(cldev, &class_device_attr_periodic);
700 class_device_remove_file(cldev, &class_device_attr_registers);
701 }
702
703 #endif
704
705 /*-------------------------------------------------------------------------*/
706
kernel source for telekom puls (alcatel/mediatek)