drivers/tty/serial/vt8500_serial.c

   1 /*
   2  * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
   3  *
   4  * Based on msm_serial.c, which is:
   5  * Copyright (C) 2007 Google, Inc.
   6  * Author: Robert Love <rlove@google.com>
   7  *
   8  * This software is licensed under the terms of the GNU General Public
   9  * License version 2, as published by the Free Software Foundation, and
  10  * may be copied, distributed, and modified under those terms.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  19 # define SUPPORT_SYSRQ
  20 #endif
  21
  22 #include <linux/hrtimer.h>
  23 #include <linux/delay.h>
  24 #include <linux/module.h>
  25 #include <linux/io.h>
  26 #include <linux/ioport.h>
  27 #include <linux/irq.h>
  28 #include <linux/init.h>
  29 #include <linux/console.h>
  30 #include <linux/tty.h>
  31 #include <linux/tty_flip.h>
  32 #include <linux/serial_core.h>
  33 #include <linux/serial.h>
  34 #include <linux/slab.h>
  35 #include <linux/clk.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/of.h>
  38
  39 /*
  40  * UART Register offsets
  41  */
  42
  43 #define VT8500_URTDR            0x0000  /* Transmit data */
  44 #define VT8500_URRDR            0x0004  /* Receive data */
  45 #define VT8500_URDIV            0x0008  /* Clock/Baud rate divisor */
  46 #define VT8500_URLCR            0x000C  /* Line control */
  47 #define VT8500_URICR            0x0010  /* IrDA control */
  48 #define VT8500_URIER            0x0014  /* Interrupt enable */
  49 #define VT8500_URISR            0x0018  /* Interrupt status */
  50 #define VT8500_URUSR            0x001c  /* UART status */
  51 #define VT8500_URFCR            0x0020  /* FIFO control */
  52 #define VT8500_URFIDX           0x0024  /* FIFO index */
  53 #define VT8500_URBKR            0x0028  /* Break signal count */
  54 #define VT8500_URTOD            0x002c  /* Time out divisor */
  55 #define VT8500_TXFIFO           0x1000  /* Transmit FIFO (16x8) */
  56 #define VT8500_RXFIFO           0x1020  /* Receive FIFO (16x10) */
  57
  58 /*
  59  * Interrupt enable and status bits
  60  */
  61
  62 #define TXDE    (1 << 0)        /* Tx Data empty */
  63 #define RXDF    (1 << 1)        /* Rx Data full */
  64 #define TXFAE   (1 << 2)        /* Tx FIFO almost empty */
  65 #define TXFE    (1 << 3)        /* Tx FIFO empty */
  66 #define RXFAF   (1 << 4)        /* Rx FIFO almost full */
  67 #define RXFF    (1 << 5)        /* Rx FIFO full */
  68 #define TXUDR   (1 << 6)        /* Tx underrun */
  69 #define RXOVER  (1 << 7)        /* Rx overrun */
  70 #define PER     (1 << 8)        /* Parity error */
  71 #define FER     (1 << 9)        /* Frame error */
  72 #define TCTS    (1 << 10)       /* Toggle of CTS */
  73 #define RXTOUT  (1 << 11)       /* Rx timeout */
  74 #define BKDONE  (1 << 12)       /* Break signal done */
  75 #define ERR     (1 << 13)       /* AHB error response */
  76
  77 #define RX_FIFO_INTS    (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT)
  78 #define TX_FIFO_INTS    (TXFAE | TXFE | TXUDR)
  79
  80 #define VT8500_MAX_PORTS        6
  81
  82 struct vt8500_port {
  83         struct uart_port        uart;
  84         char                    name[16];
  85         struct clk              *clk;
  86         unsigned int            ier;
  87 };
  88
  89 /*
  90  * we use this variable to keep track of which ports
  91  * have been allocated as we can't use pdev->id in
  92  * devicetree
  93  */
  94 static unsigned long vt8500_ports_in_use;
  95
  96 static inline void vt8500_write(struct uart_port *port, unsigned int val,
  97                              unsigned int off)
  98 {
  99         writel(val, port->membase + off);
 100 }
 101
 102 static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off)
 103 {
 104         return readl(port->membase + off);
 105 }
 106
 107 static void vt8500_stop_tx(struct uart_port *port)
 108 {
 109         struct vt8500_port *vt8500_port = container_of(port,
 110                                                        struct vt8500_port,
 111                                                        uart);
 112
 113         vt8500_port->ier &= ~TX_FIFO_INTS;
 114         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
 115 }
 116
 117 static void vt8500_stop_rx(struct uart_port *port)
 118 {
 119         struct vt8500_port *vt8500_port = container_of(port,
 120                                                        struct vt8500_port,
 121                                                        uart);
 122
 123         vt8500_port->ier &= ~RX_FIFO_INTS;
 124         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
 125 }
 126
 127 static void vt8500_enable_ms(struct uart_port *port)
 128 {
 129         struct vt8500_port *vt8500_port = container_of(port,
 130                                                        struct vt8500_port,
 131                                                        uart);
 132
 133         vt8500_port->ier |= TCTS;
 134         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
 135 }
 136
 137 static void handle_rx(struct uart_port *port)
 138 {
 139         struct tty_port *tport = &port->state->port;
 140
 141         /*
 142          * Handle overrun
 143          */
 144         if ((vt8500_read(port, VT8500_URISR) & RXOVER)) {
 145                 port->icount.overrun++;
 146                 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
 147         }
 148
 149         /* and now the main RX loop */
 150         while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) {
 151                 unsigned int c;
 152                 char flag = TTY_NORMAL;
 153
 154                 c = readw(port->membase + VT8500_RXFIFO) & 0x3ff;
 155
 156                 /* Mask conditions we're ignorning. */
 157                 c &= ~port->read_status_mask;
 158
 159                 if (c & FER) {
 160                         port->icount.frame++;
 161                         flag = TTY_FRAME;
 162                 } else if (c & PER) {
 163                         port->icount.parity++;
 164                         flag = TTY_PARITY;
 165                 }
 166                 port->icount.rx++;
 167
 168                 if (!uart_handle_sysrq_char(port, c))
 169                         tty_insert_flip_char(tport, c, flag);
 170         }
 171
 172         tty_flip_buffer_push(tport);
 173 }
 174
 175 static void handle_tx(struct uart_port *port)
 176 {
 177         struct circ_buf *xmit = &port->state->xmit;
 178
 179         if (port->x_char) {
 180                 writeb(port->x_char, port->membase + VT8500_TXFIFO);
 181                 port->icount.tx++;
 182                 port->x_char = 0;
 183         }
 184         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 185                 vt8500_stop_tx(port);
 186                 return;
 187         }
 188
 189         while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) {
 190                 if (uart_circ_empty(xmit))
 191                         break;
 192
 193                 writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO);
 194
 195                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 196                 port->icount.tx++;
 197         }
 198
 199         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 200                 uart_write_wakeup(port);
 201
 202         if (uart_circ_empty(xmit))
 203                 vt8500_stop_tx(port);
 204 }
 205
 206 static void vt8500_start_tx(struct uart_port *port)
 207 {
 208         struct vt8500_port *vt8500_port = container_of(port,
 209                                                        struct vt8500_port,
 210                                                        uart);
 211
 212         vt8500_port->ier &= ~TX_FIFO_INTS;
 213         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
 214         handle_tx(port);
 215         vt8500_port->ier |= TX_FIFO_INTS;
 216         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
 217 }
 218
 219 static void handle_delta_cts(struct uart_port *port)
 220 {
 221         port->icount.cts++;
 222         wake_up_interruptible(&port->state->port.delta_msr_wait);
 223 }
 224
 225 static irqreturn_t vt8500_irq(int irq, void *dev_id)
 226 {
 227         struct uart_port *port = dev_id;
 228         unsigned long isr;
 229
 230         spin_lock(&port->lock);
 231         isr = vt8500_read(port, VT8500_URISR);
 232
 233         /* Acknowledge active status bits */
 234         vt8500_write(port, isr, VT8500_URISR);
 235
 236         if (isr & RX_FIFO_INTS)
 237                 handle_rx(port);
 238         if (isr & TX_FIFO_INTS)
 239                 handle_tx(port);
 240         if (isr & TCTS)
 241                 handle_delta_cts(port);
 242
 243         spin_unlock(&port->lock);
 244
 245         return IRQ_HANDLED;
 246 }
 247
 248 static unsigned int vt8500_tx_empty(struct uart_port *port)
 249 {
 250         return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ?
 251                                                 TIOCSER_TEMT : 0;
 252 }
 253
 254 static unsigned int vt8500_get_mctrl(struct uart_port *port)
 255 {
 256         unsigned int usr;
 257
 258         usr = vt8500_read(port, VT8500_URUSR);
 259         if (usr & (1 << 4))
 260                 return TIOCM_CTS;
 261         else
 262                 return 0;
 263 }
 264
 265 static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl)
 266 {
 267 }
 268
 269 static void vt8500_break_ctl(struct uart_port *port, int break_ctl)
 270 {
 271         if (break_ctl)
 272                 vt8500_write(port, vt8500_read(port, VT8500_URLCR) | (1 << 9),
 273                              VT8500_URLCR);
 274 }
 275
 276 static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud)
 277 {
 278         unsigned long div;
 279         unsigned int loops = 1000;
 280
 281         div = vt8500_read(port, VT8500_URDIV) & ~(0x3ff);
 282
 283         if (unlikely((baud < 900) || (baud > 921600)))
 284                 div |= 7;
 285         else
 286                 div |= (921600 / baud) - 1;
 287
 288         while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops)
 289                 cpu_relax();
 290         vt8500_write(port, div, VT8500_URDIV);
 291
 292         return baud;
 293 }
 294
 295 static int vt8500_startup(struct uart_port *port)
 296 {
 297         struct vt8500_port *vt8500_port =
 298                         container_of(port, struct vt8500_port, uart);
 299         int ret;
 300
 301         snprintf(vt8500_port->name, sizeof(vt8500_port->name),
 302                  "vt8500_serial%d", port->line);
 303
 304         ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH,
 305                           vt8500_port->name, port);
 306         if (unlikely(ret))
 307                 return ret;
 308
 309         vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */
 310
 311         return 0;
 312 }
 313
 314 static void vt8500_shutdown(struct uart_port *port)
 315 {
 316         struct vt8500_port *vt8500_port =
 317                         container_of(port, struct vt8500_port, uart);
 318
 319         vt8500_port->ier = 0;
 320
 321         /* disable interrupts and FIFOs */
 322         vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
 323         vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
 324         free_irq(port->irq, port);
 325 }
 326
 327 static void vt8500_set_termios(struct uart_port *port,
 328                                struct ktermios *termios,
 329                                struct ktermios *old)
 330 {
 331         struct vt8500_port *vt8500_port =
 332                         container_of(port, struct vt8500_port, uart);
 333         unsigned long flags;
 334         unsigned int baud, lcr;
 335         unsigned int loops = 1000;
 336
 337         spin_lock_irqsave(&port->lock, flags);
 338
 339         /* calculate and set baud rate */
 340         baud = uart_get_baud_rate(port, termios, old, 900, 921600);
 341         baud = vt8500_set_baud_rate(port, baud);
 342         if (tty_termios_baud_rate(termios))
 343                 tty_termios_encode_baud_rate(termios, baud, baud);
 344
 345         /* calculate parity */
 346         lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
 347         lcr &= ~((1 << 5) | (1 << 4));
 348         if (termios->c_cflag & PARENB) {
 349                 lcr |= (1 << 4);
 350                 termios->c_cflag &= ~CMSPAR;
 351                 if (termios->c_cflag & PARODD)
 352                         lcr |= (1 << 5);
 353         }
 354
 355         /* calculate bits per char */
 356         lcr &= ~(1 << 2);
 357         switch (termios->c_cflag & CSIZE) {
 358         case CS7:
 359                 break;
 360         case CS8:
 361         default:
 362                 lcr |= (1 << 2);
 363                 termios->c_cflag &= ~CSIZE;
 364                 termios->c_cflag |= CS8;
 365                 break;
 366         }
 367
 368         /* calculate stop bits */
 369         lcr &= ~(1 << 3);
 370         if (termios->c_cflag & CSTOPB)
 371                 lcr |= (1 << 3);
 372
 373         /* set parity, bits per char, and stop bit */
 374         vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);
 375
 376         /* Configure status bits to ignore based on termio flags. */
 377         port->read_status_mask = 0;
 378         if (termios->c_iflag & IGNPAR)
 379                 port->read_status_mask = FER | PER;
 380
 381         uart_update_timeout(port, termios->c_cflag, baud);
 382
 383         /* Reset FIFOs */
 384         vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
 385         while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
 386                                                         && --loops)
 387                 cpu_relax();
 388
 389         /* Every possible FIFO-related interrupt */
 390         vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;
 391
 392         /*
 393          * CTS flow control
 394          */
 395         if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
 396                 vt8500_port->ier |= TCTS;
 397
 398         vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
 399         vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);
 400
 401         spin_unlock_irqrestore(&port->lock, flags);
 402 }
 403
 404 static const char *vt8500_type(struct uart_port *port)
 405 {
 406         struct vt8500_port *vt8500_port =
 407                         container_of(port, struct vt8500_port, uart);
 408         return vt8500_port->name;
 409 }
 410
 411 static void vt8500_release_port(struct uart_port *port)
 412 {
 413 }
 414
 415 static int vt8500_request_port(struct uart_port *port)
 416 {
 417         return 0;
 418 }
 419
 420 static void vt8500_config_port(struct uart_port *port, int flags)
 421 {
 422         port->type = PORT_VT8500;
 423 }
 424
 425 static int vt8500_verify_port(struct uart_port *port,
 426                               struct serial_struct *ser)
 427 {
 428         if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500))
 429                 return -EINVAL;
 430         if (unlikely(port->irq != ser->irq))
 431                 return -EINVAL;
 432         return 0;
 433 }
 434
 435 static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
 436 static struct uart_driver vt8500_uart_driver;
 437
 438 #ifdef CONFIG_SERIAL_VT8500_CONSOLE
 439
 440 static inline void wait_for_xmitr(struct uart_port *port)
 441 {
 442         unsigned int status, tmout = 10000;
 443
 444         /* Wait up to 10ms for the character(s) to be sent. */
 445         do {
 446                 status = vt8500_read(port, VT8500_URFIDX);
 447
 448                 if (--tmout == 0)
 449                         break;
 450                 udelay(1);
 451         } while (status & 0x10);
 452 }
 453
 454 static void vt8500_console_putchar(struct uart_port *port, int c)
 455 {
 456         wait_for_xmitr(port);
 457         writeb(c, port->membase + VT8500_TXFIFO);
 458 }
 459
 460 static void vt8500_console_write(struct console *co, const char *s,
 461                               unsigned int count)
 462 {
 463         struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
 464         unsigned long ier;
 465
 466         BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr);
 467
 468         ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
 469         vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);
 470
 471         uart_console_write(&vt8500_port->uart, s, count,
 472                            vt8500_console_putchar);
 473
 474         /*
 475          *      Finally, wait for transmitter to become empty
 476          *      and switch back to FIFO
 477          */
 478         wait_for_xmitr(&vt8500_port->uart);
 479         vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
 480 }
 481
 482 static int __init vt8500_console_setup(struct console *co, char *options)
 483 {
 484         struct vt8500_port *vt8500_port;
 485         int baud = 9600;
 486         int bits = 8;
 487         int parity = 'n';
 488         int flow = 'n';
 489
 490         if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0))
 491                 return -ENXIO;
 492
 493         vt8500_port = vt8500_uart_ports[co->index];
 494
 495         if (!vt8500_port)
 496                 return -ENODEV;
 497
 498         if (options)
 499                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 500
 501         return uart_set_options(&vt8500_port->uart,
 502                                  co, baud, parity, bits, flow);
 503 }
 504
 505 static struct console vt8500_console = {
 506         .name = "ttyWMT",
 507         .write = vt8500_console_write,
 508         .device = uart_console_device,
 509         .setup = vt8500_console_setup,
 510         .flags = CON_PRINTBUFFER,
 511         .index = -1,
 512         .data = &vt8500_uart_driver,
 513 };
 514
 515 #define VT8500_CONSOLE  (&vt8500_console)
 516
 517 #else
 518 #define VT8500_CONSOLE  NULL
 519 #endif
 520
 521 static struct uart_ops vt8500_uart_pops = {
 522         .tx_empty       = vt8500_tx_empty,
 523         .set_mctrl      = vt8500_set_mctrl,
 524         .get_mctrl      = vt8500_get_mctrl,
 525         .stop_tx        = vt8500_stop_tx,
 526         .start_tx       = vt8500_start_tx,
 527         .stop_rx        = vt8500_stop_rx,
 528         .enable_ms      = vt8500_enable_ms,
 529         .break_ctl      = vt8500_break_ctl,
 530         .startup        = vt8500_startup,
 531         .shutdown       = vt8500_shutdown,
 532         .set_termios    = vt8500_set_termios,
 533         .type           = vt8500_type,
 534         .release_port   = vt8500_release_port,
 535         .request_port   = vt8500_request_port,
 536         .config_port    = vt8500_config_port,
 537         .verify_port    = vt8500_verify_port,
 538 };
 539
 540 static struct uart_driver vt8500_uart_driver = {
 541         .owner          = THIS_MODULE,
 542         .driver_name    = "vt8500_serial",
 543         .dev_name       = "ttyWMT",
 544         .nr             = 6,
 545         .cons           = VT8500_CONSOLE,
 546 };
 547
 548 static int vt8500_serial_probe(struct platform_device *pdev)
 549 {
 550         struct vt8500_port *vt8500_port;
 551         struct resource *mmres, *irqres;
 552         struct device_node *np = pdev->dev.of_node;
 553         int ret;
 554         int port;
 555
 556         mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 557         irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 558         if (!mmres || !irqres)
 559                 return -ENODEV;
 560
 561         if (np)
 562                 port = of_alias_get_id(np, "serial");
 563                 if (port >= VT8500_MAX_PORTS)
 564                         port = -1;
 565         else
 566                 port = -1;
 567
 568         if (port < 0) {
 569                 /* calculate the port id */
 570                 port = find_first_zero_bit(&vt8500_ports_in_use,
 571                                         sizeof(vt8500_ports_in_use));
 572         }
 573
 574         if (port >= VT8500_MAX_PORTS)
 575                 return -ENODEV;
 576
 577         /* reserve the port id */
 578         if (test_and_set_bit(port, &vt8500_ports_in_use)) {
 579                 /* port already in use - shouldn't really happen */
 580                 return -EBUSY;
 581         }
 582
 583         vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port),
 584                                    GFP_KERNEL);
 585         if (!vt8500_port)
 586                 return -ENOMEM;
 587
 588         vt8500_port->uart.membase = devm_request_and_ioremap(&pdev->dev, mmres);
 589         if (!vt8500_port->uart.membase)
 590                 return -EADDRNOTAVAIL;
 591
 592         vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
 593         if (IS_ERR(vt8500_port->clk)) {
 594                 dev_err(&pdev->dev, "failed to get clock\n");
 595                 return  -EINVAL;
 596         }
 597
 598         ret = clk_prepare_enable(vt8500_port->clk);
 599         if (ret) {
 600                 dev_err(&pdev->dev, "failed to enable clock\n");
 601                 return ret;
 602         }
 603
 604         vt8500_port->uart.type = PORT_VT8500;
 605         vt8500_port->uart.iotype = UPIO_MEM;
 606         vt8500_port->uart.mapbase = mmres->start;
 607         vt8500_port->uart.irq = irqres->start;
 608         vt8500_port->uart.fifosize = 16;
 609         vt8500_port->uart.ops = &vt8500_uart_pops;
 610         vt8500_port->uart.line = port;
 611         vt8500_port->uart.dev = &pdev->dev;
 612         vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
 613
 614         vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
 615         if (!IS_ERR(vt8500_port->clk)) {
 616                 vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk);
 617         } else {
 618                 /* use the default of 24Mhz if not specified and warn */
 619                 pr_warn("%s: serial clock source not specified\n", __func__);
 620                 vt8500_port->uart.uartclk = 24000000;
 621         }
 622
 623         snprintf(vt8500_port->name, sizeof(vt8500_port->name),
 624                  "VT8500 UART%d", pdev->id);
 625
 626         vt8500_uart_ports[port] = vt8500_port;
 627
 628         uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
 629
 630         platform_set_drvdata(pdev, vt8500_port);
 631
 632         return 0;
 633 }
 634
 635 static int vt8500_serial_remove(struct platform_device *pdev)
 636 {
 637         struct vt8500_port *vt8500_port = platform_get_drvdata(pdev);
 638
 639         platform_set_drvdata(pdev, NULL);
 640         clk_disable_unprepare(vt8500_port->clk);
 641         uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart);
 642
 643         return 0;
 644 }
 645
 646 static const struct of_device_id wmt_dt_ids[] = {
 647         { .compatible = "via,vt8500-uart", },
 648         {}
 649 };
 650
 651 static struct platform_driver vt8500_platform_driver = {
 652         .probe  = vt8500_serial_probe,
 653         .remove = vt8500_serial_remove,
 654         .driver = {
 655                 .name = "vt8500_serial",
 656                 .owner = THIS_MODULE,
 657                 .of_match_table = of_match_ptr(wmt_dt_ids),
 658         },
 659 };
 660
 661 static int __init vt8500_serial_init(void)
 662 {
 663         int ret;
 664
 665         ret = uart_register_driver(&vt8500_uart_driver);
 666         if (unlikely(ret))
 667                 return ret;
 668
 669         ret = platform_driver_register(&vt8500_platform_driver);
 670
 671         if (unlikely(ret))
 672                 uart_unregister_driver(&vt8500_uart_driver);
 673
 674         return ret;
 675 }
 676
 677 static void __exit vt8500_serial_exit(void)
 678 {
 679 #ifdef CONFIG_SERIAL_VT8500_CONSOLE
 680         unregister_console(&vt8500_console);
 681 #endif
 682         platform_driver_unregister(&vt8500_platform_driver);
 683         uart_unregister_driver(&vt8500_uart_driver);
 684 }
 685
 686 module_init(vt8500_serial_init);
 687 module_exit(vt8500_serial_exit);
 688
 689 MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>");
 690 MODULE_DESCRIPTION("Driver for vt8500 serial device");
 691 MODULE_LICENSE("GPL v2");