drivers/spi/spi-mpc512x-psc.c

   1 /*
   2  * MPC512x PSC in SPI mode driver.
   3  *
   4  * Copyright (C) 2007,2008 Freescale Semiconductor Inc.
   5  * Original port from 52xx driver:
   6  *      Hongjun Chen <hong-jun.chen@freescale.com>
   7  *
   8  * Fork of mpc52xx_psc_spi.c:
   9  *      Copyright (C) 2006 TOPTICA Photonics AG., Dragos Carp
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/completion.h>
  26 #include <linux/io.h>
  27 #include <linux/delay.h>
  28 #include <linux/clk.h>
  29 #include <linux/spi/spi.h>
  30 #include <linux/fsl_devices.h>
  31 #include <linux/gpio.h>
  32 #include <asm/mpc52xx_psc.h>
  33
  34 struct mpc512x_psc_spi {
  35         void (*cs_control)(struct spi_device *spi, bool on);
  36         u32 sysclk;
  37
  38         /* driver internal data */
  39         struct mpc52xx_psc __iomem *psc;
  40         struct mpc512x_psc_fifo __iomem *fifo;
  41         unsigned int irq;
  42         u8 bits_per_word;
  43         u8 busy;
  44         u32 mclk;
  45         u8 eofbyte;
  46
  47         struct workqueue_struct *workqueue;
  48         struct work_struct work;
  49
  50         struct list_head queue;
  51         spinlock_t lock;        /* Message queue lock */
  52
  53         struct completion done;
  54 };
  55
  56 /* controller state */
  57 struct mpc512x_psc_spi_cs {
  58         int bits_per_word;
  59         int speed_hz;
  60 };
  61
  62 /* set clock freq, clock ramp, bits per work
  63  * if t is NULL then reset the values to the default values
  64  */
  65 static int mpc512x_psc_spi_transfer_setup(struct spi_device *spi,
  66                                           struct spi_transfer *t)
  67 {
  68         struct mpc512x_psc_spi_cs *cs = spi->controller_state;
  69
  70         cs->speed_hz = (t && t->speed_hz)
  71             ? t->speed_hz : spi->max_speed_hz;
  72         cs->bits_per_word = (t && t->bits_per_word)
  73             ? t->bits_per_word : spi->bits_per_word;
  74         cs->bits_per_word = ((cs->bits_per_word + 7) / 8) * 8;
  75         return 0;
  76 }
  77
  78 static void mpc512x_psc_spi_activate_cs(struct spi_device *spi)
  79 {
  80         struct mpc512x_psc_spi_cs *cs = spi->controller_state;
  81         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
  82         struct mpc52xx_psc __iomem *psc = mps->psc;
  83         u32 sicr;
  84         u32 ccr;
  85         u16 bclkdiv;
  86
  87         sicr = in_be32(&psc->sicr);
  88
  89         /* Set clock phase and polarity */
  90         if (spi->mode & SPI_CPHA)
  91                 sicr |= 0x00001000;
  92         else
  93                 sicr &= ~0x00001000;
  94
  95         if (spi->mode & SPI_CPOL)
  96                 sicr |= 0x00002000;
  97         else
  98                 sicr &= ~0x00002000;
  99
 100         if (spi->mode & SPI_LSB_FIRST)
 101                 sicr |= 0x10000000;
 102         else
 103                 sicr &= ~0x10000000;
 104         out_be32(&psc->sicr, sicr);
 105
 106         ccr = in_be32(&psc->ccr);
 107         ccr &= 0xFF000000;
 108         if (cs->speed_hz)
 109                 bclkdiv = (mps->mclk / cs->speed_hz) - 1;
 110         else
 111                 bclkdiv = (mps->mclk / 1000000) - 1;    /* default 1MHz */
 112
 113         ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
 114         out_be32(&psc->ccr, ccr);
 115         mps->bits_per_word = cs->bits_per_word;
 116
 117         if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
 118                 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 1 : 0);
 119 }
 120
 121 static void mpc512x_psc_spi_deactivate_cs(struct spi_device *spi)
 122 {
 123         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 124
 125         if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
 126                 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
 127
 128 }
 129
 130 /* extract and scale size field in txsz or rxsz */
 131 #define MPC512x_PSC_FIFO_SZ(sz) ((sz & 0x7ff) << 2);
 132
 133 #define EOFBYTE 1
 134
 135 static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi,
 136                                          struct spi_transfer *t)
 137 {
 138         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 139         struct mpc52xx_psc __iomem *psc = mps->psc;
 140         struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
 141         size_t len = t->len;
 142         u8 *tx_buf = (u8 *)t->tx_buf;
 143         u8 *rx_buf = (u8 *)t->rx_buf;
 144
 145         if (!tx_buf && !rx_buf && t->len)
 146                 return -EINVAL;
 147
 148         /* Zero MR2 */
 149         in_8(&psc->mode);
 150         out_8(&psc->mode, 0x0);
 151
 152         /* enable transmiter/receiver */
 153         out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
 154
 155         while (len) {
 156                 int count;
 157                 int i;
 158                 u8 data;
 159                 size_t fifosz;
 160                 int rxcount;
 161
 162                 /*
 163                  * The number of bytes that can be sent at a time
 164                  * depends on the fifo size.
 165                  */
 166                 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz));
 167                 count = min(fifosz, len);
 168
 169                 for (i = count; i > 0; i--) {
 170                         data = tx_buf ? *tx_buf++ : 0;
 171                         if (len == EOFBYTE && t->cs_change)
 172                                 setbits32(&fifo->txcmd, MPC512x_PSC_FIFO_EOF);
 173                         out_8(&fifo->txdata_8, data);
 174                         len--;
 175                 }
 176
 177                 INIT_COMPLETION(mps->done);
 178
 179                 /* interrupt on tx fifo empty */
 180                 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
 181                 out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY);
 182
 183                 wait_for_completion(&mps->done);
 184
 185                 mdelay(1);
 186
 187                 /* rx fifo should have count bytes in it */
 188                 rxcount = in_be32(&fifo->rxcnt);
 189                 if (rxcount != count)
 190                         mdelay(1);
 191
 192                 rxcount = in_be32(&fifo->rxcnt);
 193                 if (rxcount != count) {
 194                         dev_warn(&spi->dev, "expected %d bytes in rx fifo "
 195                                  "but got %d\n", count, rxcount);
 196                 }
 197
 198                 rxcount = min(rxcount, count);
 199                 for (i = rxcount; i > 0; i--) {
 200                         data = in_8(&fifo->rxdata_8);
 201                         if (rx_buf)
 202                                 *rx_buf++ = data;
 203                 }
 204                 while (in_be32(&fifo->rxcnt)) {
 205                         in_8(&fifo->rxdata_8);
 206                 }
 207         }
 208         /* disable transmiter/receiver and fifo interrupt */
 209         out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
 210         out_be32(&fifo->tximr, 0);
 211         return 0;
 212 }
 213
 214 static void mpc512x_psc_spi_work(struct work_struct *work)
 215 {
 216         struct mpc512x_psc_spi *mps = container_of(work,
 217                                                    struct mpc512x_psc_spi,
 218                                                    work);
 219
 220         spin_lock_irq(&mps->lock);
 221         mps->busy = 1;
 222         while (!list_empty(&mps->queue)) {
 223                 struct spi_message *m;
 224                 struct spi_device *spi;
 225                 struct spi_transfer *t = NULL;
 226                 unsigned cs_change;
 227                 int status;
 228
 229                 m = container_of(mps->queue.next, struct spi_message, queue);
 230                 list_del_init(&m->queue);
 231                 spin_unlock_irq(&mps->lock);
 232
 233                 spi = m->spi;
 234                 cs_change = 1;
 235                 status = 0;
 236                 list_for_each_entry(t, &m->transfers, transfer_list) {
 237                         if (t->bits_per_word || t->speed_hz) {
 238                                 status = mpc512x_psc_spi_transfer_setup(spi, t);
 239                                 if (status < 0)
 240                                         break;
 241                         }
 242
 243                         if (cs_change)
 244                                 mpc512x_psc_spi_activate_cs(spi);
 245                         cs_change = t->cs_change;
 246
 247                         status = mpc512x_psc_spi_transfer_rxtx(spi, t);
 248                         if (status)
 249                                 break;
 250                         m->actual_length += t->len;
 251
 252                         if (t->delay_usecs)
 253                                 udelay(t->delay_usecs);
 254
 255                         if (cs_change)
 256                                 mpc512x_psc_spi_deactivate_cs(spi);
 257                 }
 258
 259                 m->status = status;
 260                 m->complete(m->context);
 261
 262                 if (status || !cs_change)
 263                         mpc512x_psc_spi_deactivate_cs(spi);
 264
 265                 mpc512x_psc_spi_transfer_setup(spi, NULL);
 266
 267                 spin_lock_irq(&mps->lock);
 268         }
 269         mps->busy = 0;
 270         spin_unlock_irq(&mps->lock);
 271 }
 272
 273 static int mpc512x_psc_spi_setup(struct spi_device *spi)
 274 {
 275         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 276         struct mpc512x_psc_spi_cs *cs = spi->controller_state;
 277         unsigned long flags;
 278         int ret;
 279
 280         if (spi->bits_per_word % 8)
 281                 return -EINVAL;
 282
 283         if (!cs) {
 284                 cs = kzalloc(sizeof *cs, GFP_KERNEL);
 285                 if (!cs)
 286                         return -ENOMEM;
 287
 288                 if (gpio_is_valid(spi->cs_gpio)) {
 289                         ret = gpio_request(spi->cs_gpio, dev_name(&spi->dev));
 290                         if (ret) {
 291                                 dev_err(&spi->dev, "can't get CS gpio: %d\n",
 292                                         ret);
 293                                 kfree(cs);
 294                                 return ret;
 295                         }
 296                         gpio_direction_output(spi->cs_gpio,
 297                                         spi->mode & SPI_CS_HIGH ? 0 : 1);
 298                 }
 299
 300                 spi->controller_state = cs;
 301         }
 302
 303         cs->bits_per_word = spi->bits_per_word;
 304         cs->speed_hz = spi->max_speed_hz;
 305
 306         spin_lock_irqsave(&mps->lock, flags);
 307         if (!mps->busy)
 308                 mpc512x_psc_spi_deactivate_cs(spi);
 309         spin_unlock_irqrestore(&mps->lock, flags);
 310
 311         return 0;
 312 }
 313
 314 static int mpc512x_psc_spi_transfer(struct spi_device *spi,
 315                                     struct spi_message *m)
 316 {
 317         struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
 318         unsigned long flags;
 319
 320         m->actual_length = 0;
 321         m->status = -EINPROGRESS;
 322
 323         spin_lock_irqsave(&mps->lock, flags);
 324         list_add_tail(&m->queue, &mps->queue);
 325         queue_work(mps->workqueue, &mps->work);
 326         spin_unlock_irqrestore(&mps->lock, flags);
 327
 328         return 0;
 329 }
 330
 331 static void mpc512x_psc_spi_cleanup(struct spi_device *spi)
 332 {
 333         if (gpio_is_valid(spi->cs_gpio))
 334                 gpio_free(spi->cs_gpio);
 335         kfree(spi->controller_state);
 336 }
 337
 338 static int mpc512x_psc_spi_port_config(struct spi_master *master,
 339                                        struct mpc512x_psc_spi *mps)
 340 {
 341         struct mpc52xx_psc __iomem *psc = mps->psc;
 342         struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
 343         struct clk *spiclk;
 344         int ret = 0;
 345         char name[32];
 346         u32 sicr;
 347         u32 ccr;
 348         u16 bclkdiv;
 349
 350         sprintf(name, "psc%d_mclk", master->bus_num);
 351         spiclk = clk_get(&master->dev, name);
 352         clk_enable(spiclk);
 353         mps->mclk = clk_get_rate(spiclk);
 354         clk_put(spiclk);
 355
 356         /* Reset the PSC into a known state */
 357         out_8(&psc->command, MPC52xx_PSC_RST_RX);
 358         out_8(&psc->command, MPC52xx_PSC_RST_TX);
 359         out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
 360
 361         /* Disable psc interrupts all useful interrupts are in fifo */
 362         out_be16(&psc->isr_imr.imr, 0);
 363
 364         /* Disable fifo interrupts, will be enabled later */
 365         out_be32(&fifo->tximr, 0);
 366         out_be32(&fifo->rximr, 0);
 367
 368         /* Setup fifo slice address and size */
 369         /*out_be32(&fifo->txsz, 0x0fe00004);*/
 370         /*out_be32(&fifo->rxsz, 0x0ff00004);*/
 371
 372         sicr =  0x01000000 |    /* SIM = 0001 -- 8 bit */
 373                 0x00800000 |    /* GenClk = 1 -- internal clk */
 374                 0x00008000 |    /* SPI = 1 */
 375                 0x00004000 |    /* MSTR = 1   -- SPI master */
 376                 0x00000800;     /* UseEOF = 1 -- SS low until EOF */
 377
 378         out_be32(&psc->sicr, sicr);
 379
 380         ccr = in_be32(&psc->ccr);
 381         ccr &= 0xFF000000;
 382         bclkdiv = (mps->mclk / 1000000) - 1;    /* default 1MHz */
 383         ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
 384         out_be32(&psc->ccr, ccr);
 385
 386         /* Set 2ms DTL delay */
 387         out_8(&psc->ctur, 0x00);
 388         out_8(&psc->ctlr, 0x82);
 389
 390         /* we don't use the alarms */
 391         out_be32(&fifo->rxalarm, 0xfff);
 392         out_be32(&fifo->txalarm, 0);
 393
 394         /* Enable FIFO slices for Rx/Tx */
 395         out_be32(&fifo->rxcmd,
 396                  MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
 397         out_be32(&fifo->txcmd,
 398                  MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
 399
 400         mps->bits_per_word = 8;
 401
 402         return ret;
 403 }
 404
 405 static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id)
 406 {
 407         struct mpc512x_psc_spi *mps = (struct mpc512x_psc_spi *)dev_id;
 408         struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
 409
 410         /* clear interrupt and wake up the work queue */
 411         if (in_be32(&fifo->txisr) &
 412             in_be32(&fifo->tximr) & MPC512x_PSC_FIFO_EMPTY) {
 413                 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
 414                 out_be32(&fifo->tximr, 0);
 415                 complete(&mps->done);
 416                 return IRQ_HANDLED;
 417         }
 418         return IRQ_NONE;
 419 }
 420
 421 static void mpc512x_spi_cs_control(struct spi_device *spi, bool onoff)
 422 {
 423         gpio_set_value(spi->cs_gpio, onoff);
 424 }
 425
 426 /* bus_num is used only for the case dev->platform_data == NULL */
 427 static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
 428                                               u32 size, unsigned int irq,
 429                                               s16 bus_num)
 430 {
 431         struct fsl_spi_platform_data *pdata = dev->platform_data;
 432         struct mpc512x_psc_spi *mps;
 433         struct spi_master *master;
 434         int ret;
 435         void *tempp;
 436
 437         master = spi_alloc_master(dev, sizeof *mps);
 438         if (master == NULL)
 439                 return -ENOMEM;
 440
 441         dev_set_drvdata(dev, master);
 442         mps = spi_master_get_devdata(master);
 443         mps->irq = irq;
 444
 445         if (pdata == NULL) {
 446                 mps->cs_control = mpc512x_spi_cs_control;
 447                 mps->sysclk = 0;
 448                 master->bus_num = bus_num;
 449         } else {
 450                 mps->cs_control = pdata->cs_control;
 451                 mps->sysclk = pdata->sysclk;
 452                 master->bus_num = pdata->bus_num;
 453                 master->num_chipselect = pdata->max_chipselect;
 454         }
 455
 456         master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
 457         master->setup = mpc512x_psc_spi_setup;
 458         master->transfer = mpc512x_psc_spi_transfer;
 459         master->cleanup = mpc512x_psc_spi_cleanup;
 460         master->dev.of_node = dev->of_node;
 461
 462         tempp = ioremap(regaddr, size);
 463         if (!tempp) {
 464                 dev_err(dev, "could not ioremap I/O port range\n");
 465                 ret = -EFAULT;
 466                 goto free_master;
 467         }
 468         mps->psc = tempp;
 469         mps->fifo =
 470                 (struct mpc512x_psc_fifo *)(tempp + sizeof(struct mpc52xx_psc));
 471
 472         ret = request_irq(mps->irq, mpc512x_psc_spi_isr, IRQF_SHARED,
 473                           "mpc512x-psc-spi", mps);
 474         if (ret)
 475                 goto free_master;
 476
 477         ret = mpc512x_psc_spi_port_config(master, mps);
 478         if (ret < 0)
 479                 goto free_irq;
 480
 481         spin_lock_init(&mps->lock);
 482         init_completion(&mps->done);
 483         INIT_WORK(&mps->work, mpc512x_psc_spi_work);
 484         INIT_LIST_HEAD(&mps->queue);
 485
 486         mps->workqueue =
 487                 create_singlethread_workqueue(dev_name(master->dev.parent));
 488         if (mps->workqueue == NULL) {
 489                 ret = -EBUSY;
 490                 goto free_irq;
 491         }
 492
 493         ret = spi_register_master(master);
 494         if (ret < 0)
 495                 goto unreg_master;
 496
 497         return ret;
 498
 499 unreg_master:
 500         destroy_workqueue(mps->workqueue);
 501 free_irq:
 502         free_irq(mps->irq, mps);
 503 free_master:
 504         if (mps->psc)
 505                 iounmap(mps->psc);
 506         spi_master_put(master);
 507
 508         return ret;
 509 }
 510
 511 static int mpc512x_psc_spi_do_remove(struct device *dev)
 512 {
 513         struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
 514         struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
 515
 516         flush_workqueue(mps->workqueue);
 517         destroy_workqueue(mps->workqueue);
 518         spi_unregister_master(master);
 519         free_irq(mps->irq, mps);
 520         if (mps->psc)
 521                 iounmap(mps->psc);
 522         spi_master_put(master);
 523
 524         return 0;
 525 }
 526
 527 static int mpc512x_psc_spi_of_probe(struct platform_device *op)
 528 {
 529         const u32 *regaddr_p;
 530         u64 regaddr64, size64;
 531         s16 id = -1;
 532
 533         regaddr_p = of_get_address(op->dev.of_node, 0, &size64, NULL);
 534         if (!regaddr_p) {
 535                 dev_err(&op->dev, "Invalid PSC address\n");
 536                 return -EINVAL;
 537         }
 538         regaddr64 = of_translate_address(op->dev.of_node, regaddr_p);
 539
 540         /* get PSC id (0..11, used by port_config) */
 541         id = of_alias_get_id(op->dev.of_node, "spi");
 542         if (id < 0) {
 543                 dev_err(&op->dev, "no alias id for %s\n",
 544                         op->dev.of_node->full_name);
 545                 return id;
 546         }
 547
 548         return mpc512x_psc_spi_do_probe(&op->dev, (u32) regaddr64, (u32) size64,
 549                                 irq_of_parse_and_map(op->dev.of_node, 0), id);
 550 }
 551
 552 static int mpc512x_psc_spi_of_remove(struct platform_device *op)
 553 {
 554         return mpc512x_psc_spi_do_remove(&op->dev);
 555 }
 556
 557 static struct of_device_id mpc512x_psc_spi_of_match[] = {
 558         { .compatible = "fsl,mpc5121-psc-spi", },
 559         {},
 560 };
 561
 562 MODULE_DEVICE_TABLE(of, mpc512x_psc_spi_of_match);
 563
 564 static struct platform_driver mpc512x_psc_spi_of_driver = {
 565         .probe = mpc512x_psc_spi_of_probe,
 566         .remove = mpc512x_psc_spi_of_remove,
 567         .driver = {
 568                 .name = "mpc512x-psc-spi",
 569                 .owner = THIS_MODULE,
 570                 .of_match_table = mpc512x_psc_spi_of_match,
 571         },
 572 };
 573 module_platform_driver(mpc512x_psc_spi_of_driver);
 574
 575 MODULE_AUTHOR("John Rigby");
 576 MODULE_DESCRIPTION("MPC512x PSC SPI Driver");
 577 MODULE_LICENSE("GPL");