2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <scsi/scsi_tcq.h>
17 #include <scsi/scsicam.h>
18 #include <scsi/scsi_transport.h>
19 #include <scsi/scsi_transport_fc.h>
21 #include "qla_target.h"
26 char qla2x00_version_str
[40];
28 static int apidev_major
;
31 * SRB allocation cache
33 static struct kmem_cache
*srb_cachep
;
36 * CT6 CTX allocation cache
38 static struct kmem_cache
*ctx_cachep
;
40 * error level for logging
42 int ql_errlev
= ql_log_all
;
44 static int ql2xenableclass2
;
45 module_param(ql2xenableclass2
, int, S_IRUGO
|S_IRUSR
);
46 MODULE_PARM_DESC(ql2xenableclass2
,
47 "Specify if Class 2 operations are supported from the very "
48 "beginning. Default is 0 - class 2 not supported.");
51 int ql2xlogintimeout
= 20;
52 module_param(ql2xlogintimeout
, int, S_IRUGO
);
53 MODULE_PARM_DESC(ql2xlogintimeout
,
54 "Login timeout value in seconds.");
56 int qlport_down_retry
;
57 module_param(qlport_down_retry
, int, S_IRUGO
);
58 MODULE_PARM_DESC(qlport_down_retry
,
59 "Maximum number of command retries to a port that returns "
60 "a PORT-DOWN status.");
62 int ql2xplogiabsentdevice
;
63 module_param(ql2xplogiabsentdevice
, int, S_IRUGO
|S_IWUSR
);
64 MODULE_PARM_DESC(ql2xplogiabsentdevice
,
65 "Option to enable PLOGI to devices that are not present after "
66 "a Fabric scan. This is needed for several broken switches. "
67 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
69 int ql2xloginretrycount
= 0;
70 module_param(ql2xloginretrycount
, int, S_IRUGO
);
71 MODULE_PARM_DESC(ql2xloginretrycount
,
72 "Specify an alternate value for the NVRAM login retry count.");
74 int ql2xallocfwdump
= 1;
75 module_param(ql2xallocfwdump
, int, S_IRUGO
);
76 MODULE_PARM_DESC(ql2xallocfwdump
,
77 "Option to enable allocation of memory for a firmware dump "
78 "during HBA initialization. Memory allocation requirements "
79 "vary by ISP type. Default is 1 - allocate memory.");
81 int ql2xextended_error_logging
;
82 module_param(ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
83 MODULE_PARM_DESC(ql2xextended_error_logging
,
84 "Option to enable extended error logging,\n"
85 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
86 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
87 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
88 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
89 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
90 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
91 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
92 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
93 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
94 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
95 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
96 "\t\t0x1e400000 - Preferred value for capturing essential "
97 "debug information (equivalent to old "
98 "ql2xextended_error_logging=1).\n"
99 "\t\tDo LOGICAL OR of the value to enable more than one level");
101 int ql2xshiftctondsd
= 6;
102 module_param(ql2xshiftctondsd
, int, S_IRUGO
);
103 MODULE_PARM_DESC(ql2xshiftctondsd
,
104 "Set to control shifting of command type processing "
105 "based on total number of SG elements.");
107 static void qla2x00_free_device(scsi_qla_host_t
*);
109 int ql2xfdmienable
=1;
110 module_param(ql2xfdmienable
, int, S_IRUGO
);
111 MODULE_PARM_DESC(ql2xfdmienable
,
112 "Enables FDMI registrations. "
113 "0 - no FDMI. Default is 1 - perform FDMI.");
115 int ql2xmaxqdepth
= MAX_Q_DEPTH
;
116 module_param(ql2xmaxqdepth
, int, S_IRUGO
|S_IWUSR
);
117 MODULE_PARM_DESC(ql2xmaxqdepth
,
118 "Maximum queue depth to set for each LUN. "
121 int ql2xenabledif
= 2;
122 module_param(ql2xenabledif
, int, S_IRUGO
);
123 MODULE_PARM_DESC(ql2xenabledif
,
124 " Enable T10-CRC-DIF "
125 " Default is 0 - No DIF Support. 1 - Enable it"
126 ", 2 - Enable DIF for all types, except Type 0.");
128 int ql2xenablehba_err_chk
= 2;
129 module_param(ql2xenablehba_err_chk
, int, S_IRUGO
|S_IWUSR
);
130 MODULE_PARM_DESC(ql2xenablehba_err_chk
,
131 " Enable T10-CRC-DIF Error isolation by HBA:\n"
133 " 0 -- Error isolation disabled\n"
134 " 1 -- Error isolation enabled only for DIX Type 0\n"
135 " 2 -- Error isolation enabled for all Types\n");
137 int ql2xiidmaenable
=1;
138 module_param(ql2xiidmaenable
, int, S_IRUGO
);
139 MODULE_PARM_DESC(ql2xiidmaenable
,
140 "Enables iIDMA settings "
141 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
143 int ql2xmaxqueues
= 1;
144 module_param(ql2xmaxqueues
, int, S_IRUGO
);
145 MODULE_PARM_DESC(ql2xmaxqueues
,
146 "Enables MQ settings "
147 "Default is 1 for single queue. Set it to number "
148 "of queues in MQ mode.");
150 int ql2xmultique_tag
;
151 module_param(ql2xmultique_tag
, int, S_IRUGO
);
152 MODULE_PARM_DESC(ql2xmultique_tag
,
153 "Enables CPU affinity settings for the driver "
154 "Default is 0 for no affinity of request and response IO. "
155 "Set it to 1 to turn on the cpu affinity.");
158 module_param(ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
159 MODULE_PARM_DESC(ql2xfwloadbin
,
160 "Option to specify location from which to load ISP firmware:.\n"
161 " 2 -- load firmware via the request_firmware() (hotplug).\n"
163 " 1 -- load firmware from flash.\n"
164 " 0 -- use default semantics.\n");
167 module_param(ql2xetsenable
, int, S_IRUGO
);
168 MODULE_PARM_DESC(ql2xetsenable
,
169 "Enables firmware ETS burst."
170 "Default is 0 - skip ETS enablement.");
173 module_param(ql2xdbwr
, int, S_IRUGO
|S_IWUSR
);
174 MODULE_PARM_DESC(ql2xdbwr
,
175 "Option to specify scheme for request queue posting.\n"
176 " 0 -- Regular doorbell.\n"
177 " 1 -- CAMRAM doorbell (faster).\n");
179 int ql2xtargetreset
= 1;
180 module_param(ql2xtargetreset
, int, S_IRUGO
);
181 MODULE_PARM_DESC(ql2xtargetreset
,
182 "Enable target reset."
183 "Default is 1 - use hw defaults.");
186 module_param(ql2xgffidenable
, int, S_IRUGO
);
187 MODULE_PARM_DESC(ql2xgffidenable
,
188 "Enables GFF_ID checks of port type. "
189 "Default is 0 - Do not use GFF_ID information.");
191 int ql2xasynctmfenable
;
192 module_param(ql2xasynctmfenable
, int, S_IRUGO
);
193 MODULE_PARM_DESC(ql2xasynctmfenable
,
194 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
195 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
197 int ql2xdontresethba
;
198 module_param(ql2xdontresethba
, int, S_IRUGO
|S_IWUSR
);
199 MODULE_PARM_DESC(ql2xdontresethba
,
200 "Option to specify reset behaviour.\n"
201 " 0 (Default) -- Reset on failure.\n"
202 " 1 -- Do not reset on failure.\n");
204 uint ql2xmaxlun
= MAX_LUNS
;
205 module_param(ql2xmaxlun
, uint
, S_IRUGO
);
206 MODULE_PARM_DESC(ql2xmaxlun
,
207 "Defines the maximum LU number to register with the SCSI "
208 "midlayer. Default is 65535.");
210 int ql2xmdcapmask
= 0x1F;
211 module_param(ql2xmdcapmask
, int, S_IRUGO
);
212 MODULE_PARM_DESC(ql2xmdcapmask
,
213 "Set the Minidump driver capture mask level. "
214 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
216 int ql2xmdenable
= 1;
217 module_param(ql2xmdenable
, int, S_IRUGO
);
218 MODULE_PARM_DESC(ql2xmdenable
,
219 "Enable/disable MiniDump. "
220 "0 - MiniDump disabled. "
221 "1 (Default) - MiniDump enabled.");
224 * SCSI host template entry points
226 static int qla2xxx_slave_configure(struct scsi_device
* device
);
227 static int qla2xxx_slave_alloc(struct scsi_device
*);
228 static int qla2xxx_scan_finished(struct Scsi_Host
*, unsigned long time
);
229 static void qla2xxx_scan_start(struct Scsi_Host
*);
230 static void qla2xxx_slave_destroy(struct scsi_device
*);
231 static int qla2xxx_queuecommand(struct Scsi_Host
*h
, struct scsi_cmnd
*cmd
);
232 static int qla2xxx_eh_abort(struct scsi_cmnd
*);
233 static int qla2xxx_eh_device_reset(struct scsi_cmnd
*);
234 static int qla2xxx_eh_target_reset(struct scsi_cmnd
*);
235 static int qla2xxx_eh_bus_reset(struct scsi_cmnd
*);
236 static int qla2xxx_eh_host_reset(struct scsi_cmnd
*);
238 static int qla2x00_change_queue_depth(struct scsi_device
*, int, int);
239 static int qla2x00_change_queue_type(struct scsi_device
*, int);
241 struct scsi_host_template qla2xxx_driver_template
= {
242 .module
= THIS_MODULE
,
243 .name
= QLA2XXX_DRIVER_NAME
,
244 .queuecommand
= qla2xxx_queuecommand
,
246 .eh_abort_handler
= qla2xxx_eh_abort
,
247 .eh_device_reset_handler
= qla2xxx_eh_device_reset
,
248 .eh_target_reset_handler
= qla2xxx_eh_target_reset
,
249 .eh_bus_reset_handler
= qla2xxx_eh_bus_reset
,
250 .eh_host_reset_handler
= qla2xxx_eh_host_reset
,
252 .slave_configure
= qla2xxx_slave_configure
,
254 .slave_alloc
= qla2xxx_slave_alloc
,
255 .slave_destroy
= qla2xxx_slave_destroy
,
256 .scan_finished
= qla2xxx_scan_finished
,
257 .scan_start
= qla2xxx_scan_start
,
258 .change_queue_depth
= qla2x00_change_queue_depth
,
259 .change_queue_type
= qla2x00_change_queue_type
,
262 .use_clustering
= ENABLE_CLUSTERING
,
263 .sg_tablesize
= SG_ALL
,
265 .max_sectors
= 0xFFFF,
266 .shost_attrs
= qla2x00_host_attrs
,
268 .supported_mode
= MODE_INITIATOR
,
271 static struct scsi_transport_template
*qla2xxx_transport_template
= NULL
;
272 struct scsi_transport_template
*qla2xxx_transport_vport_template
= NULL
;
274 /* TODO Convert to inlines
280 qla2x00_start_timer(scsi_qla_host_t
*vha
, void *func
, unsigned long interval
)
282 init_timer(&vha
->timer
);
283 vha
->timer
.expires
= jiffies
+ interval
* HZ
;
284 vha
->timer
.data
= (unsigned long)vha
;
285 vha
->timer
.function
= (void (*)(unsigned long))func
;
286 add_timer(&vha
->timer
);
287 vha
->timer_active
= 1;
291 qla2x00_restart_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
293 /* Currently used for 82XX only. */
294 if (vha
->device_flags
& DFLG_DEV_FAILED
) {
295 ql_dbg(ql_dbg_timer
, vha
, 0x600d,
296 "Device in a failed state, returning.\n");
300 mod_timer(&vha
->timer
, jiffies
+ interval
* HZ
);
303 static __inline__
void
304 qla2x00_stop_timer(scsi_qla_host_t
*vha
)
306 del_timer_sync(&vha
->timer
);
307 vha
->timer_active
= 0;
310 static int qla2x00_do_dpc(void *data
);
312 static void qla2x00_rst_aen(scsi_qla_host_t
*);
314 static int qla2x00_mem_alloc(struct qla_hw_data
*, uint16_t, uint16_t,
315 struct req_que
**, struct rsp_que
**);
316 static void qla2x00_free_fw_dump(struct qla_hw_data
*);
317 static void qla2x00_mem_free(struct qla_hw_data
*);
319 /* -------------------------------------------------------------------------- */
320 static int qla2x00_alloc_queues(struct qla_hw_data
*ha
, struct req_que
*req
,
323 scsi_qla_host_t
*vha
= pci_get_drvdata(ha
->pdev
);
324 ha
->req_q_map
= kzalloc(sizeof(struct req_que
*) * ha
->max_req_queues
,
326 if (!ha
->req_q_map
) {
327 ql_log(ql_log_fatal
, vha
, 0x003b,
328 "Unable to allocate memory for request queue ptrs.\n");
332 ha
->rsp_q_map
= kzalloc(sizeof(struct rsp_que
*) * ha
->max_rsp_queues
,
334 if (!ha
->rsp_q_map
) {
335 ql_log(ql_log_fatal
, vha
, 0x003c,
336 "Unable to allocate memory for response queue ptrs.\n");
340 * Make sure we record at least the request and response queue zero in
341 * case we need to free them if part of the probe fails.
343 ha
->rsp_q_map
[0] = rsp
;
344 ha
->req_q_map
[0] = req
;
345 set_bit(0, ha
->rsp_qid_map
);
346 set_bit(0, ha
->req_qid_map
);
350 kfree(ha
->req_q_map
);
351 ha
->req_q_map
= NULL
;
356 static void qla2x00_free_req_que(struct qla_hw_data
*ha
, struct req_que
*req
)
358 if (IS_QLAFX00(ha
)) {
359 if (req
&& req
->ring_fx00
)
360 dma_free_coherent(&ha
->pdev
->dev
,
361 (req
->length_fx00
+ 1) * sizeof(request_t
),
362 req
->ring_fx00
, req
->dma_fx00
);
363 } else if (req
&& req
->ring
)
364 dma_free_coherent(&ha
->pdev
->dev
,
365 (req
->length
+ 1) * sizeof(request_t
),
366 req
->ring
, req
->dma
);
369 kfree(req
->outstanding_cmds
);
375 static void qla2x00_free_rsp_que(struct qla_hw_data
*ha
, struct rsp_que
*rsp
)
377 if (IS_QLAFX00(ha
)) {
378 if (rsp
&& rsp
->ring
)
379 dma_free_coherent(&ha
->pdev
->dev
,
380 (rsp
->length_fx00
+ 1) * sizeof(request_t
),
381 rsp
->ring_fx00
, rsp
->dma_fx00
);
382 } else if (rsp
&& rsp
->ring
) {
383 dma_free_coherent(&ha
->pdev
->dev
,
384 (rsp
->length
+ 1) * sizeof(response_t
),
385 rsp
->ring
, rsp
->dma
);
391 static void qla2x00_free_queues(struct qla_hw_data
*ha
)
397 for (cnt
= 0; cnt
< ha
->max_req_queues
; cnt
++) {
398 req
= ha
->req_q_map
[cnt
];
399 qla2x00_free_req_que(ha
, req
);
401 kfree(ha
->req_q_map
);
402 ha
->req_q_map
= NULL
;
404 for (cnt
= 0; cnt
< ha
->max_rsp_queues
; cnt
++) {
405 rsp
= ha
->rsp_q_map
[cnt
];
406 qla2x00_free_rsp_que(ha
, rsp
);
408 kfree(ha
->rsp_q_map
);
409 ha
->rsp_q_map
= NULL
;
412 static int qla25xx_setup_mode(struct scsi_qla_host
*vha
)
414 uint16_t options
= 0;
416 struct qla_hw_data
*ha
= vha
->hw
;
418 if (!(ha
->fw_attributes
& BIT_6
)) {
419 ql_log(ql_log_warn
, vha
, 0x00d8,
420 "Firmware is not multi-queue capable.\n");
423 if (ql2xmultique_tag
) {
424 /* create a request queue for IO */
426 req
= qla25xx_create_req_que(ha
, options
, 0, 0, -1,
427 QLA_DEFAULT_QUE_QOS
);
429 ql_log(ql_log_warn
, vha
, 0x00e0,
430 "Failed to create request queue.\n");
433 ha
->wq
= alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM
, 1);
434 vha
->req
= ha
->req_q_map
[req
];
436 for (ques
= 1; ques
< ha
->max_rsp_queues
; ques
++) {
437 ret
= qla25xx_create_rsp_que(ha
, options
, 0, 0, req
);
439 ql_log(ql_log_warn
, vha
, 0x00e8,
440 "Failed to create response queue.\n");
444 ha
->flags
.cpu_affinity_enabled
= 1;
445 ql_dbg(ql_dbg_multiq
, vha
, 0xc007,
446 "CPU affinity mode enalbed, "
447 "no. of response queues:%d no. of request queues:%d.\n",
448 ha
->max_rsp_queues
, ha
->max_req_queues
);
449 ql_dbg(ql_dbg_init
, vha
, 0x00e9,
450 "CPU affinity mode enalbed, "
451 "no. of response queues:%d no. of request queues:%d.\n",
452 ha
->max_rsp_queues
, ha
->max_req_queues
);
456 qla25xx_delete_queues(vha
);
457 destroy_workqueue(ha
->wq
);
459 vha
->req
= ha
->req_q_map
[0];
462 kfree(ha
->req_q_map
);
463 kfree(ha
->rsp_q_map
);
464 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
469 qla2x00_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
471 struct qla_hw_data
*ha
= vha
->hw
;
472 static char *pci_bus_modes
[] = {
473 "33", "66", "100", "133",
478 pci_bus
= (ha
->pci_attr
& (BIT_9
| BIT_10
)) >> 9;
481 strcat(str
, pci_bus_modes
[pci_bus
]);
483 pci_bus
= (ha
->pci_attr
& BIT_8
) >> 8;
485 strcat(str
, pci_bus_modes
[pci_bus
]);
487 strcat(str
, " MHz)");
493 qla24xx_pci_info_str(struct scsi_qla_host
*vha
, char *str
)
495 static char *pci_bus_modes
[] = { "33", "66", "100", "133", };
496 struct qla_hw_data
*ha
= vha
->hw
;
500 pcie_reg
= pci_pcie_cap(ha
->pdev
);
503 uint16_t pcie_lstat
, lspeed
, lwidth
;
505 pcie_reg
+= PCI_EXP_LNKCAP
;
506 pci_read_config_word(ha
->pdev
, pcie_reg
, &pcie_lstat
);
507 lspeed
= pcie_lstat
& (BIT_0
| BIT_1
| BIT_2
| BIT_3
);
508 lwidth
= (pcie_lstat
&
509 (BIT_4
| BIT_5
| BIT_6
| BIT_7
| BIT_8
| BIT_9
)) >> 4;
511 strcpy(str
, "PCIe (");
514 strcat(str
, "2.5GT/s ");
517 strcat(str
, "5.0GT/s ");
520 strcat(str
, "8.0GT/s ");
523 strcat(str
, "<unknown> ");
526 snprintf(lwstr
, sizeof(lwstr
), "x%d)", lwidth
);
533 pci_bus
= (ha
->pci_attr
& CSRX_PCIX_BUS_MODE_MASK
) >> 8;
534 if (pci_bus
== 0 || pci_bus
== 8) {
536 strcat(str
, pci_bus_modes
[pci_bus
>> 3]);
540 strcat(str
, "Mode 2");
542 strcat(str
, "Mode 1");
544 strcat(str
, pci_bus_modes
[pci_bus
& ~BIT_2
]);
546 strcat(str
, " MHz)");
552 qla2x00_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
555 struct qla_hw_data
*ha
= vha
->hw
;
557 sprintf(str
, "%d.%02d.%02d ", ha
->fw_major_version
,
558 ha
->fw_minor_version
,
559 ha
->fw_subminor_version
);
561 if (ha
->fw_attributes
& BIT_9
) {
566 switch (ha
->fw_attributes
& 0xFF) {
580 sprintf(un_str
, "(%x)", ha
->fw_attributes
);
584 if (ha
->fw_attributes
& 0x100)
591 qla24xx_fw_version_str(struct scsi_qla_host
*vha
, char *str
)
593 struct qla_hw_data
*ha
= vha
->hw
;
595 sprintf(str
, "%d.%02d.%02d (%x)", ha
->fw_major_version
,
596 ha
->fw_minor_version
, ha
->fw_subminor_version
, ha
->fw_attributes
);
601 qla2x00_sp_free_dma(void *vha
, void *ptr
)
603 srb_t
*sp
= (srb_t
*)ptr
;
604 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
605 struct qla_hw_data
*ha
= sp
->fcport
->vha
->hw
;
606 void *ctx
= GET_CMD_CTX_SP(sp
);
608 if (sp
->flags
& SRB_DMA_VALID
) {
610 sp
->flags
&= ~SRB_DMA_VALID
;
613 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
614 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
615 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
616 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
619 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
620 /* List assured to be having elements */
621 qla2x00_clean_dsd_pool(ha
, sp
);
622 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
625 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
626 dma_pool_free(ha
->dl_dma_pool
, ctx
,
627 ((struct crc_context
*)ctx
)->crc_ctx_dma
);
628 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
631 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
632 struct ct6_dsd
*ctx1
= (struct ct6_dsd
*)ctx
;
634 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
636 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
637 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
638 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
639 mempool_free(ctx1
, ha
->ctx_mempool
);
644 qla2x00_rel_sp(sp
->fcport
->vha
, sp
);
648 qla2x00_sp_compl(void *data
, void *ptr
, int res
)
650 struct qla_hw_data
*ha
= (struct qla_hw_data
*)data
;
651 srb_t
*sp
= (srb_t
*)ptr
;
652 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
656 if (atomic_read(&sp
->ref_count
) == 0) {
657 ql_dbg(ql_dbg_io
, sp
->fcport
->vha
, 0x3015,
658 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
660 if (ql2xextended_error_logging
& ql_dbg_io
)
664 if (!atomic_dec_and_test(&sp
->ref_count
))
667 qla2x00_sp_free_dma(ha
, sp
);
671 /* If we are SP1 here, we need to still take and release the host_lock as SP1
672 * does not have the changes necessary to avoid taking host->host_lock.
675 qla2xxx_queuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
)
677 scsi_qla_host_t
*vha
= shost_priv(host
);
678 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
679 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
680 struct qla_hw_data
*ha
= vha
->hw
;
681 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
685 if (ha
->flags
.eeh_busy
) {
686 if (ha
->flags
.pci_channel_io_perm_failure
) {
687 ql_dbg(ql_dbg_aer
, vha
, 0x9010,
688 "PCI Channel IO permanent failure, exiting "
690 cmd
->result
= DID_NO_CONNECT
<< 16;
692 ql_dbg(ql_dbg_aer
, vha
, 0x9011,
693 "EEH_Busy, Requeuing the cmd=%p.\n", cmd
);
694 cmd
->result
= DID_REQUEUE
<< 16;
696 goto qc24_fail_command
;
699 rval
= fc_remote_port_chkready(rport
);
702 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3003,
703 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
705 goto qc24_fail_command
;
708 if (!vha
->flags
.difdix_supported
&&
709 scsi_get_prot_op(cmd
) != SCSI_PROT_NORMAL
) {
710 ql_dbg(ql_dbg_io
, vha
, 0x3004,
711 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
713 cmd
->result
= DID_NO_CONNECT
<< 16;
714 goto qc24_fail_command
;
718 cmd
->result
= DID_NO_CONNECT
<< 16;
719 goto qc24_fail_command
;
722 if (atomic_read(&fcport
->state
) != FCS_ONLINE
) {
723 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
724 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
725 ql_dbg(ql_dbg_io
, vha
, 0x3005,
726 "Returning DNC, fcport_state=%d loop_state=%d.\n",
727 atomic_read(&fcport
->state
),
728 atomic_read(&base_vha
->loop_state
));
729 cmd
->result
= DID_NO_CONNECT
<< 16;
730 goto qc24_fail_command
;
732 goto qc24_target_busy
;
735 sp
= qla2x00_get_sp(vha
, fcport
, GFP_ATOMIC
);
737 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
);
741 sp
->u
.scmd
.cmd
= cmd
;
742 sp
->type
= SRB_SCSI_CMD
;
743 atomic_set(&sp
->ref_count
, 1);
744 CMD_SP(cmd
) = (void *)sp
;
745 sp
->free
= qla2x00_sp_free_dma
;
746 sp
->done
= qla2x00_sp_compl
;
748 rval
= ha
->isp_ops
->start_scsi(sp
);
749 if (rval
!= QLA_SUCCESS
) {
750 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3013,
751 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
752 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
);
753 goto qc24_host_busy_free_sp
;
758 qc24_host_busy_free_sp
:
759 qla2x00_sp_free_dma(ha
, sp
);
762 return SCSI_MLQUEUE_HOST_BUSY
;
765 return SCSI_MLQUEUE_TARGET_BUSY
;
774 * qla2x00_eh_wait_on_command
775 * Waits for the command to be returned by the Firmware for some
779 * cmd = Scsi Command to wait on.
786 qla2x00_eh_wait_on_command(struct scsi_cmnd
*cmd
)
788 #define ABORT_POLLING_PERIOD 1000
789 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
790 unsigned long wait_iter
= ABORT_WAIT_ITER
;
791 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
792 struct qla_hw_data
*ha
= vha
->hw
;
793 int ret
= QLA_SUCCESS
;
795 if (unlikely(pci_channel_offline(ha
->pdev
)) || ha
->flags
.eeh_busy
) {
796 ql_dbg(ql_dbg_taskm
, vha
, 0x8005,
797 "Return:eh_wait.\n");
801 while (CMD_SP(cmd
) && wait_iter
--) {
802 msleep(ABORT_POLLING_PERIOD
);
805 ret
= QLA_FUNCTION_FAILED
;
811 * qla2x00_wait_for_hba_online
812 * Wait till the HBA is online after going through
813 * <= MAX_RETRIES_OF_ISP_ABORT or
814 * finally HBA is disabled ie marked offline
817 * ha - pointer to host adapter structure
820 * Does context switching-Release SPIN_LOCK
821 * (if any) before calling this routine.
824 * Success (Adapter is online) : 0
825 * Failed (Adapter is offline/disabled) : 1
828 qla2x00_wait_for_hba_online(scsi_qla_host_t
*vha
)
831 unsigned long wait_online
;
832 struct qla_hw_data
*ha
= vha
->hw
;
833 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
835 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
836 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
837 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
838 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
839 ha
->dpc_active
) && time_before(jiffies
, wait_online
)) {
843 if (base_vha
->flags
.online
)
844 return_status
= QLA_SUCCESS
;
846 return_status
= QLA_FUNCTION_FAILED
;
848 return (return_status
);
852 * qla2x00_wait_for_reset_ready
853 * Wait till the HBA is online after going through
854 * <= MAX_RETRIES_OF_ISP_ABORT or
855 * finally HBA is disabled ie marked offline or flash
856 * operations are in progress.
859 * ha - pointer to host adapter structure
862 * Does context switching-Release SPIN_LOCK
863 * (if any) before calling this routine.
866 * Success (Adapter is online/no flash ops) : 0
867 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
870 qla2x00_wait_for_reset_ready(scsi_qla_host_t
*vha
)
873 unsigned long wait_online
;
874 struct qla_hw_data
*ha
= vha
->hw
;
875 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
877 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
878 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
879 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
880 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
881 ha
->optrom_state
!= QLA_SWAITING
||
882 ha
->dpc_active
) && time_before(jiffies
, wait_online
))
885 if (base_vha
->flags
.online
&& ha
->optrom_state
== QLA_SWAITING
)
886 return_status
= QLA_SUCCESS
;
888 return_status
= QLA_FUNCTION_FAILED
;
890 ql_dbg(ql_dbg_taskm
, vha
, 0x8019,
891 "%s return status=%d.\n", __func__
, return_status
);
893 return return_status
;
897 qla2x00_wait_for_chip_reset(scsi_qla_host_t
*vha
)
900 unsigned long wait_reset
;
901 struct qla_hw_data
*ha
= vha
->hw
;
902 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
904 wait_reset
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
905 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
906 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
907 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
908 ha
->dpc_active
) && time_before(jiffies
, wait_reset
)) {
912 if (!test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
913 ha
->flags
.chip_reset_done
)
916 if (ha
->flags
.chip_reset_done
)
917 return_status
= QLA_SUCCESS
;
919 return_status
= QLA_FUNCTION_FAILED
;
921 return return_status
;
925 sp_get(struct srb
*sp
)
927 atomic_inc(&sp
->ref_count
);
930 /**************************************************************************
934 * The abort function will abort the specified command.
937 * cmd = Linux SCSI command packet to be aborted.
940 * Either SUCCESS or FAILED.
943 * Only return FAILED if command not returned by firmware.
944 **************************************************************************/
946 qla2xxx_eh_abort(struct scsi_cmnd
*cmd
)
948 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
951 unsigned int id
, lun
;
954 struct qla_hw_data
*ha
= vha
->hw
;
959 ret
= fc_block_scsi_eh(cmd
);
964 id
= cmd
->device
->id
;
965 lun
= cmd
->device
->lun
;
967 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
968 sp
= (srb_t
*) CMD_SP(cmd
);
970 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
974 ql_dbg(ql_dbg_taskm
, vha
, 0x8002,
975 "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
976 vha
->host_no
, id
, lun
, sp
, cmd
);
978 /* Get a reference to the sp and drop the lock.*/
981 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
982 if (ha
->isp_ops
->abort_command(sp
)) {
984 ql_dbg(ql_dbg_taskm
, vha
, 0x8003,
985 "Abort command mbx failed cmd=%p.\n", cmd
);
987 ql_dbg(ql_dbg_taskm
, vha
, 0x8004,
988 "Abort command mbx success cmd=%p.\n", cmd
);
992 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
994 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
996 /* Did the command return during mailbox execution? */
997 if (ret
== FAILED
&& !CMD_SP(cmd
))
1000 /* Wait for the command to be returned. */
1002 if (qla2x00_eh_wait_on_command(cmd
) != QLA_SUCCESS
) {
1003 ql_log(ql_log_warn
, vha
, 0x8006,
1004 "Abort handler timed out cmd=%p.\n", cmd
);
1009 ql_log(ql_log_info
, vha
, 0x801c,
1010 "Abort command issued nexus=%ld:%d:%d -- %d %x.\n",
1011 vha
->host_no
, id
, lun
, wait
, ret
);
1017 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t
*vha
, unsigned int t
,
1018 unsigned int l
, enum nexus_wait_type type
)
1020 int cnt
, match
, status
;
1021 unsigned long flags
;
1022 struct qla_hw_data
*ha
= vha
->hw
;
1023 struct req_que
*req
;
1025 struct scsi_cmnd
*cmd
;
1027 status
= QLA_SUCCESS
;
1029 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1031 for (cnt
= 1; status
== QLA_SUCCESS
&&
1032 cnt
< req
->num_outstanding_cmds
; cnt
++) {
1033 sp
= req
->outstanding_cmds
[cnt
];
1036 if (sp
->type
!= SRB_SCSI_CMD
)
1038 if (vha
->vp_idx
!= sp
->fcport
->vha
->vp_idx
)
1041 cmd
= GET_CMD_SP(sp
);
1047 match
= cmd
->device
->id
== t
;
1050 match
= (cmd
->device
->id
== t
&&
1051 cmd
->device
->lun
== l
);
1057 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1058 status
= qla2x00_eh_wait_on_command(cmd
);
1059 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1061 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1066 static char *reset_errors
[] = {
1069 "Task management failed",
1070 "Waiting for command completions",
1074 __qla2xxx_eh_generic_reset(char *name
, enum nexus_wait_type type
,
1075 struct scsi_cmnd
*cmd
, int (*do_reset
)(struct fc_port
*, unsigned int, int))
1077 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1078 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1085 err
= fc_block_scsi_eh(cmd
);
1089 ql_log(ql_log_info
, vha
, 0x8009,
1090 "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name
, vha
->host_no
,
1091 cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1094 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1095 ql_log(ql_log_warn
, vha
, 0x800a,
1096 "Wait for hba online failed for cmd=%p.\n", cmd
);
1097 goto eh_reset_failed
;
1100 if (do_reset(fcport
, cmd
->device
->lun
, cmd
->request
->cpu
+ 1)
1102 ql_log(ql_log_warn
, vha
, 0x800c,
1103 "do_reset failed for cmd=%p.\n", cmd
);
1104 goto eh_reset_failed
;
1107 if (qla2x00_eh_wait_for_pending_commands(vha
, cmd
->device
->id
,
1108 cmd
->device
->lun
, type
) != QLA_SUCCESS
) {
1109 ql_log(ql_log_warn
, vha
, 0x800d,
1110 "wait for pending cmds failed for cmd=%p.\n", cmd
);
1111 goto eh_reset_failed
;
1114 ql_log(ql_log_info
, vha
, 0x800e,
1115 "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name
,
1116 vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1121 ql_log(ql_log_info
, vha
, 0x800f,
1122 "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name
,
1123 reset_errors
[err
], vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
,
1129 qla2xxx_eh_device_reset(struct scsi_cmnd
*cmd
)
1131 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1132 struct qla_hw_data
*ha
= vha
->hw
;
1134 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN
, cmd
,
1135 ha
->isp_ops
->lun_reset
);
1139 qla2xxx_eh_target_reset(struct scsi_cmnd
*cmd
)
1141 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1142 struct qla_hw_data
*ha
= vha
->hw
;
1144 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET
, cmd
,
1145 ha
->isp_ops
->target_reset
);
1148 /**************************************************************************
1149 * qla2xxx_eh_bus_reset
1152 * The bus reset function will reset the bus and abort any executing
1156 * cmd = Linux SCSI command packet of the command that cause the
1160 * SUCCESS/FAILURE (defined as macro in scsi.h).
1162 **************************************************************************/
1164 qla2xxx_eh_bus_reset(struct scsi_cmnd
*cmd
)
1166 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1167 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1169 unsigned int id
, lun
;
1171 id
= cmd
->device
->id
;
1172 lun
= cmd
->device
->lun
;
1178 ret
= fc_block_scsi_eh(cmd
);
1183 ql_log(ql_log_info
, vha
, 0x8012,
1184 "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1186 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1187 ql_log(ql_log_fatal
, vha
, 0x8013,
1188 "Wait for hba online failed board disabled.\n");
1189 goto eh_bus_reset_done
;
1192 if (qla2x00_loop_reset(vha
) == QLA_SUCCESS
)
1196 goto eh_bus_reset_done
;
1198 /* Flush outstanding commands. */
1199 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) !=
1201 ql_log(ql_log_warn
, vha
, 0x8014,
1202 "Wait for pending commands failed.\n");
1207 ql_log(ql_log_warn
, vha
, 0x802b,
1208 "BUS RESET %s nexus=%ld:%d:%d.\n",
1209 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1214 /**************************************************************************
1215 * qla2xxx_eh_host_reset
1218 * The reset function will reset the Adapter.
1221 * cmd = Linux SCSI command packet of the command that cause the
1225 * Either SUCCESS or FAILED.
1228 **************************************************************************/
1230 qla2xxx_eh_host_reset(struct scsi_cmnd
*cmd
)
1232 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1233 struct qla_hw_data
*ha
= vha
->hw
;
1235 unsigned int id
, lun
;
1236 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1238 id
= cmd
->device
->id
;
1239 lun
= cmd
->device
->lun
;
1241 ql_log(ql_log_info
, vha
, 0x8018,
1242 "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha
->host_no
, id
, lun
);
1244 if (qla2x00_wait_for_reset_ready(vha
) != QLA_SUCCESS
)
1245 goto eh_host_reset_lock
;
1247 if (vha
!= base_vha
) {
1248 if (qla2x00_vp_abort_isp(vha
))
1249 goto eh_host_reset_lock
;
1251 if (IS_QLA82XX(vha
->hw
)) {
1252 if (!qla82xx_fcoe_ctx_reset(vha
)) {
1253 /* Ctx reset success */
1255 goto eh_host_reset_lock
;
1257 /* fall thru if ctx reset failed */
1260 flush_workqueue(ha
->wq
);
1262 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1263 if (ha
->isp_ops
->abort_isp(base_vha
)) {
1264 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1265 /* failed. schedule dpc to try */
1266 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
1268 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1269 ql_log(ql_log_warn
, vha
, 0x802a,
1270 "wait for hba online failed.\n");
1271 goto eh_host_reset_lock
;
1274 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1277 /* Waiting for command to be returned to OS.*/
1278 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) ==
1283 ql_log(ql_log_info
, vha
, 0x8017,
1284 "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1285 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1291 * qla2x00_loop_reset
1295 * ha = adapter block pointer.
1301 qla2x00_loop_reset(scsi_qla_host_t
*vha
)
1304 struct fc_port
*fcport
;
1305 struct qla_hw_data
*ha
= vha
->hw
;
1307 if (ql2xtargetreset
== 1 && ha
->flags
.enable_target_reset
) {
1308 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
1309 if (fcport
->port_type
!= FCT_TARGET
)
1312 ret
= ha
->isp_ops
->target_reset(fcport
, 0, 0);
1313 if (ret
!= QLA_SUCCESS
) {
1314 ql_dbg(ql_dbg_taskm
, vha
, 0x802c,
1315 "Bus Reset failed: Target Reset=%d "
1316 "d_id=%x.\n", ret
, fcport
->d_id
.b24
);
1324 if (ha
->flags
.enable_lip_full_login
&& !IS_CNA_CAPABLE(ha
)) {
1325 atomic_set(&vha
->loop_state
, LOOP_DOWN
);
1326 atomic_set(&vha
->loop_down_timer
, LOOP_DOWN_TIME
);
1327 qla2x00_mark_all_devices_lost(vha
, 0);
1328 ret
= qla2x00_full_login_lip(vha
);
1329 if (ret
!= QLA_SUCCESS
) {
1330 ql_dbg(ql_dbg_taskm
, vha
, 0x802d,
1331 "full_login_lip=%d.\n", ret
);
1335 if (ha
->flags
.enable_lip_reset
) {
1336 ret
= qla2x00_lip_reset(vha
);
1337 if (ret
!= QLA_SUCCESS
)
1338 ql_dbg(ql_dbg_taskm
, vha
, 0x802e,
1339 "lip_reset failed (%d).\n", ret
);
1342 /* Issue marker command only when we are going to start the I/O */
1343 vha
->marker_needed
= 1;
1349 qla2x00_abort_all_cmds(scsi_qla_host_t
*vha
, int res
)
1352 unsigned long flags
;
1354 struct qla_hw_data
*ha
= vha
->hw
;
1355 struct req_que
*req
;
1357 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1358 for (que
= 0; que
< ha
->max_req_queues
; que
++) {
1359 req
= ha
->req_q_map
[que
];
1362 if (!req
->outstanding_cmds
)
1364 for (cnt
= 1; cnt
< req
->num_outstanding_cmds
; cnt
++) {
1365 sp
= req
->outstanding_cmds
[cnt
];
1367 req
->outstanding_cmds
[cnt
] = NULL
;
1368 sp
->done(vha
, sp
, res
);
1372 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1376 qla2xxx_slave_alloc(struct scsi_device
*sdev
)
1378 struct fc_rport
*rport
= starget_to_rport(scsi_target(sdev
));
1380 if (!rport
|| fc_remote_port_chkready(rport
))
1383 sdev
->hostdata
= *(fc_port_t
**)rport
->dd_data
;
1389 qla2xxx_slave_configure(struct scsi_device
*sdev
)
1391 scsi_qla_host_t
*vha
= shost_priv(sdev
->host
);
1392 struct req_que
*req
= vha
->req
;
1394 if (IS_T10_PI_CAPABLE(vha
->hw
))
1395 blk_queue_update_dma_alignment(sdev
->request_queue
, 0x7);
1397 if (sdev
->tagged_supported
)
1398 scsi_activate_tcq(sdev
, req
->max_q_depth
);
1400 scsi_deactivate_tcq(sdev
, req
->max_q_depth
);
1405 qla2xxx_slave_destroy(struct scsi_device
*sdev
)
1407 sdev
->hostdata
= NULL
;
1410 static void qla2x00_handle_queue_full(struct scsi_device
*sdev
, int qdepth
)
1412 fc_port_t
*fcport
= (struct fc_port
*) sdev
->hostdata
;
1414 if (!scsi_track_queue_full(sdev
, qdepth
))
1417 ql_dbg(ql_dbg_io
, fcport
->vha
, 0x3029,
1418 "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1419 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1422 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device
*sdev
, int qdepth
)
1424 fc_port_t
*fcport
= sdev
->hostdata
;
1425 struct scsi_qla_host
*vha
= fcport
->vha
;
1426 struct req_que
*req
= NULL
;
1432 if (req
->max_q_depth
<= sdev
->queue_depth
|| req
->max_q_depth
< qdepth
)
1435 if (sdev
->ordered_tags
)
1436 scsi_adjust_queue_depth(sdev
, MSG_ORDERED_TAG
, qdepth
);
1438 scsi_adjust_queue_depth(sdev
, MSG_SIMPLE_TAG
, qdepth
);
1440 ql_dbg(ql_dbg_io
, vha
, 0x302a,
1441 "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1442 sdev
->queue_depth
, fcport
->vha
->host_no
, sdev
->id
, sdev
->lun
);
1446 qla2x00_change_queue_depth(struct scsi_device
*sdev
, int qdepth
, int reason
)
1449 case SCSI_QDEPTH_DEFAULT
:
1450 scsi_adjust_queue_depth(sdev
, scsi_get_tag_type(sdev
), qdepth
);
1452 case SCSI_QDEPTH_QFULL
:
1453 qla2x00_handle_queue_full(sdev
, qdepth
);
1455 case SCSI_QDEPTH_RAMP_UP
:
1456 qla2x00_adjust_sdev_qdepth_up(sdev
, qdepth
);
1462 return sdev
->queue_depth
;
1466 qla2x00_change_queue_type(struct scsi_device
*sdev
, int tag_type
)
1468 if (sdev
->tagged_supported
) {
1469 scsi_set_tag_type(sdev
, tag_type
);
1471 scsi_activate_tcq(sdev
, sdev
->queue_depth
);
1473 scsi_deactivate_tcq(sdev
, sdev
->queue_depth
);
1481 qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t
*vha
)
1483 scsi_qla_host_t
*vp
;
1484 struct Scsi_Host
*shost
;
1485 struct scsi_device
*sdev
;
1486 struct qla_hw_data
*ha
= vha
->hw
;
1487 unsigned long flags
;
1489 ha
->host_last_rampdown_time
= jiffies
;
1491 if (ha
->cfg_lun_q_depth
<= vha
->host
->cmd_per_lun
)
1494 if ((ha
->cfg_lun_q_depth
/ 2) < vha
->host
->cmd_per_lun
)
1495 ha
->cfg_lun_q_depth
= vha
->host
->cmd_per_lun
;
1497 ha
->cfg_lun_q_depth
= ha
->cfg_lun_q_depth
/ 2;
1500 * Geometrically ramp down the queue depth for all devices on this
1503 spin_lock_irqsave(&ha
->vport_slock
, flags
);
1504 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
1506 shost_for_each_device(sdev
, shost
) {
1507 if (sdev
->queue_depth
> shost
->cmd_per_lun
) {
1508 if (sdev
->queue_depth
< ha
->cfg_lun_q_depth
)
1510 ql_log(ql_log_warn
, vp
, 0x3031,
1511 "%ld:%d:%d: Ramping down queue depth to %d",
1512 vp
->host_no
, sdev
->id
, sdev
->lun
,
1513 ha
->cfg_lun_q_depth
);
1514 qla2x00_change_queue_depth(sdev
,
1515 ha
->cfg_lun_q_depth
, SCSI_QDEPTH_DEFAULT
);
1519 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
1525 qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t
*vha
)
1527 scsi_qla_host_t
*vp
;
1528 struct Scsi_Host
*shost
;
1529 struct scsi_device
*sdev
;
1530 struct qla_hw_data
*ha
= vha
->hw
;
1531 unsigned long flags
;
1533 ha
->host_last_rampup_time
= jiffies
;
1534 ha
->cfg_lun_q_depth
++;
1537 * Linearly ramp up the queue depth for all devices on this
1540 spin_lock_irqsave(&ha
->vport_slock
, flags
);
1541 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
1543 shost_for_each_device(sdev
, shost
) {
1544 if (sdev
->queue_depth
> ha
->cfg_lun_q_depth
)
1546 qla2x00_change_queue_depth(sdev
, ha
->cfg_lun_q_depth
,
1547 SCSI_QDEPTH_RAMP_UP
);
1550 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
1556 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1559 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1560 * supported addressing method.
1563 qla2x00_config_dma_addressing(struct qla_hw_data
*ha
)
1565 /* Assume a 32bit DMA mask. */
1566 ha
->flags
.enable_64bit_addressing
= 0;
1568 if (!dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(64))) {
1569 /* Any upper-dword bits set? */
1570 if (MSD(dma_get_required_mask(&ha
->pdev
->dev
)) &&
1571 !pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(64))) {
1572 /* Ok, a 64bit DMA mask is applicable. */
1573 ha
->flags
.enable_64bit_addressing
= 1;
1574 ha
->isp_ops
->calc_req_entries
= qla2x00_calc_iocbs_64
;
1575 ha
->isp_ops
->build_iocbs
= qla2x00_build_scsi_iocbs_64
;
1580 dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(32));
1581 pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(32));
1585 qla2x00_enable_intrs(struct qla_hw_data
*ha
)
1587 unsigned long flags
= 0;
1588 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1590 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1591 ha
->interrupts_on
= 1;
1592 /* enable risc and host interrupts */
1593 WRT_REG_WORD(®
->ictrl
, ICR_EN_INT
| ICR_EN_RISC
);
1594 RD_REG_WORD(®
->ictrl
);
1595 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1600 qla2x00_disable_intrs(struct qla_hw_data
*ha
)
1602 unsigned long flags
= 0;
1603 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1605 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1606 ha
->interrupts_on
= 0;
1607 /* disable risc and host interrupts */
1608 WRT_REG_WORD(®
->ictrl
, 0);
1609 RD_REG_WORD(®
->ictrl
);
1610 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1614 qla24xx_enable_intrs(struct qla_hw_data
*ha
)
1616 unsigned long flags
= 0;
1617 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1619 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1620 ha
->interrupts_on
= 1;
1621 WRT_REG_DWORD(®
->ictrl
, ICRX_EN_RISC_INT
);
1622 RD_REG_DWORD(®
->ictrl
);
1623 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1627 qla24xx_disable_intrs(struct qla_hw_data
*ha
)
1629 unsigned long flags
= 0;
1630 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1632 if (IS_NOPOLLING_TYPE(ha
))
1634 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1635 ha
->interrupts_on
= 0;
1636 WRT_REG_DWORD(®
->ictrl
, 0);
1637 RD_REG_DWORD(®
->ictrl
);
1638 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1642 qla2x00_iospace_config(struct qla_hw_data
*ha
)
1644 resource_size_t pio
;
1648 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1649 QLA2XXX_DRIVER_NAME
)) {
1650 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0011,
1651 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1652 pci_name(ha
->pdev
));
1653 goto iospace_error_exit
;
1655 if (!(ha
->bars
& 1))
1658 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1659 pio
= pci_resource_start(ha
->pdev
, 0);
1660 if (pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_IO
) {
1661 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1662 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0012,
1663 "Invalid pci I/O region size (%s).\n",
1664 pci_name(ha
->pdev
));
1668 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0013,
1669 "Region #0 no a PIO resource (%s).\n",
1670 pci_name(ha
->pdev
));
1673 ha
->pio_address
= pio
;
1674 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0014,
1675 "PIO address=%llu.\n",
1676 (unsigned long long)ha
->pio_address
);
1679 /* Use MMIO operations for all accesses. */
1680 if (!(pci_resource_flags(ha
->pdev
, 1) & IORESOURCE_MEM
)) {
1681 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0015,
1682 "Region #1 not an MMIO resource (%s), aborting.\n",
1683 pci_name(ha
->pdev
));
1684 goto iospace_error_exit
;
1686 if (pci_resource_len(ha
->pdev
, 1) < MIN_IOBASE_LEN
) {
1687 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0016,
1688 "Invalid PCI mem region size (%s), aborting.\n",
1689 pci_name(ha
->pdev
));
1690 goto iospace_error_exit
;
1693 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 1), MIN_IOBASE_LEN
);
1695 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0017,
1696 "Cannot remap MMIO (%s), aborting.\n",
1697 pci_name(ha
->pdev
));
1698 goto iospace_error_exit
;
1701 /* Determine queue resources */
1702 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1703 if ((ql2xmaxqueues
<= 1 && !ql2xmultique_tag
) ||
1704 (ql2xmaxqueues
> 1 && ql2xmultique_tag
) ||
1705 (!IS_QLA25XX(ha
) && !IS_QLA81XX(ha
)))
1708 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 3),
1709 pci_resource_len(ha
->pdev
, 3));
1711 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0018,
1712 "MQIO Base=%p.\n", ha
->mqiobase
);
1713 /* Read MSIX vector size of the board */
1714 pci_read_config_word(ha
->pdev
, QLA_PCI_MSIX_CONTROL
, &msix
);
1715 ha
->msix_count
= msix
;
1716 /* Max queues are bounded by available msix vectors */
1717 /* queue 0 uses two msix vectors */
1718 if (ql2xmultique_tag
) {
1719 cpus
= num_online_cpus();
1720 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1721 (cpus
+ 1) : (ha
->msix_count
- 1);
1722 ha
->max_req_queues
= 2;
1723 } else if (ql2xmaxqueues
> 1) {
1724 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1725 QLA_MQ_SIZE
: ql2xmaxqueues
;
1726 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc008,
1727 "QoS mode set, max no of request queues:%d.\n",
1728 ha
->max_req_queues
);
1729 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0019,
1730 "QoS mode set, max no of request queues:%d.\n",
1731 ha
->max_req_queues
);
1733 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001a,
1734 "MSI-X vector count: %d.\n", msix
);
1736 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001b,
1737 "BAR 3 not enabled.\n");
1740 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1741 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x001c,
1742 "MSIX Count:%d.\n", ha
->msix_count
);
1751 qla83xx_iospace_config(struct qla_hw_data
*ha
)
1756 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1757 QLA2XXX_DRIVER_NAME
)) {
1758 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0117,
1759 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1760 pci_name(ha
->pdev
));
1762 goto iospace_error_exit
;
1765 /* Use MMIO operations for all accesses. */
1766 if (!(pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_MEM
)) {
1767 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0118,
1768 "Invalid pci I/O region size (%s).\n",
1769 pci_name(ha
->pdev
));
1770 goto iospace_error_exit
;
1772 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1773 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0119,
1774 "Invalid PCI mem region size (%s), aborting\n",
1775 pci_name(ha
->pdev
));
1776 goto iospace_error_exit
;
1779 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 0), MIN_IOBASE_LEN
);
1781 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011a,
1782 "Cannot remap MMIO (%s), aborting.\n",
1783 pci_name(ha
->pdev
));
1784 goto iospace_error_exit
;
1787 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1788 /* 83XX 26XX always use MQ type access for queues
1789 * - mbar 2, a.k.a region 4 */
1790 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
1791 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 4),
1792 pci_resource_len(ha
->pdev
, 4));
1794 if (!ha
->mqiobase
) {
1795 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011d,
1796 "BAR2/region4 not enabled\n");
1800 ha
->msixbase
= ioremap(pci_resource_start(ha
->pdev
, 2),
1801 pci_resource_len(ha
->pdev
, 2));
1803 /* Read MSIX vector size of the board */
1804 pci_read_config_word(ha
->pdev
,
1805 QLA_83XX_PCI_MSIX_CONTROL
, &msix
);
1806 ha
->msix_count
= msix
;
1807 /* Max queues are bounded by available msix vectors */
1808 /* queue 0 uses two msix vectors */
1809 if (ql2xmultique_tag
) {
1810 cpus
= num_online_cpus();
1811 ha
->max_rsp_queues
= (ha
->msix_count
- 1 > cpus
) ?
1812 (cpus
+ 1) : (ha
->msix_count
- 1);
1813 ha
->max_req_queues
= 2;
1814 } else if (ql2xmaxqueues
> 1) {
1815 ha
->max_req_queues
= ql2xmaxqueues
> QLA_MQ_SIZE
?
1816 QLA_MQ_SIZE
: ql2xmaxqueues
;
1817 ql_dbg_pci(ql_dbg_multiq
, ha
->pdev
, 0xc00c,
1818 "QoS mode set, max no of request queues:%d.\n",
1819 ha
->max_req_queues
);
1820 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
1821 "QoS mode set, max no of request queues:%d.\n",
1822 ha
->max_req_queues
);
1824 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011c,
1825 "MSI-X vector count: %d.\n", msix
);
1827 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011e,
1828 "BAR 1 not enabled.\n");
1831 ha
->msix_count
= ha
->max_rsp_queues
+ 1;
1833 qlt_83xx_iospace_config(ha
);
1835 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011f,
1836 "MSIX Count:%d.\n", ha
->msix_count
);
1843 static struct isp_operations qla2100_isp_ops
= {
1844 .pci_config
= qla2100_pci_config
,
1845 .reset_chip
= qla2x00_reset_chip
,
1846 .chip_diag
= qla2x00_chip_diag
,
1847 .config_rings
= qla2x00_config_rings
,
1848 .reset_adapter
= qla2x00_reset_adapter
,
1849 .nvram_config
= qla2x00_nvram_config
,
1850 .update_fw_options
= qla2x00_update_fw_options
,
1851 .load_risc
= qla2x00_load_risc
,
1852 .pci_info_str
= qla2x00_pci_info_str
,
1853 .fw_version_str
= qla2x00_fw_version_str
,
1854 .intr_handler
= qla2100_intr_handler
,
1855 .enable_intrs
= qla2x00_enable_intrs
,
1856 .disable_intrs
= qla2x00_disable_intrs
,
1857 .abort_command
= qla2x00_abort_command
,
1858 .target_reset
= qla2x00_abort_target
,
1859 .lun_reset
= qla2x00_lun_reset
,
1860 .fabric_login
= qla2x00_login_fabric
,
1861 .fabric_logout
= qla2x00_fabric_logout
,
1862 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1863 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1864 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1865 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1866 .read_nvram
= qla2x00_read_nvram_data
,
1867 .write_nvram
= qla2x00_write_nvram_data
,
1868 .fw_dump
= qla2100_fw_dump
,
1871 .beacon_blink
= NULL
,
1872 .read_optrom
= qla2x00_read_optrom_data
,
1873 .write_optrom
= qla2x00_write_optrom_data
,
1874 .get_flash_version
= qla2x00_get_flash_version
,
1875 .start_scsi
= qla2x00_start_scsi
,
1876 .abort_isp
= qla2x00_abort_isp
,
1877 .iospace_config
= qla2x00_iospace_config
,
1878 .initialize_adapter
= qla2x00_initialize_adapter
,
1881 static struct isp_operations qla2300_isp_ops
= {
1882 .pci_config
= qla2300_pci_config
,
1883 .reset_chip
= qla2x00_reset_chip
,
1884 .chip_diag
= qla2x00_chip_diag
,
1885 .config_rings
= qla2x00_config_rings
,
1886 .reset_adapter
= qla2x00_reset_adapter
,
1887 .nvram_config
= qla2x00_nvram_config
,
1888 .update_fw_options
= qla2x00_update_fw_options
,
1889 .load_risc
= qla2x00_load_risc
,
1890 .pci_info_str
= qla2x00_pci_info_str
,
1891 .fw_version_str
= qla2x00_fw_version_str
,
1892 .intr_handler
= qla2300_intr_handler
,
1893 .enable_intrs
= qla2x00_enable_intrs
,
1894 .disable_intrs
= qla2x00_disable_intrs
,
1895 .abort_command
= qla2x00_abort_command
,
1896 .target_reset
= qla2x00_abort_target
,
1897 .lun_reset
= qla2x00_lun_reset
,
1898 .fabric_login
= qla2x00_login_fabric
,
1899 .fabric_logout
= qla2x00_fabric_logout
,
1900 .calc_req_entries
= qla2x00_calc_iocbs_32
,
1901 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
1902 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
1903 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
1904 .read_nvram
= qla2x00_read_nvram_data
,
1905 .write_nvram
= qla2x00_write_nvram_data
,
1906 .fw_dump
= qla2300_fw_dump
,
1907 .beacon_on
= qla2x00_beacon_on
,
1908 .beacon_off
= qla2x00_beacon_off
,
1909 .beacon_blink
= qla2x00_beacon_blink
,
1910 .read_optrom
= qla2x00_read_optrom_data
,
1911 .write_optrom
= qla2x00_write_optrom_data
,
1912 .get_flash_version
= qla2x00_get_flash_version
,
1913 .start_scsi
= qla2x00_start_scsi
,
1914 .abort_isp
= qla2x00_abort_isp
,
1915 .iospace_config
= qla2x00_iospace_config
,
1916 .initialize_adapter
= qla2x00_initialize_adapter
,
1919 static struct isp_operations qla24xx_isp_ops
= {
1920 .pci_config
= qla24xx_pci_config
,
1921 .reset_chip
= qla24xx_reset_chip
,
1922 .chip_diag
= qla24xx_chip_diag
,
1923 .config_rings
= qla24xx_config_rings
,
1924 .reset_adapter
= qla24xx_reset_adapter
,
1925 .nvram_config
= qla24xx_nvram_config
,
1926 .update_fw_options
= qla24xx_update_fw_options
,
1927 .load_risc
= qla24xx_load_risc
,
1928 .pci_info_str
= qla24xx_pci_info_str
,
1929 .fw_version_str
= qla24xx_fw_version_str
,
1930 .intr_handler
= qla24xx_intr_handler
,
1931 .enable_intrs
= qla24xx_enable_intrs
,
1932 .disable_intrs
= qla24xx_disable_intrs
,
1933 .abort_command
= qla24xx_abort_command
,
1934 .target_reset
= qla24xx_abort_target
,
1935 .lun_reset
= qla24xx_lun_reset
,
1936 .fabric_login
= qla24xx_login_fabric
,
1937 .fabric_logout
= qla24xx_fabric_logout
,
1938 .calc_req_entries
= NULL
,
1939 .build_iocbs
= NULL
,
1940 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1941 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1942 .read_nvram
= qla24xx_read_nvram_data
,
1943 .write_nvram
= qla24xx_write_nvram_data
,
1944 .fw_dump
= qla24xx_fw_dump
,
1945 .beacon_on
= qla24xx_beacon_on
,
1946 .beacon_off
= qla24xx_beacon_off
,
1947 .beacon_blink
= qla24xx_beacon_blink
,
1948 .read_optrom
= qla24xx_read_optrom_data
,
1949 .write_optrom
= qla24xx_write_optrom_data
,
1950 .get_flash_version
= qla24xx_get_flash_version
,
1951 .start_scsi
= qla24xx_start_scsi
,
1952 .abort_isp
= qla2x00_abort_isp
,
1953 .iospace_config
= qla2x00_iospace_config
,
1954 .initialize_adapter
= qla2x00_initialize_adapter
,
1957 static struct isp_operations qla25xx_isp_ops
= {
1958 .pci_config
= qla25xx_pci_config
,
1959 .reset_chip
= qla24xx_reset_chip
,
1960 .chip_diag
= qla24xx_chip_diag
,
1961 .config_rings
= qla24xx_config_rings
,
1962 .reset_adapter
= qla24xx_reset_adapter
,
1963 .nvram_config
= qla24xx_nvram_config
,
1964 .update_fw_options
= qla24xx_update_fw_options
,
1965 .load_risc
= qla24xx_load_risc
,
1966 .pci_info_str
= qla24xx_pci_info_str
,
1967 .fw_version_str
= qla24xx_fw_version_str
,
1968 .intr_handler
= qla24xx_intr_handler
,
1969 .enable_intrs
= qla24xx_enable_intrs
,
1970 .disable_intrs
= qla24xx_disable_intrs
,
1971 .abort_command
= qla24xx_abort_command
,
1972 .target_reset
= qla24xx_abort_target
,
1973 .lun_reset
= qla24xx_lun_reset
,
1974 .fabric_login
= qla24xx_login_fabric
,
1975 .fabric_logout
= qla24xx_fabric_logout
,
1976 .calc_req_entries
= NULL
,
1977 .build_iocbs
= NULL
,
1978 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
1979 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
1980 .read_nvram
= qla25xx_read_nvram_data
,
1981 .write_nvram
= qla25xx_write_nvram_data
,
1982 .fw_dump
= qla25xx_fw_dump
,
1983 .beacon_on
= qla24xx_beacon_on
,
1984 .beacon_off
= qla24xx_beacon_off
,
1985 .beacon_blink
= qla24xx_beacon_blink
,
1986 .read_optrom
= qla25xx_read_optrom_data
,
1987 .write_optrom
= qla24xx_write_optrom_data
,
1988 .get_flash_version
= qla24xx_get_flash_version
,
1989 .start_scsi
= qla24xx_dif_start_scsi
,
1990 .abort_isp
= qla2x00_abort_isp
,
1991 .iospace_config
= qla2x00_iospace_config
,
1992 .initialize_adapter
= qla2x00_initialize_adapter
,
1995 static struct isp_operations qla81xx_isp_ops
= {
1996 .pci_config
= qla25xx_pci_config
,
1997 .reset_chip
= qla24xx_reset_chip
,
1998 .chip_diag
= qla24xx_chip_diag
,
1999 .config_rings
= qla24xx_config_rings
,
2000 .reset_adapter
= qla24xx_reset_adapter
,
2001 .nvram_config
= qla81xx_nvram_config
,
2002 .update_fw_options
= qla81xx_update_fw_options
,
2003 .load_risc
= qla81xx_load_risc
,
2004 .pci_info_str
= qla24xx_pci_info_str
,
2005 .fw_version_str
= qla24xx_fw_version_str
,
2006 .intr_handler
= qla24xx_intr_handler
,
2007 .enable_intrs
= qla24xx_enable_intrs
,
2008 .disable_intrs
= qla24xx_disable_intrs
,
2009 .abort_command
= qla24xx_abort_command
,
2010 .target_reset
= qla24xx_abort_target
,
2011 .lun_reset
= qla24xx_lun_reset
,
2012 .fabric_login
= qla24xx_login_fabric
,
2013 .fabric_logout
= qla24xx_fabric_logout
,
2014 .calc_req_entries
= NULL
,
2015 .build_iocbs
= NULL
,
2016 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2017 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2019 .write_nvram
= NULL
,
2020 .fw_dump
= qla81xx_fw_dump
,
2021 .beacon_on
= qla24xx_beacon_on
,
2022 .beacon_off
= qla24xx_beacon_off
,
2023 .beacon_blink
= qla83xx_beacon_blink
,
2024 .read_optrom
= qla25xx_read_optrom_data
,
2025 .write_optrom
= qla24xx_write_optrom_data
,
2026 .get_flash_version
= qla24xx_get_flash_version
,
2027 .start_scsi
= qla24xx_dif_start_scsi
,
2028 .abort_isp
= qla2x00_abort_isp
,
2029 .iospace_config
= qla2x00_iospace_config
,
2030 .initialize_adapter
= qla2x00_initialize_adapter
,
2033 static struct isp_operations qla82xx_isp_ops
= {
2034 .pci_config
= qla82xx_pci_config
,
2035 .reset_chip
= qla82xx_reset_chip
,
2036 .chip_diag
= qla24xx_chip_diag
,
2037 .config_rings
= qla82xx_config_rings
,
2038 .reset_adapter
= qla24xx_reset_adapter
,
2039 .nvram_config
= qla81xx_nvram_config
,
2040 .update_fw_options
= qla24xx_update_fw_options
,
2041 .load_risc
= qla82xx_load_risc
,
2042 .pci_info_str
= qla24xx_pci_info_str
,
2043 .fw_version_str
= qla24xx_fw_version_str
,
2044 .intr_handler
= qla82xx_intr_handler
,
2045 .enable_intrs
= qla82xx_enable_intrs
,
2046 .disable_intrs
= qla82xx_disable_intrs
,
2047 .abort_command
= qla24xx_abort_command
,
2048 .target_reset
= qla24xx_abort_target
,
2049 .lun_reset
= qla24xx_lun_reset
,
2050 .fabric_login
= qla24xx_login_fabric
,
2051 .fabric_logout
= qla24xx_fabric_logout
,
2052 .calc_req_entries
= NULL
,
2053 .build_iocbs
= NULL
,
2054 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2055 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2056 .read_nvram
= qla24xx_read_nvram_data
,
2057 .write_nvram
= qla24xx_write_nvram_data
,
2058 .fw_dump
= qla24xx_fw_dump
,
2059 .beacon_on
= qla82xx_beacon_on
,
2060 .beacon_off
= qla82xx_beacon_off
,
2061 .beacon_blink
= NULL
,
2062 .read_optrom
= qla82xx_read_optrom_data
,
2063 .write_optrom
= qla82xx_write_optrom_data
,
2064 .get_flash_version
= qla24xx_get_flash_version
,
2065 .start_scsi
= qla82xx_start_scsi
,
2066 .abort_isp
= qla82xx_abort_isp
,
2067 .iospace_config
= qla82xx_iospace_config
,
2068 .initialize_adapter
= qla2x00_initialize_adapter
,
2071 static struct isp_operations qla83xx_isp_ops
= {
2072 .pci_config
= qla25xx_pci_config
,
2073 .reset_chip
= qla24xx_reset_chip
,
2074 .chip_diag
= qla24xx_chip_diag
,
2075 .config_rings
= qla24xx_config_rings
,
2076 .reset_adapter
= qla24xx_reset_adapter
,
2077 .nvram_config
= qla81xx_nvram_config
,
2078 .update_fw_options
= qla81xx_update_fw_options
,
2079 .load_risc
= qla81xx_load_risc
,
2080 .pci_info_str
= qla24xx_pci_info_str
,
2081 .fw_version_str
= qla24xx_fw_version_str
,
2082 .intr_handler
= qla24xx_intr_handler
,
2083 .enable_intrs
= qla24xx_enable_intrs
,
2084 .disable_intrs
= qla24xx_disable_intrs
,
2085 .abort_command
= qla24xx_abort_command
,
2086 .target_reset
= qla24xx_abort_target
,
2087 .lun_reset
= qla24xx_lun_reset
,
2088 .fabric_login
= qla24xx_login_fabric
,
2089 .fabric_logout
= qla24xx_fabric_logout
,
2090 .calc_req_entries
= NULL
,
2091 .build_iocbs
= NULL
,
2092 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2093 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2095 .write_nvram
= NULL
,
2096 .fw_dump
= qla83xx_fw_dump
,
2097 .beacon_on
= qla24xx_beacon_on
,
2098 .beacon_off
= qla24xx_beacon_off
,
2099 .beacon_blink
= qla83xx_beacon_blink
,
2100 .read_optrom
= qla25xx_read_optrom_data
,
2101 .write_optrom
= qla24xx_write_optrom_data
,
2102 .get_flash_version
= qla24xx_get_flash_version
,
2103 .start_scsi
= qla24xx_dif_start_scsi
,
2104 .abort_isp
= qla2x00_abort_isp
,
2105 .iospace_config
= qla83xx_iospace_config
,
2106 .initialize_adapter
= qla2x00_initialize_adapter
,
2109 static struct isp_operations qlafx00_isp_ops
= {
2110 .pci_config
= qlafx00_pci_config
,
2111 .reset_chip
= qlafx00_soft_reset
,
2112 .chip_diag
= qlafx00_chip_diag
,
2113 .config_rings
= qlafx00_config_rings
,
2114 .reset_adapter
= qlafx00_soft_reset
,
2115 .nvram_config
= NULL
,
2116 .update_fw_options
= NULL
,
2118 .pci_info_str
= qlafx00_pci_info_str
,
2119 .fw_version_str
= qlafx00_fw_version_str
,
2120 .intr_handler
= qlafx00_intr_handler
,
2121 .enable_intrs
= qlafx00_enable_intrs
,
2122 .disable_intrs
= qlafx00_disable_intrs
,
2123 .abort_command
= qlafx00_abort_command
,
2124 .target_reset
= qlafx00_abort_target
,
2125 .lun_reset
= qlafx00_lun_reset
,
2126 .fabric_login
= NULL
,
2127 .fabric_logout
= NULL
,
2128 .calc_req_entries
= NULL
,
2129 .build_iocbs
= NULL
,
2130 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2131 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2132 .read_nvram
= qla24xx_read_nvram_data
,
2133 .write_nvram
= qla24xx_write_nvram_data
,
2135 .beacon_on
= qla24xx_beacon_on
,
2136 .beacon_off
= qla24xx_beacon_off
,
2137 .beacon_blink
= NULL
,
2138 .read_optrom
= qla24xx_read_optrom_data
,
2139 .write_optrom
= qla24xx_write_optrom_data
,
2140 .get_flash_version
= qla24xx_get_flash_version
,
2141 .start_scsi
= qlafx00_start_scsi
,
2142 .abort_isp
= qlafx00_abort_isp
,
2143 .iospace_config
= qlafx00_iospace_config
,
2144 .initialize_adapter
= qlafx00_initialize_adapter
,
2148 qla2x00_set_isp_flags(struct qla_hw_data
*ha
)
2150 ha
->device_type
= DT_EXTENDED_IDS
;
2151 switch (ha
->pdev
->device
) {
2152 case PCI_DEVICE_ID_QLOGIC_ISP2100
:
2153 ha
->device_type
|= DT_ISP2100
;
2154 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2155 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2157 case PCI_DEVICE_ID_QLOGIC_ISP2200
:
2158 ha
->device_type
|= DT_ISP2200
;
2159 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2160 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2162 case PCI_DEVICE_ID_QLOGIC_ISP2300
:
2163 ha
->device_type
|= DT_ISP2300
;
2164 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2165 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2167 case PCI_DEVICE_ID_QLOGIC_ISP2312
:
2168 ha
->device_type
|= DT_ISP2312
;
2169 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2170 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2172 case PCI_DEVICE_ID_QLOGIC_ISP2322
:
2173 ha
->device_type
|= DT_ISP2322
;
2174 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2175 if (ha
->pdev
->subsystem_vendor
== 0x1028 &&
2176 ha
->pdev
->subsystem_device
== 0x0170)
2177 ha
->device_type
|= DT_OEM_001
;
2178 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2180 case PCI_DEVICE_ID_QLOGIC_ISP6312
:
2181 ha
->device_type
|= DT_ISP6312
;
2182 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2184 case PCI_DEVICE_ID_QLOGIC_ISP6322
:
2185 ha
->device_type
|= DT_ISP6322
;
2186 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2188 case PCI_DEVICE_ID_QLOGIC_ISP2422
:
2189 ha
->device_type
|= DT_ISP2422
;
2190 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2191 ha
->device_type
|= DT_FWI2
;
2192 ha
->device_type
|= DT_IIDMA
;
2193 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2195 case PCI_DEVICE_ID_QLOGIC_ISP2432
:
2196 ha
->device_type
|= DT_ISP2432
;
2197 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2198 ha
->device_type
|= DT_FWI2
;
2199 ha
->device_type
|= DT_IIDMA
;
2200 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2202 case PCI_DEVICE_ID_QLOGIC_ISP8432
:
2203 ha
->device_type
|= DT_ISP8432
;
2204 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2205 ha
->device_type
|= DT_FWI2
;
2206 ha
->device_type
|= DT_IIDMA
;
2207 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2209 case PCI_DEVICE_ID_QLOGIC_ISP5422
:
2210 ha
->device_type
|= DT_ISP5422
;
2211 ha
->device_type
|= DT_FWI2
;
2212 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2214 case PCI_DEVICE_ID_QLOGIC_ISP5432
:
2215 ha
->device_type
|= DT_ISP5432
;
2216 ha
->device_type
|= DT_FWI2
;
2217 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2219 case PCI_DEVICE_ID_QLOGIC_ISP2532
:
2220 ha
->device_type
|= DT_ISP2532
;
2221 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2222 ha
->device_type
|= DT_FWI2
;
2223 ha
->device_type
|= DT_IIDMA
;
2224 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2226 case PCI_DEVICE_ID_QLOGIC_ISP8001
:
2227 ha
->device_type
|= DT_ISP8001
;
2228 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2229 ha
->device_type
|= DT_FWI2
;
2230 ha
->device_type
|= DT_IIDMA
;
2231 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2233 case PCI_DEVICE_ID_QLOGIC_ISP8021
:
2234 ha
->device_type
|= DT_ISP8021
;
2235 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2236 ha
->device_type
|= DT_FWI2
;
2237 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2238 /* Initialize 82XX ISP flags */
2239 qla82xx_init_flags(ha
);
2241 case PCI_DEVICE_ID_QLOGIC_ISP2031
:
2242 ha
->device_type
|= DT_ISP2031
;
2243 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2244 ha
->device_type
|= DT_FWI2
;
2245 ha
->device_type
|= DT_IIDMA
;
2246 ha
->device_type
|= DT_T10_PI
;
2247 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2249 case PCI_DEVICE_ID_QLOGIC_ISP8031
:
2250 ha
->device_type
|= DT_ISP8031
;
2251 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2252 ha
->device_type
|= DT_FWI2
;
2253 ha
->device_type
|= DT_IIDMA
;
2254 ha
->device_type
|= DT_T10_PI
;
2255 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2257 case PCI_DEVICE_ID_QLOGIC_ISPF001
:
2258 ha
->device_type
|= DT_ISPFX00
;
2263 ha
->port_no
= !(ha
->portnum
& 1);
2265 /* Get adapter physical port no from interrupt pin register. */
2266 pci_read_config_byte(ha
->pdev
, PCI_INTERRUPT_PIN
, &ha
->port_no
);
2268 if (ha
->port_no
& 1)
2269 ha
->flags
.port0
= 1;
2271 ha
->flags
.port0
= 0;
2272 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x000b,
2273 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2274 ha
->device_type
, ha
->flags
.port0
, ha
->fw_srisc_address
);
2278 qla2xxx_scan_start(struct Scsi_Host
*shost
)
2280 scsi_qla_host_t
*vha
= shost_priv(shost
);
2282 if (vha
->hw
->flags
.running_gold_fw
)
2285 set_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
);
2286 set_bit(LOCAL_LOOP_UPDATE
, &vha
->dpc_flags
);
2287 set_bit(RSCN_UPDATE
, &vha
->dpc_flags
);
2288 set_bit(NPIV_CONFIG_NEEDED
, &vha
->dpc_flags
);
2292 qla2xxx_scan_finished(struct Scsi_Host
*shost
, unsigned long time
)
2294 scsi_qla_host_t
*vha
= shost_priv(shost
);
2298 if (time
> vha
->hw
->loop_reset_delay
* HZ
)
2301 return atomic_read(&vha
->loop_state
) == LOOP_READY
;
2305 * PCI driver interface
2308 qla2x00_probe_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2311 struct Scsi_Host
*host
;
2312 scsi_qla_host_t
*base_vha
= NULL
;
2313 struct qla_hw_data
*ha
;
2315 char fw_str
[30], wq_name
[30];
2316 struct scsi_host_template
*sht
;
2317 int bars
, mem_only
= 0;
2318 uint16_t req_length
= 0, rsp_length
= 0;
2319 struct req_que
*req
= NULL
;
2320 struct rsp_que
*rsp
= NULL
;
2322 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
2323 sht
= &qla2xxx_driver_template
;
2324 if (pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2422
||
2325 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2432
||
2326 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8432
||
2327 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5422
||
2328 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5432
||
2329 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2532
||
2330 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8001
||
2331 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8021
||
2332 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2031
||
2333 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8031
||
2334 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISPF001
) {
2335 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2337 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0007,
2338 "Mem only adapter.\n");
2340 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0008,
2341 "Bars=%d.\n", bars
);
2344 if (pci_enable_device_mem(pdev
))
2347 if (pci_enable_device(pdev
))
2351 /* This may fail but that's ok */
2352 pci_enable_pcie_error_reporting(pdev
);
2354 ha
= kzalloc(sizeof(struct qla_hw_data
), GFP_KERNEL
);
2356 ql_log_pci(ql_log_fatal
, pdev
, 0x0009,
2357 "Unable to allocate memory for ha.\n");
2358 goto disable_device
;
2360 ql_dbg_pci(ql_dbg_init
, pdev
, 0x000a,
2361 "Memory allocated for ha=%p.\n", ha
);
2363 ha
->tgt
.enable_class_2
= ql2xenableclass2
;
2365 /* Clear our data area */
2367 ha
->mem_only
= mem_only
;
2368 spin_lock_init(&ha
->hardware_lock
);
2369 spin_lock_init(&ha
->vport_slock
);
2370 mutex_init(&ha
->selflogin_lock
);
2372 /* Set ISP-type information. */
2373 qla2x00_set_isp_flags(ha
);
2375 /* Set EEH reset type to fundamental if required by hba */
2376 if (IS_QLA24XX(ha
) || IS_QLA25XX(ha
) || IS_QLA81XX(ha
) ||
2378 pdev
->needs_freset
= 1;
2380 ha
->prev_topology
= 0;
2381 ha
->init_cb_size
= sizeof(init_cb_t
);
2382 ha
->link_data_rate
= PORT_SPEED_UNKNOWN
;
2383 ha
->optrom_size
= OPTROM_SIZE_2300
;
2384 ha
->cfg_lun_q_depth
= ql2xmaxqdepth
;
2386 /* Assign ISP specific operations. */
2387 if (IS_QLA2100(ha
)) {
2388 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2389 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2100
;
2390 req_length
= REQUEST_ENTRY_CNT_2100
;
2391 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2392 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2393 ha
->gid_list_info_size
= 4;
2394 ha
->flash_conf_off
= ~0;
2395 ha
->flash_data_off
= ~0;
2396 ha
->nvram_conf_off
= ~0;
2397 ha
->nvram_data_off
= ~0;
2398 ha
->isp_ops
= &qla2100_isp_ops
;
2399 } else if (IS_QLA2200(ha
)) {
2400 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2401 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2200
;
2402 req_length
= REQUEST_ENTRY_CNT_2200
;
2403 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2404 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2405 ha
->gid_list_info_size
= 4;
2406 ha
->flash_conf_off
= ~0;
2407 ha
->flash_data_off
= ~0;
2408 ha
->nvram_conf_off
= ~0;
2409 ha
->nvram_data_off
= ~0;
2410 ha
->isp_ops
= &qla2100_isp_ops
;
2411 } else if (IS_QLA23XX(ha
)) {
2412 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2413 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2414 req_length
= REQUEST_ENTRY_CNT_2200
;
2415 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2416 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2417 ha
->gid_list_info_size
= 6;
2418 if (IS_QLA2322(ha
) || IS_QLA6322(ha
))
2419 ha
->optrom_size
= OPTROM_SIZE_2322
;
2420 ha
->flash_conf_off
= ~0;
2421 ha
->flash_data_off
= ~0;
2422 ha
->nvram_conf_off
= ~0;
2423 ha
->nvram_data_off
= ~0;
2424 ha
->isp_ops
= &qla2300_isp_ops
;
2425 } else if (IS_QLA24XX_TYPE(ha
)) {
2426 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2427 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2428 req_length
= REQUEST_ENTRY_CNT_24XX
;
2429 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2430 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2431 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2432 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2433 ha
->gid_list_info_size
= 8;
2434 ha
->optrom_size
= OPTROM_SIZE_24XX
;
2435 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA24XX
;
2436 ha
->isp_ops
= &qla24xx_isp_ops
;
2437 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2438 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2439 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2440 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2441 } else if (IS_QLA25XX(ha
)) {
2442 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2443 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2444 req_length
= REQUEST_ENTRY_CNT_24XX
;
2445 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2446 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2447 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2448 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2449 ha
->gid_list_info_size
= 8;
2450 ha
->optrom_size
= OPTROM_SIZE_25XX
;
2451 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2452 ha
->isp_ops
= &qla25xx_isp_ops
;
2453 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2454 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2455 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2456 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2457 } else if (IS_QLA81XX(ha
)) {
2458 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2459 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2460 req_length
= REQUEST_ENTRY_CNT_24XX
;
2461 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2462 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2463 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2464 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2465 ha
->gid_list_info_size
= 8;
2466 ha
->optrom_size
= OPTROM_SIZE_81XX
;
2467 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2468 ha
->isp_ops
= &qla81xx_isp_ops
;
2469 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2470 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2471 ha
->nvram_conf_off
= ~0;
2472 ha
->nvram_data_off
= ~0;
2473 } else if (IS_QLA82XX(ha
)) {
2474 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2475 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2476 req_length
= REQUEST_ENTRY_CNT_82XX
;
2477 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2478 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2479 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2480 ha
->gid_list_info_size
= 8;
2481 ha
->optrom_size
= OPTROM_SIZE_82XX
;
2482 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2483 ha
->isp_ops
= &qla82xx_isp_ops
;
2484 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2485 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2486 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2487 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2488 } else if (IS_QLA83XX(ha
)) {
2489 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2490 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2491 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2492 req_length
= REQUEST_ENTRY_CNT_24XX
;
2493 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2494 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2495 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2496 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2497 ha
->gid_list_info_size
= 8;
2498 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2499 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2500 ha
->isp_ops
= &qla83xx_isp_ops
;
2501 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2502 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2503 ha
->nvram_conf_off
= ~0;
2504 ha
->nvram_data_off
= ~0;
2505 } else if (IS_QLAFX00(ha
)) {
2506 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_FX00
;
2507 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_FX00
;
2508 ha
->aen_mbx_count
= AEN_MAILBOX_REGISTER_COUNT_FX00
;
2509 req_length
= REQUEST_ENTRY_CNT_FX00
;
2510 rsp_length
= RESPONSE_ENTRY_CNT_FX00
;
2511 ha
->init_cb_size
= sizeof(struct init_cb_fx
);
2512 ha
->isp_ops
= &qlafx00_isp_ops
;
2513 ha
->port_down_retry_count
= 30; /* default value */
2514 ha
->mr
.fw_hbt_cnt
= QLAFX00_HEARTBEAT_INTERVAL
;
2515 ha
->mr
.fw_reset_timer_tick
= QLAFX00_RESET_INTERVAL
;
2516 ha
->mr
.fw_hbt_en
= 1;
2519 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001e,
2520 "mbx_count=%d, req_length=%d, "
2521 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2522 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2523 "max_fibre_devices=%d.\n",
2524 ha
->mbx_count
, req_length
, rsp_length
, ha
->max_loop_id
,
2525 ha
->init_cb_size
, ha
->gid_list_info_size
, ha
->optrom_size
,
2526 ha
->nvram_npiv_size
, ha
->max_fibre_devices
);
2527 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001f,
2528 "isp_ops=%p, flash_conf_off=%d, "
2529 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2530 ha
->isp_ops
, ha
->flash_conf_off
, ha
->flash_data_off
,
2531 ha
->nvram_conf_off
, ha
->nvram_data_off
);
2533 /* Configure PCI I/O space */
2534 ret
= ha
->isp_ops
->iospace_config(ha
);
2536 goto iospace_config_failed
;
2538 ql_log_pci(ql_log_info
, pdev
, 0x001d,
2539 "Found an ISP%04X irq %d iobase 0x%p.\n",
2540 pdev
->device
, pdev
->irq
, ha
->iobase
);
2541 mutex_init(&ha
->vport_lock
);
2542 init_completion(&ha
->mbx_cmd_comp
);
2543 complete(&ha
->mbx_cmd_comp
);
2544 init_completion(&ha
->mbx_intr_comp
);
2545 init_completion(&ha
->dcbx_comp
);
2546 init_completion(&ha
->lb_portup_comp
);
2548 set_bit(0, (unsigned long *) ha
->vp_idx_map
);
2550 qla2x00_config_dma_addressing(ha
);
2551 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0020,
2552 "64 Bit addressing is %s.\n",
2553 ha
->flags
.enable_64bit_addressing
? "enable" :
2555 ret
= qla2x00_mem_alloc(ha
, req_length
, rsp_length
, &req
, &rsp
);
2557 ql_log_pci(ql_log_fatal
, pdev
, 0x0031,
2558 "Failed to allocate memory for adapter, aborting.\n");
2560 goto probe_hw_failed
;
2563 req
->max_q_depth
= MAX_Q_DEPTH
;
2564 if (ql2xmaxqdepth
!= 0 && ql2xmaxqdepth
<= 0xffffU
)
2565 req
->max_q_depth
= ql2xmaxqdepth
;
2568 base_vha
= qla2x00_create_host(sht
, ha
);
2571 qla2x00_mem_free(ha
);
2572 qla2x00_free_req_que(ha
, req
);
2573 qla2x00_free_rsp_que(ha
, rsp
);
2574 goto probe_hw_failed
;
2577 pci_set_drvdata(pdev
, base_vha
);
2579 host
= base_vha
->host
;
2580 base_vha
->req
= req
;
2582 host
->can_queue
= 1024;
2584 host
->can_queue
= req
->length
+ 128;
2585 if (IS_QLA2XXX_MIDTYPE(ha
))
2586 base_vha
->mgmt_svr_loop_id
= 10 + base_vha
->vp_idx
;
2588 base_vha
->mgmt_svr_loop_id
= MANAGEMENT_SERVER
+
2591 /* Setup fcport template structure. */
2592 ha
->mr
.fcport
.vha
= base_vha
;
2593 ha
->mr
.fcport
.port_type
= FCT_UNKNOWN
;
2594 ha
->mr
.fcport
.loop_id
= FC_NO_LOOP_ID
;
2595 qla2x00_set_fcport_state(&ha
->mr
.fcport
, FCS_UNCONFIGURED
);
2596 ha
->mr
.fcport
.supported_classes
= FC_COS_UNSPECIFIED
;
2597 ha
->mr
.fcport
.scan_state
= 1;
2599 /* Set the SG table size based on ISP type */
2600 if (!IS_FWI2_CAPABLE(ha
)) {
2602 host
->sg_tablesize
= 32;
2604 if (!IS_QLA82XX(ha
))
2605 host
->sg_tablesize
= QLA_SG_ALL
;
2607 ql_dbg(ql_dbg_init
, base_vha
, 0x0032,
2608 "can_queue=%d, req=%p, "
2609 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2610 host
->can_queue
, base_vha
->req
,
2611 base_vha
->mgmt_svr_loop_id
, host
->sg_tablesize
);
2612 host
->max_id
= ha
->max_fibre_devices
;
2613 host
->cmd_per_lun
= 3;
2614 host
->unique_id
= host
->host_no
;
2615 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
)
2616 host
->max_cmd_len
= 32;
2618 host
->max_cmd_len
= MAX_CMDSZ
;
2619 host
->max_channel
= MAX_BUSES
- 1;
2620 host
->max_lun
= ql2xmaxlun
;
2621 host
->transportt
= qla2xxx_transport_template
;
2622 sht
->vendor_id
= (SCSI_NL_VID_TYPE_PCI
| PCI_VENDOR_ID_QLOGIC
);
2624 ql_dbg(ql_dbg_init
, base_vha
, 0x0033,
2625 "max_id=%d this_id=%d "
2626 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2627 "max_lun=%d transportt=%p, vendor_id=%llu.\n", host
->max_id
,
2628 host
->this_id
, host
->cmd_per_lun
, host
->unique_id
,
2629 host
->max_cmd_len
, host
->max_channel
, host
->max_lun
,
2630 host
->transportt
, sht
->vendor_id
);
2633 /* Alloc arrays of request and response ring ptrs */
2634 if (!qla2x00_alloc_queues(ha
, req
, rsp
)) {
2635 ql_log(ql_log_fatal
, base_vha
, 0x003d,
2636 "Failed to allocate memory for queue pointers..."
2638 goto probe_init_failed
;
2641 qlt_probe_one_stage1(base_vha
, ha
);
2643 /* Set up the irqs */
2644 ret
= qla2x00_request_irqs(ha
, rsp
);
2646 goto probe_init_failed
;
2648 pci_save_state(pdev
);
2650 /* Assign back pointers */
2654 if (IS_QLAFX00(ha
)) {
2655 ha
->rsp_q_map
[0] = rsp
;
2656 ha
->req_q_map
[0] = req
;
2657 set_bit(0, ha
->req_qid_map
);
2658 set_bit(0, ha
->rsp_qid_map
);
2661 /* FWI2-capable only. */
2662 req
->req_q_in
= &ha
->iobase
->isp24
.req_q_in
;
2663 req
->req_q_out
= &ha
->iobase
->isp24
.req_q_out
;
2664 rsp
->rsp_q_in
= &ha
->iobase
->isp24
.rsp_q_in
;
2665 rsp
->rsp_q_out
= &ha
->iobase
->isp24
.rsp_q_out
;
2666 if (ha
->mqenable
|| IS_QLA83XX(ha
)) {
2667 req
->req_q_in
= &ha
->mqiobase
->isp25mq
.req_q_in
;
2668 req
->req_q_out
= &ha
->mqiobase
->isp25mq
.req_q_out
;
2669 rsp
->rsp_q_in
= &ha
->mqiobase
->isp25mq
.rsp_q_in
;
2670 rsp
->rsp_q_out
= &ha
->mqiobase
->isp25mq
.rsp_q_out
;
2673 if (IS_QLAFX00(ha
)) {
2674 req
->req_q_in
= &ha
->iobase
->ispfx00
.req_q_in
;
2675 req
->req_q_out
= &ha
->iobase
->ispfx00
.req_q_out
;
2676 rsp
->rsp_q_in
= &ha
->iobase
->ispfx00
.rsp_q_in
;
2677 rsp
->rsp_q_out
= &ha
->iobase
->ispfx00
.rsp_q_out
;
2680 if (IS_QLA82XX(ha
)) {
2681 req
->req_q_out
= &ha
->iobase
->isp82
.req_q_out
[0];
2682 rsp
->rsp_q_in
= &ha
->iobase
->isp82
.rsp_q_in
[0];
2683 rsp
->rsp_q_out
= &ha
->iobase
->isp82
.rsp_q_out
[0];
2686 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc009,
2687 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2688 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2689 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc00a,
2690 "req->req_q_in=%p req->req_q_out=%p "
2691 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2692 req
->req_q_in
, req
->req_q_out
,
2693 rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2694 ql_dbg(ql_dbg_init
, base_vha
, 0x003e,
2695 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2696 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
2697 ql_dbg(ql_dbg_init
, base_vha
, 0x003f,
2698 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2699 req
->req_q_in
, req
->req_q_out
, rsp
->rsp_q_in
, rsp
->rsp_q_out
);
2701 if (ha
->isp_ops
->initialize_adapter(base_vha
)) {
2702 ql_log(ql_log_fatal
, base_vha
, 0x00d6,
2703 "Failed to initialize adapter - Adapter flags %x.\n",
2704 base_vha
->device_flags
);
2706 if (IS_QLA82XX(ha
)) {
2707 qla82xx_idc_lock(ha
);
2708 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
2709 QLA8XXX_DEV_FAILED
);
2710 qla82xx_idc_unlock(ha
);
2711 ql_log(ql_log_fatal
, base_vha
, 0x00d7,
2712 "HW State: FAILED.\n");
2720 if (qla25xx_setup_mode(base_vha
)) {
2721 ql_log(ql_log_warn
, base_vha
, 0x00ec,
2722 "Failed to create queues, falling back to single queue mode.\n");
2727 if (ha
->flags
.running_gold_fw
)
2731 * Startup the kernel thread for this host adapter
2733 ha
->dpc_thread
= kthread_create(qla2x00_do_dpc
, ha
,
2734 "%s_dpc", base_vha
->host_str
);
2735 if (IS_ERR(ha
->dpc_thread
)) {
2736 ql_log(ql_log_fatal
, base_vha
, 0x00ed,
2737 "Failed to start DPC thread.\n");
2738 ret
= PTR_ERR(ha
->dpc_thread
);
2741 ql_dbg(ql_dbg_init
, base_vha
, 0x00ee,
2742 "DPC thread started successfully.\n");
2745 * If we're not coming up in initiator mode, we might sit for
2746 * a while without waking up the dpc thread, which leads to a
2747 * stuck process warning. So just kick the dpc once here and
2748 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2750 qla2xxx_wake_dpc(base_vha
);
2752 if (IS_QLA8031(ha
) || IS_MCTP_CAPABLE(ha
)) {
2753 sprintf(wq_name
, "qla2xxx_%lu_dpc_lp_wq", base_vha
->host_no
);
2754 ha
->dpc_lp_wq
= create_singlethread_workqueue(wq_name
);
2755 INIT_WORK(&ha
->idc_aen
, qla83xx_service_idc_aen
);
2757 sprintf(wq_name
, "qla2xxx_%lu_dpc_hp_wq", base_vha
->host_no
);
2758 ha
->dpc_hp_wq
= create_singlethread_workqueue(wq_name
);
2759 INIT_WORK(&ha
->nic_core_reset
, qla83xx_nic_core_reset_work
);
2760 INIT_WORK(&ha
->idc_state_handler
,
2761 qla83xx_idc_state_handler_work
);
2762 INIT_WORK(&ha
->nic_core_unrecoverable
,
2763 qla83xx_nic_core_unrecoverable_work
);
2767 list_add_tail(&base_vha
->list
, &ha
->vp_list
);
2768 base_vha
->host
->irq
= ha
->pdev
->irq
;
2770 /* Initialized the timer */
2771 qla2x00_start_timer(base_vha
, qla2x00_timer
, WATCH_INTERVAL
);
2772 ql_dbg(ql_dbg_init
, base_vha
, 0x00ef,
2773 "Started qla2x00_timer with "
2774 "interval=%d.\n", WATCH_INTERVAL
);
2775 ql_dbg(ql_dbg_init
, base_vha
, 0x00f0,
2776 "Detected hba at address=%p.\n",
2779 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
) {
2780 if (ha
->fw_attributes
& BIT_4
) {
2781 int prot
= 0, guard
;
2782 base_vha
->flags
.difdix_supported
= 1;
2783 ql_dbg(ql_dbg_init
, base_vha
, 0x00f1,
2784 "Registering for DIF/DIX type 1 and 3 protection.\n");
2785 if (ql2xenabledif
== 1)
2786 prot
= SHOST_DIX_TYPE0_PROTECTION
;
2787 scsi_host_set_prot(host
,
2788 prot
| SHOST_DIF_TYPE1_PROTECTION
2789 | SHOST_DIF_TYPE2_PROTECTION
2790 | SHOST_DIF_TYPE3_PROTECTION
2791 | SHOST_DIX_TYPE1_PROTECTION
2792 | SHOST_DIX_TYPE2_PROTECTION
2793 | SHOST_DIX_TYPE3_PROTECTION
);
2795 guard
= SHOST_DIX_GUARD_CRC
;
2797 if (IS_PI_IPGUARD_CAPABLE(ha
) &&
2798 (ql2xenabledif
> 1 || IS_PI_DIFB_DIX0_CAPABLE(ha
)))
2799 guard
|= SHOST_DIX_GUARD_IP
;
2801 scsi_host_set_guard(host
, guard
);
2803 base_vha
->flags
.difdix_supported
= 0;
2806 ha
->isp_ops
->enable_intrs(ha
);
2808 ret
= scsi_add_host(host
, &pdev
->dev
);
2812 base_vha
->flags
.init_done
= 1;
2813 base_vha
->flags
.online
= 1;
2815 ql_dbg(ql_dbg_init
, base_vha
, 0x00f2,
2816 "Init done and hba is online.\n");
2818 if (qla_ini_mode_enabled(base_vha
))
2819 scsi_scan_host(host
);
2821 ql_dbg(ql_dbg_init
, base_vha
, 0x0122,
2822 "skipping scsi_scan_host() for non-initiator port\n");
2824 qla2x00_alloc_sysfs_attr(base_vha
);
2826 if (IS_QLAFX00(ha
)) {
2827 ret
= qlafx00_fx_disc(base_vha
,
2828 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_CONFIG_INFO
);
2830 ret
= qlafx00_fx_disc(base_vha
,
2831 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_PORT_INFO
);
2833 /* Register system information */
2834 ret
= qlafx00_fx_disc(base_vha
,
2835 &base_vha
->hw
->mr
.fcport
, FXDISC_REG_HOST_INFO
);
2838 qla2x00_init_host_attr(base_vha
);
2840 qla2x00_dfs_setup(base_vha
);
2842 ql_log(ql_log_info
, base_vha
, 0x00fb,
2843 "QLogic %s - %s.\n",
2844 ha
->model_number
, ha
->model_desc
? ha
->model_desc
: "");
2845 ql_log(ql_log_info
, base_vha
, 0x00fc,
2846 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2847 pdev
->device
, ha
->isp_ops
->pci_info_str(base_vha
, pci_info
),
2848 pci_name(pdev
), ha
->flags
.enable_64bit_addressing
? '+' : '-',
2850 ha
->isp_ops
->fw_version_str(base_vha
, fw_str
));
2852 qlt_add_target(ha
, base_vha
);
2857 qla2x00_free_req_que(ha
, req
);
2858 ha
->req_q_map
[0] = NULL
;
2859 clear_bit(0, ha
->req_qid_map
);
2860 qla2x00_free_rsp_que(ha
, rsp
);
2861 ha
->rsp_q_map
[0] = NULL
;
2862 clear_bit(0, ha
->rsp_qid_map
);
2863 ha
->max_req_queues
= ha
->max_rsp_queues
= 0;
2866 if (base_vha
->timer_active
)
2867 qla2x00_stop_timer(base_vha
);
2868 base_vha
->flags
.online
= 0;
2869 if (ha
->dpc_thread
) {
2870 struct task_struct
*t
= ha
->dpc_thread
;
2872 ha
->dpc_thread
= NULL
;
2876 qla2x00_free_device(base_vha
);
2878 scsi_host_put(base_vha
->host
);
2881 if (IS_QLA82XX(ha
)) {
2882 qla82xx_idc_lock(ha
);
2883 qla82xx_clear_drv_active(ha
);
2884 qla82xx_idc_unlock(ha
);
2886 iospace_config_failed
:
2887 if (IS_QLA82XX(ha
)) {
2888 if (!ha
->nx_pcibase
)
2889 iounmap((device_reg_t __iomem
*)ha
->nx_pcibase
);
2891 iounmap((device_reg_t __iomem
*)ha
->nxdb_wr_ptr
);
2894 iounmap(ha
->iobase
);
2896 iounmap(ha
->cregbase
);
2898 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
2903 pci_disable_device(pdev
);
2908 qla2x00_stop_dpc_thread(scsi_qla_host_t
*vha
)
2910 struct qla_hw_data
*ha
= vha
->hw
;
2911 struct task_struct
*t
= ha
->dpc_thread
;
2913 if (ha
->dpc_thread
== NULL
)
2916 * qla2xxx_wake_dpc checks for ->dpc_thread
2917 * so we need to zero it out.
2919 ha
->dpc_thread
= NULL
;
2924 qla2x00_shutdown(struct pci_dev
*pdev
)
2926 scsi_qla_host_t
*vha
;
2927 struct qla_hw_data
*ha
;
2929 if (!atomic_read(&pdev
->enable_cnt
))
2932 vha
= pci_get_drvdata(pdev
);
2935 /* Turn-off FCE trace */
2936 if (ha
->flags
.fce_enabled
) {
2937 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
2938 ha
->flags
.fce_enabled
= 0;
2941 /* Turn-off EFT trace */
2943 qla2x00_disable_eft_trace(vha
);
2945 /* Stop currently executing firmware. */
2946 qla2x00_try_to_stop_firmware(vha
);
2948 /* Turn adapter off line */
2949 vha
->flags
.online
= 0;
2951 /* turn-off interrupts on the card */
2952 if (ha
->interrupts_on
) {
2953 vha
->flags
.init_done
= 0;
2954 ha
->isp_ops
->disable_intrs(ha
);
2957 qla2x00_free_irqs(vha
);
2959 qla2x00_free_fw_dump(ha
);
2963 qla2x00_remove_one(struct pci_dev
*pdev
)
2965 scsi_qla_host_t
*base_vha
, *vha
;
2966 struct qla_hw_data
*ha
;
2967 unsigned long flags
;
2970 * If the PCI device is disabled that means that probe failed and any
2971 * resources should be have cleaned up on probe exit.
2973 if (!atomic_read(&pdev
->enable_cnt
))
2976 base_vha
= pci_get_drvdata(pdev
);
2979 ha
->flags
.host_shutting_down
= 1;
2981 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
2982 mutex_lock(&ha
->vport_lock
);
2983 while (ha
->cur_vport_count
) {
2984 struct Scsi_Host
*scsi_host
;
2986 spin_lock_irqsave(&ha
->vport_slock
, flags
);
2988 BUG_ON(base_vha
->list
.next
== &ha
->vp_list
);
2989 /* This assumes first entry in ha->vp_list is always base vha */
2990 vha
= list_first_entry(&base_vha
->list
, scsi_qla_host_t
, list
);
2991 scsi_host
= scsi_host_get(vha
->host
);
2993 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
2994 mutex_unlock(&ha
->vport_lock
);
2996 fc_vport_terminate(vha
->fc_vport
);
2997 scsi_host_put(vha
->host
);
2999 mutex_lock(&ha
->vport_lock
);
3001 mutex_unlock(&ha
->vport_lock
);
3003 if (IS_QLA8031(ha
)) {
3004 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07e,
3005 "Clearing fcoe driver presence.\n");
3006 if (qla83xx_clear_drv_presence(base_vha
) != QLA_SUCCESS
)
3007 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb079,
3008 "Error while clearing DRV-Presence.\n");
3011 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
3013 qla2x00_dfs_remove(base_vha
);
3015 qla84xx_put_chip(base_vha
);
3018 if (base_vha
->timer_active
)
3019 qla2x00_stop_timer(base_vha
);
3021 base_vha
->flags
.online
= 0;
3023 /* Flush the work queue and remove it */
3025 flush_workqueue(ha
->wq
);
3026 destroy_workqueue(ha
->wq
);
3030 /* Cancel all work and destroy DPC workqueues */
3031 if (ha
->dpc_lp_wq
) {
3032 cancel_work_sync(&ha
->idc_aen
);
3033 destroy_workqueue(ha
->dpc_lp_wq
);
3034 ha
->dpc_lp_wq
= NULL
;
3037 if (ha
->dpc_hp_wq
) {
3038 cancel_work_sync(&ha
->nic_core_reset
);
3039 cancel_work_sync(&ha
->idc_state_handler
);
3040 cancel_work_sync(&ha
->nic_core_unrecoverable
);
3041 destroy_workqueue(ha
->dpc_hp_wq
);
3042 ha
->dpc_hp_wq
= NULL
;
3045 /* Kill the kernel thread for this host */
3046 if (ha
->dpc_thread
) {
3047 struct task_struct
*t
= ha
->dpc_thread
;
3050 * qla2xxx_wake_dpc checks for ->dpc_thread
3051 * so we need to zero it out.
3053 ha
->dpc_thread
= NULL
;
3056 qlt_remove_target(ha
, base_vha
);
3058 qla2x00_free_sysfs_attr(base_vha
);
3060 fc_remove_host(base_vha
->host
);
3062 scsi_remove_host(base_vha
->host
);
3064 qla2x00_free_device(base_vha
);
3066 scsi_host_put(base_vha
->host
);
3068 if (IS_QLA82XX(ha
)) {
3069 qla82xx_idc_lock(ha
);
3070 qla82xx_clear_drv_active(ha
);
3071 qla82xx_idc_unlock(ha
);
3073 iounmap((device_reg_t __iomem
*)ha
->nx_pcibase
);
3075 iounmap((device_reg_t __iomem
*)ha
->nxdb_wr_ptr
);
3078 iounmap(ha
->iobase
);
3081 iounmap(ha
->cregbase
);
3084 iounmap(ha
->mqiobase
);
3086 if (IS_QLA83XX(ha
) && ha
->msixbase
)
3087 iounmap(ha
->msixbase
);
3090 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
3094 pci_disable_pcie_error_reporting(pdev
);
3096 pci_disable_device(pdev
);
3097 pci_set_drvdata(pdev
, NULL
);
3101 qla2x00_free_device(scsi_qla_host_t
*vha
)
3103 struct qla_hw_data
*ha
= vha
->hw
;
3105 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
3108 if (vha
->timer_active
)
3109 qla2x00_stop_timer(vha
);
3111 qla2x00_stop_dpc_thread(vha
);
3113 qla25xx_delete_queues(vha
);
3114 if (ha
->flags
.fce_enabled
)
3115 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
3118 qla2x00_disable_eft_trace(vha
);
3120 /* Stop currently executing firmware. */
3121 qla2x00_try_to_stop_firmware(vha
);
3123 vha
->flags
.online
= 0;
3125 /* turn-off interrupts on the card */
3126 if (ha
->interrupts_on
) {
3127 vha
->flags
.init_done
= 0;
3128 ha
->isp_ops
->disable_intrs(ha
);
3131 qla2x00_free_irqs(vha
);
3133 qla2x00_free_fcports(vha
);
3135 qla2x00_mem_free(ha
);
3137 qla82xx_md_free(vha
);
3139 qla2x00_free_queues(ha
);
3142 void qla2x00_free_fcports(struct scsi_qla_host
*vha
)
3144 fc_port_t
*fcport
, *tfcport
;
3146 list_for_each_entry_safe(fcport
, tfcport
, &vha
->vp_fcports
, list
) {
3147 list_del(&fcport
->list
);
3148 qla2x00_clear_loop_id(fcport
);
3155 qla2x00_schedule_rport_del(struct scsi_qla_host
*vha
, fc_port_t
*fcport
,
3158 struct fc_rport
*rport
;
3159 scsi_qla_host_t
*base_vha
;
3160 unsigned long flags
;
3165 rport
= fcport
->rport
;
3167 base_vha
= pci_get_drvdata(vha
->hw
->pdev
);
3168 spin_lock_irqsave(vha
->host
->host_lock
, flags
);
3169 fcport
->drport
= rport
;
3170 spin_unlock_irqrestore(vha
->host
->host_lock
, flags
);
3171 set_bit(FCPORT_UPDATE_NEEDED
, &base_vha
->dpc_flags
);
3172 qla2xxx_wake_dpc(base_vha
);
3174 fc_remote_port_delete(rport
);
3175 qlt_fc_port_deleted(vha
, fcport
);
3180 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3182 * Input: ha = adapter block pointer. fcport = port structure pointer.
3188 void qla2x00_mark_device_lost(scsi_qla_host_t
*vha
, fc_port_t
*fcport
,
3189 int do_login
, int defer
)
3191 if (IS_QLAFX00(vha
->hw
)) {
3192 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3193 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3197 if (atomic_read(&fcport
->state
) == FCS_ONLINE
&&
3198 vha
->vp_idx
== fcport
->vha
->vp_idx
) {
3199 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3200 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3203 * We may need to retry the login, so don't change the state of the
3204 * port but do the retries.
3206 if (atomic_read(&fcport
->state
) != FCS_DEVICE_DEAD
)
3207 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3212 if (fcport
->login_retry
== 0) {
3213 fcport
->login_retry
= vha
->hw
->login_retry_count
;
3214 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
3216 ql_dbg(ql_dbg_disc
, vha
, 0x2067,
3218 "%02x%02x%02x%02x%02x%02x%02x%02x, "
3219 "id = 0x%04x retry cnt=%d.\n",
3220 fcport
->port_name
[0], fcport
->port_name
[1],
3221 fcport
->port_name
[2], fcport
->port_name
[3],
3222 fcport
->port_name
[4], fcport
->port_name
[5],
3223 fcport
->port_name
[6], fcport
->port_name
[7],
3224 fcport
->loop_id
, fcport
->login_retry
);
3229 * qla2x00_mark_all_devices_lost
3230 * Updates fcport state when device goes offline.
3233 * ha = adapter block pointer.
3234 * fcport = port structure pointer.
3242 qla2x00_mark_all_devices_lost(scsi_qla_host_t
*vha
, int defer
)
3246 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3247 if (vha
->vp_idx
!= 0 && vha
->vp_idx
!= fcport
->vha
->vp_idx
)
3251 * No point in marking the device as lost, if the device is
3254 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
)
3256 if (atomic_read(&fcport
->state
) == FCS_ONLINE
) {
3257 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3259 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3260 else if (vha
->vp_idx
== fcport
->vha
->vp_idx
)
3261 qla2x00_schedule_rport_del(vha
, fcport
, defer
);
3268 * Allocates adapter memory.
3275 qla2x00_mem_alloc(struct qla_hw_data
*ha
, uint16_t req_len
, uint16_t rsp_len
,
3276 struct req_que
**req
, struct rsp_que
**rsp
)
3280 ha
->init_cb
= dma_alloc_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3281 &ha
->init_cb_dma
, GFP_KERNEL
);
3285 if (qlt_mem_alloc(ha
) < 0)
3286 goto fail_free_init_cb
;
3288 ha
->gid_list
= dma_alloc_coherent(&ha
->pdev
->dev
,
3289 qla2x00_gid_list_size(ha
), &ha
->gid_list_dma
, GFP_KERNEL
);
3291 goto fail_free_tgt_mem
;
3293 ha
->srb_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
, srb_cachep
);
3294 if (!ha
->srb_mempool
)
3295 goto fail_free_gid_list
;
3297 if (IS_QLA82XX(ha
)) {
3298 /* Allocate cache for CT6 Ctx. */
3300 ctx_cachep
= kmem_cache_create("qla2xxx_ctx",
3301 sizeof(struct ct6_dsd
), 0,
3302 SLAB_HWCACHE_ALIGN
, NULL
);
3304 goto fail_free_srb_mempool
;
3306 ha
->ctx_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
,
3308 if (!ha
->ctx_mempool
)
3309 goto fail_free_srb_mempool
;
3310 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0021,
3311 "ctx_cachep=%p ctx_mempool=%p.\n",
3312 ctx_cachep
, ha
->ctx_mempool
);
3315 /* Get memory for cached NVRAM */
3316 ha
->nvram
= kzalloc(MAX_NVRAM_SIZE
, GFP_KERNEL
);
3318 goto fail_free_ctx_mempool
;
3320 snprintf(name
, sizeof(name
), "%s_%d", QLA2XXX_DRIVER_NAME
,
3322 ha
->s_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3323 DMA_POOL_SIZE
, 8, 0);
3324 if (!ha
->s_dma_pool
)
3325 goto fail_free_nvram
;
3327 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0022,
3328 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3329 ha
->init_cb
, ha
->gid_list
, ha
->srb_mempool
, ha
->s_dma_pool
);
3331 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3332 ha
->dl_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3333 DSD_LIST_DMA_POOL_SIZE
, 8, 0);
3334 if (!ha
->dl_dma_pool
) {
3335 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0023,
3336 "Failed to allocate memory for dl_dma_pool.\n");
3337 goto fail_s_dma_pool
;
3340 ha
->fcp_cmnd_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
3341 FCP_CMND_DMA_POOL_SIZE
, 8, 0);
3342 if (!ha
->fcp_cmnd_dma_pool
) {
3343 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0024,
3344 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3345 goto fail_dl_dma_pool
;
3347 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0025,
3348 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3349 ha
->dl_dma_pool
, ha
->fcp_cmnd_dma_pool
);
3352 /* Allocate memory for SNS commands */
3353 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)) {
3354 /* Get consistent memory allocated for SNS commands */
3355 ha
->sns_cmd
= dma_alloc_coherent(&ha
->pdev
->dev
,
3356 sizeof(struct sns_cmd_pkt
), &ha
->sns_cmd_dma
, GFP_KERNEL
);
3359 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0026,
3360 "sns_cmd: %p.\n", ha
->sns_cmd
);
3362 /* Get consistent memory allocated for MS IOCB */
3363 ha
->ms_iocb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3367 /* Get consistent memory allocated for CT SNS commands */
3368 ha
->ct_sns
= dma_alloc_coherent(&ha
->pdev
->dev
,
3369 sizeof(struct ct_sns_pkt
), &ha
->ct_sns_dma
, GFP_KERNEL
);
3371 goto fail_free_ms_iocb
;
3372 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0027,
3373 "ms_iocb=%p ct_sns=%p.\n",
3374 ha
->ms_iocb
, ha
->ct_sns
);
3377 /* Allocate memory for request ring */
3378 *req
= kzalloc(sizeof(struct req_que
), GFP_KERNEL
);
3380 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0028,
3381 "Failed to allocate memory for req.\n");
3384 (*req
)->length
= req_len
;
3385 (*req
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3386 ((*req
)->length
+ 1) * sizeof(request_t
),
3387 &(*req
)->dma
, GFP_KERNEL
);
3388 if (!(*req
)->ring
) {
3389 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0029,
3390 "Failed to allocate memory for req_ring.\n");
3393 /* Allocate memory for response ring */
3394 *rsp
= kzalloc(sizeof(struct rsp_que
), GFP_KERNEL
);
3396 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002a,
3397 "Failed to allocate memory for rsp.\n");
3401 (*rsp
)->length
= rsp_len
;
3402 (*rsp
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
3403 ((*rsp
)->length
+ 1) * sizeof(response_t
),
3404 &(*rsp
)->dma
, GFP_KERNEL
);
3405 if (!(*rsp
)->ring
) {
3406 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002b,
3407 "Failed to allocate memory for rsp_ring.\n");
3412 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002c,
3413 "req=%p req->length=%d req->ring=%p rsp=%p "
3414 "rsp->length=%d rsp->ring=%p.\n",
3415 *req
, (*req
)->length
, (*req
)->ring
, *rsp
, (*rsp
)->length
,
3417 /* Allocate memory for NVRAM data for vports */
3418 if (ha
->nvram_npiv_size
) {
3419 ha
->npiv_info
= kzalloc(sizeof(struct qla_npiv_entry
) *
3420 ha
->nvram_npiv_size
, GFP_KERNEL
);
3421 if (!ha
->npiv_info
) {
3422 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002d,
3423 "Failed to allocate memory for npiv_info.\n");
3424 goto fail_npiv_info
;
3427 ha
->npiv_info
= NULL
;
3429 /* Get consistent memory allocated for EX-INIT-CB. */
3430 if (IS_CNA_CAPABLE(ha
) || IS_QLA2031(ha
)) {
3431 ha
->ex_init_cb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3432 &ha
->ex_init_cb_dma
);
3433 if (!ha
->ex_init_cb
)
3434 goto fail_ex_init_cb
;
3435 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002e,
3436 "ex_init_cb=%p.\n", ha
->ex_init_cb
);
3439 INIT_LIST_HEAD(&ha
->gbl_dsd_list
);
3441 /* Get consistent memory allocated for Async Port-Database. */
3442 if (!IS_FWI2_CAPABLE(ha
)) {
3443 ha
->async_pd
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
3447 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002f,
3448 "async_pd=%p.\n", ha
->async_pd
);
3451 INIT_LIST_HEAD(&ha
->vp_list
);
3453 /* Allocate memory for our loop_id bitmap */
3454 ha
->loop_id_map
= kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE
) * sizeof(long),
3456 if (!ha
->loop_id_map
)
3457 goto fail_loop_id_map
;
3459 qla2x00_set_reserved_loop_ids(ha
);
3460 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0123,
3461 "loop_id_map=%p.\n", ha
->loop_id_map
);
3467 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
3469 dma_pool_free(ha
->s_dma_pool
, ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3471 kfree(ha
->npiv_info
);
3473 dma_free_coherent(&ha
->pdev
->dev
, ((*rsp
)->length
+ 1) *
3474 sizeof(response_t
), (*rsp
)->ring
, (*rsp
)->dma
);
3475 (*rsp
)->ring
= NULL
;
3480 dma_free_coherent(&ha
->pdev
->dev
, ((*req
)->length
+ 1) *
3481 sizeof(request_t
), (*req
)->ring
, (*req
)->dma
);
3482 (*req
)->ring
= NULL
;
3487 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3488 ha
->ct_sns
, ha
->ct_sns_dma
);
3492 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3494 ha
->ms_iocb_dma
= 0;
3497 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
3498 ha
->sns_cmd
, ha
->sns_cmd_dma
);
3500 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3501 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3502 ha
->fcp_cmnd_dma_pool
= NULL
;
3505 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
3506 dma_pool_destroy(ha
->dl_dma_pool
);
3507 ha
->dl_dma_pool
= NULL
;
3510 dma_pool_destroy(ha
->s_dma_pool
);
3511 ha
->s_dma_pool
= NULL
;
3515 fail_free_ctx_mempool
:
3516 if (ha
->ctx_mempool
)
3517 mempool_destroy(ha
->ctx_mempool
);
3518 ha
->ctx_mempool
= NULL
;
3519 fail_free_srb_mempool
:
3520 if (ha
->srb_mempool
)
3521 mempool_destroy(ha
->srb_mempool
);
3522 ha
->srb_mempool
= NULL
;
3524 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3527 ha
->gid_list
= NULL
;
3528 ha
->gid_list_dma
= 0;
3532 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
, ha
->init_cb
,
3535 ha
->init_cb_dma
= 0;
3537 ql_log(ql_log_fatal
, NULL
, 0x0030,
3538 "Memory allocation failure.\n");
3543 * qla2x00_free_fw_dump
3544 * Frees fw dump stuff.
3547 * ha = adapter block pointer.
3550 qla2x00_free_fw_dump(struct qla_hw_data
*ha
)
3553 dma_free_coherent(&ha
->pdev
->dev
, FCE_SIZE
, ha
->fce
,
3558 dma_free_coherent(&ha
->pdev
->dev
,
3559 ntohl(ha
->fw_dump
->eft_size
), ha
->eft
, ha
->eft_dma
);
3568 ha
->fw_dump_reading
= 0;
3573 * Frees all adapter allocated memory.
3576 * ha = adapter block pointer.
3579 qla2x00_mem_free(struct qla_hw_data
*ha
)
3581 qla2x00_free_fw_dump(ha
);
3584 dma_free_coherent(&ha
->pdev
->dev
, MCTP_DUMP_SIZE
, ha
->mctp_dump
,
3587 if (ha
->srb_mempool
)
3588 mempool_destroy(ha
->srb_mempool
);
3591 dma_free_coherent(&ha
->pdev
->dev
, DCBX_TLV_DATA_SIZE
,
3592 ha
->dcbx_tlv
, ha
->dcbx_tlv_dma
);
3595 dma_free_coherent(&ha
->pdev
->dev
, XGMAC_DATA_SIZE
,
3596 ha
->xgmac_data
, ha
->xgmac_data_dma
);
3599 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
3600 ha
->sns_cmd
, ha
->sns_cmd_dma
);
3603 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
3604 ha
->ct_sns
, ha
->ct_sns_dma
);
3607 dma_pool_free(ha
->s_dma_pool
, ha
->sfp_data
, ha
->sfp_data_dma
);
3610 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
3613 dma_pool_free(ha
->s_dma_pool
,
3614 ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
3617 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
3620 dma_pool_destroy(ha
->s_dma_pool
);
3623 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
3624 ha
->gid_list
, ha
->gid_list_dma
);
3626 if (IS_QLA82XX(ha
)) {
3627 if (!list_empty(&ha
->gbl_dsd_list
)) {
3628 struct dsd_dma
*dsd_ptr
, *tdsd_ptr
;
3630 /* clean up allocated prev pool */
3631 list_for_each_entry_safe(dsd_ptr
,
3632 tdsd_ptr
, &ha
->gbl_dsd_list
, list
) {
3633 dma_pool_free(ha
->dl_dma_pool
,
3634 dsd_ptr
->dsd_addr
, dsd_ptr
->dsd_list_dma
);
3635 list_del(&dsd_ptr
->list
);
3641 if (ha
->dl_dma_pool
)
3642 dma_pool_destroy(ha
->dl_dma_pool
);
3644 if (ha
->fcp_cmnd_dma_pool
)
3645 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
3647 if (ha
->ctx_mempool
)
3648 mempool_destroy(ha
->ctx_mempool
);
3653 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3654 ha
->init_cb
, ha
->init_cb_dma
);
3655 vfree(ha
->optrom_buffer
);
3657 kfree(ha
->npiv_info
);
3659 kfree(ha
->loop_id_map
);
3661 ha
->srb_mempool
= NULL
;
3662 ha
->ctx_mempool
= NULL
;
3664 ha
->sns_cmd_dma
= 0;
3668 ha
->ms_iocb_dma
= 0;
3670 ha
->init_cb_dma
= 0;
3671 ha
->ex_init_cb
= NULL
;
3672 ha
->ex_init_cb_dma
= 0;
3673 ha
->async_pd
= NULL
;
3674 ha
->async_pd_dma
= 0;
3676 ha
->s_dma_pool
= NULL
;
3677 ha
->dl_dma_pool
= NULL
;
3678 ha
->fcp_cmnd_dma_pool
= NULL
;
3680 ha
->gid_list
= NULL
;
3681 ha
->gid_list_dma
= 0;
3683 ha
->tgt
.atio_ring
= NULL
;
3684 ha
->tgt
.atio_dma
= 0;
3685 ha
->tgt
.tgt_vp_map
= NULL
;
3688 struct scsi_qla_host
*qla2x00_create_host(struct scsi_host_template
*sht
,
3689 struct qla_hw_data
*ha
)
3691 struct Scsi_Host
*host
;
3692 struct scsi_qla_host
*vha
= NULL
;
3694 host
= scsi_host_alloc(sht
, sizeof(scsi_qla_host_t
));
3696 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0107,
3697 "Failed to allocate host from the scsi layer, aborting.\n");
3701 /* Clear our data area */
3702 vha
= shost_priv(host
);
3703 memset(vha
, 0, sizeof(scsi_qla_host_t
));
3706 vha
->host_no
= host
->host_no
;
3709 INIT_LIST_HEAD(&vha
->vp_fcports
);
3710 INIT_LIST_HEAD(&vha
->work_list
);
3711 INIT_LIST_HEAD(&vha
->list
);
3713 spin_lock_init(&vha
->work_lock
);
3715 sprintf(vha
->host_str
, "%s_%ld", QLA2XXX_DRIVER_NAME
, vha
->host_no
);
3716 ql_dbg(ql_dbg_init
, vha
, 0x0041,
3717 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3718 vha
->host
, vha
->hw
, vha
,
3719 dev_name(&(ha
->pdev
->dev
)));
3727 static struct qla_work_evt
*
3728 qla2x00_alloc_work(struct scsi_qla_host
*vha
, enum qla_work_type type
)
3730 struct qla_work_evt
*e
;
3733 QLA_VHA_MARK_BUSY(vha
, bail
);
3737 e
= kzalloc(sizeof(struct qla_work_evt
), GFP_ATOMIC
);
3739 QLA_VHA_MARK_NOT_BUSY(vha
);
3743 INIT_LIST_HEAD(&e
->list
);
3745 e
->flags
= QLA_EVT_FLAG_FREE
;
3750 qla2x00_post_work(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
3752 unsigned long flags
;
3754 spin_lock_irqsave(&vha
->work_lock
, flags
);
3755 list_add_tail(&e
->list
, &vha
->work_list
);
3756 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3757 qla2xxx_wake_dpc(vha
);
3763 qla2x00_post_aen_work(struct scsi_qla_host
*vha
, enum fc_host_event_code code
,
3766 struct qla_work_evt
*e
;
3768 e
= qla2x00_alloc_work(vha
, QLA_EVT_AEN
);
3770 return QLA_FUNCTION_FAILED
;
3772 e
->u
.aen
.code
= code
;
3773 e
->u
.aen
.data
= data
;
3774 return qla2x00_post_work(vha
, e
);
3778 qla2x00_post_idc_ack_work(struct scsi_qla_host
*vha
, uint16_t *mb
)
3780 struct qla_work_evt
*e
;
3782 e
= qla2x00_alloc_work(vha
, QLA_EVT_IDC_ACK
);
3784 return QLA_FUNCTION_FAILED
;
3786 memcpy(e
->u
.idc_ack
.mb
, mb
, QLA_IDC_ACK_REGS
* sizeof(uint16_t));
3787 return qla2x00_post_work(vha
, e
);
3790 #define qla2x00_post_async_work(name, type) \
3791 int qla2x00_post_async_##name##_work( \
3792 struct scsi_qla_host *vha, \
3793 fc_port_t *fcport, uint16_t *data) \
3795 struct qla_work_evt *e; \
3797 e = qla2x00_alloc_work(vha, type); \
3799 return QLA_FUNCTION_FAILED; \
3801 e->u.logio.fcport = fcport; \
3803 e->u.logio.data[0] = data[0]; \
3804 e->u.logio.data[1] = data[1]; \
3806 return qla2x00_post_work(vha, e); \
3809 qla2x00_post_async_work(login
, QLA_EVT_ASYNC_LOGIN
);
3810 qla2x00_post_async_work(login_done
, QLA_EVT_ASYNC_LOGIN_DONE
);
3811 qla2x00_post_async_work(logout
, QLA_EVT_ASYNC_LOGOUT
);
3812 qla2x00_post_async_work(logout_done
, QLA_EVT_ASYNC_LOGOUT_DONE
);
3813 qla2x00_post_async_work(adisc
, QLA_EVT_ASYNC_ADISC
);
3814 qla2x00_post_async_work(adisc_done
, QLA_EVT_ASYNC_ADISC_DONE
);
3817 qla2x00_post_uevent_work(struct scsi_qla_host
*vha
, u32 code
)
3819 struct qla_work_evt
*e
;
3821 e
= qla2x00_alloc_work(vha
, QLA_EVT_UEVENT
);
3823 return QLA_FUNCTION_FAILED
;
3825 e
->u
.uevent
.code
= code
;
3826 return qla2x00_post_work(vha
, e
);
3830 qla2x00_uevent_emit(struct scsi_qla_host
*vha
, u32 code
)
3832 char event_string
[40];
3833 char *envp
[] = { event_string
, NULL
};
3836 case QLA_UEVENT_CODE_FW_DUMP
:
3837 snprintf(event_string
, sizeof(event_string
), "FW_DUMP=%ld",
3844 kobject_uevent_env(&vha
->hw
->pdev
->dev
.kobj
, KOBJ_CHANGE
, envp
);
3848 qlafx00_post_aenfx_work(struct scsi_qla_host
*vha
, uint32_t evtcode
,
3849 uint32_t *data
, int cnt
)
3851 struct qla_work_evt
*e
;
3853 e
= qla2x00_alloc_work(vha
, QLA_EVT_AENFX
);
3855 return QLA_FUNCTION_FAILED
;
3857 e
->u
.aenfx
.evtcode
= evtcode
;
3858 e
->u
.aenfx
.count
= cnt
;
3859 memcpy(e
->u
.aenfx
.mbx
, data
, sizeof(*data
) * cnt
);
3860 return qla2x00_post_work(vha
, e
);
3864 qla2x00_do_work(struct scsi_qla_host
*vha
)
3866 struct qla_work_evt
*e
, *tmp
;
3867 unsigned long flags
;
3870 spin_lock_irqsave(&vha
->work_lock
, flags
);
3871 list_splice_init(&vha
->work_list
, &work
);
3872 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
3874 list_for_each_entry_safe(e
, tmp
, &work
, list
) {
3875 list_del_init(&e
->list
);
3879 fc_host_post_event(vha
->host
, fc_get_event_number(),
3880 e
->u
.aen
.code
, e
->u
.aen
.data
);
3882 case QLA_EVT_IDC_ACK
:
3883 qla81xx_idc_ack(vha
, e
->u
.idc_ack
.mb
);
3885 case QLA_EVT_ASYNC_LOGIN
:
3886 qla2x00_async_login(vha
, e
->u
.logio
.fcport
,
3889 case QLA_EVT_ASYNC_LOGIN_DONE
:
3890 qla2x00_async_login_done(vha
, e
->u
.logio
.fcport
,
3893 case QLA_EVT_ASYNC_LOGOUT
:
3894 qla2x00_async_logout(vha
, e
->u
.logio
.fcport
);
3896 case QLA_EVT_ASYNC_LOGOUT_DONE
:
3897 qla2x00_async_logout_done(vha
, e
->u
.logio
.fcport
,
3900 case QLA_EVT_ASYNC_ADISC
:
3901 qla2x00_async_adisc(vha
, e
->u
.logio
.fcport
,
3904 case QLA_EVT_ASYNC_ADISC_DONE
:
3905 qla2x00_async_adisc_done(vha
, e
->u
.logio
.fcport
,
3908 case QLA_EVT_UEVENT
:
3909 qla2x00_uevent_emit(vha
, e
->u
.uevent
.code
);
3912 qlafx00_process_aen(vha
, e
);
3915 if (e
->flags
& QLA_EVT_FLAG_FREE
)
3918 /* For each work completed decrement vha ref count */
3919 QLA_VHA_MARK_NOT_BUSY(vha
);
3923 /* Relogins all the fcports of a vport
3924 * Context: dpc thread
3926 void qla2x00_relogin(struct scsi_qla_host
*vha
)
3930 uint16_t next_loopid
= 0;
3931 struct qla_hw_data
*ha
= vha
->hw
;
3934 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3936 * If the port is not ONLINE then try to login
3937 * to it if we haven't run out of retries.
3939 if (atomic_read(&fcport
->state
) != FCS_ONLINE
&&
3940 fcport
->login_retry
&& !(fcport
->flags
& FCF_ASYNC_SENT
)) {
3941 fcport
->login_retry
--;
3942 if (fcport
->flags
& FCF_FABRIC_DEVICE
) {
3943 if (fcport
->flags
& FCF_FCP2_DEVICE
)
3944 ha
->isp_ops
->fabric_logout(vha
,
3946 fcport
->d_id
.b
.domain
,
3947 fcport
->d_id
.b
.area
,
3948 fcport
->d_id
.b
.al_pa
);
3950 if (fcport
->loop_id
== FC_NO_LOOP_ID
) {
3951 fcport
->loop_id
= next_loopid
=
3952 ha
->min_external_loopid
;
3953 status
= qla2x00_find_new_loop_id(
3955 if (status
!= QLA_SUCCESS
) {
3956 /* Ran out of IDs to use */
3961 if (IS_ALOGIO_CAPABLE(ha
)) {
3962 fcport
->flags
|= FCF_ASYNC_SENT
;
3964 data
[1] = QLA_LOGIO_LOGIN_RETRIED
;
3965 status
= qla2x00_post_async_login_work(
3967 if (status
== QLA_SUCCESS
)
3969 /* Attempt a retry. */
3972 status
= qla2x00_fabric_login(vha
,
3973 fcport
, &next_loopid
);
3974 if (status
== QLA_SUCCESS
) {
3983 qla2x00_get_port_database(
3985 if (status2
!= QLA_SUCCESS
)
3990 status
= qla2x00_local_device_login(vha
,
3993 if (status
== QLA_SUCCESS
) {
3994 fcport
->old_loop_id
= fcport
->loop_id
;
3996 ql_dbg(ql_dbg_disc
, vha
, 0x2003,
3997 "Port login OK: logged in ID 0x%x.\n",
4000 qla2x00_update_fcport(vha
, fcport
);
4002 } else if (status
== 1) {
4003 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
4004 /* retry the login again */
4005 ql_dbg(ql_dbg_disc
, vha
, 0x2007,
4006 "Retrying %d login again loop_id 0x%x.\n",
4007 fcport
->login_retry
, fcport
->loop_id
);
4009 fcport
->login_retry
= 0;
4012 if (fcport
->login_retry
== 0 && status
!= QLA_SUCCESS
)
4013 qla2x00_clear_loop_id(fcport
);
4015 if (test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
))
4020 /* Schedule work on any of the dpc-workqueues */
4022 qla83xx_schedule_work(scsi_qla_host_t
*base_vha
, int work_code
)
4024 struct qla_hw_data
*ha
= base_vha
->hw
;
4026 switch (work_code
) {
4027 case MBA_IDC_AEN
: /* 0x8200 */
4029 queue_work(ha
->dpc_lp_wq
, &ha
->idc_aen
);
4032 case QLA83XX_NIC_CORE_RESET
: /* 0x1 */
4033 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
4035 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_reset
);
4037 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb05e,
4038 "NIC Core reset is already active. Skip "
4039 "scheduling it again.\n");
4041 case QLA83XX_IDC_STATE_HANDLER
: /* 0x2 */
4043 queue_work(ha
->dpc_hp_wq
, &ha
->idc_state_handler
);
4045 case QLA83XX_NIC_CORE_UNRECOVERABLE
: /* 0x3 */
4047 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_unrecoverable
);
4050 ql_log(ql_log_warn
, base_vha
, 0xb05f,
4051 "Unknow work-code=0x%x.\n", work_code
);
4057 /* Work: Perform NIC Core Unrecoverable state handling */
4059 qla83xx_nic_core_unrecoverable_work(struct work_struct
*work
)
4061 struct qla_hw_data
*ha
=
4062 container_of(work
, struct qla_hw_data
, nic_core_unrecoverable
);
4063 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4064 uint32_t dev_state
= 0;
4066 qla83xx_idc_lock(base_vha
, 0);
4067 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4068 qla83xx_reset_ownership(base_vha
);
4069 if (ha
->flags
.nic_core_reset_owner
) {
4070 ha
->flags
.nic_core_reset_owner
= 0;
4071 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4072 QLA8XXX_DEV_FAILED
);
4073 ql_log(ql_log_info
, base_vha
, 0xb060, "HW State: FAILED.\n");
4074 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
4076 qla83xx_idc_unlock(base_vha
, 0);
4079 /* Work: Execute IDC state handler */
4081 qla83xx_idc_state_handler_work(struct work_struct
*work
)
4083 struct qla_hw_data
*ha
=
4084 container_of(work
, struct qla_hw_data
, idc_state_handler
);
4085 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4086 uint32_t dev_state
= 0;
4088 qla83xx_idc_lock(base_vha
, 0);
4089 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4090 if (dev_state
== QLA8XXX_DEV_FAILED
||
4091 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
)
4092 qla83xx_idc_state_handler(base_vha
);
4093 qla83xx_idc_unlock(base_vha
, 0);
4097 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t
*base_vha
)
4099 int rval
= QLA_SUCCESS
;
4100 unsigned long heart_beat_wait
= jiffies
+ (1 * HZ
);
4101 uint32_t heart_beat_counter1
, heart_beat_counter2
;
4104 if (time_after(jiffies
, heart_beat_wait
)) {
4105 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07c,
4106 "Nic Core f/w is not alive.\n");
4107 rval
= QLA_FUNCTION_FAILED
;
4111 qla83xx_idc_lock(base_vha
, 0);
4112 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
4113 &heart_beat_counter1
);
4114 qla83xx_idc_unlock(base_vha
, 0);
4116 qla83xx_idc_lock(base_vha
, 0);
4117 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
4118 &heart_beat_counter2
);
4119 qla83xx_idc_unlock(base_vha
, 0);
4120 } while (heart_beat_counter1
== heart_beat_counter2
);
4125 /* Work: Perform NIC Core Reset handling */
4127 qla83xx_nic_core_reset_work(struct work_struct
*work
)
4129 struct qla_hw_data
*ha
=
4130 container_of(work
, struct qla_hw_data
, nic_core_reset
);
4131 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4132 uint32_t dev_state
= 0;
4134 if (IS_QLA2031(ha
)) {
4135 if (qla2xxx_mctp_dump(base_vha
) != QLA_SUCCESS
)
4136 ql_log(ql_log_warn
, base_vha
, 0xb081,
4137 "Failed to dump mctp\n");
4141 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
4142 if (qla83xx_check_nic_core_fw_alive(base_vha
) == QLA_SUCCESS
) {
4143 qla83xx_idc_lock(base_vha
, 0);
4144 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4146 qla83xx_idc_unlock(base_vha
, 0);
4147 if (dev_state
!= QLA8XXX_DEV_NEED_RESET
) {
4148 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07a,
4149 "Nic Core f/w is alive.\n");
4154 ha
->flags
.nic_core_reset_hdlr_active
= 1;
4155 if (qla83xx_nic_core_reset(base_vha
)) {
4156 /* NIC Core reset failed. */
4157 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb061,
4158 "NIC Core reset failed.\n");
4160 ha
->flags
.nic_core_reset_hdlr_active
= 0;
4164 /* Work: Handle 8200 IDC aens */
4166 qla83xx_service_idc_aen(struct work_struct
*work
)
4168 struct qla_hw_data
*ha
=
4169 container_of(work
, struct qla_hw_data
, idc_aen
);
4170 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
4171 uint32_t dev_state
, idc_control
;
4173 qla83xx_idc_lock(base_vha
, 0);
4174 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4175 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_CONTROL
, &idc_control
);
4176 qla83xx_idc_unlock(base_vha
, 0);
4177 if (dev_state
== QLA8XXX_DEV_NEED_RESET
) {
4178 if (idc_control
& QLA83XX_IDC_GRACEFUL_RESET
) {
4179 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb062,
4180 "Application requested NIC Core Reset.\n");
4181 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4182 } else if (qla83xx_check_nic_core_fw_alive(base_vha
) ==
4184 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07b,
4185 "Other protocol driver requested NIC Core Reset.\n");
4186 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
4188 } else if (dev_state
== QLA8XXX_DEV_FAILED
||
4189 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
) {
4190 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
4195 qla83xx_wait_logic(void)
4200 if (!in_interrupt()) {
4202 * Wait about 200ms before retrying again.
4203 * This controls the number of retries for single
4209 for (i
= 0; i
< 20; i
++)
4210 cpu_relax(); /* This a nop instr on i386 */
4215 qla83xx_force_lock_recovery(scsi_qla_host_t
*base_vha
)
4219 uint32_t idc_lck_rcvry_stage_mask
= 0x3;
4220 uint32_t idc_lck_rcvry_owner_mask
= 0x3c;
4221 struct qla_hw_data
*ha
= base_vha
->hw
;
4222 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb086,
4223 "Trying force recovery of the IDC lock.\n");
4225 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
, &data
);
4229 if ((data
& idc_lck_rcvry_stage_mask
) > 0) {
4232 data
= (IDC_LOCK_RECOVERY_STAGE1
) | (ha
->portnum
<< 2);
4233 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4240 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
4245 if (((data
& idc_lck_rcvry_owner_mask
) >> 2) == ha
->portnum
) {
4246 data
&= (IDC_LOCK_RECOVERY_STAGE2
|
4247 ~(idc_lck_rcvry_stage_mask
));
4248 rval
= qla83xx_wr_reg(base_vha
,
4249 QLA83XX_IDC_LOCK_RECOVERY
, data
);
4253 /* Forcefully perform IDC UnLock */
4254 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
,
4258 /* Clear lock-id by setting 0xff */
4259 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4263 /* Clear lock-recovery by setting 0x0 */
4264 rval
= qla83xx_wr_reg(base_vha
,
4265 QLA83XX_IDC_LOCK_RECOVERY
, 0x0);
4276 qla83xx_idc_lock_recovery(scsi_qla_host_t
*base_vha
)
4278 int rval
= QLA_SUCCESS
;
4279 uint32_t o_drv_lockid
, n_drv_lockid
;
4280 unsigned long lock_recovery_timeout
;
4282 lock_recovery_timeout
= jiffies
+ QLA83XX_MAX_LOCK_RECOVERY_WAIT
;
4284 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &o_drv_lockid
);
4288 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4289 if (time_after_eq(jiffies
, lock_recovery_timeout
)) {
4290 if (qla83xx_force_lock_recovery(base_vha
) == QLA_SUCCESS
)
4293 return QLA_FUNCTION_FAILED
;
4296 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &n_drv_lockid
);
4300 if (o_drv_lockid
== n_drv_lockid
) {
4301 qla83xx_wait_logic();
4311 qla83xx_idc_lock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4313 uint16_t options
= (requester_id
<< 15) | BIT_6
;
4315 uint32_t lock_owner
;
4316 struct qla_hw_data
*ha
= base_vha
->hw
;
4318 /* IDC-lock implementation using driver-lock/lock-id remote registers */
4320 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCK
, &data
)
4323 /* Setting lock-id to our function-number */
4324 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4327 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
4329 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb063,
4330 "Failed to acquire IDC lock, acquired by %d, "
4331 "retrying...\n", lock_owner
);
4333 /* Retry/Perform IDC-Lock recovery */
4334 if (qla83xx_idc_lock_recovery(base_vha
)
4336 qla83xx_wait_logic();
4339 ql_log(ql_log_warn
, base_vha
, 0xb075,
4340 "IDC Lock recovery FAILED.\n");
4347 /* XXX: IDC-lock implementation using access-control mbx */
4349 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4350 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb072,
4351 "Failed to acquire IDC lock. retrying...\n");
4352 /* Retry/Perform IDC-Lock recovery */
4353 if (qla83xx_idc_lock_recovery(base_vha
) == QLA_SUCCESS
) {
4354 qla83xx_wait_logic();
4357 ql_log(ql_log_warn
, base_vha
, 0xb076,
4358 "IDC Lock recovery FAILED.\n");
4365 qla83xx_idc_unlock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
4367 uint16_t options
= (requester_id
<< 15) | BIT_7
, retry
;
4369 struct qla_hw_data
*ha
= base_vha
->hw
;
4371 /* IDC-unlock implementation using driver-unlock/lock-id
4376 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &data
)
4378 if (data
== ha
->portnum
) {
4379 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
, &data
);
4380 /* Clearing lock-id by setting 0xff */
4381 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, 0xff);
4382 } else if (retry
< 10) {
4383 /* SV: XXX: IDC unlock retrying needed here? */
4385 /* Retry for IDC-unlock */
4386 qla83xx_wait_logic();
4388 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb064,
4389 "Failed to release IDC lock, retyring=%d\n", retry
);
4392 } else if (retry
< 10) {
4393 /* Retry for IDC-unlock */
4394 qla83xx_wait_logic();
4396 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb065,
4397 "Failed to read drv-lockid, retyring=%d\n", retry
);
4403 /* XXX: IDC-unlock implementation using access-control mbx */
4406 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
4408 /* Retry for IDC-unlock */
4409 qla83xx_wait_logic();
4411 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb066,
4412 "Failed to release IDC lock, retyring=%d\n", retry
);
4421 __qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4423 int rval
= QLA_SUCCESS
;
4424 struct qla_hw_data
*ha
= vha
->hw
;
4425 uint32_t drv_presence
;
4427 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4428 if (rval
== QLA_SUCCESS
) {
4429 drv_presence
|= (1 << ha
->portnum
);
4430 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4438 qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
4440 int rval
= QLA_SUCCESS
;
4442 qla83xx_idc_lock(vha
, 0);
4443 rval
= __qla83xx_set_drv_presence(vha
);
4444 qla83xx_idc_unlock(vha
, 0);
4450 __qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4452 int rval
= QLA_SUCCESS
;
4453 struct qla_hw_data
*ha
= vha
->hw
;
4454 uint32_t drv_presence
;
4456 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4457 if (rval
== QLA_SUCCESS
) {
4458 drv_presence
&= ~(1 << ha
->portnum
);
4459 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4467 qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
4469 int rval
= QLA_SUCCESS
;
4471 qla83xx_idc_lock(vha
, 0);
4472 rval
= __qla83xx_clear_drv_presence(vha
);
4473 qla83xx_idc_unlock(vha
, 0);
4479 qla83xx_need_reset_handler(scsi_qla_host_t
*vha
)
4481 struct qla_hw_data
*ha
= vha
->hw
;
4482 uint32_t drv_ack
, drv_presence
;
4483 unsigned long ack_timeout
;
4485 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4486 ack_timeout
= jiffies
+ (ha
->fcoe_reset_timeout
* HZ
);
4488 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRIVER_ACK
, &drv_ack
);
4489 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
4490 if ((drv_ack
& drv_presence
) == drv_presence
)
4493 if (time_after_eq(jiffies
, ack_timeout
)) {
4494 ql_log(ql_log_warn
, vha
, 0xb067,
4495 "RESET ACK TIMEOUT! drv_presence=0x%x "
4496 "drv_ack=0x%x\n", drv_presence
, drv_ack
);
4498 * The function(s) which did not ack in time are forced
4499 * to withdraw any further participation in the IDC
4502 if (drv_ack
!= drv_presence
)
4503 qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
4508 qla83xx_idc_unlock(vha
, 0);
4510 qla83xx_idc_lock(vha
, 0);
4513 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_COLD
);
4514 ql_log(ql_log_info
, vha
, 0xb068, "HW State: COLD/RE-INIT.\n");
4518 qla83xx_device_bootstrap(scsi_qla_host_t
*vha
)
4520 int rval
= QLA_SUCCESS
;
4521 uint32_t idc_control
;
4523 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_INITIALIZING
);
4524 ql_log(ql_log_info
, vha
, 0xb069, "HW State: INITIALIZING.\n");
4526 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4527 __qla83xx_get_idc_control(vha
, &idc_control
);
4528 idc_control
&= ~QLA83XX_IDC_GRACEFUL_RESET
;
4529 __qla83xx_set_idc_control(vha
, 0);
4531 qla83xx_idc_unlock(vha
, 0);
4532 rval
= qla83xx_restart_nic_firmware(vha
);
4533 qla83xx_idc_lock(vha
, 0);
4535 if (rval
!= QLA_SUCCESS
) {
4536 ql_log(ql_log_fatal
, vha
, 0xb06a,
4537 "Failed to restart NIC f/w.\n");
4538 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_FAILED
);
4539 ql_log(ql_log_info
, vha
, 0xb06b, "HW State: FAILED.\n");
4541 ql_dbg(ql_dbg_p3p
, vha
, 0xb06c,
4542 "Success in restarting nic f/w.\n");
4543 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_READY
);
4544 ql_log(ql_log_info
, vha
, 0xb06d, "HW State: READY.\n");
4550 /* Assumes idc_lock always held on entry */
4552 qla83xx_idc_state_handler(scsi_qla_host_t
*base_vha
)
4554 struct qla_hw_data
*ha
= base_vha
->hw
;
4555 int rval
= QLA_SUCCESS
;
4556 unsigned long dev_init_timeout
;
4559 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4560 dev_init_timeout
= jiffies
+ (ha
->fcoe_dev_init_timeout
* HZ
);
4564 if (time_after_eq(jiffies
, dev_init_timeout
)) {
4565 ql_log(ql_log_warn
, base_vha
, 0xb06e,
4566 "Initialization TIMEOUT!\n");
4567 /* Init timeout. Disable further NIC Core
4570 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
4571 QLA8XXX_DEV_FAILED
);
4572 ql_log(ql_log_info
, base_vha
, 0xb06f,
4573 "HW State: FAILED.\n");
4576 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
4577 switch (dev_state
) {
4578 case QLA8XXX_DEV_READY
:
4579 if (ha
->flags
.nic_core_reset_owner
)
4580 qla83xx_idc_audit(base_vha
,
4581 IDC_AUDIT_COMPLETION
);
4582 ha
->flags
.nic_core_reset_owner
= 0;
4583 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb070,
4584 "Reset_owner reset by 0x%x.\n",
4587 case QLA8XXX_DEV_COLD
:
4588 if (ha
->flags
.nic_core_reset_owner
)
4589 rval
= qla83xx_device_bootstrap(base_vha
);
4591 /* Wait for AEN to change device-state */
4592 qla83xx_idc_unlock(base_vha
, 0);
4594 qla83xx_idc_lock(base_vha
, 0);
4597 case QLA8XXX_DEV_INITIALIZING
:
4598 /* Wait for AEN to change device-state */
4599 qla83xx_idc_unlock(base_vha
, 0);
4601 qla83xx_idc_lock(base_vha
, 0);
4603 case QLA8XXX_DEV_NEED_RESET
:
4604 if (!ql2xdontresethba
&& ha
->flags
.nic_core_reset_owner
)
4605 qla83xx_need_reset_handler(base_vha
);
4607 /* Wait for AEN to change device-state */
4608 qla83xx_idc_unlock(base_vha
, 0);
4610 qla83xx_idc_lock(base_vha
, 0);
4612 /* reset timeout value after need reset handler */
4613 dev_init_timeout
= jiffies
+
4614 (ha
->fcoe_dev_init_timeout
* HZ
);
4616 case QLA8XXX_DEV_NEED_QUIESCENT
:
4617 /* XXX: DEBUG for now */
4618 qla83xx_idc_unlock(base_vha
, 0);
4620 qla83xx_idc_lock(base_vha
, 0);
4622 case QLA8XXX_DEV_QUIESCENT
:
4623 /* XXX: DEBUG for now */
4624 if (ha
->flags
.quiesce_owner
)
4627 qla83xx_idc_unlock(base_vha
, 0);
4629 qla83xx_idc_lock(base_vha
, 0);
4630 dev_init_timeout
= jiffies
+
4631 (ha
->fcoe_dev_init_timeout
* HZ
);
4633 case QLA8XXX_DEV_FAILED
:
4634 if (ha
->flags
.nic_core_reset_owner
)
4635 qla83xx_idc_audit(base_vha
,
4636 IDC_AUDIT_COMPLETION
);
4637 ha
->flags
.nic_core_reset_owner
= 0;
4638 __qla83xx_clear_drv_presence(base_vha
);
4639 qla83xx_idc_unlock(base_vha
, 0);
4640 qla8xxx_dev_failed_handler(base_vha
);
4641 rval
= QLA_FUNCTION_FAILED
;
4642 qla83xx_idc_lock(base_vha
, 0);
4644 case QLA8XXX_BAD_VALUE
:
4645 qla83xx_idc_unlock(base_vha
, 0);
4647 qla83xx_idc_lock(base_vha
, 0);
4650 ql_log(ql_log_warn
, base_vha
, 0xb071,
4651 "Unknow Device State: %x.\n", dev_state
);
4652 qla83xx_idc_unlock(base_vha
, 0);
4653 qla8xxx_dev_failed_handler(base_vha
);
4654 rval
= QLA_FUNCTION_FAILED
;
4655 qla83xx_idc_lock(base_vha
, 0);
4664 /**************************************************************************
4666 * This kernel thread is a task that is schedule by the interrupt handler
4667 * to perform the background processing for interrupts.
4670 * This task always run in the context of a kernel thread. It
4671 * is kick-off by the driver's detect code and starts up
4672 * up one per adapter. It immediately goes to sleep and waits for
4673 * some fibre event. When either the interrupt handler or
4674 * the timer routine detects a event it will one of the task
4675 * bits then wake us up.
4676 **************************************************************************/
4678 qla2x00_do_dpc(void *data
)
4681 scsi_qla_host_t
*base_vha
;
4682 struct qla_hw_data
*ha
;
4684 ha
= (struct qla_hw_data
*)data
;
4685 base_vha
= pci_get_drvdata(ha
->pdev
);
4687 set_user_nice(current
, -20);
4689 set_current_state(TASK_INTERRUPTIBLE
);
4690 while (!kthread_should_stop()) {
4691 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4000,
4692 "DPC handler sleeping.\n");
4695 __set_current_state(TASK_RUNNING
);
4697 if (!base_vha
->flags
.init_done
|| ha
->flags
.mbox_busy
)
4700 if (ha
->flags
.eeh_busy
) {
4701 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4003,
4702 "eeh_busy=%d.\n", ha
->flags
.eeh_busy
);
4708 ql_dbg(ql_dbg_dpc
+ ql_dbg_verbose
, base_vha
, 0x4001,
4709 "DPC handler waking up, dpc_flags=0x%lx.\n",
4710 base_vha
->dpc_flags
);
4712 qla2x00_do_work(base_vha
);
4714 if (IS_QLA82XX(ha
)) {
4715 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4716 &base_vha
->dpc_flags
)) {
4717 qla82xx_idc_lock(ha
);
4718 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
4719 QLA8XXX_DEV_FAILED
);
4720 qla82xx_idc_unlock(ha
);
4721 ql_log(ql_log_info
, base_vha
, 0x4004,
4722 "HW State: FAILED.\n");
4723 qla82xx_device_state_handler(base_vha
);
4727 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED
,
4728 &base_vha
->dpc_flags
)) {
4730 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4005,
4731 "FCoE context reset scheduled.\n");
4732 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4733 &base_vha
->dpc_flags
))) {
4734 if (qla82xx_fcoe_ctx_reset(base_vha
)) {
4735 /* FCoE-ctx reset failed.
4736 * Escalate to chip-reset
4738 set_bit(ISP_ABORT_NEEDED
,
4739 &base_vha
->dpc_flags
);
4741 clear_bit(ABORT_ISP_ACTIVE
,
4742 &base_vha
->dpc_flags
);
4745 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4006,
4746 "FCoE context reset end.\n");
4748 } else if (IS_QLAFX00(ha
)) {
4749 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
4750 &base_vha
->dpc_flags
)) {
4751 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4020,
4752 "Firmware Reset Recovery\n");
4753 if (qlafx00_reset_initialize(base_vha
)) {
4754 /* Failed. Abort isp later. */
4755 if (!test_bit(UNLOADING
,
4756 &base_vha
->dpc_flags
))
4757 set_bit(ISP_UNRECOVERABLE
,
4758 &base_vha
->dpc_flags
);
4759 ql_dbg(ql_dbg_dpc
, base_vha
,
4761 "Reset Recovery Failed\n");
4765 if (test_and_clear_bit(FX00_TARGET_SCAN
,
4766 &base_vha
->dpc_flags
)) {
4767 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4022,
4768 "ISPFx00 Target Scan scheduled\n");
4769 if (qlafx00_rescan_isp(base_vha
)) {
4770 if (!test_bit(UNLOADING
,
4771 &base_vha
->dpc_flags
))
4772 set_bit(ISP_UNRECOVERABLE
,
4773 &base_vha
->dpc_flags
);
4774 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401e,
4775 "ISPFx00 Target Scan Failed\n");
4777 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401f,
4778 "ISPFx00 Target Scan End\n");
4782 if (test_and_clear_bit(ISP_ABORT_NEEDED
,
4783 &base_vha
->dpc_flags
)) {
4785 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4007,
4786 "ISP abort scheduled.\n");
4787 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
4788 &base_vha
->dpc_flags
))) {
4790 if (ha
->isp_ops
->abort_isp(base_vha
)) {
4791 /* failed. retry later */
4792 set_bit(ISP_ABORT_NEEDED
,
4793 &base_vha
->dpc_flags
);
4795 clear_bit(ABORT_ISP_ACTIVE
,
4796 &base_vha
->dpc_flags
);
4799 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4008,
4800 "ISP abort end.\n");
4803 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED
,
4804 &base_vha
->dpc_flags
)) {
4805 qla2x00_update_fcports(base_vha
);
4808 if (test_bit(SCR_PENDING
, &base_vha
->dpc_flags
)) {
4810 ret
= qla2x00_send_change_request(base_vha
, 0x3, 0);
4811 if (ret
!= QLA_SUCCESS
)
4812 ql_log(ql_log_warn
, base_vha
, 0x121,
4813 "Failed to enable receiving of RSCN "
4814 "requests: 0x%x.\n", ret
);
4815 clear_bit(SCR_PENDING
, &base_vha
->dpc_flags
);
4819 goto loop_resync_check
;
4821 if (test_bit(ISP_QUIESCE_NEEDED
, &base_vha
->dpc_flags
)) {
4822 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4009,
4823 "Quiescence mode scheduled.\n");
4824 if (IS_QLA82XX(ha
)) {
4825 qla82xx_device_state_handler(base_vha
);
4826 clear_bit(ISP_QUIESCE_NEEDED
,
4827 &base_vha
->dpc_flags
);
4828 if (!ha
->flags
.quiesce_owner
) {
4829 qla2x00_perform_loop_resync(base_vha
);
4831 qla82xx_idc_lock(ha
);
4832 qla82xx_clear_qsnt_ready(base_vha
);
4833 qla82xx_idc_unlock(ha
);
4836 clear_bit(ISP_QUIESCE_NEEDED
,
4837 &base_vha
->dpc_flags
);
4838 qla2x00_quiesce_io(base_vha
);
4840 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400a,
4841 "Quiescence mode end.\n");
4844 if (test_and_clear_bit(RESET_MARKER_NEEDED
,
4845 &base_vha
->dpc_flags
) &&
4846 (!(test_and_set_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
)))) {
4848 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400b,
4849 "Reset marker scheduled.\n");
4850 qla2x00_rst_aen(base_vha
);
4851 clear_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
);
4852 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400c,
4853 "Reset marker end.\n");
4856 /* Retry each device up to login retry count */
4857 if ((test_and_clear_bit(RELOGIN_NEEDED
,
4858 &base_vha
->dpc_flags
)) &&
4859 !test_bit(LOOP_RESYNC_NEEDED
, &base_vha
->dpc_flags
) &&
4860 atomic_read(&base_vha
->loop_state
) != LOOP_DOWN
) {
4862 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400d,
4863 "Relogin scheduled.\n");
4864 qla2x00_relogin(base_vha
);
4865 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400e,
4869 if (test_and_clear_bit(LOOP_RESYNC_NEEDED
,
4870 &base_vha
->dpc_flags
)) {
4872 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400f,
4873 "Loop resync scheduled.\n");
4875 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE
,
4876 &base_vha
->dpc_flags
))) {
4878 rval
= qla2x00_loop_resync(base_vha
);
4880 clear_bit(LOOP_RESYNC_ACTIVE
,
4881 &base_vha
->dpc_flags
);
4884 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4010,
4885 "Loop resync end.\n");
4891 if (test_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
) &&
4892 atomic_read(&base_vha
->loop_state
) == LOOP_READY
) {
4893 clear_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
);
4894 qla2xxx_flash_npiv_conf(base_vha
);
4897 if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
,
4898 &base_vha
->dpc_flags
)) {
4899 /* Prevents simultaneous ramp up and down */
4900 clear_bit(HOST_RAMP_UP_QUEUE_DEPTH
,
4901 &base_vha
->dpc_flags
);
4902 qla2x00_host_ramp_down_queuedepth(base_vha
);
4905 if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH
,
4906 &base_vha
->dpc_flags
))
4907 qla2x00_host_ramp_up_queuedepth(base_vha
);
4909 if (!ha
->interrupts_on
)
4910 ha
->isp_ops
->enable_intrs(ha
);
4912 if (test_and_clear_bit(BEACON_BLINK_NEEDED
,
4913 &base_vha
->dpc_flags
))
4914 ha
->isp_ops
->beacon_blink(base_vha
);
4916 if (!IS_QLAFX00(ha
))
4917 qla2x00_do_dpc_all_vps(base_vha
);
4921 set_current_state(TASK_INTERRUPTIBLE
);
4922 } /* End of while(1) */
4923 __set_current_state(TASK_RUNNING
);
4925 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4011,
4926 "DPC handler exiting.\n");
4929 * Make sure that nobody tries to wake us up again.
4933 /* Cleanup any residual CTX SRBs. */
4934 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
4940 qla2xxx_wake_dpc(struct scsi_qla_host
*vha
)
4942 struct qla_hw_data
*ha
= vha
->hw
;
4943 struct task_struct
*t
= ha
->dpc_thread
;
4945 if (!test_bit(UNLOADING
, &vha
->dpc_flags
) && t
)
4951 * Processes asynchronous reset.
4954 * ha = adapter block pointer.
4957 qla2x00_rst_aen(scsi_qla_host_t
*vha
)
4959 if (vha
->flags
.online
&& !vha
->flags
.reset_active
&&
4960 !atomic_read(&vha
->loop_down_timer
) &&
4961 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
))) {
4963 clear_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
);
4966 * Issue marker command only when we are going to start
4969 vha
->marker_needed
= 1;
4970 } while (!atomic_read(&vha
->loop_down_timer
) &&
4971 (test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
)));
4975 /**************************************************************************
4981 * Context: Interrupt
4982 ***************************************************************************/
4984 qla2x00_timer(scsi_qla_host_t
*vha
)
4986 unsigned long cpu_flags
= 0;
4991 struct qla_hw_data
*ha
= vha
->hw
;
4992 struct req_que
*req
;
4994 if (ha
->flags
.eeh_busy
) {
4995 ql_dbg(ql_dbg_timer
, vha
, 0x6000,
4996 "EEH = %d, restarting timer.\n",
4997 ha
->flags
.eeh_busy
);
4998 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
5002 /* Hardware read to raise pending EEH errors during mailbox waits. */
5003 if (!pci_channel_offline(ha
->pdev
))
5004 pci_read_config_word(ha
->pdev
, PCI_VENDOR_ID
, &w
);
5006 /* Make sure qla82xx_watchdog is run only for physical port */
5007 if (!vha
->vp_idx
&& IS_QLA82XX(ha
)) {
5008 if (test_bit(ISP_QUIESCE_NEEDED
, &vha
->dpc_flags
))
5010 qla82xx_watchdog(vha
);
5013 if (!vha
->vp_idx
&& IS_QLAFX00(ha
))
5014 qlafx00_timer_routine(vha
);
5016 /* Loop down handler. */
5017 if (atomic_read(&vha
->loop_down_timer
) > 0 &&
5018 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
)) &&
5019 !(test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
))
5020 && vha
->flags
.online
) {
5022 if (atomic_read(&vha
->loop_down_timer
) ==
5023 vha
->loop_down_abort_time
) {
5025 ql_log(ql_log_info
, vha
, 0x6008,
5026 "Loop down - aborting the queues before time expires.\n");
5028 if (!IS_QLA2100(ha
) && vha
->link_down_timeout
)
5029 atomic_set(&vha
->loop_state
, LOOP_DEAD
);
5032 * Schedule an ISP abort to return any FCP2-device
5035 /* NPIV - scan physical port only */
5037 spin_lock_irqsave(&ha
->hardware_lock
,
5039 req
= ha
->req_q_map
[0];
5041 index
< req
->num_outstanding_cmds
;
5045 sp
= req
->outstanding_cmds
[index
];
5048 if (sp
->type
!= SRB_SCSI_CMD
)
5051 if (!(sfcp
->flags
& FCF_FCP2_DEVICE
))
5055 set_bit(FCOE_CTX_RESET_NEEDED
,
5058 set_bit(ISP_ABORT_NEEDED
,
5062 spin_unlock_irqrestore(&ha
->hardware_lock
,
5068 /* if the loop has been down for 4 minutes, reinit adapter */
5069 if (atomic_dec_and_test(&vha
->loop_down_timer
) != 0) {
5070 if (!(vha
->device_flags
& DFLG_NO_CABLE
)) {
5071 ql_log(ql_log_warn
, vha
, 0x6009,
5072 "Loop down - aborting ISP.\n");
5075 set_bit(FCOE_CTX_RESET_NEEDED
,
5078 set_bit(ISP_ABORT_NEEDED
,
5082 ql_dbg(ql_dbg_timer
, vha
, 0x600a,
5083 "Loop down - seconds remaining %d.\n",
5084 atomic_read(&vha
->loop_down_timer
));
5087 /* Check if beacon LED needs to be blinked for physical host only */
5088 if (!vha
->vp_idx
&& (ha
->beacon_blink_led
== 1)) {
5089 /* There is no beacon_blink function for ISP82xx */
5090 if (!IS_QLA82XX(ha
)) {
5091 set_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
);
5096 /* Process any deferred work. */
5097 if (!list_empty(&vha
->work_list
))
5100 /* Schedule the DPC routine if needed */
5101 if ((test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
) ||
5102 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
) ||
5103 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
) ||
5105 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
) ||
5106 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
) ||
5107 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
) ||
5108 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
) ||
5109 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
) ||
5110 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
) ||
5111 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
) ||
5112 test_bit(HOST_RAMP_UP_QUEUE_DEPTH
, &vha
->dpc_flags
))) {
5113 ql_dbg(ql_dbg_timer
, vha
, 0x600b,
5114 "isp_abort_needed=%d loop_resync_needed=%d "
5115 "fcport_update_needed=%d start_dpc=%d "
5116 "reset_marker_needed=%d",
5117 test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
),
5118 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
),
5119 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
),
5121 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
));
5122 ql_dbg(ql_dbg_timer
, vha
, 0x600c,
5123 "beacon_blink_needed=%d isp_unrecoverable=%d "
5124 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5125 "relogin_needed=%d, host_ramp_down_needed=%d "
5126 "host_ramp_up_needed=%d.\n",
5127 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
),
5128 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
),
5129 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
),
5130 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
),
5131 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
),
5132 test_bit(HOST_RAMP_UP_QUEUE_DEPTH
, &vha
->dpc_flags
),
5133 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH
, &vha
->dpc_flags
));
5134 qla2xxx_wake_dpc(vha
);
5137 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
5140 /* Firmware interface routines. */
5143 #define FW_ISP21XX 0
5144 #define FW_ISP22XX 1
5145 #define FW_ISP2300 2
5146 #define FW_ISP2322 3
5147 #define FW_ISP24XX 4
5148 #define FW_ISP25XX 5
5149 #define FW_ISP81XX 6
5150 #define FW_ISP82XX 7
5151 #define FW_ISP2031 8
5152 #define FW_ISP8031 9
5154 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5155 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5156 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5157 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5158 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5159 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5160 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5161 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5162 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5163 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5165 static DEFINE_MUTEX(qla_fw_lock
);
5167 static struct fw_blob qla_fw_blobs
[FW_BLOBS
] = {
5168 { .name
= FW_FILE_ISP21XX
, .segs
= { 0x1000, 0 }, },
5169 { .name
= FW_FILE_ISP22XX
, .segs
= { 0x1000, 0 }, },
5170 { .name
= FW_FILE_ISP2300
, .segs
= { 0x800, 0 }, },
5171 { .name
= FW_FILE_ISP2322
, .segs
= { 0x800, 0x1c000, 0x1e000, 0 }, },
5172 { .name
= FW_FILE_ISP24XX
, },
5173 { .name
= FW_FILE_ISP25XX
, },
5174 { .name
= FW_FILE_ISP81XX
, },
5175 { .name
= FW_FILE_ISP82XX
, },
5176 { .name
= FW_FILE_ISP2031
, },
5177 { .name
= FW_FILE_ISP8031
, },
5181 qla2x00_request_firmware(scsi_qla_host_t
*vha
)
5183 struct qla_hw_data
*ha
= vha
->hw
;
5184 struct fw_blob
*blob
;
5186 if (IS_QLA2100(ha
)) {
5187 blob
= &qla_fw_blobs
[FW_ISP21XX
];
5188 } else if (IS_QLA2200(ha
)) {
5189 blob
= &qla_fw_blobs
[FW_ISP22XX
];
5190 } else if (IS_QLA2300(ha
) || IS_QLA2312(ha
) || IS_QLA6312(ha
)) {
5191 blob
= &qla_fw_blobs
[FW_ISP2300
];
5192 } else if (IS_QLA2322(ha
) || IS_QLA6322(ha
)) {
5193 blob
= &qla_fw_blobs
[FW_ISP2322
];
5194 } else if (IS_QLA24XX_TYPE(ha
)) {
5195 blob
= &qla_fw_blobs
[FW_ISP24XX
];
5196 } else if (IS_QLA25XX(ha
)) {
5197 blob
= &qla_fw_blobs
[FW_ISP25XX
];
5198 } else if (IS_QLA81XX(ha
)) {
5199 blob
= &qla_fw_blobs
[FW_ISP81XX
];
5200 } else if (IS_QLA82XX(ha
)) {
5201 blob
= &qla_fw_blobs
[FW_ISP82XX
];
5202 } else if (IS_QLA2031(ha
)) {
5203 blob
= &qla_fw_blobs
[FW_ISP2031
];
5204 } else if (IS_QLA8031(ha
)) {
5205 blob
= &qla_fw_blobs
[FW_ISP8031
];
5210 mutex_lock(&qla_fw_lock
);
5214 if (request_firmware(&blob
->fw
, blob
->name
, &ha
->pdev
->dev
)) {
5215 ql_log(ql_log_warn
, vha
, 0x0063,
5216 "Failed to load firmware image (%s).\n", blob
->name
);
5223 mutex_unlock(&qla_fw_lock
);
5228 qla2x00_release_firmware(void)
5232 mutex_lock(&qla_fw_lock
);
5233 for (idx
= 0; idx
< FW_BLOBS
; idx
++)
5234 release_firmware(qla_fw_blobs
[idx
].fw
);
5235 mutex_unlock(&qla_fw_lock
);
5238 static pci_ers_result_t
5239 qla2xxx_pci_error_detected(struct pci_dev
*pdev
, pci_channel_state_t state
)
5241 scsi_qla_host_t
*vha
= pci_get_drvdata(pdev
);
5242 struct qla_hw_data
*ha
= vha
->hw
;
5244 ql_dbg(ql_dbg_aer
, vha
, 0x9000,
5245 "PCI error detected, state %x.\n", state
);
5248 case pci_channel_io_normal
:
5249 ha
->flags
.eeh_busy
= 0;
5250 return PCI_ERS_RESULT_CAN_RECOVER
;
5251 case pci_channel_io_frozen
:
5252 ha
->flags
.eeh_busy
= 1;
5253 /* For ISP82XX complete any pending mailbox cmd */
5254 if (IS_QLA82XX(ha
)) {
5255 ha
->flags
.isp82xx_fw_hung
= 1;
5256 ql_dbg(ql_dbg_aer
, vha
, 0x9001, "Pci channel io frozen\n");
5257 qla82xx_clear_pending_mbx(vha
);
5259 qla2x00_free_irqs(vha
);
5260 pci_disable_device(pdev
);
5261 /* Return back all IOs */
5262 qla2x00_abort_all_cmds(vha
, DID_RESET
<< 16);
5263 return PCI_ERS_RESULT_NEED_RESET
;
5264 case pci_channel_io_perm_failure
:
5265 ha
->flags
.pci_channel_io_perm_failure
= 1;
5266 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
5267 return PCI_ERS_RESULT_DISCONNECT
;
5269 return PCI_ERS_RESULT_NEED_RESET
;
5272 static pci_ers_result_t
5273 qla2xxx_pci_mmio_enabled(struct pci_dev
*pdev
)
5275 int risc_paused
= 0;
5277 unsigned long flags
;
5278 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5279 struct qla_hw_data
*ha
= base_vha
->hw
;
5280 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
5281 struct device_reg_24xx __iomem
*reg24
= &ha
->iobase
->isp24
;
5284 return PCI_ERS_RESULT_RECOVERED
;
5286 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
5287 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)){
5288 stat
= RD_REG_DWORD(®
->hccr
);
5289 if (stat
& HCCR_RISC_PAUSE
)
5291 } else if (IS_QLA23XX(ha
)) {
5292 stat
= RD_REG_DWORD(®
->u
.isp2300
.host_status
);
5293 if (stat
& HSR_RISC_PAUSED
)
5295 } else if (IS_FWI2_CAPABLE(ha
)) {
5296 stat
= RD_REG_DWORD(®24
->host_status
);
5297 if (stat
& HSRX_RISC_PAUSED
)
5300 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
5303 ql_log(ql_log_info
, base_vha
, 0x9003,
5304 "RISC paused -- mmio_enabled, Dumping firmware.\n");
5305 ha
->isp_ops
->fw_dump(base_vha
, 0);
5307 return PCI_ERS_RESULT_NEED_RESET
;
5309 return PCI_ERS_RESULT_RECOVERED
;
5313 qla82xx_error_recovery(scsi_qla_host_t
*base_vha
)
5315 uint32_t rval
= QLA_FUNCTION_FAILED
;
5316 uint32_t drv_active
= 0;
5317 struct qla_hw_data
*ha
= base_vha
->hw
;
5319 struct pci_dev
*other_pdev
= NULL
;
5321 ql_dbg(ql_dbg_aer
, base_vha
, 0x9006,
5322 "Entered %s.\n", __func__
);
5324 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5326 if (base_vha
->flags
.online
) {
5327 /* Abort all outstanding commands,
5328 * so as to be requeued later */
5329 qla2x00_abort_isp_cleanup(base_vha
);
5333 fn
= PCI_FUNC(ha
->pdev
->devfn
);
5336 ql_dbg(ql_dbg_aer
, base_vha
, 0x9007,
5337 "Finding pci device at function = 0x%x.\n", fn
);
5339 pci_get_domain_bus_and_slot(pci_domain_nr(ha
->pdev
->bus
),
5340 ha
->pdev
->bus
->number
, PCI_DEVFN(PCI_SLOT(ha
->pdev
->devfn
),
5345 if (atomic_read(&other_pdev
->enable_cnt
)) {
5346 ql_dbg(ql_dbg_aer
, base_vha
, 0x9008,
5347 "Found PCI func available and enable at 0x%x.\n",
5349 pci_dev_put(other_pdev
);
5352 pci_dev_put(other_pdev
);
5357 ql_dbg(ql_dbg_aer
, base_vha
, 0x9009,
5358 "This devfn is reset owner = 0x%x.\n",
5360 qla82xx_idc_lock(ha
);
5362 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5363 QLA8XXX_DEV_INITIALIZING
);
5365 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_IDC_VERSION
,
5366 QLA82XX_IDC_VERSION
);
5368 drv_active
= qla82xx_rd_32(ha
, QLA82XX_CRB_DRV_ACTIVE
);
5369 ql_dbg(ql_dbg_aer
, base_vha
, 0x900a,
5370 "drv_active = 0x%x.\n", drv_active
);
5372 qla82xx_idc_unlock(ha
);
5373 /* Reset if device is not already reset
5374 * drv_active would be 0 if a reset has already been done
5377 rval
= qla82xx_start_firmware(base_vha
);
5380 qla82xx_idc_lock(ha
);
5382 if (rval
!= QLA_SUCCESS
) {
5383 ql_log(ql_log_info
, base_vha
, 0x900b,
5384 "HW State: FAILED.\n");
5385 qla82xx_clear_drv_active(ha
);
5386 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5387 QLA8XXX_DEV_FAILED
);
5389 ql_log(ql_log_info
, base_vha
, 0x900c,
5390 "HW State: READY.\n");
5391 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
5393 qla82xx_idc_unlock(ha
);
5394 ha
->flags
.isp82xx_fw_hung
= 0;
5395 rval
= qla82xx_restart_isp(base_vha
);
5396 qla82xx_idc_lock(ha
);
5397 /* Clear driver state register */
5398 qla82xx_wr_32(ha
, QLA82XX_CRB_DRV_STATE
, 0);
5399 qla82xx_set_drv_active(base_vha
);
5401 qla82xx_idc_unlock(ha
);
5403 ql_dbg(ql_dbg_aer
, base_vha
, 0x900d,
5404 "This devfn is not reset owner = 0x%x.\n",
5406 if ((qla82xx_rd_32(ha
, QLA82XX_CRB_DEV_STATE
) ==
5407 QLA8XXX_DEV_READY
)) {
5408 ha
->flags
.isp82xx_fw_hung
= 0;
5409 rval
= qla82xx_restart_isp(base_vha
);
5410 qla82xx_idc_lock(ha
);
5411 qla82xx_set_drv_active(base_vha
);
5412 qla82xx_idc_unlock(ha
);
5415 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5420 static pci_ers_result_t
5421 qla2xxx_pci_slot_reset(struct pci_dev
*pdev
)
5423 pci_ers_result_t ret
= PCI_ERS_RESULT_DISCONNECT
;
5424 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5425 struct qla_hw_data
*ha
= base_vha
->hw
;
5426 struct rsp_que
*rsp
;
5427 int rc
, retries
= 10;
5429 ql_dbg(ql_dbg_aer
, base_vha
, 0x9004,
5432 /* Workaround: qla2xxx driver which access hardware earlier
5433 * needs error state to be pci_channel_io_online.
5434 * Otherwise mailbox command timesout.
5436 pdev
->error_state
= pci_channel_io_normal
;
5438 pci_restore_state(pdev
);
5440 /* pci_restore_state() clears the saved_state flag of the device
5441 * save restored state which resets saved_state flag
5443 pci_save_state(pdev
);
5446 rc
= pci_enable_device_mem(pdev
);
5448 rc
= pci_enable_device(pdev
);
5451 ql_log(ql_log_warn
, base_vha
, 0x9005,
5452 "Can't re-enable PCI device after reset.\n");
5453 goto exit_slot_reset
;
5456 rsp
= ha
->rsp_q_map
[0];
5457 if (qla2x00_request_irqs(ha
, rsp
))
5458 goto exit_slot_reset
;
5460 if (ha
->isp_ops
->pci_config(base_vha
))
5461 goto exit_slot_reset
;
5463 if (IS_QLA82XX(ha
)) {
5464 if (qla82xx_error_recovery(base_vha
) == QLA_SUCCESS
) {
5465 ret
= PCI_ERS_RESULT_RECOVERED
;
5466 goto exit_slot_reset
;
5468 goto exit_slot_reset
;
5471 while (ha
->flags
.mbox_busy
&& retries
--)
5474 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5475 if (ha
->isp_ops
->abort_isp(base_vha
) == QLA_SUCCESS
)
5476 ret
= PCI_ERS_RESULT_RECOVERED
;
5477 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
5481 ql_dbg(ql_dbg_aer
, base_vha
, 0x900e,
5482 "slot_reset return %x.\n", ret
);
5488 qla2xxx_pci_resume(struct pci_dev
*pdev
)
5490 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
5491 struct qla_hw_data
*ha
= base_vha
->hw
;
5494 ql_dbg(ql_dbg_aer
, base_vha
, 0x900f,
5497 ret
= qla2x00_wait_for_hba_online(base_vha
);
5498 if (ret
!= QLA_SUCCESS
) {
5499 ql_log(ql_log_fatal
, base_vha
, 0x9002,
5500 "The device failed to resume I/O from slot/link_reset.\n");
5503 pci_cleanup_aer_uncorrect_error_status(pdev
);
5505 ha
->flags
.eeh_busy
= 0;
5508 static const struct pci_error_handlers qla2xxx_err_handler
= {
5509 .error_detected
= qla2xxx_pci_error_detected
,
5510 .mmio_enabled
= qla2xxx_pci_mmio_enabled
,
5511 .slot_reset
= qla2xxx_pci_slot_reset
,
5512 .resume
= qla2xxx_pci_resume
,
5515 static struct pci_device_id qla2xxx_pci_tbl
[] = {
5516 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2100
) },
5517 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2200
) },
5518 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2300
) },
5519 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2312
) },
5520 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2322
) },
5521 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6312
) },
5522 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6322
) },
5523 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2422
) },
5524 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2432
) },
5525 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8432
) },
5526 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5422
) },
5527 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5432
) },
5528 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2532
) },
5529 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2031
) },
5530 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8001
) },
5531 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8021
) },
5532 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8031
) },
5533 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISPF001
) },
5536 MODULE_DEVICE_TABLE(pci
, qla2xxx_pci_tbl
);
5538 static struct pci_driver qla2xxx_pci_driver
= {
5539 .name
= QLA2XXX_DRIVER_NAME
,
5541 .owner
= THIS_MODULE
,
5543 .id_table
= qla2xxx_pci_tbl
,
5544 .probe
= qla2x00_probe_one
,
5545 .remove
= qla2x00_remove_one
,
5546 .shutdown
= qla2x00_shutdown
,
5547 .err_handler
= &qla2xxx_err_handler
,
5550 static const struct file_operations apidev_fops
= {
5551 .owner
= THIS_MODULE
,
5552 .llseek
= noop_llseek
,
5556 * qla2x00_module_init - Module initialization.
5559 qla2x00_module_init(void)
5563 /* Allocate cache for SRBs. */
5564 srb_cachep
= kmem_cache_create("qla2xxx_srbs", sizeof(srb_t
), 0,
5565 SLAB_HWCACHE_ALIGN
, NULL
);
5566 if (srb_cachep
== NULL
) {
5567 ql_log(ql_log_fatal
, NULL
, 0x0001,
5568 "Unable to allocate SRB cache...Failing load!.\n");
5572 /* Initialize target kmem_cache and mem_pools */
5575 kmem_cache_destroy(srb_cachep
);
5577 } else if (ret
> 0) {
5579 * If initiator mode is explictly disabled by qlt_init(),
5580 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5581 * performing scsi_scan_target() during LOOP UP event.
5583 qla2xxx_transport_functions
.disable_target_scan
= 1;
5584 qla2xxx_transport_vport_functions
.disable_target_scan
= 1;
5587 /* Derive version string. */
5588 strcpy(qla2x00_version_str
, QLA2XXX_VERSION
);
5589 if (ql2xextended_error_logging
)
5590 strcat(qla2x00_version_str
, "-debug");
5592 qla2xxx_transport_template
=
5593 fc_attach_transport(&qla2xxx_transport_functions
);
5594 if (!qla2xxx_transport_template
) {
5595 kmem_cache_destroy(srb_cachep
);
5596 ql_log(ql_log_fatal
, NULL
, 0x0002,
5597 "fc_attach_transport failed...Failing load!.\n");
5602 apidev_major
= register_chrdev(0, QLA2XXX_APIDEV
, &apidev_fops
);
5603 if (apidev_major
< 0) {
5604 ql_log(ql_log_fatal
, NULL
, 0x0003,
5605 "Unable to register char device %s.\n", QLA2XXX_APIDEV
);
5608 qla2xxx_transport_vport_template
=
5609 fc_attach_transport(&qla2xxx_transport_vport_functions
);
5610 if (!qla2xxx_transport_vport_template
) {
5611 kmem_cache_destroy(srb_cachep
);
5613 fc_release_transport(qla2xxx_transport_template
);
5614 ql_log(ql_log_fatal
, NULL
, 0x0004,
5615 "fc_attach_transport vport failed...Failing load!.\n");
5618 ql_log(ql_log_info
, NULL
, 0x0005,
5619 "QLogic Fibre Channel HBA Driver: %s.\n",
5620 qla2x00_version_str
);
5621 ret
= pci_register_driver(&qla2xxx_pci_driver
);
5623 kmem_cache_destroy(srb_cachep
);
5625 fc_release_transport(qla2xxx_transport_template
);
5626 fc_release_transport(qla2xxx_transport_vport_template
);
5627 ql_log(ql_log_fatal
, NULL
, 0x0006,
5628 "pci_register_driver failed...ret=%d Failing load!.\n",
5635 * qla2x00_module_exit - Module cleanup.
5638 qla2x00_module_exit(void)
5640 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
5641 pci_unregister_driver(&qla2xxx_pci_driver
);
5642 qla2x00_release_firmware();
5643 kmem_cache_destroy(srb_cachep
);
5646 kmem_cache_destroy(ctx_cachep
);
5647 fc_release_transport(qla2xxx_transport_template
);
5648 fc_release_transport(qla2xxx_transport_vport_template
);
5651 module_init(qla2x00_module_init
);
5652 module_exit(qla2x00_module_exit
);
5654 MODULE_AUTHOR("QLogic Corporation");
5655 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5656 MODULE_LICENSE("GPL");
5657 MODULE_VERSION(QLA2XXX_VERSION
);
5658 MODULE_FIRMWARE(FW_FILE_ISP21XX
);
5659 MODULE_FIRMWARE(FW_FILE_ISP22XX
);
5660 MODULE_FIRMWARE(FW_FILE_ISP2300
);
5661 MODULE_FIRMWARE(FW_FILE_ISP2322
);
5662 MODULE_FIRMWARE(FW_FILE_ISP24XX
);
5663 MODULE_FIRMWARE(FW_FILE_ISP25XX
);