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Merge tag 'v3.10.62' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / rtc / rtc-ds1307.c
1 /*
2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
3 *
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
7 * Copyright (C) 2012 Bertrand Achard (nvram access fixes)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/slab.h>
17 #include <linux/i2c.h>
18 #include <linux/string.h>
19 #include <linux/rtc.h>
20 #include <linux/bcd.h>
21 #include <linux/rtc/ds1307.h>
22
23 /*
24 * We can't determine type by probing, but if we expect pre-Linux code
25 * to have set the chip up as a clock (turning on the oscillator and
26 * setting the date and time), Linux can ignore the non-clock features.
27 * That's a natural job for a factory or repair bench.
28 */
29 enum ds_type {
30 ds_1307,
31 ds_1337,
32 ds_1338,
33 ds_1339,
34 ds_1340,
35 ds_1388,
36 ds_3231,
37 m41t00,
38 mcp7941x,
39 rx_8025,
40 last_ds_type /* always last */
41 /* rs5c372 too? different address... */
42 };
43
44
45 /* RTC registers don't differ much, except for the century flag */
46 #define DS1307_REG_SECS 0x00 /* 00-59 */
47 # define DS1307_BIT_CH 0x80
48 # define DS1340_BIT_nEOSC 0x80
49 # define MCP7941X_BIT_ST 0x80
50 #define DS1307_REG_MIN 0x01 /* 00-59 */
51 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
52 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
53 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
54 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
55 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
56 #define DS1307_REG_WDAY 0x03 /* 01-07 */
57 # define MCP7941X_BIT_VBATEN 0x08
58 #define DS1307_REG_MDAY 0x04 /* 01-31 */
59 #define DS1307_REG_MONTH 0x05 /* 01-12 */
60 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
61 #define DS1307_REG_YEAR 0x06 /* 00-99 */
62
63 /*
64 * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
65 * start at 7, and they differ a LOT. Only control and status matter for
66 * basic RTC date and time functionality; be careful using them.
67 */
68 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
69 # define DS1307_BIT_OUT 0x80
70 # define DS1338_BIT_OSF 0x20
71 # define DS1307_BIT_SQWE 0x10
72 # define DS1307_BIT_RS1 0x02
73 # define DS1307_BIT_RS0 0x01
74 #define DS1337_REG_CONTROL 0x0e
75 # define DS1337_BIT_nEOSC 0x80
76 # define DS1339_BIT_BBSQI 0x20
77 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
78 # define DS1337_BIT_RS2 0x10
79 # define DS1337_BIT_RS1 0x08
80 # define DS1337_BIT_INTCN 0x04
81 # define DS1337_BIT_A2IE 0x02
82 # define DS1337_BIT_A1IE 0x01
83 #define DS1340_REG_CONTROL 0x07
84 # define DS1340_BIT_OUT 0x80
85 # define DS1340_BIT_FT 0x40
86 # define DS1340_BIT_CALIB_SIGN 0x20
87 # define DS1340_M_CALIBRATION 0x1f
88 #define DS1340_REG_FLAG 0x09
89 # define DS1340_BIT_OSF 0x80
90 #define DS1337_REG_STATUS 0x0f
91 # define DS1337_BIT_OSF 0x80
92 # define DS1337_BIT_A2I 0x02
93 # define DS1337_BIT_A1I 0x01
94 #define DS1339_REG_ALARM1_SECS 0x07
95
96 #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0
97
98 #define RX8025_REG_CTRL1 0x0e
99 # define RX8025_BIT_2412 0x20
100 #define RX8025_REG_CTRL2 0x0f
101 # define RX8025_BIT_PON 0x10
102 # define RX8025_BIT_VDET 0x40
103 # define RX8025_BIT_XST 0x20
104
105
106 struct ds1307 {
107 u8 offset; /* register's offset */
108 u8 regs[11];
109 u16 nvram_offset;
110 struct bin_attribute *nvram;
111 enum ds_type type;
112 unsigned long flags;
113 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
114 #define HAS_ALARM 1 /* bit 1 == irq claimed */
115 struct i2c_client *client;
116 struct rtc_device *rtc;
117 struct work_struct work;
118 s32 (*read_block_data)(const struct i2c_client *client, u8 command,
119 u8 length, u8 *values);
120 s32 (*write_block_data)(const struct i2c_client *client, u8 command,
121 u8 length, const u8 *values);
122 };
123
124 struct chip_desc {
125 unsigned alarm:1;
126 u16 nvram_offset;
127 u16 nvram_size;
128 u16 trickle_charger_reg;
129 };
130
131 static const struct chip_desc chips[last_ds_type] = {
132 [ds_1307] = {
133 .nvram_offset = 8,
134 .nvram_size = 56,
135 },
136 [ds_1337] = {
137 .alarm = 1,
138 },
139 [ds_1338] = {
140 .nvram_offset = 8,
141 .nvram_size = 56,
142 },
143 [ds_1339] = {
144 .alarm = 1,
145 .trickle_charger_reg = 0x10,
146 },
147 [ds_1340] = {
148 .trickle_charger_reg = 0x08,
149 },
150 [ds_1388] = {
151 .trickle_charger_reg = 0x0a,
152 },
153 [ds_3231] = {
154 .alarm = 1,
155 },
156 [mcp7941x] = {
157 /* this is battery backed SRAM */
158 .nvram_offset = 0x20,
159 .nvram_size = 0x40,
160 },
161 };
162
163 static const struct i2c_device_id ds1307_id[] = {
164 { "ds1307", ds_1307 },
165 { "ds1337", ds_1337 },
166 { "ds1338", ds_1338 },
167 { "ds1339", ds_1339 },
168 { "ds1388", ds_1388 },
169 { "ds1340", ds_1340 },
170 { "ds3231", ds_3231 },
171 { "m41t00", m41t00 },
172 { "mcp7941x", mcp7941x },
173 { "pt7c4338", ds_1307 },
174 { "rx8025", rx_8025 },
175 { }
176 };
177 MODULE_DEVICE_TABLE(i2c, ds1307_id);
178
179 /*----------------------------------------------------------------------*/
180
181 #define BLOCK_DATA_MAX_TRIES 10
182
183 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
184 u8 command, u8 length, u8 *values)
185 {
186 s32 i, data;
187
188 for (i = 0; i < length; i++) {
189 data = i2c_smbus_read_byte_data(client, command + i);
190 if (data < 0)
191 return data;
192 values[i] = data;
193 }
194 return i;
195 }
196
197 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
198 u8 length, u8 *values)
199 {
200 u8 oldvalues[255];
201 s32 ret;
202 int tries = 0;
203
204 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
205 ret = ds1307_read_block_data_once(client, command, length, values);
206 if (ret < 0)
207 return ret;
208 do {
209 if (++tries > BLOCK_DATA_MAX_TRIES) {
210 dev_err(&client->dev,
211 "ds1307_read_block_data failed\n");
212 return -EIO;
213 }
214 memcpy(oldvalues, values, length);
215 ret = ds1307_read_block_data_once(client, command, length,
216 values);
217 if (ret < 0)
218 return ret;
219 } while (memcmp(oldvalues, values, length));
220 return length;
221 }
222
223 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
224 u8 length, const u8 *values)
225 {
226 u8 currvalues[255];
227 int tries = 0;
228
229 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
230 do {
231 s32 i, ret;
232
233 if (++tries > BLOCK_DATA_MAX_TRIES) {
234 dev_err(&client->dev,
235 "ds1307_write_block_data failed\n");
236 return -EIO;
237 }
238 for (i = 0; i < length; i++) {
239 ret = i2c_smbus_write_byte_data(client, command + i,
240 values[i]);
241 if (ret < 0)
242 return ret;
243 }
244 ret = ds1307_read_block_data_once(client, command, length,
245 currvalues);
246 if (ret < 0)
247 return ret;
248 } while (memcmp(currvalues, values, length));
249 return length;
250 }
251
252 /*----------------------------------------------------------------------*/
253
254 /* These RTC devices are not designed to be connected to a SMbus adapter.
255 SMbus limits block operations length to 32 bytes, whereas it's not
256 limited on I2C buses. As a result, accesses may exceed 32 bytes;
257 in that case, split them into smaller blocks */
258
259 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
260 u8 command, u8 length, const u8 *values)
261 {
262 u8 suboffset = 0;
263
264 if (length <= I2C_SMBUS_BLOCK_MAX)
265 return i2c_smbus_write_i2c_block_data(client,
266 command, length, values);
267
268 while (suboffset < length) {
269 s32 retval = i2c_smbus_write_i2c_block_data(client,
270 command + suboffset,
271 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
272 values + suboffset);
273 if (retval < 0)
274 return retval;
275
276 suboffset += I2C_SMBUS_BLOCK_MAX;
277 }
278 return length;
279 }
280
281 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
282 u8 command, u8 length, u8 *values)
283 {
284 u8 suboffset = 0;
285
286 if (length <= I2C_SMBUS_BLOCK_MAX)
287 return i2c_smbus_read_i2c_block_data(client,
288 command, length, values);
289
290 while (suboffset < length) {
291 s32 retval = i2c_smbus_read_i2c_block_data(client,
292 command + suboffset,
293 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
294 values + suboffset);
295 if (retval < 0)
296 return retval;
297
298 suboffset += I2C_SMBUS_BLOCK_MAX;
299 }
300 return length;
301 }
302
303 /*----------------------------------------------------------------------*/
304
305 /*
306 * The IRQ logic includes a "real" handler running in IRQ context just
307 * long enough to schedule this workqueue entry. We need a task context
308 * to talk to the RTC, since I2C I/O calls require that; and disable the
309 * IRQ until we clear its status on the chip, so that this handler can
310 * work with any type of triggering (not just falling edge).
311 *
312 * The ds1337 and ds1339 both have two alarms, but we only use the first
313 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
314 * signal; ds1339 chips have only one alarm signal.
315 */
316 static void ds1307_work(struct work_struct *work)
317 {
318 struct ds1307 *ds1307;
319 struct i2c_client *client;
320 struct mutex *lock;
321 int stat, control;
322
323 ds1307 = container_of(work, struct ds1307, work);
324 client = ds1307->client;
325 lock = &ds1307->rtc->ops_lock;
326
327 mutex_lock(lock);
328 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
329 if (stat < 0)
330 goto out;
331
332 if (stat & DS1337_BIT_A1I) {
333 stat &= ~DS1337_BIT_A1I;
334 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
335
336 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
337 if (control < 0)
338 goto out;
339
340 control &= ~DS1337_BIT_A1IE;
341 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
342
343 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
344 }
345
346 out:
347 if (test_bit(HAS_ALARM, &ds1307->flags))
348 enable_irq(client->irq);
349 mutex_unlock(lock);
350 }
351
352 static irqreturn_t ds1307_irq(int irq, void *dev_id)
353 {
354 struct i2c_client *client = dev_id;
355 struct ds1307 *ds1307 = i2c_get_clientdata(client);
356
357 disable_irq_nosync(irq);
358 schedule_work(&ds1307->work);
359 return IRQ_HANDLED;
360 }
361
362 /*----------------------------------------------------------------------*/
363
364 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
365 {
366 struct ds1307 *ds1307 = dev_get_drvdata(dev);
367 int tmp;
368
369 /* read the RTC date and time registers all at once */
370 tmp = ds1307->read_block_data(ds1307->client,
371 ds1307->offset, 7, ds1307->regs);
372 if (tmp != 7) {
373 dev_err(dev, "%s error %d\n", "read", tmp);
374 return -EIO;
375 }
376
377 dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
378
379 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
380 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
381 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
382 t->tm_hour = bcd2bin(tmp);
383 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
384 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
385 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
386 t->tm_mon = bcd2bin(tmp) - 1;
387
388 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
389 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
390
391 dev_dbg(dev, "%s secs=%d, mins=%d, "
392 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
393 "read", t->tm_sec, t->tm_min,
394 t->tm_hour, t->tm_mday,
395 t->tm_mon, t->tm_year, t->tm_wday);
396
397 /* initial clock setting can be undefined */
398 return rtc_valid_tm(t);
399 }
400
401 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
402 {
403 struct ds1307 *ds1307 = dev_get_drvdata(dev);
404 int result;
405 int tmp;
406 u8 *buf = ds1307->regs;
407
408 dev_dbg(dev, "%s secs=%d, mins=%d, "
409 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
410 "write", t->tm_sec, t->tm_min,
411 t->tm_hour, t->tm_mday,
412 t->tm_mon, t->tm_year, t->tm_wday);
413
414 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
415 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
416 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
417 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
418 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
419 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
420
421 /* assume 20YY not 19YY */
422 tmp = t->tm_year - 100;
423 buf[DS1307_REG_YEAR] = bin2bcd(tmp);
424
425 switch (ds1307->type) {
426 case ds_1337:
427 case ds_1339:
428 case ds_3231:
429 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
430 break;
431 case ds_1340:
432 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
433 | DS1340_BIT_CENTURY;
434 break;
435 case mcp7941x:
436 /*
437 * these bits were cleared when preparing the date/time
438 * values and need to be set again before writing the
439 * buffer out to the device.
440 */
441 buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST;
442 buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN;
443 break;
444 default:
445 break;
446 }
447
448 dev_dbg(dev, "%s: %7ph\n", "write", buf);
449
450 result = ds1307->write_block_data(ds1307->client,
451 ds1307->offset, 7, buf);
452 if (result < 0) {
453 dev_err(dev, "%s error %d\n", "write", result);
454 return result;
455 }
456 return 0;
457 }
458
459 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
460 {
461 struct i2c_client *client = to_i2c_client(dev);
462 struct ds1307 *ds1307 = i2c_get_clientdata(client);
463 int ret;
464
465 if (!test_bit(HAS_ALARM, &ds1307->flags))
466 return -EINVAL;
467
468 /* read all ALARM1, ALARM2, and status registers at once */
469 ret = ds1307->read_block_data(client,
470 DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
471 if (ret != 9) {
472 dev_err(dev, "%s error %d\n", "alarm read", ret);
473 return -EIO;
474 }
475
476 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
477 "alarm read",
478 ds1307->regs[0], ds1307->regs[1],
479 ds1307->regs[2], ds1307->regs[3],
480 ds1307->regs[4], ds1307->regs[5],
481 ds1307->regs[6], ds1307->regs[7],
482 ds1307->regs[8]);
483
484 /*
485 * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
486 * and that all four fields are checked matches
487 */
488 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
489 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
490 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
491 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
492 t->time.tm_mon = -1;
493 t->time.tm_year = -1;
494 t->time.tm_wday = -1;
495 t->time.tm_yday = -1;
496 t->time.tm_isdst = -1;
497
498 /* ... and status */
499 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
500 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
501
502 dev_dbg(dev, "%s secs=%d, mins=%d, "
503 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
504 "alarm read", t->time.tm_sec, t->time.tm_min,
505 t->time.tm_hour, t->time.tm_mday,
506 t->enabled, t->pending);
507
508 return 0;
509 }
510
511 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
512 {
513 struct i2c_client *client = to_i2c_client(dev);
514 struct ds1307 *ds1307 = i2c_get_clientdata(client);
515 unsigned char *buf = ds1307->regs;
516 u8 control, status;
517 int ret;
518
519 if (!test_bit(HAS_ALARM, &ds1307->flags))
520 return -EINVAL;
521
522 dev_dbg(dev, "%s secs=%d, mins=%d, "
523 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
524 "alarm set", t->time.tm_sec, t->time.tm_min,
525 t->time.tm_hour, t->time.tm_mday,
526 t->enabled, t->pending);
527
528 /* read current status of both alarms and the chip */
529 ret = ds1307->read_block_data(client,
530 DS1339_REG_ALARM1_SECS, 9, buf);
531 if (ret != 9) {
532 dev_err(dev, "%s error %d\n", "alarm write", ret);
533 return -EIO;
534 }
535 control = ds1307->regs[7];
536 status = ds1307->regs[8];
537
538 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
539 "alarm set (old status)",
540 ds1307->regs[0], ds1307->regs[1],
541 ds1307->regs[2], ds1307->regs[3],
542 ds1307->regs[4], ds1307->regs[5],
543 ds1307->regs[6], control, status);
544
545 /* set ALARM1, using 24 hour and day-of-month modes */
546 buf[0] = bin2bcd(t->time.tm_sec);
547 buf[1] = bin2bcd(t->time.tm_min);
548 buf[2] = bin2bcd(t->time.tm_hour);
549 buf[3] = bin2bcd(t->time.tm_mday);
550
551 /* set ALARM2 to non-garbage */
552 buf[4] = 0;
553 buf[5] = 0;
554 buf[6] = 0;
555
556 /* optionally enable ALARM1 */
557 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
558 if (t->enabled) {
559 dev_dbg(dev, "alarm IRQ armed\n");
560 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
561 }
562 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
563
564 ret = ds1307->write_block_data(client,
565 DS1339_REG_ALARM1_SECS, 9, buf);
566 if (ret < 0) {
567 dev_err(dev, "can't set alarm time\n");
568 return ret;
569 }
570
571 return 0;
572 }
573
574 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
575 {
576 struct i2c_client *client = to_i2c_client(dev);
577 struct ds1307 *ds1307 = i2c_get_clientdata(client);
578 int ret;
579
580 if (!test_bit(HAS_ALARM, &ds1307->flags))
581 return -ENOTTY;
582
583 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
584 if (ret < 0)
585 return ret;
586
587 if (enabled)
588 ret |= DS1337_BIT_A1IE;
589 else
590 ret &= ~DS1337_BIT_A1IE;
591
592 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
593 if (ret < 0)
594 return ret;
595
596 return 0;
597 }
598
599 static const struct rtc_class_ops ds13xx_rtc_ops = {
600 .read_time = ds1307_get_time,
601 .set_time = ds1307_set_time,
602 .read_alarm = ds1337_read_alarm,
603 .set_alarm = ds1337_set_alarm,
604 .alarm_irq_enable = ds1307_alarm_irq_enable,
605 };
606
607 /*----------------------------------------------------------------------*/
608
609 static ssize_t
610 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
611 struct bin_attribute *attr,
612 char *buf, loff_t off, size_t count)
613 {
614 struct i2c_client *client;
615 struct ds1307 *ds1307;
616 int result;
617
618 client = kobj_to_i2c_client(kobj);
619 ds1307 = i2c_get_clientdata(client);
620
621 if (unlikely(off >= ds1307->nvram->size))
622 return 0;
623 if ((off + count) > ds1307->nvram->size)
624 count = ds1307->nvram->size - off;
625 if (unlikely(!count))
626 return count;
627
628 result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
629 count, buf);
630 if (result < 0)
631 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
632 return result;
633 }
634
635 static ssize_t
636 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
637 struct bin_attribute *attr,
638 char *buf, loff_t off, size_t count)
639 {
640 struct i2c_client *client;
641 struct ds1307 *ds1307;
642 int result;
643
644 client = kobj_to_i2c_client(kobj);
645 ds1307 = i2c_get_clientdata(client);
646
647 if (unlikely(off >= ds1307->nvram->size))
648 return -EFBIG;
649 if ((off + count) > ds1307->nvram->size)
650 count = ds1307->nvram->size - off;
651 if (unlikely(!count))
652 return count;
653
654 result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
655 count, buf);
656 if (result < 0) {
657 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
658 return result;
659 }
660 return count;
661 }
662
663 /*----------------------------------------------------------------------*/
664
665 static int ds1307_probe(struct i2c_client *client,
666 const struct i2c_device_id *id)
667 {
668 struct ds1307 *ds1307;
669 int err = -ENODEV;
670 int tmp;
671 const struct chip_desc *chip = &chips[id->driver_data];
672 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
673 int want_irq = false;
674 unsigned char *buf;
675 struct ds1307_platform_data *pdata = client->dev.platform_data;
676 static const int bbsqi_bitpos[] = {
677 [ds_1337] = 0,
678 [ds_1339] = DS1339_BIT_BBSQI,
679 [ds_3231] = DS3231_BIT_BBSQW,
680 };
681
682 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
683 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
684 return -EIO;
685
686 ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL);
687 if (!ds1307)
688 return -ENOMEM;
689
690 i2c_set_clientdata(client, ds1307);
691
692 ds1307->client = client;
693 ds1307->type = id->driver_data;
694
695 if (pdata && pdata->trickle_charger_setup && chip->trickle_charger_reg)
696 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
697 DS13XX_TRICKLE_CHARGER_MAGIC | pdata->trickle_charger_setup);
698
699 buf = ds1307->regs;
700 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
701 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
702 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
703 } else {
704 ds1307->read_block_data = ds1307_read_block_data;
705 ds1307->write_block_data = ds1307_write_block_data;
706 }
707
708 switch (ds1307->type) {
709 case ds_1337:
710 case ds_1339:
711 case ds_3231:
712 /* get registers that the "rtc" read below won't read... */
713 tmp = ds1307->read_block_data(ds1307->client,
714 DS1337_REG_CONTROL, 2, buf);
715 if (tmp != 2) {
716 dev_dbg(&client->dev, "read error %d\n", tmp);
717 err = -EIO;
718 goto exit_free;
719 }
720
721 /* oscillator off? turn it on, so clock can tick. */
722 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
723 ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
724
725 /*
726 * Using IRQ? Disable the square wave and both alarms.
727 * For some variants, be sure alarms can trigger when we're
728 * running on Vbackup (BBSQI/BBSQW)
729 */
730 if (ds1307->client->irq > 0 && chip->alarm) {
731 INIT_WORK(&ds1307->work, ds1307_work);
732
733 ds1307->regs[0] |= DS1337_BIT_INTCN
734 | bbsqi_bitpos[ds1307->type];
735 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
736
737 want_irq = true;
738 }
739
740 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
741 ds1307->regs[0]);
742
743 /* oscillator fault? clear flag, and warn */
744 if (ds1307->regs[1] & DS1337_BIT_OSF) {
745 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
746 ds1307->regs[1] & ~DS1337_BIT_OSF);
747 dev_warn(&client->dev, "SET TIME!\n");
748 }
749 break;
750
751 case rx_8025:
752 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
753 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
754 if (tmp != 2) {
755 dev_dbg(&client->dev, "read error %d\n", tmp);
756 err = -EIO;
757 goto exit_free;
758 }
759
760 /* oscillator off? turn it on, so clock can tick. */
761 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
762 ds1307->regs[1] |= RX8025_BIT_XST;
763 i2c_smbus_write_byte_data(client,
764 RX8025_REG_CTRL2 << 4 | 0x08,
765 ds1307->regs[1]);
766 dev_warn(&client->dev,
767 "oscillator stop detected - SET TIME!\n");
768 }
769
770 if (ds1307->regs[1] & RX8025_BIT_PON) {
771 ds1307->regs[1] &= ~RX8025_BIT_PON;
772 i2c_smbus_write_byte_data(client,
773 RX8025_REG_CTRL2 << 4 | 0x08,
774 ds1307->regs[1]);
775 dev_warn(&client->dev, "power-on detected\n");
776 }
777
778 if (ds1307->regs[1] & RX8025_BIT_VDET) {
779 ds1307->regs[1] &= ~RX8025_BIT_VDET;
780 i2c_smbus_write_byte_data(client,
781 RX8025_REG_CTRL2 << 4 | 0x08,
782 ds1307->regs[1]);
783 dev_warn(&client->dev, "voltage drop detected\n");
784 }
785
786 /* make sure we are running in 24hour mode */
787 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
788 u8 hour;
789
790 /* switch to 24 hour mode */
791 i2c_smbus_write_byte_data(client,
792 RX8025_REG_CTRL1 << 4 | 0x08,
793 ds1307->regs[0] |
794 RX8025_BIT_2412);
795
796 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
797 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
798 if (tmp != 2) {
799 dev_dbg(&client->dev, "read error %d\n", tmp);
800 err = -EIO;
801 goto exit_free;
802 }
803
804 /* correct hour */
805 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
806 if (hour == 12)
807 hour = 0;
808 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
809 hour += 12;
810
811 i2c_smbus_write_byte_data(client,
812 DS1307_REG_HOUR << 4 | 0x08,
813 hour);
814 }
815 break;
816 case ds_1388:
817 ds1307->offset = 1; /* Seconds starts at 1 */
818 break;
819 default:
820 break;
821 }
822
823 read_rtc:
824 /* read RTC registers */
825 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
826 if (tmp != 8) {
827 dev_dbg(&client->dev, "read error %d\n", tmp);
828 err = -EIO;
829 goto exit_free;
830 }
831
832 /*
833 * minimal sanity checking; some chips (like DS1340) don't
834 * specify the extra bits as must-be-zero, but there are
835 * still a few values that are clearly out-of-range.
836 */
837 tmp = ds1307->regs[DS1307_REG_SECS];
838 switch (ds1307->type) {
839 case ds_1307:
840 case m41t00:
841 /* clock halted? turn it on, so clock can tick. */
842 if (tmp & DS1307_BIT_CH) {
843 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
844 dev_warn(&client->dev, "SET TIME!\n");
845 goto read_rtc;
846 }
847 break;
848 case ds_1338:
849 /* clock halted? turn it on, so clock can tick. */
850 if (tmp & DS1307_BIT_CH)
851 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
852
853 /* oscillator fault? clear flag, and warn */
854 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
855 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
856 ds1307->regs[DS1307_REG_CONTROL]
857 & ~DS1338_BIT_OSF);
858 dev_warn(&client->dev, "SET TIME!\n");
859 goto read_rtc;
860 }
861 break;
862 case ds_1340:
863 /* clock halted? turn it on, so clock can tick. */
864 if (tmp & DS1340_BIT_nEOSC)
865 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
866
867 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
868 if (tmp < 0) {
869 dev_dbg(&client->dev, "read error %d\n", tmp);
870 err = -EIO;
871 goto exit_free;
872 }
873
874 /* oscillator fault? clear flag, and warn */
875 if (tmp & DS1340_BIT_OSF) {
876 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
877 dev_warn(&client->dev, "SET TIME!\n");
878 }
879 break;
880 case mcp7941x:
881 /* make sure that the backup battery is enabled */
882 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) {
883 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
884 ds1307->regs[DS1307_REG_WDAY]
885 | MCP7941X_BIT_VBATEN);
886 }
887
888 /* clock halted? turn it on, so clock can tick. */
889 if (!(tmp & MCP7941X_BIT_ST)) {
890 i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
891 MCP7941X_BIT_ST);
892 dev_warn(&client->dev, "SET TIME!\n");
893 goto read_rtc;
894 }
895
896 break;
897 default:
898 break;
899 }
900
901 tmp = ds1307->regs[DS1307_REG_HOUR];
902 switch (ds1307->type) {
903 case ds_1340:
904 case m41t00:
905 /*
906 * NOTE: ignores century bits; fix before deploying
907 * systems that will run through year 2100.
908 */
909 break;
910 case rx_8025:
911 break;
912 default:
913 if (!(tmp & DS1307_BIT_12HR))
914 break;
915
916 /*
917 * Be sure we're in 24 hour mode. Multi-master systems
918 * take note...
919 */
920 tmp = bcd2bin(tmp & 0x1f);
921 if (tmp == 12)
922 tmp = 0;
923 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
924 tmp += 12;
925 i2c_smbus_write_byte_data(client,
926 ds1307->offset + DS1307_REG_HOUR,
927 bin2bcd(tmp));
928 }
929
930 ds1307->rtc = rtc_device_register(client->name, &client->dev,
931 &ds13xx_rtc_ops, THIS_MODULE);
932 if (IS_ERR(ds1307->rtc)) {
933 err = PTR_ERR(ds1307->rtc);
934 dev_err(&client->dev,
935 "unable to register the class device\n");
936 goto exit_free;
937 }
938
939 if (want_irq) {
940 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
941 ds1307->rtc->name, client);
942 if (err) {
943 dev_err(&client->dev,
944 "unable to request IRQ!\n");
945 goto exit_irq;
946 }
947
948 device_set_wakeup_capable(&client->dev, 1);
949 set_bit(HAS_ALARM, &ds1307->flags);
950 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
951 }
952
953 if (chip->nvram_size) {
954 ds1307->nvram = kzalloc(sizeof(struct bin_attribute),
955 GFP_KERNEL);
956 if (!ds1307->nvram) {
957 err = -ENOMEM;
958 goto exit_nvram;
959 }
960 ds1307->nvram->attr.name = "nvram";
961 ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
962 sysfs_bin_attr_init(ds1307->nvram);
963 ds1307->nvram->read = ds1307_nvram_read;
964 ds1307->nvram->write = ds1307_nvram_write;
965 ds1307->nvram->size = chip->nvram_size;
966 ds1307->nvram_offset = chip->nvram_offset;
967 err = sysfs_create_bin_file(&client->dev.kobj, ds1307->nvram);
968 if (err) {
969 kfree(ds1307->nvram);
970 goto exit_nvram;
971 }
972 set_bit(HAS_NVRAM, &ds1307->flags);
973 dev_info(&client->dev, "%zu bytes nvram\n", ds1307->nvram->size);
974 }
975
976 return 0;
977
978 exit_nvram:
979 exit_irq:
980 rtc_device_unregister(ds1307->rtc);
981 exit_free:
982 kfree(ds1307);
983 return err;
984 }
985
986 static int ds1307_remove(struct i2c_client *client)
987 {
988 struct ds1307 *ds1307 = i2c_get_clientdata(client);
989
990 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
991 free_irq(client->irq, client);
992 cancel_work_sync(&ds1307->work);
993 }
994
995 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) {
996 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
997 kfree(ds1307->nvram);
998 }
999
1000 rtc_device_unregister(ds1307->rtc);
1001 kfree(ds1307);
1002 return 0;
1003 }
1004
1005 static struct i2c_driver ds1307_driver = {
1006 .driver = {
1007 .name = "rtc-ds1307",
1008 .owner = THIS_MODULE,
1009 },
1010 .probe = ds1307_probe,
1011 .remove = ds1307_remove,
1012 .id_table = ds1307_id,
1013 };
1014
1015 module_i2c_driver(ds1307_driver);
1016
1017 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1018 MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)