ARM: 7709/1: mcpm: Add explicit AFLAGS to support v6/v7 multiplatform kernels
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pinctrl / mvebu / pinctrl-mvebu.c
1 /*
2 * Marvell MVEBU pinctrl core driver
3 *
4 * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/io.h>
17 #include <linux/of.h>
18 #include <linux/of_address.h>
19 #include <linux/of_platform.h>
20 #include <linux/err.h>
21 #include <linux/gpio.h>
22 #include <linux/pinctrl/machine.h>
23 #include <linux/pinctrl/pinconf.h>
24 #include <linux/pinctrl/pinctrl.h>
25 #include <linux/pinctrl/pinmux.h>
26
27 #include "pinctrl-mvebu.h"
28
29 #define MPPS_PER_REG 8
30 #define MPP_BITS 4
31 #define MPP_MASK 0xf
32
33 struct mvebu_pinctrl_function {
34 const char *name;
35 const char **groups;
36 unsigned num_groups;
37 };
38
39 struct mvebu_pinctrl_group {
40 const char *name;
41 struct mvebu_mpp_ctrl *ctrl;
42 struct mvebu_mpp_ctrl_setting *settings;
43 unsigned num_settings;
44 unsigned gid;
45 unsigned *pins;
46 unsigned npins;
47 };
48
49 struct mvebu_pinctrl {
50 struct device *dev;
51 struct pinctrl_dev *pctldev;
52 struct pinctrl_desc desc;
53 void __iomem *base;
54 struct mvebu_pinctrl_group *groups;
55 unsigned num_groups;
56 struct mvebu_pinctrl_function *functions;
57 unsigned num_functions;
58 u8 variant;
59 };
60
61 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid(
62 struct mvebu_pinctrl *pctl, unsigned pid)
63 {
64 unsigned n;
65 for (n = 0; n < pctl->num_groups; n++) {
66 if (pid >= pctl->groups[n].pins[0] &&
67 pid < pctl->groups[n].pins[0] +
68 pctl->groups[n].npins)
69 return &pctl->groups[n];
70 }
71 return NULL;
72 }
73
74 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name(
75 struct mvebu_pinctrl *pctl, const char *name)
76 {
77 unsigned n;
78 for (n = 0; n < pctl->num_groups; n++) {
79 if (strcmp(name, pctl->groups[n].name) == 0)
80 return &pctl->groups[n];
81 }
82 return NULL;
83 }
84
85 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val(
86 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
87 unsigned long config)
88 {
89 unsigned n;
90 for (n = 0; n < grp->num_settings; n++) {
91 if (config == grp->settings[n].val) {
92 if (!pctl->variant || (pctl->variant &
93 grp->settings[n].variant))
94 return &grp->settings[n];
95 }
96 }
97 return NULL;
98 }
99
100 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name(
101 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
102 const char *name)
103 {
104 unsigned n;
105 for (n = 0; n < grp->num_settings; n++) {
106 if (strcmp(name, grp->settings[n].name) == 0) {
107 if (!pctl->variant || (pctl->variant &
108 grp->settings[n].variant))
109 return &grp->settings[n];
110 }
111 }
112 return NULL;
113 }
114
115 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting(
116 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp)
117 {
118 unsigned n;
119 for (n = 0; n < grp->num_settings; n++) {
120 if (grp->settings[n].flags &
121 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
122 if (!pctl->variant || (pctl->variant &
123 grp->settings[n].variant))
124 return &grp->settings[n];
125 }
126 }
127 return NULL;
128 }
129
130 static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name(
131 struct mvebu_pinctrl *pctl, const char *name)
132 {
133 unsigned n;
134 for (n = 0; n < pctl->num_functions; n++) {
135 if (strcmp(name, pctl->functions[n].name) == 0)
136 return &pctl->functions[n];
137 }
138 return NULL;
139 }
140
141 /*
142 * Common mpp pin configuration registers on MVEBU are
143 * registers of eight 4-bit values for each mpp setting.
144 * Register offset and bit mask are calculated accordingly below.
145 */
146 static int mvebu_common_mpp_get(struct mvebu_pinctrl *pctl,
147 struct mvebu_pinctrl_group *grp,
148 unsigned long *config)
149 {
150 unsigned pin = grp->gid;
151 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS;
152 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS;
153
154 *config = readl(pctl->base + off);
155 *config >>= shift;
156 *config &= MPP_MASK;
157
158 return 0;
159 }
160
161 static int mvebu_common_mpp_set(struct mvebu_pinctrl *pctl,
162 struct mvebu_pinctrl_group *grp,
163 unsigned long config)
164 {
165 unsigned pin = grp->gid;
166 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS;
167 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS;
168 unsigned long reg;
169
170 reg = readl(pctl->base + off);
171 reg &= ~(MPP_MASK << shift);
172 reg |= (config << shift);
173 writel(reg, pctl->base + off);
174
175 return 0;
176 }
177
178 static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,
179 unsigned gid, unsigned long *config)
180 {
181 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
182 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
183
184 if (!grp->ctrl)
185 return -EINVAL;
186
187 if (grp->ctrl->mpp_get)
188 return grp->ctrl->mpp_get(grp->ctrl, config);
189
190 return mvebu_common_mpp_get(pctl, grp, config);
191 }
192
193 static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,
194 unsigned gid, unsigned long config)
195 {
196 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
197 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
198
199 if (!grp->ctrl)
200 return -EINVAL;
201
202 if (grp->ctrl->mpp_set)
203 return grp->ctrl->mpp_set(grp->ctrl, config);
204
205 return mvebu_common_mpp_set(pctl, grp, config);
206 }
207
208 static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
209 struct seq_file *s, unsigned gid)
210 {
211 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
212 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
213 struct mvebu_mpp_ctrl_setting *curr;
214 unsigned long config;
215 unsigned n;
216
217 if (mvebu_pinconf_group_get(pctldev, gid, &config))
218 return;
219
220 curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config);
221
222 if (curr) {
223 seq_printf(s, "current: %s", curr->name);
224 if (curr->subname)
225 seq_printf(s, "(%s)", curr->subname);
226 if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
227 seq_printf(s, "(");
228 if (curr->flags & MVEBU_SETTING_GPI)
229 seq_printf(s, "i");
230 if (curr->flags & MVEBU_SETTING_GPO)
231 seq_printf(s, "o");
232 seq_printf(s, ")");
233 }
234 } else
235 seq_printf(s, "current: UNKNOWN");
236
237 if (grp->num_settings > 1) {
238 seq_printf(s, ", available = [");
239 for (n = 0; n < grp->num_settings; n++) {
240 if (curr == &grp->settings[n])
241 continue;
242
243 /* skip unsupported settings for this variant */
244 if (pctl->variant &&
245 !(pctl->variant & grp->settings[n].variant))
246 continue;
247
248 seq_printf(s, " %s", grp->settings[n].name);
249 if (grp->settings[n].subname)
250 seq_printf(s, "(%s)", grp->settings[n].subname);
251 if (grp->settings[n].flags &
252 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
253 seq_printf(s, "(");
254 if (grp->settings[n].flags & MVEBU_SETTING_GPI)
255 seq_printf(s, "i");
256 if (grp->settings[n].flags & MVEBU_SETTING_GPO)
257 seq_printf(s, "o");
258 seq_printf(s, ")");
259 }
260 }
261 seq_printf(s, " ]");
262 }
263 return;
264 }
265
266 static struct pinconf_ops mvebu_pinconf_ops = {
267 .pin_config_group_get = mvebu_pinconf_group_get,
268 .pin_config_group_set = mvebu_pinconf_group_set,
269 .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show,
270 };
271
272 static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev)
273 {
274 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
275
276 return pctl->num_functions;
277 }
278
279 static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev,
280 unsigned fid)
281 {
282 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
283
284 return pctl->functions[fid].name;
285 }
286
287 static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid,
288 const char * const **groups,
289 unsigned * const num_groups)
290 {
291 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
292
293 *groups = pctl->functions[fid].groups;
294 *num_groups = pctl->functions[fid].num_groups;
295 return 0;
296 }
297
298 static int mvebu_pinmux_enable(struct pinctrl_dev *pctldev, unsigned fid,
299 unsigned gid)
300 {
301 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
302 struct mvebu_pinctrl_function *func = &pctl->functions[fid];
303 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
304 struct mvebu_mpp_ctrl_setting *setting;
305 int ret;
306
307 setting = mvebu_pinctrl_find_setting_by_name(pctl, grp,
308 func->name);
309 if (!setting) {
310 dev_err(pctl->dev,
311 "unable to find setting %s in group %s\n",
312 func->name, func->groups[gid]);
313 return -EINVAL;
314 }
315
316 ret = mvebu_pinconf_group_set(pctldev, grp->gid, setting->val);
317 if (ret) {
318 dev_err(pctl->dev, "cannot set group %s to %s\n",
319 func->groups[gid], func->name);
320 return ret;
321 }
322
323 return 0;
324 }
325
326 static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
327 struct pinctrl_gpio_range *range, unsigned offset)
328 {
329 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
330 struct mvebu_pinctrl_group *grp;
331 struct mvebu_mpp_ctrl_setting *setting;
332
333 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
334 if (!grp)
335 return -EINVAL;
336
337 if (grp->ctrl->mpp_gpio_req)
338 return grp->ctrl->mpp_gpio_req(grp->ctrl, offset);
339
340 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
341 if (!setting)
342 return -ENOTSUPP;
343
344 return mvebu_pinconf_group_set(pctldev, grp->gid, setting->val);
345 }
346
347 static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
348 struct pinctrl_gpio_range *range, unsigned offset, bool input)
349 {
350 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
351 struct mvebu_pinctrl_group *grp;
352 struct mvebu_mpp_ctrl_setting *setting;
353
354 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
355 if (!grp)
356 return -EINVAL;
357
358 if (grp->ctrl->mpp_gpio_dir)
359 return grp->ctrl->mpp_gpio_dir(grp->ctrl, offset, input);
360
361 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
362 if (!setting)
363 return -ENOTSUPP;
364
365 if ((input && (setting->flags & MVEBU_SETTING_GPI)) ||
366 (!input && (setting->flags & MVEBU_SETTING_GPO)))
367 return 0;
368
369 return -ENOTSUPP;
370 }
371
372 static struct pinmux_ops mvebu_pinmux_ops = {
373 .get_functions_count = mvebu_pinmux_get_funcs_count,
374 .get_function_name = mvebu_pinmux_get_func_name,
375 .get_function_groups = mvebu_pinmux_get_groups,
376 .gpio_request_enable = mvebu_pinmux_gpio_request_enable,
377 .gpio_set_direction = mvebu_pinmux_gpio_set_direction,
378 .enable = mvebu_pinmux_enable,
379 };
380
381 static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
382 {
383 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
384 return pctl->num_groups;
385 }
386
387 static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
388 unsigned gid)
389 {
390 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
391 return pctl->groups[gid].name;
392 }
393
394 static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
395 unsigned gid, const unsigned **pins,
396 unsigned *num_pins)
397 {
398 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
399 *pins = pctl->groups[gid].pins;
400 *num_pins = pctl->groups[gid].npins;
401 return 0;
402 }
403
404 static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
405 struct device_node *np,
406 struct pinctrl_map **map,
407 unsigned *num_maps)
408 {
409 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
410 struct property *prop;
411 const char *function;
412 const char *group;
413 int ret, nmaps, n;
414
415 *map = NULL;
416 *num_maps = 0;
417
418 ret = of_property_read_string(np, "marvell,function", &function);
419 if (ret) {
420 dev_err(pctl->dev,
421 "missing marvell,function in node %s\n", np->name);
422 return 0;
423 }
424
425 nmaps = of_property_count_strings(np, "marvell,pins");
426 if (nmaps < 0) {
427 dev_err(pctl->dev,
428 "missing marvell,pins in node %s\n", np->name);
429 return 0;
430 }
431
432 *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
433 if (map == NULL) {
434 dev_err(pctl->dev,
435 "cannot allocate pinctrl_map memory for %s\n",
436 np->name);
437 return -ENOMEM;
438 }
439
440 n = 0;
441 of_property_for_each_string(np, "marvell,pins", prop, group) {
442 struct mvebu_pinctrl_group *grp =
443 mvebu_pinctrl_find_group_by_name(pctl, group);
444
445 if (!grp) {
446 dev_err(pctl->dev, "unknown pin %s", group);
447 continue;
448 }
449
450 if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) {
451 dev_err(pctl->dev, "unsupported function %s on pin %s",
452 function, group);
453 continue;
454 }
455
456 (*map)[n].type = PIN_MAP_TYPE_MUX_GROUP;
457 (*map)[n].data.mux.group = group;
458 (*map)[n].data.mux.function = function;
459 n++;
460 }
461
462 *num_maps = nmaps;
463
464 return 0;
465 }
466
467 static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
468 struct pinctrl_map *map, unsigned num_maps)
469 {
470 kfree(map);
471 }
472
473 static struct pinctrl_ops mvebu_pinctrl_ops = {
474 .get_groups_count = mvebu_pinctrl_get_groups_count,
475 .get_group_name = mvebu_pinctrl_get_group_name,
476 .get_group_pins = mvebu_pinctrl_get_group_pins,
477 .dt_node_to_map = mvebu_pinctrl_dt_node_to_map,
478 .dt_free_map = mvebu_pinctrl_dt_free_map,
479 };
480
481 static int _add_function(struct mvebu_pinctrl_function *funcs, const char *name)
482 {
483 while (funcs->num_groups) {
484 /* function already there */
485 if (strcmp(funcs->name, name) == 0) {
486 funcs->num_groups++;
487 return -EEXIST;
488 }
489 funcs++;
490 }
491 funcs->name = name;
492 funcs->num_groups = 1;
493 return 0;
494 }
495
496 static int mvebu_pinctrl_build_functions(struct platform_device *pdev,
497 struct mvebu_pinctrl *pctl)
498 {
499 struct mvebu_pinctrl_function *funcs;
500 int num = 0;
501 int n, s;
502
503 /* we allocate functions for number of pins and hope
504 * there are less unique functions than pins available */
505 funcs = devm_kzalloc(&pdev->dev, pctl->desc.npins *
506 sizeof(struct mvebu_pinctrl_function), GFP_KERNEL);
507 if (!funcs)
508 return -ENOMEM;
509
510 for (n = 0; n < pctl->num_groups; n++) {
511 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
512 for (s = 0; s < grp->num_settings; s++) {
513 /* skip unsupported settings on this variant */
514 if (pctl->variant &&
515 !(pctl->variant & grp->settings[s].variant))
516 continue;
517
518 /* check for unique functions and count groups */
519 if (_add_function(funcs, grp->settings[s].name))
520 continue;
521
522 num++;
523 }
524 }
525
526 /* with the number of unique functions and it's groups known,
527 reallocate functions and assign group names */
528 funcs = krealloc(funcs, num * sizeof(struct mvebu_pinctrl_function),
529 GFP_KERNEL);
530 if (!funcs)
531 return -ENOMEM;
532
533 pctl->num_functions = num;
534 pctl->functions = funcs;
535
536 for (n = 0; n < pctl->num_groups; n++) {
537 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
538 for (s = 0; s < grp->num_settings; s++) {
539 struct mvebu_pinctrl_function *f;
540 const char **groups;
541
542 /* skip unsupported settings on this variant */
543 if (pctl->variant &&
544 !(pctl->variant & grp->settings[s].variant))
545 continue;
546
547 f = mvebu_pinctrl_find_function_by_name(pctl,
548 grp->settings[s].name);
549
550 /* allocate group name array if not done already */
551 if (!f->groups) {
552 f->groups = devm_kzalloc(&pdev->dev,
553 f->num_groups * sizeof(char *),
554 GFP_KERNEL);
555 if (!f->groups)
556 return -ENOMEM;
557 }
558
559 /* find next free group name and assign current name */
560 groups = f->groups;
561 while (*groups)
562 groups++;
563 *groups = grp->name;
564 }
565 }
566
567 return 0;
568 }
569
570 int mvebu_pinctrl_probe(struct platform_device *pdev)
571 {
572 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
573 struct device_node *np = pdev->dev.of_node;
574 struct mvebu_pinctrl *pctl;
575 void __iomem *base;
576 struct pinctrl_pin_desc *pdesc;
577 unsigned gid, n, k;
578 int ret;
579
580 if (!soc || !soc->controls || !soc->modes) {
581 dev_err(&pdev->dev, "wrong pinctrl soc info\n");
582 return -EINVAL;
583 }
584
585 base = of_iomap(np, 0);
586 if (!base) {
587 dev_err(&pdev->dev, "unable to get base address\n");
588 return -ENODEV;
589 }
590
591 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl),
592 GFP_KERNEL);
593 if (!pctl) {
594 dev_err(&pdev->dev, "unable to alloc driver\n");
595 return -ENOMEM;
596 }
597
598 pctl->desc.name = dev_name(&pdev->dev);
599 pctl->desc.owner = THIS_MODULE;
600 pctl->desc.pctlops = &mvebu_pinctrl_ops;
601 pctl->desc.pmxops = &mvebu_pinmux_ops;
602 pctl->desc.confops = &mvebu_pinconf_ops;
603 pctl->variant = soc->variant;
604 pctl->base = base;
605 pctl->dev = &pdev->dev;
606 platform_set_drvdata(pdev, pctl);
607
608 /* count controls and create names for mvebu generic
609 register controls; also does sanity checks */
610 pctl->num_groups = 0;
611 pctl->desc.npins = 0;
612 for (n = 0; n < soc->ncontrols; n++) {
613 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
614 char *names;
615
616 pctl->desc.npins += ctrl->npins;
617 /* initial control pins */
618 for (k = 0; k < ctrl->npins; k++)
619 ctrl->pins[k] = ctrl->pid + k;
620
621 /* special soc specific control */
622 if (ctrl->mpp_get || ctrl->mpp_set) {
623 if (!ctrl->name || !ctrl->mpp_set || !ctrl->mpp_set) {
624 dev_err(&pdev->dev, "wrong soc control info\n");
625 return -EINVAL;
626 }
627 pctl->num_groups += 1;
628 continue;
629 }
630
631 /* generic mvebu register control */
632 names = devm_kzalloc(&pdev->dev, ctrl->npins * 8, GFP_KERNEL);
633 if (!names) {
634 dev_err(&pdev->dev, "failed to alloc mpp names\n");
635 return -ENOMEM;
636 }
637 for (k = 0; k < ctrl->npins; k++)
638 sprintf(names + 8*k, "mpp%d", ctrl->pid+k);
639 ctrl->name = names;
640 pctl->num_groups += ctrl->npins;
641 }
642
643 pdesc = devm_kzalloc(&pdev->dev, pctl->desc.npins *
644 sizeof(struct pinctrl_pin_desc), GFP_KERNEL);
645 if (!pdesc) {
646 dev_err(&pdev->dev, "failed to alloc pinctrl pins\n");
647 return -ENOMEM;
648 }
649
650 for (n = 0; n < pctl->desc.npins; n++)
651 pdesc[n].number = n;
652 pctl->desc.pins = pdesc;
653
654 pctl->groups = devm_kzalloc(&pdev->dev, pctl->num_groups *
655 sizeof(struct mvebu_pinctrl_group), GFP_KERNEL);
656 if (!pctl->groups) {
657 dev_err(&pdev->dev, "failed to alloc pinctrl groups\n");
658 return -ENOMEM;
659 }
660
661 /* assign mpp controls to groups */
662 gid = 0;
663 for (n = 0; n < soc->ncontrols; n++) {
664 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
665 pctl->groups[gid].gid = gid;
666 pctl->groups[gid].ctrl = ctrl;
667 pctl->groups[gid].name = ctrl->name;
668 pctl->groups[gid].pins = ctrl->pins;
669 pctl->groups[gid].npins = ctrl->npins;
670
671 /* generic mvebu register control maps to a number of groups */
672 if (!ctrl->mpp_get && !ctrl->mpp_set) {
673 pctl->groups[gid].npins = 1;
674
675 for (k = 1; k < ctrl->npins; k++) {
676 gid++;
677 pctl->groups[gid].gid = gid;
678 pctl->groups[gid].ctrl = ctrl;
679 pctl->groups[gid].name = &ctrl->name[8*k];
680 pctl->groups[gid].pins = &ctrl->pins[k];
681 pctl->groups[gid].npins = 1;
682 }
683 }
684 gid++;
685 }
686
687 /* assign mpp modes to groups */
688 for (n = 0; n < soc->nmodes; n++) {
689 struct mvebu_mpp_mode *mode = &soc->modes[n];
690 struct mvebu_pinctrl_group *grp =
691 mvebu_pinctrl_find_group_by_pid(pctl, mode->pid);
692 unsigned num_settings;
693
694 if (!grp) {
695 dev_warn(&pdev->dev, "unknown pinctrl group %d\n",
696 mode->pid);
697 continue;
698 }
699
700 for (num_settings = 0; ;) {
701 struct mvebu_mpp_ctrl_setting *set =
702 &mode->settings[num_settings];
703
704 if (!set->name)
705 break;
706 num_settings++;
707
708 /* skip unsupported settings for this variant */
709 if (pctl->variant && !(pctl->variant & set->variant))
710 continue;
711
712 /* find gpio/gpo/gpi settings */
713 if (strcmp(set->name, "gpio") == 0)
714 set->flags = MVEBU_SETTING_GPI |
715 MVEBU_SETTING_GPO;
716 else if (strcmp(set->name, "gpo") == 0)
717 set->flags = MVEBU_SETTING_GPO;
718 else if (strcmp(set->name, "gpi") == 0)
719 set->flags = MVEBU_SETTING_GPI;
720 }
721
722 grp->settings = mode->settings;
723 grp->num_settings = num_settings;
724 }
725
726 ret = mvebu_pinctrl_build_functions(pdev, pctl);
727 if (ret) {
728 dev_err(&pdev->dev, "unable to build functions\n");
729 return ret;
730 }
731
732 pctl->pctldev = pinctrl_register(&pctl->desc, &pdev->dev, pctl);
733 if (!pctl->pctldev) {
734 dev_err(&pdev->dev, "unable to register pinctrl driver\n");
735 return -EINVAL;
736 }
737
738 dev_info(&pdev->dev, "registered pinctrl driver\n");
739
740 /* register gpio ranges */
741 for (n = 0; n < soc->ngpioranges; n++)
742 pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]);
743
744 return 0;
745 }
746
747 int mvebu_pinctrl_remove(struct platform_device *pdev)
748 {
749 struct mvebu_pinctrl *pctl = platform_get_drvdata(pdev);
750 pinctrl_unregister(pctl->pctldev);
751 return 0;
752 }