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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /*
66 * module name, copyright, version, etc.
67 */
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69
70 #ifdef CONFIG_IWLWIFI_DEBUG
71 #define VD "d"
72 #else
73 #define VD
74 #endif
75
76 #define DRV_VERSION IWLWIFI_VERSION VD
77
78
79 MODULE_DESCRIPTION(DRV_DESCRIPTION);
80 MODULE_VERSION(DRV_VERSION);
81 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
82 MODULE_LICENSE("GPL");
83 MODULE_ALIAS("iwl4965");
84
85 /*************** STATION TABLE MANAGEMENT ****
86 * mac80211 should be examined to determine if sta_info is duplicating
87 * the functionality provided here
88 */
89
90 /**************************************************************/
91
92 /**
93 * iwl_commit_rxon - commit staging_rxon to hardware
94 *
95 * The RXON command in staging_rxon is committed to the hardware and
96 * the active_rxon structure is updated with the new data. This
97 * function correctly transitions out of the RXON_ASSOC_MSK state if
98 * a HW tune is required based on the RXON structure changes.
99 */
100 int iwl_commit_rxon(struct iwl_priv *priv)
101 {
102 /* cast away the const for active_rxon in this function */
103 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
104 int ret;
105 bool new_assoc =
106 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
107
108 if (!iwl_is_alive(priv))
109 return -EBUSY;
110
111 /* always get timestamp with Rx frame */
112 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
113
114 ret = iwl_check_rxon_cmd(priv);
115 if (ret) {
116 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
117 return -EINVAL;
118 }
119
120 /*
121 * receive commit_rxon request
122 * abort any previous channel switch if still in process
123 */
124 if (priv->switch_rxon.switch_in_progress &&
125 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
126 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
127 le16_to_cpu(priv->switch_rxon.channel));
128 priv->switch_rxon.switch_in_progress = false;
129 }
130
131 /* If we don't need to send a full RXON, we can use
132 * iwl_rxon_assoc_cmd which is used to reconfigure filter
133 * and other flags for the current radio configuration. */
134 if (!iwl_full_rxon_required(priv)) {
135 ret = iwl_send_rxon_assoc(priv);
136 if (ret) {
137 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
138 return ret;
139 }
140
141 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
142 iwl_print_rx_config_cmd(priv);
143 return 0;
144 }
145
146 /* station table will be cleared */
147 priv->assoc_station_added = 0;
148
149 /* If we are currently associated and the new config requires
150 * an RXON_ASSOC and the new config wants the associated mask enabled,
151 * we must clear the associated from the active configuration
152 * before we apply the new config */
153 if (iwl_is_associated(priv) && new_assoc) {
154 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
155 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
156
157 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
158 sizeof(struct iwl_rxon_cmd),
159 &priv->active_rxon);
160
161 /* If the mask clearing failed then we set
162 * active_rxon back to what it was previously */
163 if (ret) {
164 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
165 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
166 return ret;
167 }
168 }
169
170 IWL_DEBUG_INFO(priv, "Sending RXON\n"
171 "* with%s RXON_FILTER_ASSOC_MSK\n"
172 "* channel = %d\n"
173 "* bssid = %pM\n",
174 (new_assoc ? "" : "out"),
175 le16_to_cpu(priv->staging_rxon.channel),
176 priv->staging_rxon.bssid_addr);
177
178 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
179
180 /* Apply the new configuration
181 * RXON unassoc clears the station table in uCode, send it before
182 * we add the bcast station. If assoc bit is set, we will send RXON
183 * after having added the bcast and bssid station.
184 */
185 if (!new_assoc) {
186 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
187 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
188 if (ret) {
189 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
190 return ret;
191 }
192 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
193 }
194
195 iwl_clear_stations_table(priv);
196
197 priv->start_calib = 0;
198
199 /* Add the broadcast address so we can send broadcast frames */
200 priv->cfg->ops->lib->add_bcast_station(priv);
201
202
203 /* If we have set the ASSOC_MSK and we are in BSS mode then
204 * add the IWL_AP_ID to the station rate table */
205 if (new_assoc) {
206 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
207 ret = iwl_rxon_add_station(priv,
208 priv->active_rxon.bssid_addr, 1);
209 if (ret == IWL_INVALID_STATION) {
210 IWL_ERR(priv,
211 "Error adding AP address for TX.\n");
212 return -EIO;
213 }
214 priv->assoc_station_added = 1;
215 if (priv->default_wep_key &&
216 iwl_send_static_wepkey_cmd(priv, 0))
217 IWL_ERR(priv,
218 "Could not send WEP static key.\n");
219 }
220
221 /*
222 * allow CTS-to-self if possible for new association.
223 * this is relevant only for 5000 series and up,
224 * but will not damage 4965
225 */
226 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
227
228 /* Apply the new configuration
229 * RXON assoc doesn't clear the station table in uCode,
230 */
231 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
232 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
233 if (ret) {
234 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
235 return ret;
236 }
237 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
238 }
239 iwl_print_rx_config_cmd(priv);
240
241 iwl_init_sensitivity(priv);
242
243 /* If we issue a new RXON command which required a tune then we must
244 * send a new TXPOWER command or we won't be able to Tx any frames */
245 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
246 if (ret) {
247 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
248 return ret;
249 }
250
251 return 0;
252 }
253
254 void iwl_update_chain_flags(struct iwl_priv *priv)
255 {
256
257 if (priv->cfg->ops->hcmd->set_rxon_chain)
258 priv->cfg->ops->hcmd->set_rxon_chain(priv);
259 iwlcore_commit_rxon(priv);
260 }
261
262 static void iwl_clear_free_frames(struct iwl_priv *priv)
263 {
264 struct list_head *element;
265
266 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
267 priv->frames_count);
268
269 while (!list_empty(&priv->free_frames)) {
270 element = priv->free_frames.next;
271 list_del(element);
272 kfree(list_entry(element, struct iwl_frame, list));
273 priv->frames_count--;
274 }
275
276 if (priv->frames_count) {
277 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
278 priv->frames_count);
279 priv->frames_count = 0;
280 }
281 }
282
283 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
284 {
285 struct iwl_frame *frame;
286 struct list_head *element;
287 if (list_empty(&priv->free_frames)) {
288 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
289 if (!frame) {
290 IWL_ERR(priv, "Could not allocate frame!\n");
291 return NULL;
292 }
293
294 priv->frames_count++;
295 return frame;
296 }
297
298 element = priv->free_frames.next;
299 list_del(element);
300 return list_entry(element, struct iwl_frame, list);
301 }
302
303 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
304 {
305 memset(frame, 0, sizeof(*frame));
306 list_add(&frame->list, &priv->free_frames);
307 }
308
309 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
310 struct ieee80211_hdr *hdr,
311 int left)
312 {
313 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
314 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
315 (priv->iw_mode != NL80211_IFTYPE_AP)))
316 return 0;
317
318 if (priv->ibss_beacon->len > left)
319 return 0;
320
321 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
322
323 return priv->ibss_beacon->len;
324 }
325
326 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
327 static void iwl_set_beacon_tim(struct iwl_priv *priv,
328 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
329 u8 *beacon, u32 frame_size)
330 {
331 u16 tim_idx;
332 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
333
334 /*
335 * The index is relative to frame start but we start looking at the
336 * variable-length part of the beacon.
337 */
338 tim_idx = mgmt->u.beacon.variable - beacon;
339
340 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
341 while ((tim_idx < (frame_size - 2)) &&
342 (beacon[tim_idx] != WLAN_EID_TIM))
343 tim_idx += beacon[tim_idx+1] + 2;
344
345 /* If TIM field was found, set variables */
346 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
347 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
348 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
349 } else
350 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
351 }
352
353 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
354 struct iwl_frame *frame)
355 {
356 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
357 u32 frame_size;
358 u32 rate_flags;
359 u32 rate;
360 /*
361 * We have to set up the TX command, the TX Beacon command, and the
362 * beacon contents.
363 */
364
365 /* Initialize memory */
366 tx_beacon_cmd = &frame->u.beacon;
367 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
368
369 /* Set up TX beacon contents */
370 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
371 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
372 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
373 return 0;
374
375 /* Set up TX command fields */
376 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
377 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
378 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
379 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
380 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
381
382 /* Set up TX beacon command fields */
383 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
384 frame_size);
385
386 /* Set up packet rate and flags */
387 rate = iwl_rate_get_lowest_plcp(priv);
388 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
389 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
390 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
391 rate_flags |= RATE_MCS_CCK_MSK;
392 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
393 rate_flags);
394
395 return sizeof(*tx_beacon_cmd) + frame_size;
396 }
397 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
398 {
399 struct iwl_frame *frame;
400 unsigned int frame_size;
401 int rc;
402
403 frame = iwl_get_free_frame(priv);
404 if (!frame) {
405 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
406 "command.\n");
407 return -ENOMEM;
408 }
409
410 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
411 if (!frame_size) {
412 IWL_ERR(priv, "Error configuring the beacon command\n");
413 iwl_free_frame(priv, frame);
414 return -EINVAL;
415 }
416
417 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
418 &frame->u.cmd[0]);
419
420 iwl_free_frame(priv, frame);
421
422 return rc;
423 }
424
425 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
426 {
427 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
428
429 dma_addr_t addr = get_unaligned_le32(&tb->lo);
430 if (sizeof(dma_addr_t) > sizeof(u32))
431 addr |=
432 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
433
434 return addr;
435 }
436
437 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
438 {
439 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
440
441 return le16_to_cpu(tb->hi_n_len) >> 4;
442 }
443
444 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
445 dma_addr_t addr, u16 len)
446 {
447 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
448 u16 hi_n_len = len << 4;
449
450 put_unaligned_le32(addr, &tb->lo);
451 if (sizeof(dma_addr_t) > sizeof(u32))
452 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
453
454 tb->hi_n_len = cpu_to_le16(hi_n_len);
455
456 tfd->num_tbs = idx + 1;
457 }
458
459 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
460 {
461 return tfd->num_tbs & 0x1f;
462 }
463
464 /**
465 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
466 * @priv - driver private data
467 * @txq - tx queue
468 *
469 * Does NOT advance any TFD circular buffer read/write indexes
470 * Does NOT free the TFD itself (which is within circular buffer)
471 */
472 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
473 {
474 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
475 struct iwl_tfd *tfd;
476 struct pci_dev *dev = priv->pci_dev;
477 int index = txq->q.read_ptr;
478 int i;
479 int num_tbs;
480
481 tfd = &tfd_tmp[index];
482
483 /* Sanity check on number of chunks */
484 num_tbs = iwl_tfd_get_num_tbs(tfd);
485
486 if (num_tbs >= IWL_NUM_OF_TBS) {
487 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
488 /* @todo issue fatal error, it is quite serious situation */
489 return;
490 }
491
492 /* Unmap tx_cmd */
493 if (num_tbs)
494 pci_unmap_single(dev,
495 pci_unmap_addr(&txq->meta[index], mapping),
496 pci_unmap_len(&txq->meta[index], len),
497 PCI_DMA_BIDIRECTIONAL);
498
499 /* Unmap chunks, if any. */
500 for (i = 1; i < num_tbs; i++) {
501 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
502 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
503
504 if (txq->txb) {
505 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
506 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
507 }
508 }
509 }
510
511 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
512 struct iwl_tx_queue *txq,
513 dma_addr_t addr, u16 len,
514 u8 reset, u8 pad)
515 {
516 struct iwl_queue *q;
517 struct iwl_tfd *tfd, *tfd_tmp;
518 u32 num_tbs;
519
520 q = &txq->q;
521 tfd_tmp = (struct iwl_tfd *)txq->tfds;
522 tfd = &tfd_tmp[q->write_ptr];
523
524 if (reset)
525 memset(tfd, 0, sizeof(*tfd));
526
527 num_tbs = iwl_tfd_get_num_tbs(tfd);
528
529 /* Each TFD can point to a maximum 20 Tx buffers */
530 if (num_tbs >= IWL_NUM_OF_TBS) {
531 IWL_ERR(priv, "Error can not send more than %d chunks\n",
532 IWL_NUM_OF_TBS);
533 return -EINVAL;
534 }
535
536 BUG_ON(addr & ~DMA_BIT_MASK(36));
537 if (unlikely(addr & ~IWL_TX_DMA_MASK))
538 IWL_ERR(priv, "Unaligned address = %llx\n",
539 (unsigned long long)addr);
540
541 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
542
543 return 0;
544 }
545
546 /*
547 * Tell nic where to find circular buffer of Tx Frame Descriptors for
548 * given Tx queue, and enable the DMA channel used for that queue.
549 *
550 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
551 * channels supported in hardware.
552 */
553 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
554 struct iwl_tx_queue *txq)
555 {
556 int txq_id = txq->q.id;
557
558 /* Circular buffer (TFD queue in DRAM) physical base address */
559 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
560 txq->q.dma_addr >> 8);
561
562 return 0;
563 }
564
565 /******************************************************************************
566 *
567 * Generic RX handler implementations
568 *
569 ******************************************************************************/
570 static void iwl_rx_reply_alive(struct iwl_priv *priv,
571 struct iwl_rx_mem_buffer *rxb)
572 {
573 struct iwl_rx_packet *pkt = rxb_addr(rxb);
574 struct iwl_alive_resp *palive;
575 struct delayed_work *pwork;
576
577 palive = &pkt->u.alive_frame;
578
579 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
580 "0x%01X 0x%01X\n",
581 palive->is_valid, palive->ver_type,
582 palive->ver_subtype);
583
584 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
585 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
586 memcpy(&priv->card_alive_init,
587 &pkt->u.alive_frame,
588 sizeof(struct iwl_init_alive_resp));
589 pwork = &priv->init_alive_start;
590 } else {
591 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
592 memcpy(&priv->card_alive, &pkt->u.alive_frame,
593 sizeof(struct iwl_alive_resp));
594 pwork = &priv->alive_start;
595 }
596
597 /* We delay the ALIVE response by 5ms to
598 * give the HW RF Kill time to activate... */
599 if (palive->is_valid == UCODE_VALID_OK)
600 queue_delayed_work(priv->workqueue, pwork,
601 msecs_to_jiffies(5));
602 else
603 IWL_WARN(priv, "uCode did not respond OK.\n");
604 }
605
606 static void iwl_bg_beacon_update(struct work_struct *work)
607 {
608 struct iwl_priv *priv =
609 container_of(work, struct iwl_priv, beacon_update);
610 struct sk_buff *beacon;
611
612 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
613 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
614
615 if (!beacon) {
616 IWL_ERR(priv, "update beacon failed\n");
617 return;
618 }
619
620 mutex_lock(&priv->mutex);
621 /* new beacon skb is allocated every time; dispose previous.*/
622 if (priv->ibss_beacon)
623 dev_kfree_skb(priv->ibss_beacon);
624
625 priv->ibss_beacon = beacon;
626 mutex_unlock(&priv->mutex);
627
628 iwl_send_beacon_cmd(priv);
629 }
630
631 /**
632 * iwl_bg_statistics_periodic - Timer callback to queue statistics
633 *
634 * This callback is provided in order to send a statistics request.
635 *
636 * This timer function is continually reset to execute within
637 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
638 * was received. We need to ensure we receive the statistics in order
639 * to update the temperature used for calibrating the TXPOWER.
640 */
641 static void iwl_bg_statistics_periodic(unsigned long data)
642 {
643 struct iwl_priv *priv = (struct iwl_priv *)data;
644
645 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
646 return;
647
648 /* dont send host command if rf-kill is on */
649 if (!iwl_is_ready_rf(priv))
650 return;
651
652 iwl_send_statistics_request(priv, CMD_ASYNC, false);
653 }
654
655
656 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
657 u32 start_idx, u32 num_events,
658 u32 mode)
659 {
660 u32 i;
661 u32 ptr; /* SRAM byte address of log data */
662 u32 ev, time, data; /* event log data */
663 unsigned long reg_flags;
664
665 if (mode == 0)
666 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
667 else
668 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
669
670 /* Make sure device is powered up for SRAM reads */
671 spin_lock_irqsave(&priv->reg_lock, reg_flags);
672 if (iwl_grab_nic_access(priv)) {
673 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
674 return;
675 }
676
677 /* Set starting address; reads will auto-increment */
678 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
679 rmb();
680
681 /*
682 * "time" is actually "data" for mode 0 (no timestamp).
683 * place event id # at far right for easier visual parsing.
684 */
685 for (i = 0; i < num_events; i++) {
686 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
687 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
688 if (mode == 0) {
689 trace_iwlwifi_dev_ucode_cont_event(priv,
690 0, time, ev);
691 } else {
692 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
693 trace_iwlwifi_dev_ucode_cont_event(priv,
694 time, data, ev);
695 }
696 }
697 /* Allow device to power down */
698 iwl_release_nic_access(priv);
699 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
700 }
701
702 static void iwl_continuous_event_trace(struct iwl_priv *priv)
703 {
704 u32 capacity; /* event log capacity in # entries */
705 u32 base; /* SRAM byte address of event log header */
706 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
707 u32 num_wraps; /* # times uCode wrapped to top of log */
708 u32 next_entry; /* index of next entry to be written by uCode */
709
710 if (priv->ucode_type == UCODE_INIT)
711 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
712 else
713 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
714 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
715 capacity = iwl_read_targ_mem(priv, base);
716 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
717 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
718 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
719 } else
720 return;
721
722 if (num_wraps == priv->event_log.num_wraps) {
723 iwl_print_cont_event_trace(priv,
724 base, priv->event_log.next_entry,
725 next_entry - priv->event_log.next_entry,
726 mode);
727 priv->event_log.non_wraps_count++;
728 } else {
729 if ((num_wraps - priv->event_log.num_wraps) > 1)
730 priv->event_log.wraps_more_count++;
731 else
732 priv->event_log.wraps_once_count++;
733 trace_iwlwifi_dev_ucode_wrap_event(priv,
734 num_wraps - priv->event_log.num_wraps,
735 next_entry, priv->event_log.next_entry);
736 if (next_entry < priv->event_log.next_entry) {
737 iwl_print_cont_event_trace(priv, base,
738 priv->event_log.next_entry,
739 capacity - priv->event_log.next_entry,
740 mode);
741
742 iwl_print_cont_event_trace(priv, base, 0,
743 next_entry, mode);
744 } else {
745 iwl_print_cont_event_trace(priv, base,
746 next_entry, capacity - next_entry,
747 mode);
748
749 iwl_print_cont_event_trace(priv, base, 0,
750 next_entry, mode);
751 }
752 }
753 priv->event_log.num_wraps = num_wraps;
754 priv->event_log.next_entry = next_entry;
755 }
756
757 /**
758 * iwl_bg_ucode_trace - Timer callback to log ucode event
759 *
760 * The timer is continually set to execute every
761 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
762 * this function is to perform continuous uCode event logging operation
763 * if enabled
764 */
765 static void iwl_bg_ucode_trace(unsigned long data)
766 {
767 struct iwl_priv *priv = (struct iwl_priv *)data;
768
769 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
770 return;
771
772 if (priv->event_log.ucode_trace) {
773 iwl_continuous_event_trace(priv);
774 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
775 mod_timer(&priv->ucode_trace,
776 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
777 }
778 }
779
780 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
781 struct iwl_rx_mem_buffer *rxb)
782 {
783 #ifdef CONFIG_IWLWIFI_DEBUG
784 struct iwl_rx_packet *pkt = rxb_addr(rxb);
785 struct iwl4965_beacon_notif *beacon =
786 (struct iwl4965_beacon_notif *)pkt->u.raw;
787 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
788
789 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
790 "tsf %d %d rate %d\n",
791 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
792 beacon->beacon_notify_hdr.failure_frame,
793 le32_to_cpu(beacon->ibss_mgr_status),
794 le32_to_cpu(beacon->high_tsf),
795 le32_to_cpu(beacon->low_tsf), rate);
796 #endif
797
798 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
799 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
800 queue_work(priv->workqueue, &priv->beacon_update);
801 }
802
803 /* Handle notification from uCode that card's power state is changing
804 * due to software, hardware, or critical temperature RFKILL */
805 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
806 struct iwl_rx_mem_buffer *rxb)
807 {
808 struct iwl_rx_packet *pkt = rxb_addr(rxb);
809 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
810 unsigned long status = priv->status;
811
812 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
813 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
814 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
815 (flags & CT_CARD_DISABLED) ?
816 "Reached" : "Not reached");
817
818 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
819 CT_CARD_DISABLED)) {
820
821 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
822 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
823
824 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
825 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
826
827 if (!(flags & RXON_CARD_DISABLED)) {
828 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
829 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
830 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
831 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
832 }
833 if (flags & CT_CARD_DISABLED)
834 iwl_tt_enter_ct_kill(priv);
835 }
836 if (!(flags & CT_CARD_DISABLED))
837 iwl_tt_exit_ct_kill(priv);
838
839 if (flags & HW_CARD_DISABLED)
840 set_bit(STATUS_RF_KILL_HW, &priv->status);
841 else
842 clear_bit(STATUS_RF_KILL_HW, &priv->status);
843
844
845 if (!(flags & RXON_CARD_DISABLED))
846 iwl_scan_cancel(priv);
847
848 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
849 test_bit(STATUS_RF_KILL_HW, &priv->status)))
850 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
851 test_bit(STATUS_RF_KILL_HW, &priv->status));
852 else
853 wake_up_interruptible(&priv->wait_command_queue);
854 }
855
856 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
857 {
858 if (src == IWL_PWR_SRC_VAUX) {
859 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
860 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
861 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
862 ~APMG_PS_CTRL_MSK_PWR_SRC);
863 } else {
864 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
865 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
866 ~APMG_PS_CTRL_MSK_PWR_SRC);
867 }
868
869 return 0;
870 }
871
872 /**
873 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
874 *
875 * Setup the RX handlers for each of the reply types sent from the uCode
876 * to the host.
877 *
878 * This function chains into the hardware specific files for them to setup
879 * any hardware specific handlers as well.
880 */
881 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
882 {
883 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
884 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
885 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
886 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
887 iwl_rx_spectrum_measure_notif;
888 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
889 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
890 iwl_rx_pm_debug_statistics_notif;
891 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
892
893 /*
894 * The same handler is used for both the REPLY to a discrete
895 * statistics request from the host as well as for the periodic
896 * statistics notifications (after received beacons) from the uCode.
897 */
898 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
899 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
900
901 iwl_setup_rx_scan_handlers(priv);
902
903 /* status change handler */
904 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
905
906 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
907 iwl_rx_missed_beacon_notif;
908 /* Rx handlers */
909 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
910 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
911 /* block ack */
912 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
913 /* Set up hardware specific Rx handlers */
914 priv->cfg->ops->lib->rx_handler_setup(priv);
915 }
916
917 /**
918 * iwl_rx_handle - Main entry function for receiving responses from uCode
919 *
920 * Uses the priv->rx_handlers callback function array to invoke
921 * the appropriate handlers, including command responses,
922 * frame-received notifications, and other notifications.
923 */
924 void iwl_rx_handle(struct iwl_priv *priv)
925 {
926 struct iwl_rx_mem_buffer *rxb;
927 struct iwl_rx_packet *pkt;
928 struct iwl_rx_queue *rxq = &priv->rxq;
929 u32 r, i;
930 int reclaim;
931 unsigned long flags;
932 u8 fill_rx = 0;
933 u32 count = 8;
934 int total_empty;
935
936 /* uCode's read index (stored in shared DRAM) indicates the last Rx
937 * buffer that the driver may process (last buffer filled by ucode). */
938 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
939 i = rxq->read;
940
941 /* Rx interrupt, but nothing sent from uCode */
942 if (i == r)
943 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
944
945 /* calculate total frames need to be restock after handling RX */
946 total_empty = r - rxq->write_actual;
947 if (total_empty < 0)
948 total_empty += RX_QUEUE_SIZE;
949
950 if (total_empty > (RX_QUEUE_SIZE / 2))
951 fill_rx = 1;
952
953 while (i != r) {
954 rxb = rxq->queue[i];
955
956 /* If an RXB doesn't have a Rx queue slot associated with it,
957 * then a bug has been introduced in the queue refilling
958 * routines -- catch it here */
959 BUG_ON(rxb == NULL);
960
961 rxq->queue[i] = NULL;
962
963 pci_unmap_page(priv->pci_dev, rxb->page_dma,
964 PAGE_SIZE << priv->hw_params.rx_page_order,
965 PCI_DMA_FROMDEVICE);
966 pkt = rxb_addr(rxb);
967
968 trace_iwlwifi_dev_rx(priv, pkt,
969 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
970
971 /* Reclaim a command buffer only if this packet is a response
972 * to a (driver-originated) command.
973 * If the packet (e.g. Rx frame) originated from uCode,
974 * there is no command buffer to reclaim.
975 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
976 * but apparently a few don't get set; catch them here. */
977 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
978 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
979 (pkt->hdr.cmd != REPLY_RX) &&
980 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
981 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
982 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
983 (pkt->hdr.cmd != REPLY_TX);
984
985 /* Based on type of command response or notification,
986 * handle those that need handling via function in
987 * rx_handlers table. See iwl_setup_rx_handlers() */
988 if (priv->rx_handlers[pkt->hdr.cmd]) {
989 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
990 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
991 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
992 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
993 } else {
994 /* No handling needed */
995 IWL_DEBUG_RX(priv,
996 "r %d i %d No handler needed for %s, 0x%02x\n",
997 r, i, get_cmd_string(pkt->hdr.cmd),
998 pkt->hdr.cmd);
999 }
1000
1001 /*
1002 * XXX: After here, we should always check rxb->page
1003 * against NULL before touching it or its virtual
1004 * memory (pkt). Because some rx_handler might have
1005 * already taken or freed the pages.
1006 */
1007
1008 if (reclaim) {
1009 /* Invoke any callbacks, transfer the buffer to caller,
1010 * and fire off the (possibly) blocking iwl_send_cmd()
1011 * as we reclaim the driver command queue */
1012 if (rxb->page)
1013 iwl_tx_cmd_complete(priv, rxb);
1014 else
1015 IWL_WARN(priv, "Claim null rxb?\n");
1016 }
1017
1018 /* Reuse the page if possible. For notification packets and
1019 * SKBs that fail to Rx correctly, add them back into the
1020 * rx_free list for reuse later. */
1021 spin_lock_irqsave(&rxq->lock, flags);
1022 if (rxb->page != NULL) {
1023 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1024 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1025 PCI_DMA_FROMDEVICE);
1026 list_add_tail(&rxb->list, &rxq->rx_free);
1027 rxq->free_count++;
1028 } else
1029 list_add_tail(&rxb->list, &rxq->rx_used);
1030
1031 spin_unlock_irqrestore(&rxq->lock, flags);
1032
1033 i = (i + 1) & RX_QUEUE_MASK;
1034 /* If there are a lot of unused frames,
1035 * restock the Rx queue so ucode wont assert. */
1036 if (fill_rx) {
1037 count++;
1038 if (count >= 8) {
1039 rxq->read = i;
1040 iwl_rx_replenish_now(priv);
1041 count = 0;
1042 }
1043 }
1044 }
1045
1046 /* Backtrack one entry */
1047 rxq->read = i;
1048 if (fill_rx)
1049 iwl_rx_replenish_now(priv);
1050 else
1051 iwl_rx_queue_restock(priv);
1052 }
1053
1054 /* call this function to flush any scheduled tasklet */
1055 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1056 {
1057 /* wait to make sure we flush pending tasklet*/
1058 synchronize_irq(priv->pci_dev->irq);
1059 tasklet_kill(&priv->irq_tasklet);
1060 }
1061
1062 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1063 {
1064 u32 inta, handled = 0;
1065 u32 inta_fh;
1066 unsigned long flags;
1067 u32 i;
1068 #ifdef CONFIG_IWLWIFI_DEBUG
1069 u32 inta_mask;
1070 #endif
1071
1072 spin_lock_irqsave(&priv->lock, flags);
1073
1074 /* Ack/clear/reset pending uCode interrupts.
1075 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1076 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1077 inta = iwl_read32(priv, CSR_INT);
1078 iwl_write32(priv, CSR_INT, inta);
1079
1080 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1081 * Any new interrupts that happen after this, either while we're
1082 * in this tasklet, or later, will show up in next ISR/tasklet. */
1083 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1084 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1085
1086 #ifdef CONFIG_IWLWIFI_DEBUG
1087 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1088 /* just for debug */
1089 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1090 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1091 inta, inta_mask, inta_fh);
1092 }
1093 #endif
1094
1095 spin_unlock_irqrestore(&priv->lock, flags);
1096
1097 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1098 * atomic, make sure that inta covers all the interrupts that
1099 * we've discovered, even if FH interrupt came in just after
1100 * reading CSR_INT. */
1101 if (inta_fh & CSR49_FH_INT_RX_MASK)
1102 inta |= CSR_INT_BIT_FH_RX;
1103 if (inta_fh & CSR49_FH_INT_TX_MASK)
1104 inta |= CSR_INT_BIT_FH_TX;
1105
1106 /* Now service all interrupt bits discovered above. */
1107 if (inta & CSR_INT_BIT_HW_ERR) {
1108 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1109
1110 /* Tell the device to stop sending interrupts */
1111 iwl_disable_interrupts(priv);
1112
1113 priv->isr_stats.hw++;
1114 iwl_irq_handle_error(priv);
1115
1116 handled |= CSR_INT_BIT_HW_ERR;
1117
1118 return;
1119 }
1120
1121 #ifdef CONFIG_IWLWIFI_DEBUG
1122 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1123 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1124 if (inta & CSR_INT_BIT_SCD) {
1125 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1126 "the frame/frames.\n");
1127 priv->isr_stats.sch++;
1128 }
1129
1130 /* Alive notification via Rx interrupt will do the real work */
1131 if (inta & CSR_INT_BIT_ALIVE) {
1132 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1133 priv->isr_stats.alive++;
1134 }
1135 }
1136 #endif
1137 /* Safely ignore these bits for debug checks below */
1138 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1139
1140 /* HW RF KILL switch toggled */
1141 if (inta & CSR_INT_BIT_RF_KILL) {
1142 int hw_rf_kill = 0;
1143 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1144 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1145 hw_rf_kill = 1;
1146
1147 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1148 hw_rf_kill ? "disable radio" : "enable radio");
1149
1150 priv->isr_stats.rfkill++;
1151
1152 /* driver only loads ucode once setting the interface up.
1153 * the driver allows loading the ucode even if the radio
1154 * is killed. Hence update the killswitch state here. The
1155 * rfkill handler will care about restarting if needed.
1156 */
1157 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1158 if (hw_rf_kill)
1159 set_bit(STATUS_RF_KILL_HW, &priv->status);
1160 else
1161 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1162 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1163 }
1164
1165 handled |= CSR_INT_BIT_RF_KILL;
1166 }
1167
1168 /* Chip got too hot and stopped itself */
1169 if (inta & CSR_INT_BIT_CT_KILL) {
1170 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1171 priv->isr_stats.ctkill++;
1172 handled |= CSR_INT_BIT_CT_KILL;
1173 }
1174
1175 /* Error detected by uCode */
1176 if (inta & CSR_INT_BIT_SW_ERR) {
1177 IWL_ERR(priv, "Microcode SW error detected. "
1178 " Restarting 0x%X.\n", inta);
1179 priv->isr_stats.sw++;
1180 priv->isr_stats.sw_err = inta;
1181 iwl_irq_handle_error(priv);
1182 handled |= CSR_INT_BIT_SW_ERR;
1183 }
1184
1185 /*
1186 * uCode wakes up after power-down sleep.
1187 * Tell device about any new tx or host commands enqueued,
1188 * and about any Rx buffers made available while asleep.
1189 */
1190 if (inta & CSR_INT_BIT_WAKEUP) {
1191 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1192 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1193 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1194 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1195 priv->isr_stats.wakeup++;
1196 handled |= CSR_INT_BIT_WAKEUP;
1197 }
1198
1199 /* All uCode command responses, including Tx command responses,
1200 * Rx "responses" (frame-received notification), and other
1201 * notifications from uCode come through here*/
1202 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1203 iwl_rx_handle(priv);
1204 priv->isr_stats.rx++;
1205 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1206 }
1207
1208 /* This "Tx" DMA channel is used only for loading uCode */
1209 if (inta & CSR_INT_BIT_FH_TX) {
1210 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1211 priv->isr_stats.tx++;
1212 handled |= CSR_INT_BIT_FH_TX;
1213 /* Wake up uCode load routine, now that load is complete */
1214 priv->ucode_write_complete = 1;
1215 wake_up_interruptible(&priv->wait_command_queue);
1216 }
1217
1218 if (inta & ~handled) {
1219 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1220 priv->isr_stats.unhandled++;
1221 }
1222
1223 if (inta & ~(priv->inta_mask)) {
1224 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1225 inta & ~priv->inta_mask);
1226 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1227 }
1228
1229 /* Re-enable all interrupts */
1230 /* only Re-enable if diabled by irq */
1231 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1232 iwl_enable_interrupts(priv);
1233
1234 #ifdef CONFIG_IWLWIFI_DEBUG
1235 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1236 inta = iwl_read32(priv, CSR_INT);
1237 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1238 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1239 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1240 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1241 }
1242 #endif
1243 }
1244
1245 /* tasklet for iwlagn interrupt */
1246 static void iwl_irq_tasklet(struct iwl_priv *priv)
1247 {
1248 u32 inta = 0;
1249 u32 handled = 0;
1250 unsigned long flags;
1251 u32 i;
1252 #ifdef CONFIG_IWLWIFI_DEBUG
1253 u32 inta_mask;
1254 #endif
1255
1256 spin_lock_irqsave(&priv->lock, flags);
1257
1258 /* Ack/clear/reset pending uCode interrupts.
1259 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1260 */
1261 iwl_write32(priv, CSR_INT, priv->inta);
1262
1263 inta = priv->inta;
1264
1265 #ifdef CONFIG_IWLWIFI_DEBUG
1266 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1267 /* just for debug */
1268 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1269 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1270 inta, inta_mask);
1271 }
1272 #endif
1273
1274 spin_unlock_irqrestore(&priv->lock, flags);
1275
1276 /* saved interrupt in inta variable now we can reset priv->inta */
1277 priv->inta = 0;
1278
1279 /* Now service all interrupt bits discovered above. */
1280 if (inta & CSR_INT_BIT_HW_ERR) {
1281 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1282
1283 /* Tell the device to stop sending interrupts */
1284 iwl_disable_interrupts(priv);
1285
1286 priv->isr_stats.hw++;
1287 iwl_irq_handle_error(priv);
1288
1289 handled |= CSR_INT_BIT_HW_ERR;
1290
1291 return;
1292 }
1293
1294 #ifdef CONFIG_IWLWIFI_DEBUG
1295 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1296 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1297 if (inta & CSR_INT_BIT_SCD) {
1298 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1299 "the frame/frames.\n");
1300 priv->isr_stats.sch++;
1301 }
1302
1303 /* Alive notification via Rx interrupt will do the real work */
1304 if (inta & CSR_INT_BIT_ALIVE) {
1305 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1306 priv->isr_stats.alive++;
1307 }
1308 }
1309 #endif
1310 /* Safely ignore these bits for debug checks below */
1311 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1312
1313 /* HW RF KILL switch toggled */
1314 if (inta & CSR_INT_BIT_RF_KILL) {
1315 int hw_rf_kill = 0;
1316 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1317 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1318 hw_rf_kill = 1;
1319
1320 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1321 hw_rf_kill ? "disable radio" : "enable radio");
1322
1323 priv->isr_stats.rfkill++;
1324
1325 /* driver only loads ucode once setting the interface up.
1326 * the driver allows loading the ucode even if the radio
1327 * is killed. Hence update the killswitch state here. The
1328 * rfkill handler will care about restarting if needed.
1329 */
1330 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1331 if (hw_rf_kill)
1332 set_bit(STATUS_RF_KILL_HW, &priv->status);
1333 else
1334 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1335 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1336 }
1337
1338 handled |= CSR_INT_BIT_RF_KILL;
1339 }
1340
1341 /* Chip got too hot and stopped itself */
1342 if (inta & CSR_INT_BIT_CT_KILL) {
1343 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1344 priv->isr_stats.ctkill++;
1345 handled |= CSR_INT_BIT_CT_KILL;
1346 }
1347
1348 /* Error detected by uCode */
1349 if (inta & CSR_INT_BIT_SW_ERR) {
1350 IWL_ERR(priv, "Microcode SW error detected. "
1351 " Restarting 0x%X.\n", inta);
1352 priv->isr_stats.sw++;
1353 priv->isr_stats.sw_err = inta;
1354 iwl_irq_handle_error(priv);
1355 handled |= CSR_INT_BIT_SW_ERR;
1356 }
1357
1358 /* uCode wakes up after power-down sleep */
1359 if (inta & CSR_INT_BIT_WAKEUP) {
1360 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1361 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1362 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1363 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1364
1365 priv->isr_stats.wakeup++;
1366
1367 handled |= CSR_INT_BIT_WAKEUP;
1368 }
1369
1370 /* All uCode command responses, including Tx command responses,
1371 * Rx "responses" (frame-received notification), and other
1372 * notifications from uCode come through here*/
1373 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1374 CSR_INT_BIT_RX_PERIODIC)) {
1375 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1376 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1377 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1378 iwl_write32(priv, CSR_FH_INT_STATUS,
1379 CSR49_FH_INT_RX_MASK);
1380 }
1381 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1382 handled |= CSR_INT_BIT_RX_PERIODIC;
1383 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1384 }
1385 /* Sending RX interrupt require many steps to be done in the
1386 * the device:
1387 * 1- write interrupt to current index in ICT table.
1388 * 2- dma RX frame.
1389 * 3- update RX shared data to indicate last write index.
1390 * 4- send interrupt.
1391 * This could lead to RX race, driver could receive RX interrupt
1392 * but the shared data changes does not reflect this;
1393 * periodic interrupt will detect any dangling Rx activity.
1394 */
1395
1396 /* Disable periodic interrupt; we use it as just a one-shot. */
1397 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1398 CSR_INT_PERIODIC_DIS);
1399 iwl_rx_handle(priv);
1400
1401 /*
1402 * Enable periodic interrupt in 8 msec only if we received
1403 * real RX interrupt (instead of just periodic int), to catch
1404 * any dangling Rx interrupt. If it was just the periodic
1405 * interrupt, there was no dangling Rx activity, and no need
1406 * to extend the periodic interrupt; one-shot is enough.
1407 */
1408 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1409 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1410 CSR_INT_PERIODIC_ENA);
1411
1412 priv->isr_stats.rx++;
1413 }
1414
1415 /* This "Tx" DMA channel is used only for loading uCode */
1416 if (inta & CSR_INT_BIT_FH_TX) {
1417 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1418 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1419 priv->isr_stats.tx++;
1420 handled |= CSR_INT_BIT_FH_TX;
1421 /* Wake up uCode load routine, now that load is complete */
1422 priv->ucode_write_complete = 1;
1423 wake_up_interruptible(&priv->wait_command_queue);
1424 }
1425
1426 if (inta & ~handled) {
1427 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1428 priv->isr_stats.unhandled++;
1429 }
1430
1431 if (inta & ~(priv->inta_mask)) {
1432 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1433 inta & ~priv->inta_mask);
1434 }
1435
1436 /* Re-enable all interrupts */
1437 /* only Re-enable if diabled by irq */
1438 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1439 iwl_enable_interrupts(priv);
1440 }
1441
1442
1443 /******************************************************************************
1444 *
1445 * uCode download functions
1446 *
1447 ******************************************************************************/
1448
1449 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1450 {
1451 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1452 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1453 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1454 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1455 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1456 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1457 }
1458
1459 static void iwl_nic_start(struct iwl_priv *priv)
1460 {
1461 /* Remove all resets to allow NIC to operate */
1462 iwl_write32(priv, CSR_RESET, 0);
1463 }
1464
1465
1466 /**
1467 * iwl_read_ucode - Read uCode images from disk file.
1468 *
1469 * Copy into buffers for card to fetch via bus-mastering
1470 */
1471 static int iwl_read_ucode(struct iwl_priv *priv)
1472 {
1473 struct iwl_ucode_header *ucode;
1474 int ret = -EINVAL, index;
1475 const struct firmware *ucode_raw;
1476 const char *name_pre = priv->cfg->fw_name_pre;
1477 const unsigned int api_max = priv->cfg->ucode_api_max;
1478 const unsigned int api_min = priv->cfg->ucode_api_min;
1479 char buf[25];
1480 u8 *src;
1481 size_t len;
1482 u32 api_ver, build;
1483 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1484 u16 eeprom_ver;
1485
1486 /* Ask kernel firmware_class module to get the boot firmware off disk.
1487 * request_firmware() is synchronous, file is in memory on return. */
1488 for (index = api_max; index >= api_min; index--) {
1489 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1490 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1491 if (ret < 0) {
1492 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1493 buf, ret);
1494 if (ret == -ENOENT)
1495 continue;
1496 else
1497 goto error;
1498 } else {
1499 if (index < api_max)
1500 IWL_ERR(priv, "Loaded firmware %s, "
1501 "which is deprecated. "
1502 "Please use API v%u instead.\n",
1503 buf, api_max);
1504
1505 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1506 buf, ucode_raw->size);
1507 break;
1508 }
1509 }
1510
1511 if (ret < 0)
1512 goto error;
1513
1514 /* Make sure that we got at least the v1 header! */
1515 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1516 IWL_ERR(priv, "File size way too small!\n");
1517 ret = -EINVAL;
1518 goto err_release;
1519 }
1520
1521 /* Data from ucode file: header followed by uCode images */
1522 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1523
1524 priv->ucode_ver = le32_to_cpu(ucode->ver);
1525 api_ver = IWL_UCODE_API(priv->ucode_ver);
1526 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1527 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1528 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1529 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1530 init_data_size =
1531 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1532 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1533 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1534
1535 /* api_ver should match the api version forming part of the
1536 * firmware filename ... but we don't check for that and only rely
1537 * on the API version read from firmware header from here on forward */
1538
1539 if (api_ver < api_min || api_ver > api_max) {
1540 IWL_ERR(priv, "Driver unable to support your firmware API. "
1541 "Driver supports v%u, firmware is v%u.\n",
1542 api_max, api_ver);
1543 priv->ucode_ver = 0;
1544 ret = -EINVAL;
1545 goto err_release;
1546 }
1547 if (api_ver != api_max)
1548 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1549 "got v%u. New firmware can be obtained "
1550 "from http://www.intellinuxwireless.org.\n",
1551 api_max, api_ver);
1552
1553 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1554 IWL_UCODE_MAJOR(priv->ucode_ver),
1555 IWL_UCODE_MINOR(priv->ucode_ver),
1556 IWL_UCODE_API(priv->ucode_ver),
1557 IWL_UCODE_SERIAL(priv->ucode_ver));
1558
1559 snprintf(priv->hw->wiphy->fw_version,
1560 sizeof(priv->hw->wiphy->fw_version),
1561 "%u.%u.%u.%u",
1562 IWL_UCODE_MAJOR(priv->ucode_ver),
1563 IWL_UCODE_MINOR(priv->ucode_ver),
1564 IWL_UCODE_API(priv->ucode_ver),
1565 IWL_UCODE_SERIAL(priv->ucode_ver));
1566
1567 if (build)
1568 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1569
1570 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1571 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1572 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1573 ? "OTP" : "EEPROM", eeprom_ver);
1574
1575 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1576 priv->ucode_ver);
1577 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1578 inst_size);
1579 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1580 data_size);
1581 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1582 init_size);
1583 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1584 init_data_size);
1585 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1586 boot_size);
1587
1588 /* Verify size of file vs. image size info in file's header */
1589 if (ucode_raw->size !=
1590 priv->cfg->ops->ucode->get_header_size(api_ver) +
1591 inst_size + data_size + init_size +
1592 init_data_size + boot_size) {
1593
1594 IWL_DEBUG_INFO(priv,
1595 "uCode file size %d does not match expected size\n",
1596 (int)ucode_raw->size);
1597 ret = -EINVAL;
1598 goto err_release;
1599 }
1600
1601 /* Verify that uCode images will fit in card's SRAM */
1602 if (inst_size > priv->hw_params.max_inst_size) {
1603 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1604 inst_size);
1605 ret = -EINVAL;
1606 goto err_release;
1607 }
1608
1609 if (data_size > priv->hw_params.max_data_size) {
1610 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1611 data_size);
1612 ret = -EINVAL;
1613 goto err_release;
1614 }
1615 if (init_size > priv->hw_params.max_inst_size) {
1616 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1617 init_size);
1618 ret = -EINVAL;
1619 goto err_release;
1620 }
1621 if (init_data_size > priv->hw_params.max_data_size) {
1622 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1623 init_data_size);
1624 ret = -EINVAL;
1625 goto err_release;
1626 }
1627 if (boot_size > priv->hw_params.max_bsm_size) {
1628 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1629 boot_size);
1630 ret = -EINVAL;
1631 goto err_release;
1632 }
1633
1634 /* Allocate ucode buffers for card's bus-master loading ... */
1635
1636 /* Runtime instructions and 2 copies of data:
1637 * 1) unmodified from disk
1638 * 2) backup cache for save/restore during power-downs */
1639 priv->ucode_code.len = inst_size;
1640 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1641
1642 priv->ucode_data.len = data_size;
1643 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1644
1645 priv->ucode_data_backup.len = data_size;
1646 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1647
1648 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1649 !priv->ucode_data_backup.v_addr)
1650 goto err_pci_alloc;
1651
1652 /* Initialization instructions and data */
1653 if (init_size && init_data_size) {
1654 priv->ucode_init.len = init_size;
1655 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1656
1657 priv->ucode_init_data.len = init_data_size;
1658 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1659
1660 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1661 goto err_pci_alloc;
1662 }
1663
1664 /* Bootstrap (instructions only, no data) */
1665 if (boot_size) {
1666 priv->ucode_boot.len = boot_size;
1667 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1668
1669 if (!priv->ucode_boot.v_addr)
1670 goto err_pci_alloc;
1671 }
1672
1673 /* Copy images into buffers for card's bus-master reads ... */
1674
1675 /* Runtime instructions (first block of data in file) */
1676 len = inst_size;
1677 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1678 memcpy(priv->ucode_code.v_addr, src, len);
1679 src += len;
1680
1681 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1682 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1683
1684 /* Runtime data (2nd block)
1685 * NOTE: Copy into backup buffer will be done in iwl_up() */
1686 len = data_size;
1687 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1688 memcpy(priv->ucode_data.v_addr, src, len);
1689 memcpy(priv->ucode_data_backup.v_addr, src, len);
1690 src += len;
1691
1692 /* Initialization instructions (3rd block) */
1693 if (init_size) {
1694 len = init_size;
1695 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1696 len);
1697 memcpy(priv->ucode_init.v_addr, src, len);
1698 src += len;
1699 }
1700
1701 /* Initialization data (4th block) */
1702 if (init_data_size) {
1703 len = init_data_size;
1704 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1705 len);
1706 memcpy(priv->ucode_init_data.v_addr, src, len);
1707 src += len;
1708 }
1709
1710 /* Bootstrap instructions (5th block) */
1711 len = boot_size;
1712 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1713 memcpy(priv->ucode_boot.v_addr, src, len);
1714
1715 /* We have our copies now, allow OS release its copies */
1716 release_firmware(ucode_raw);
1717 return 0;
1718
1719 err_pci_alloc:
1720 IWL_ERR(priv, "failed to allocate pci memory\n");
1721 ret = -ENOMEM;
1722 iwl_dealloc_ucode_pci(priv);
1723
1724 err_release:
1725 release_firmware(ucode_raw);
1726
1727 error:
1728 return ret;
1729 }
1730
1731 static const char *desc_lookup_text[] = {
1732 "OK",
1733 "FAIL",
1734 "BAD_PARAM",
1735 "BAD_CHECKSUM",
1736 "NMI_INTERRUPT_WDG",
1737 "SYSASSERT",
1738 "FATAL_ERROR",
1739 "BAD_COMMAND",
1740 "HW_ERROR_TUNE_LOCK",
1741 "HW_ERROR_TEMPERATURE",
1742 "ILLEGAL_CHAN_FREQ",
1743 "VCC_NOT_STABLE",
1744 "FH_ERROR",
1745 "NMI_INTERRUPT_HOST",
1746 "NMI_INTERRUPT_ACTION_PT",
1747 "NMI_INTERRUPT_UNKNOWN",
1748 "UCODE_VERSION_MISMATCH",
1749 "HW_ERROR_ABS_LOCK",
1750 "HW_ERROR_CAL_LOCK_FAIL",
1751 "NMI_INTERRUPT_INST_ACTION_PT",
1752 "NMI_INTERRUPT_DATA_ACTION_PT",
1753 "NMI_TRM_HW_ER",
1754 "NMI_INTERRUPT_TRM",
1755 "NMI_INTERRUPT_BREAK_POINT"
1756 "DEBUG_0",
1757 "DEBUG_1",
1758 "DEBUG_2",
1759 "DEBUG_3",
1760 "ADVANCED SYSASSERT"
1761 };
1762
1763 static const char *desc_lookup(int i)
1764 {
1765 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1766
1767 if (i < 0 || i > max)
1768 i = max;
1769
1770 return desc_lookup_text[i];
1771 }
1772
1773 #define ERROR_START_OFFSET (1 * sizeof(u32))
1774 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1775
1776 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1777 {
1778 u32 data2, line;
1779 u32 desc, time, count, base, data1;
1780 u32 blink1, blink2, ilink1, ilink2;
1781
1782 if (priv->ucode_type == UCODE_INIT)
1783 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1784 else
1785 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1786
1787 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1788 IWL_ERR(priv,
1789 "Not valid error log pointer 0x%08X for %s uCode\n",
1790 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1791 return;
1792 }
1793
1794 count = iwl_read_targ_mem(priv, base);
1795
1796 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1797 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1798 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1799 priv->status, count);
1800 }
1801
1802 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1803 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1804 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1805 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1806 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1807 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1808 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1809 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1810 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1811
1812 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1813 blink1, blink2, ilink1, ilink2);
1814
1815 IWL_ERR(priv, "Desc Time "
1816 "data1 data2 line\n");
1817 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1818 desc_lookup(desc), desc, time, data1, data2, line);
1819 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1820 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1821 ilink1, ilink2);
1822
1823 }
1824
1825 #define EVENT_START_OFFSET (4 * sizeof(u32))
1826
1827 /**
1828 * iwl_print_event_log - Dump error event log to syslog
1829 *
1830 */
1831 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1832 u32 num_events, u32 mode,
1833 int pos, char **buf, size_t bufsz)
1834 {
1835 u32 i;
1836 u32 base; /* SRAM byte address of event log header */
1837 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1838 u32 ptr; /* SRAM byte address of log data */
1839 u32 ev, time, data; /* event log data */
1840 unsigned long reg_flags;
1841
1842 if (num_events == 0)
1843 return pos;
1844 if (priv->ucode_type == UCODE_INIT)
1845 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1846 else
1847 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1848
1849 if (mode == 0)
1850 event_size = 2 * sizeof(u32);
1851 else
1852 event_size = 3 * sizeof(u32);
1853
1854 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1855
1856 /* Make sure device is powered up for SRAM reads */
1857 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1858 iwl_grab_nic_access(priv);
1859
1860 /* Set starting address; reads will auto-increment */
1861 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1862 rmb();
1863
1864 /* "time" is actually "data" for mode 0 (no timestamp).
1865 * place event id # at far right for easier visual parsing. */
1866 for (i = 0; i < num_events; i++) {
1867 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1868 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1869 if (mode == 0) {
1870 /* data, ev */
1871 if (bufsz) {
1872 pos += scnprintf(*buf + pos, bufsz - pos,
1873 "EVT_LOG:0x%08x:%04u\n",
1874 time, ev);
1875 } else {
1876 trace_iwlwifi_dev_ucode_event(priv, 0,
1877 time, ev);
1878 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1879 time, ev);
1880 }
1881 } else {
1882 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1883 if (bufsz) {
1884 pos += scnprintf(*buf + pos, bufsz - pos,
1885 "EVT_LOGT:%010u:0x%08x:%04u\n",
1886 time, data, ev);
1887 } else {
1888 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1889 time, data, ev);
1890 trace_iwlwifi_dev_ucode_event(priv, time,
1891 data, ev);
1892 }
1893 }
1894 }
1895
1896 /* Allow device to power down */
1897 iwl_release_nic_access(priv);
1898 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1899 return pos;
1900 }
1901
1902 /**
1903 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1904 */
1905 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1906 u32 num_wraps, u32 next_entry,
1907 u32 size, u32 mode,
1908 int pos, char **buf, size_t bufsz)
1909 {
1910 /*
1911 * display the newest DEFAULT_LOG_ENTRIES entries
1912 * i.e the entries just before the next ont that uCode would fill.
1913 */
1914 if (num_wraps) {
1915 if (next_entry < size) {
1916 pos = iwl_print_event_log(priv,
1917 capacity - (size - next_entry),
1918 size - next_entry, mode,
1919 pos, buf, bufsz);
1920 pos = iwl_print_event_log(priv, 0,
1921 next_entry, mode,
1922 pos, buf, bufsz);
1923 } else
1924 pos = iwl_print_event_log(priv, next_entry - size,
1925 size, mode, pos, buf, bufsz);
1926 } else {
1927 if (next_entry < size) {
1928 pos = iwl_print_event_log(priv, 0, next_entry,
1929 mode, pos, buf, bufsz);
1930 } else {
1931 pos = iwl_print_event_log(priv, next_entry - size,
1932 size, mode, pos, buf, bufsz);
1933 }
1934 }
1935 return pos;
1936 }
1937
1938 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1939 #define MAX_EVENT_LOG_SIZE (512)
1940
1941 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1942
1943 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1944 char **buf, bool display)
1945 {
1946 u32 base; /* SRAM byte address of event log header */
1947 u32 capacity; /* event log capacity in # entries */
1948 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1949 u32 num_wraps; /* # times uCode wrapped to top of log */
1950 u32 next_entry; /* index of next entry to be written by uCode */
1951 u32 size; /* # entries that we'll print */
1952 int pos = 0;
1953 size_t bufsz = 0;
1954
1955 if (priv->ucode_type == UCODE_INIT)
1956 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1957 else
1958 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1959
1960 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1961 IWL_ERR(priv,
1962 "Invalid event log pointer 0x%08X for %s uCode\n",
1963 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1964 return -EINVAL;
1965 }
1966
1967 /* event log header */
1968 capacity = iwl_read_targ_mem(priv, base);
1969 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1970 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1971 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1972
1973 if (capacity > MAX_EVENT_LOG_SIZE) {
1974 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1975 capacity, MAX_EVENT_LOG_SIZE);
1976 capacity = MAX_EVENT_LOG_SIZE;
1977 }
1978
1979 if (next_entry > MAX_EVENT_LOG_SIZE) {
1980 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1981 next_entry, MAX_EVENT_LOG_SIZE);
1982 next_entry = MAX_EVENT_LOG_SIZE;
1983 }
1984
1985 size = num_wraps ? capacity : next_entry;
1986
1987 /* bail out if nothing in log */
1988 if (size == 0) {
1989 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1990 return pos;
1991 }
1992
1993 #ifdef CONFIG_IWLWIFI_DEBUG
1994 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1995 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1996 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1997 #else
1998 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1999 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2000 #endif
2001 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2002 size);
2003
2004 #ifdef CONFIG_IWLWIFI_DEBUG
2005 if (display) {
2006 if (full_log)
2007 bufsz = capacity * 48;
2008 else
2009 bufsz = size * 48;
2010 *buf = kmalloc(bufsz, GFP_KERNEL);
2011 if (!*buf)
2012 return -ENOMEM;
2013 }
2014 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2015 /*
2016 * if uCode has wrapped back to top of log,
2017 * start at the oldest entry,
2018 * i.e the next one that uCode would fill.
2019 */
2020 if (num_wraps)
2021 pos = iwl_print_event_log(priv, next_entry,
2022 capacity - next_entry, mode,
2023 pos, buf, bufsz);
2024 /* (then/else) start at top of log */
2025 pos = iwl_print_event_log(priv, 0,
2026 next_entry, mode, pos, buf, bufsz);
2027 } else
2028 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2029 next_entry, size, mode,
2030 pos, buf, bufsz);
2031 #else
2032 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2033 next_entry, size, mode,
2034 pos, buf, bufsz);
2035 #endif
2036 return pos;
2037 }
2038
2039 /**
2040 * iwl_alive_start - called after REPLY_ALIVE notification received
2041 * from protocol/runtime uCode (initialization uCode's
2042 * Alive gets handled by iwl_init_alive_start()).
2043 */
2044 static void iwl_alive_start(struct iwl_priv *priv)
2045 {
2046 int ret = 0;
2047
2048 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2049
2050 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2051 /* We had an error bringing up the hardware, so take it
2052 * all the way back down so we can try again */
2053 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2054 goto restart;
2055 }
2056
2057 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2058 * This is a paranoid check, because we would not have gotten the
2059 * "runtime" alive if code weren't properly loaded. */
2060 if (iwl_verify_ucode(priv)) {
2061 /* Runtime instruction load was bad;
2062 * take it all the way back down so we can try again */
2063 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2064 goto restart;
2065 }
2066
2067 iwl_clear_stations_table(priv);
2068 ret = priv->cfg->ops->lib->alive_notify(priv);
2069 if (ret) {
2070 IWL_WARN(priv,
2071 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2072 goto restart;
2073 }
2074
2075 /* After the ALIVE response, we can send host commands to the uCode */
2076 set_bit(STATUS_ALIVE, &priv->status);
2077
2078 if (iwl_is_rfkill(priv))
2079 return;
2080
2081 ieee80211_wake_queues(priv->hw);
2082
2083 priv->active_rate = priv->rates_mask;
2084 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2085
2086 /* Configure Tx antenna selection based on H/W config */
2087 if (priv->cfg->ops->hcmd->set_tx_ant)
2088 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2089
2090 if (iwl_is_associated(priv)) {
2091 struct iwl_rxon_cmd *active_rxon =
2092 (struct iwl_rxon_cmd *)&priv->active_rxon;
2093 /* apply any changes in staging */
2094 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2095 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2096 } else {
2097 /* Initialize our rx_config data */
2098 iwl_connection_init_rx_config(priv, priv->iw_mode);
2099
2100 if (priv->cfg->ops->hcmd->set_rxon_chain)
2101 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2102
2103 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2104 }
2105
2106 /* Configure Bluetooth device coexistence support */
2107 iwl_send_bt_config(priv);
2108
2109 iwl_reset_run_time_calib(priv);
2110
2111 /* Configure the adapter for unassociated operation */
2112 iwlcore_commit_rxon(priv);
2113
2114 /* At this point, the NIC is initialized and operational */
2115 iwl_rf_kill_ct_config(priv);
2116
2117 iwl_leds_init(priv);
2118
2119 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2120 set_bit(STATUS_READY, &priv->status);
2121 wake_up_interruptible(&priv->wait_command_queue);
2122
2123 iwl_power_update_mode(priv, true);
2124
2125 /* reassociate for ADHOC mode */
2126 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2127 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2128 priv->vif);
2129 if (beacon)
2130 iwl_mac_beacon_update(priv->hw, beacon);
2131 }
2132
2133
2134 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2135 iwl_set_mode(priv, priv->iw_mode);
2136
2137 return;
2138
2139 restart:
2140 queue_work(priv->workqueue, &priv->restart);
2141 }
2142
2143 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2144
2145 static void __iwl_down(struct iwl_priv *priv)
2146 {
2147 unsigned long flags;
2148 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2149
2150 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2151
2152 if (!exit_pending)
2153 set_bit(STATUS_EXIT_PENDING, &priv->status);
2154
2155 iwl_clear_stations_table(priv);
2156
2157 /* Unblock any waiting calls */
2158 wake_up_interruptible_all(&priv->wait_command_queue);
2159
2160 /* Wipe out the EXIT_PENDING status bit if we are not actually
2161 * exiting the module */
2162 if (!exit_pending)
2163 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2164
2165 /* stop and reset the on-board processor */
2166 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2167
2168 /* tell the device to stop sending interrupts */
2169 spin_lock_irqsave(&priv->lock, flags);
2170 iwl_disable_interrupts(priv);
2171 spin_unlock_irqrestore(&priv->lock, flags);
2172 iwl_synchronize_irq(priv);
2173
2174 if (priv->mac80211_registered)
2175 ieee80211_stop_queues(priv->hw);
2176
2177 /* If we have not previously called iwl_init() then
2178 * clear all bits but the RF Kill bit and return */
2179 if (!iwl_is_init(priv)) {
2180 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2181 STATUS_RF_KILL_HW |
2182 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2183 STATUS_GEO_CONFIGURED |
2184 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2185 STATUS_EXIT_PENDING;
2186 goto exit;
2187 }
2188
2189 /* ...otherwise clear out all the status bits but the RF Kill
2190 * bit and continue taking the NIC down. */
2191 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2192 STATUS_RF_KILL_HW |
2193 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2194 STATUS_GEO_CONFIGURED |
2195 test_bit(STATUS_FW_ERROR, &priv->status) <<
2196 STATUS_FW_ERROR |
2197 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2198 STATUS_EXIT_PENDING;
2199
2200 /* device going down, Stop using ICT table */
2201 iwl_disable_ict(priv);
2202
2203 iwl_txq_ctx_stop(priv);
2204 iwl_rxq_stop(priv);
2205
2206 /* Power-down device's busmaster DMA clocks */
2207 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2208 udelay(5);
2209
2210 /* Make sure (redundant) we've released our request to stay awake */
2211 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2212
2213 /* Stop the device, and put it in low power state */
2214 priv->cfg->ops->lib->apm_ops.stop(priv);
2215
2216 exit:
2217 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2218
2219 if (priv->ibss_beacon)
2220 dev_kfree_skb(priv->ibss_beacon);
2221 priv->ibss_beacon = NULL;
2222
2223 /* clear out any free frames */
2224 iwl_clear_free_frames(priv);
2225 }
2226
2227 static void iwl_down(struct iwl_priv *priv)
2228 {
2229 mutex_lock(&priv->mutex);
2230 __iwl_down(priv);
2231 mutex_unlock(&priv->mutex);
2232
2233 iwl_cancel_deferred_work(priv);
2234 }
2235
2236 #define HW_READY_TIMEOUT (50)
2237
2238 static int iwl_set_hw_ready(struct iwl_priv *priv)
2239 {
2240 int ret = 0;
2241
2242 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2243 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2244
2245 /* See if we got it */
2246 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2247 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2248 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2249 HW_READY_TIMEOUT);
2250 if (ret != -ETIMEDOUT)
2251 priv->hw_ready = true;
2252 else
2253 priv->hw_ready = false;
2254
2255 IWL_DEBUG_INFO(priv, "hardware %s\n",
2256 (priv->hw_ready == 1) ? "ready" : "not ready");
2257 return ret;
2258 }
2259
2260 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2261 {
2262 int ret = 0;
2263
2264 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2265
2266 ret = iwl_set_hw_ready(priv);
2267 if (priv->hw_ready)
2268 return ret;
2269
2270 /* If HW is not ready, prepare the conditions to check again */
2271 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2272 CSR_HW_IF_CONFIG_REG_PREPARE);
2273
2274 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2275 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2276 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2277
2278 /* HW should be ready by now, check again. */
2279 if (ret != -ETIMEDOUT)
2280 iwl_set_hw_ready(priv);
2281
2282 return ret;
2283 }
2284
2285 #define MAX_HW_RESTARTS 5
2286
2287 static int __iwl_up(struct iwl_priv *priv)
2288 {
2289 int i;
2290 int ret;
2291
2292 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2293 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2294 return -EIO;
2295 }
2296
2297 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2298 IWL_ERR(priv, "ucode not available for device bringup\n");
2299 return -EIO;
2300 }
2301
2302 iwl_prepare_card_hw(priv);
2303
2304 if (!priv->hw_ready) {
2305 IWL_WARN(priv, "Exit HW not ready\n");
2306 return -EIO;
2307 }
2308
2309 /* If platform's RF_KILL switch is NOT set to KILL */
2310 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2311 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2312 else
2313 set_bit(STATUS_RF_KILL_HW, &priv->status);
2314
2315 if (iwl_is_rfkill(priv)) {
2316 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2317
2318 iwl_enable_interrupts(priv);
2319 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2320 return 0;
2321 }
2322
2323 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2324
2325 ret = iwl_hw_nic_init(priv);
2326 if (ret) {
2327 IWL_ERR(priv, "Unable to init nic\n");
2328 return ret;
2329 }
2330
2331 /* make sure rfkill handshake bits are cleared */
2332 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2333 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2334 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2335
2336 /* clear (again), then enable host interrupts */
2337 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2338 iwl_enable_interrupts(priv);
2339
2340 /* really make sure rfkill handshake bits are cleared */
2341 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2342 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2343
2344 /* Copy original ucode data image from disk into backup cache.
2345 * This will be used to initialize the on-board processor's
2346 * data SRAM for a clean start when the runtime program first loads. */
2347 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2348 priv->ucode_data.len);
2349
2350 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2351
2352 iwl_clear_stations_table(priv);
2353
2354 /* load bootstrap state machine,
2355 * load bootstrap program into processor's memory,
2356 * prepare to load the "initialize" uCode */
2357 ret = priv->cfg->ops->lib->load_ucode(priv);
2358
2359 if (ret) {
2360 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2361 ret);
2362 continue;
2363 }
2364
2365 /* start card; "initialize" will load runtime ucode */
2366 iwl_nic_start(priv);
2367
2368 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2369
2370 return 0;
2371 }
2372
2373 set_bit(STATUS_EXIT_PENDING, &priv->status);
2374 __iwl_down(priv);
2375 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2376
2377 /* tried to restart and config the device for as long as our
2378 * patience could withstand */
2379 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2380 return -EIO;
2381 }
2382
2383
2384 /*****************************************************************************
2385 *
2386 * Workqueue callbacks
2387 *
2388 *****************************************************************************/
2389
2390 static void iwl_bg_init_alive_start(struct work_struct *data)
2391 {
2392 struct iwl_priv *priv =
2393 container_of(data, struct iwl_priv, init_alive_start.work);
2394
2395 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2396 return;
2397
2398 mutex_lock(&priv->mutex);
2399 priv->cfg->ops->lib->init_alive_start(priv);
2400 mutex_unlock(&priv->mutex);
2401 }
2402
2403 static void iwl_bg_alive_start(struct work_struct *data)
2404 {
2405 struct iwl_priv *priv =
2406 container_of(data, struct iwl_priv, alive_start.work);
2407
2408 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2409 return;
2410
2411 /* enable dram interrupt */
2412 iwl_reset_ict(priv);
2413
2414 mutex_lock(&priv->mutex);
2415 iwl_alive_start(priv);
2416 mutex_unlock(&priv->mutex);
2417 }
2418
2419 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2420 {
2421 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2422 run_time_calib_work);
2423
2424 mutex_lock(&priv->mutex);
2425
2426 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2427 test_bit(STATUS_SCANNING, &priv->status)) {
2428 mutex_unlock(&priv->mutex);
2429 return;
2430 }
2431
2432 if (priv->start_calib) {
2433 iwl_chain_noise_calibration(priv, &priv->statistics);
2434
2435 iwl_sensitivity_calibration(priv, &priv->statistics);
2436 }
2437
2438 mutex_unlock(&priv->mutex);
2439 return;
2440 }
2441
2442 static void iwl_bg_restart(struct work_struct *data)
2443 {
2444 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2445
2446 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2447 return;
2448
2449 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2450 mutex_lock(&priv->mutex);
2451 priv->vif = NULL;
2452 priv->is_open = 0;
2453 mutex_unlock(&priv->mutex);
2454 iwl_down(priv);
2455 ieee80211_restart_hw(priv->hw);
2456 } else {
2457 iwl_down(priv);
2458
2459 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2460 return;
2461
2462 mutex_lock(&priv->mutex);
2463 __iwl_up(priv);
2464 mutex_unlock(&priv->mutex);
2465 }
2466 }
2467
2468 static void iwl_bg_rx_replenish(struct work_struct *data)
2469 {
2470 struct iwl_priv *priv =
2471 container_of(data, struct iwl_priv, rx_replenish);
2472
2473 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2474 return;
2475
2476 mutex_lock(&priv->mutex);
2477 iwl_rx_replenish(priv);
2478 mutex_unlock(&priv->mutex);
2479 }
2480
2481 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2482
2483 void iwl_post_associate(struct iwl_priv *priv)
2484 {
2485 struct ieee80211_conf *conf = NULL;
2486 int ret = 0;
2487 unsigned long flags;
2488
2489 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2490 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2491 return;
2492 }
2493
2494 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2495 priv->assoc_id, priv->active_rxon.bssid_addr);
2496
2497
2498 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2499 return;
2500
2501
2502 if (!priv->vif || !priv->is_open)
2503 return;
2504
2505 iwl_scan_cancel_timeout(priv, 200);
2506
2507 conf = ieee80211_get_hw_conf(priv->hw);
2508
2509 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2510 iwlcore_commit_rxon(priv);
2511
2512 iwl_setup_rxon_timing(priv);
2513 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2514 sizeof(priv->rxon_timing), &priv->rxon_timing);
2515 if (ret)
2516 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2517 "Attempting to continue.\n");
2518
2519 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2520
2521 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2522
2523 if (priv->cfg->ops->hcmd->set_rxon_chain)
2524 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2525
2526 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2527
2528 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2529 priv->assoc_id, priv->beacon_int);
2530
2531 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2532 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2533 else
2534 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2535
2536 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2537 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2538 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2539 else
2540 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2541
2542 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2543 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2544
2545 }
2546
2547 iwlcore_commit_rxon(priv);
2548
2549 switch (priv->iw_mode) {
2550 case NL80211_IFTYPE_STATION:
2551 break;
2552
2553 case NL80211_IFTYPE_ADHOC:
2554
2555 /* assume default assoc id */
2556 priv->assoc_id = 1;
2557
2558 iwl_rxon_add_station(priv, priv->bssid, 0);
2559 iwl_send_beacon_cmd(priv);
2560
2561 break;
2562
2563 default:
2564 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2565 __func__, priv->iw_mode);
2566 break;
2567 }
2568
2569 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2570 priv->assoc_station_added = 1;
2571
2572 spin_lock_irqsave(&priv->lock, flags);
2573 iwl_activate_qos(priv, 0);
2574 spin_unlock_irqrestore(&priv->lock, flags);
2575
2576 /* the chain noise calibration will enabled PM upon completion
2577 * If chain noise has already been run, then we need to enable
2578 * power management here */
2579 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2580 iwl_power_update_mode(priv, false);
2581
2582 /* Enable Rx differential gain and sensitivity calibrations */
2583 iwl_chain_noise_reset(priv);
2584 priv->start_calib = 1;
2585
2586 }
2587
2588 /*****************************************************************************
2589 *
2590 * mac80211 entry point functions
2591 *
2592 *****************************************************************************/
2593
2594 #define UCODE_READY_TIMEOUT (4 * HZ)
2595
2596 /*
2597 * Not a mac80211 entry point function, but it fits in with all the
2598 * other mac80211 functions grouped here.
2599 */
2600 static int iwl_mac_setup_register(struct iwl_priv *priv)
2601 {
2602 int ret;
2603 struct ieee80211_hw *hw = priv->hw;
2604 hw->rate_control_algorithm = "iwl-agn-rs";
2605
2606 /* Tell mac80211 our characteristics */
2607 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2608 IEEE80211_HW_NOISE_DBM |
2609 IEEE80211_HW_AMPDU_AGGREGATION |
2610 IEEE80211_HW_SPECTRUM_MGMT;
2611
2612 if (!priv->cfg->broken_powersave)
2613 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2614 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2615
2616 if (priv->cfg->sku & IWL_SKU_N)
2617 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2618 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2619
2620 hw->sta_data_size = sizeof(struct iwl_station_priv);
2621 hw->wiphy->interface_modes =
2622 BIT(NL80211_IFTYPE_STATION) |
2623 BIT(NL80211_IFTYPE_ADHOC);
2624
2625 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2626 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2627
2628 /*
2629 * For now, disable PS by default because it affects
2630 * RX performance significantly.
2631 */
2632 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2633
2634 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX + 1;
2635 /* we create the 802.11 header and a zero-length SSID element */
2636 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2637
2638 /* Default value; 4 EDCA QOS priorities */
2639 hw->queues = 4;
2640
2641 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2642
2643 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2644 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2645 &priv->bands[IEEE80211_BAND_2GHZ];
2646 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2647 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2648 &priv->bands[IEEE80211_BAND_5GHZ];
2649
2650 ret = ieee80211_register_hw(priv->hw);
2651 if (ret) {
2652 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2653 return ret;
2654 }
2655 priv->mac80211_registered = 1;
2656
2657 return 0;
2658 }
2659
2660
2661 static int iwl_mac_start(struct ieee80211_hw *hw)
2662 {
2663 struct iwl_priv *priv = hw->priv;
2664 int ret;
2665
2666 IWL_DEBUG_MAC80211(priv, "enter\n");
2667
2668 /* we should be verifying the device is ready to be opened */
2669 mutex_lock(&priv->mutex);
2670
2671 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2672 * ucode filename and max sizes are card-specific. */
2673
2674 if (!priv->ucode_code.len) {
2675 ret = iwl_read_ucode(priv);
2676 if (ret) {
2677 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2678 mutex_unlock(&priv->mutex);
2679 return ret;
2680 }
2681 }
2682
2683 ret = __iwl_up(priv);
2684
2685 mutex_unlock(&priv->mutex);
2686
2687 if (ret)
2688 return ret;
2689
2690 if (iwl_is_rfkill(priv))
2691 goto out;
2692
2693 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2694
2695 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2696 * mac80211 will not be run successfully. */
2697 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2698 test_bit(STATUS_READY, &priv->status),
2699 UCODE_READY_TIMEOUT);
2700 if (!ret) {
2701 if (!test_bit(STATUS_READY, &priv->status)) {
2702 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2703 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2704 return -ETIMEDOUT;
2705 }
2706 }
2707
2708 iwl_led_start(priv);
2709
2710 out:
2711 priv->is_open = 1;
2712 IWL_DEBUG_MAC80211(priv, "leave\n");
2713 return 0;
2714 }
2715
2716 static void iwl_mac_stop(struct ieee80211_hw *hw)
2717 {
2718 struct iwl_priv *priv = hw->priv;
2719
2720 IWL_DEBUG_MAC80211(priv, "enter\n");
2721
2722 if (!priv->is_open)
2723 return;
2724
2725 priv->is_open = 0;
2726
2727 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2728 /* stop mac, cancel any scan request and clear
2729 * RXON_FILTER_ASSOC_MSK BIT
2730 */
2731 mutex_lock(&priv->mutex);
2732 iwl_scan_cancel_timeout(priv, 100);
2733 mutex_unlock(&priv->mutex);
2734 }
2735
2736 iwl_down(priv);
2737
2738 flush_workqueue(priv->workqueue);
2739
2740 /* enable interrupts again in order to receive rfkill changes */
2741 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2742 iwl_enable_interrupts(priv);
2743
2744 IWL_DEBUG_MAC80211(priv, "leave\n");
2745 }
2746
2747 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2748 {
2749 struct iwl_priv *priv = hw->priv;
2750
2751 IWL_DEBUG_MACDUMP(priv, "enter\n");
2752
2753 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2754 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2755
2756 if (iwl_tx_skb(priv, skb))
2757 dev_kfree_skb_any(skb);
2758
2759 IWL_DEBUG_MACDUMP(priv, "leave\n");
2760 return NETDEV_TX_OK;
2761 }
2762
2763 void iwl_config_ap(struct iwl_priv *priv)
2764 {
2765 int ret = 0;
2766 unsigned long flags;
2767
2768 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2769 return;
2770
2771 /* The following should be done only at AP bring up */
2772 if (!iwl_is_associated(priv)) {
2773
2774 /* RXON - unassoc (to set timing command) */
2775 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2776 iwlcore_commit_rxon(priv);
2777
2778 /* RXON Timing */
2779 iwl_setup_rxon_timing(priv);
2780 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2781 sizeof(priv->rxon_timing), &priv->rxon_timing);
2782 if (ret)
2783 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2784 "Attempting to continue.\n");
2785
2786 /* AP has all antennas */
2787 priv->chain_noise_data.active_chains =
2788 priv->hw_params.valid_rx_ant;
2789 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2790 if (priv->cfg->ops->hcmd->set_rxon_chain)
2791 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2792
2793 /* FIXME: what should be the assoc_id for AP? */
2794 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2795 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2796 priv->staging_rxon.flags |=
2797 RXON_FLG_SHORT_PREAMBLE_MSK;
2798 else
2799 priv->staging_rxon.flags &=
2800 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2801
2802 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2803 if (priv->assoc_capability &
2804 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2805 priv->staging_rxon.flags |=
2806 RXON_FLG_SHORT_SLOT_MSK;
2807 else
2808 priv->staging_rxon.flags &=
2809 ~RXON_FLG_SHORT_SLOT_MSK;
2810
2811 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2812 priv->staging_rxon.flags &=
2813 ~RXON_FLG_SHORT_SLOT_MSK;
2814 }
2815 /* restore RXON assoc */
2816 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2817 iwlcore_commit_rxon(priv);
2818 iwl_reset_qos(priv);
2819 spin_lock_irqsave(&priv->lock, flags);
2820 iwl_activate_qos(priv, 1);
2821 spin_unlock_irqrestore(&priv->lock, flags);
2822 iwl_add_bcast_station(priv);
2823 }
2824 iwl_send_beacon_cmd(priv);
2825
2826 /* FIXME - we need to add code here to detect a totally new
2827 * configuration, reset the AP, unassoc, rxon timing, assoc,
2828 * clear sta table, add BCAST sta... */
2829 }
2830
2831 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2832 struct ieee80211_vif *vif,
2833 struct ieee80211_key_conf *keyconf,
2834 struct ieee80211_sta *sta,
2835 u32 iv32, u16 *phase1key)
2836 {
2837
2838 struct iwl_priv *priv = hw->priv;
2839 IWL_DEBUG_MAC80211(priv, "enter\n");
2840
2841 iwl_update_tkip_key(priv, keyconf,
2842 sta ? sta->addr : iwl_bcast_addr,
2843 iv32, phase1key);
2844
2845 IWL_DEBUG_MAC80211(priv, "leave\n");
2846 }
2847
2848 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2849 struct ieee80211_vif *vif,
2850 struct ieee80211_sta *sta,
2851 struct ieee80211_key_conf *key)
2852 {
2853 struct iwl_priv *priv = hw->priv;
2854 const u8 *addr;
2855 int ret;
2856 u8 sta_id;
2857 bool is_default_wep_key = false;
2858
2859 IWL_DEBUG_MAC80211(priv, "enter\n");
2860
2861 if (priv->cfg->mod_params->sw_crypto) {
2862 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2863 return -EOPNOTSUPP;
2864 }
2865 addr = sta ? sta->addr : iwl_bcast_addr;
2866 sta_id = iwl_find_station(priv, addr);
2867 if (sta_id == IWL_INVALID_STATION) {
2868 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2869 addr);
2870 return -EINVAL;
2871
2872 }
2873
2874 mutex_lock(&priv->mutex);
2875 iwl_scan_cancel_timeout(priv, 100);
2876 mutex_unlock(&priv->mutex);
2877
2878 /* If we are getting WEP group key and we didn't receive any key mapping
2879 * so far, we are in legacy wep mode (group key only), otherwise we are
2880 * in 1X mode.
2881 * In legacy wep mode, we use another host command to the uCode */
2882 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2883 priv->iw_mode != NL80211_IFTYPE_AP) {
2884 if (cmd == SET_KEY)
2885 is_default_wep_key = !priv->key_mapping_key;
2886 else
2887 is_default_wep_key =
2888 (key->hw_key_idx == HW_KEY_DEFAULT);
2889 }
2890
2891 switch (cmd) {
2892 case SET_KEY:
2893 if (is_default_wep_key)
2894 ret = iwl_set_default_wep_key(priv, key);
2895 else
2896 ret = iwl_set_dynamic_key(priv, key, sta_id);
2897
2898 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2899 break;
2900 case DISABLE_KEY:
2901 if (is_default_wep_key)
2902 ret = iwl_remove_default_wep_key(priv, key);
2903 else
2904 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2905
2906 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2907 break;
2908 default:
2909 ret = -EINVAL;
2910 }
2911
2912 IWL_DEBUG_MAC80211(priv, "leave\n");
2913
2914 return ret;
2915 }
2916
2917 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2918 struct ieee80211_vif *vif,
2919 enum ieee80211_ampdu_mlme_action action,
2920 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2921 {
2922 struct iwl_priv *priv = hw->priv;
2923 int ret;
2924
2925 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2926 sta->addr, tid);
2927
2928 if (!(priv->cfg->sku & IWL_SKU_N))
2929 return -EACCES;
2930
2931 switch (action) {
2932 case IEEE80211_AMPDU_RX_START:
2933 IWL_DEBUG_HT(priv, "start Rx\n");
2934 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2935 case IEEE80211_AMPDU_RX_STOP:
2936 IWL_DEBUG_HT(priv, "stop Rx\n");
2937 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2938 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2939 return 0;
2940 else
2941 return ret;
2942 case IEEE80211_AMPDU_TX_START:
2943 IWL_DEBUG_HT(priv, "start Tx\n");
2944 ret = iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2945 if (ret == 0) {
2946 priv->agg_tids_count++;
2947 IWL_DEBUG_HT(priv, "priv->agg_tids_count = %u\n",
2948 priv->agg_tids_count);
2949 }
2950 return ret;
2951 case IEEE80211_AMPDU_TX_STOP:
2952 IWL_DEBUG_HT(priv, "stop Tx\n");
2953 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2954 if ((ret == 0) && (priv->agg_tids_count > 0)) {
2955 priv->agg_tids_count--;
2956 IWL_DEBUG_HT(priv, "priv->agg_tids_count = %u\n",
2957 priv->agg_tids_count);
2958 }
2959 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2960 return 0;
2961 else
2962 return ret;
2963 case IEEE80211_AMPDU_TX_OPERATIONAL:
2964 /* do nothing */
2965 return -EOPNOTSUPP;
2966 default:
2967 IWL_DEBUG_HT(priv, "unknown\n");
2968 return -EINVAL;
2969 break;
2970 }
2971 return 0;
2972 }
2973
2974 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2975 struct ieee80211_low_level_stats *stats)
2976 {
2977 struct iwl_priv *priv = hw->priv;
2978
2979 priv = hw->priv;
2980 IWL_DEBUG_MAC80211(priv, "enter\n");
2981 IWL_DEBUG_MAC80211(priv, "leave\n");
2982
2983 return 0;
2984 }
2985
2986 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2987 struct ieee80211_vif *vif,
2988 enum sta_notify_cmd cmd,
2989 struct ieee80211_sta *sta)
2990 {
2991 struct iwl_priv *priv = hw->priv;
2992 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2993 int sta_id;
2994
2995 /*
2996 * TODO: We really should use this callback to
2997 * actually maintain the station table in
2998 * the device.
2999 */
3000
3001 switch (cmd) {
3002 case STA_NOTIFY_ADD:
3003 atomic_set(&sta_priv->pending_frames, 0);
3004 if (vif->type == NL80211_IFTYPE_AP)
3005 sta_priv->client = true;
3006 break;
3007 case STA_NOTIFY_SLEEP:
3008 WARN_ON(!sta_priv->client);
3009 sta_priv->asleep = true;
3010 if (atomic_read(&sta_priv->pending_frames) > 0)
3011 ieee80211_sta_block_awake(hw, sta, true);
3012 break;
3013 case STA_NOTIFY_AWAKE:
3014 WARN_ON(!sta_priv->client);
3015 if (!sta_priv->asleep)
3016 break;
3017 sta_priv->asleep = false;
3018 sta_id = iwl_find_station(priv, sta->addr);
3019 if (sta_id != IWL_INVALID_STATION)
3020 iwl_sta_modify_ps_wake(priv, sta_id);
3021 break;
3022 default:
3023 break;
3024 }
3025 }
3026
3027 /*****************************************************************************
3028 *
3029 * sysfs attributes
3030 *
3031 *****************************************************************************/
3032
3033 #ifdef CONFIG_IWLWIFI_DEBUG
3034
3035 /*
3036 * The following adds a new attribute to the sysfs representation
3037 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3038 * used for controlling the debug level.
3039 *
3040 * See the level definitions in iwl for details.
3041 *
3042 * The debug_level being managed using sysfs below is a per device debug
3043 * level that is used instead of the global debug level if it (the per
3044 * device debug level) is set.
3045 */
3046 static ssize_t show_debug_level(struct device *d,
3047 struct device_attribute *attr, char *buf)
3048 {
3049 struct iwl_priv *priv = dev_get_drvdata(d);
3050 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3051 }
3052 static ssize_t store_debug_level(struct device *d,
3053 struct device_attribute *attr,
3054 const char *buf, size_t count)
3055 {
3056 struct iwl_priv *priv = dev_get_drvdata(d);
3057 unsigned long val;
3058 int ret;
3059
3060 ret = strict_strtoul(buf, 0, &val);
3061 if (ret)
3062 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3063 else {
3064 priv->debug_level = val;
3065 if (iwl_alloc_traffic_mem(priv))
3066 IWL_ERR(priv,
3067 "Not enough memory to generate traffic log\n");
3068 }
3069 return strnlen(buf, count);
3070 }
3071
3072 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3073 show_debug_level, store_debug_level);
3074
3075
3076 #endif /* CONFIG_IWLWIFI_DEBUG */
3077
3078
3079 static ssize_t show_temperature(struct device *d,
3080 struct device_attribute *attr, char *buf)
3081 {
3082 struct iwl_priv *priv = dev_get_drvdata(d);
3083
3084 if (!iwl_is_alive(priv))
3085 return -EAGAIN;
3086
3087 return sprintf(buf, "%d\n", priv->temperature);
3088 }
3089
3090 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3091
3092 static ssize_t show_tx_power(struct device *d,
3093 struct device_attribute *attr, char *buf)
3094 {
3095 struct iwl_priv *priv = dev_get_drvdata(d);
3096
3097 if (!iwl_is_ready_rf(priv))
3098 return sprintf(buf, "off\n");
3099 else
3100 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3101 }
3102
3103 static ssize_t store_tx_power(struct device *d,
3104 struct device_attribute *attr,
3105 const char *buf, size_t count)
3106 {
3107 struct iwl_priv *priv = dev_get_drvdata(d);
3108 unsigned long val;
3109 int ret;
3110
3111 ret = strict_strtoul(buf, 10, &val);
3112 if (ret)
3113 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3114 else {
3115 ret = iwl_set_tx_power(priv, val, false);
3116 if (ret)
3117 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3118 ret);
3119 else
3120 ret = count;
3121 }
3122 return ret;
3123 }
3124
3125 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3126
3127 static ssize_t show_flags(struct device *d,
3128 struct device_attribute *attr, char *buf)
3129 {
3130 struct iwl_priv *priv = dev_get_drvdata(d);
3131
3132 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3133 }
3134
3135 static ssize_t store_flags(struct device *d,
3136 struct device_attribute *attr,
3137 const char *buf, size_t count)
3138 {
3139 struct iwl_priv *priv = dev_get_drvdata(d);
3140 unsigned long val;
3141 u32 flags;
3142 int ret = strict_strtoul(buf, 0, &val);
3143 if (ret)
3144 return ret;
3145 flags = (u32)val;
3146
3147 mutex_lock(&priv->mutex);
3148 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3149 /* Cancel any currently running scans... */
3150 if (iwl_scan_cancel_timeout(priv, 100))
3151 IWL_WARN(priv, "Could not cancel scan.\n");
3152 else {
3153 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
3154 priv->staging_rxon.flags = cpu_to_le32(flags);
3155 iwlcore_commit_rxon(priv);
3156 }
3157 }
3158 mutex_unlock(&priv->mutex);
3159
3160 return count;
3161 }
3162
3163 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3164
3165 static ssize_t show_filter_flags(struct device *d,
3166 struct device_attribute *attr, char *buf)
3167 {
3168 struct iwl_priv *priv = dev_get_drvdata(d);
3169
3170 return sprintf(buf, "0x%04X\n",
3171 le32_to_cpu(priv->active_rxon.filter_flags));
3172 }
3173
3174 static ssize_t store_filter_flags(struct device *d,
3175 struct device_attribute *attr,
3176 const char *buf, size_t count)
3177 {
3178 struct iwl_priv *priv = dev_get_drvdata(d);
3179 unsigned long val;
3180 u32 filter_flags;
3181 int ret = strict_strtoul(buf, 0, &val);
3182 if (ret)
3183 return ret;
3184 filter_flags = (u32)val;
3185
3186 mutex_lock(&priv->mutex);
3187 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3188 /* Cancel any currently running scans... */
3189 if (iwl_scan_cancel_timeout(priv, 100))
3190 IWL_WARN(priv, "Could not cancel scan.\n");
3191 else {
3192 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3193 "0x%04X\n", filter_flags);
3194 priv->staging_rxon.filter_flags =
3195 cpu_to_le32(filter_flags);
3196 iwlcore_commit_rxon(priv);
3197 }
3198 }
3199 mutex_unlock(&priv->mutex);
3200
3201 return count;
3202 }
3203
3204 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3205 store_filter_flags);
3206
3207
3208 static ssize_t show_statistics(struct device *d,
3209 struct device_attribute *attr, char *buf)
3210 {
3211 struct iwl_priv *priv = dev_get_drvdata(d);
3212 u32 size = sizeof(struct iwl_notif_statistics);
3213 u32 len = 0, ofs = 0;
3214 u8 *data = (u8 *)&priv->statistics;
3215 int rc = 0;
3216
3217 if (!iwl_is_alive(priv))
3218 return -EAGAIN;
3219
3220 mutex_lock(&priv->mutex);
3221 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3222 mutex_unlock(&priv->mutex);
3223
3224 if (rc) {
3225 len = sprintf(buf,
3226 "Error sending statistics request: 0x%08X\n", rc);
3227 return len;
3228 }
3229
3230 while (size && (PAGE_SIZE - len)) {
3231 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3232 PAGE_SIZE - len, 1);
3233 len = strlen(buf);
3234 if (PAGE_SIZE - len)
3235 buf[len++] = '\n';
3236
3237 ofs += 16;
3238 size -= min(size, 16U);
3239 }
3240
3241 return len;
3242 }
3243
3244 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3245
3246 static ssize_t show_rts_ht_protection(struct device *d,
3247 struct device_attribute *attr, char *buf)
3248 {
3249 struct iwl_priv *priv = dev_get_drvdata(d);
3250
3251 return sprintf(buf, "%s\n",
3252 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3253 }
3254
3255 static ssize_t store_rts_ht_protection(struct device *d,
3256 struct device_attribute *attr,
3257 const char *buf, size_t count)
3258 {
3259 struct iwl_priv *priv = dev_get_drvdata(d);
3260 unsigned long val;
3261 int ret;
3262
3263 ret = strict_strtoul(buf, 10, &val);
3264 if (ret)
3265 IWL_INFO(priv, "Input is not in decimal form.\n");
3266 else {
3267 if (!iwl_is_associated(priv))
3268 priv->cfg->use_rts_for_ht = val ? true : false;
3269 else
3270 IWL_ERR(priv, "Sta associated with AP - "
3271 "Change protection mechanism is not allowed\n");
3272 ret = count;
3273 }
3274 return ret;
3275 }
3276
3277 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3278 show_rts_ht_protection, store_rts_ht_protection);
3279
3280
3281 /*****************************************************************************
3282 *
3283 * driver setup and teardown
3284 *
3285 *****************************************************************************/
3286
3287 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3288 {
3289 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3290
3291 init_waitqueue_head(&priv->wait_command_queue);
3292
3293 INIT_WORK(&priv->restart, iwl_bg_restart);
3294 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3295 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3296 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3297 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3298 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3299
3300 iwl_setup_scan_deferred_work(priv);
3301
3302 if (priv->cfg->ops->lib->setup_deferred_work)
3303 priv->cfg->ops->lib->setup_deferred_work(priv);
3304
3305 init_timer(&priv->statistics_periodic);
3306 priv->statistics_periodic.data = (unsigned long)priv;
3307 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3308
3309 init_timer(&priv->ucode_trace);
3310 priv->ucode_trace.data = (unsigned long)priv;
3311 priv->ucode_trace.function = iwl_bg_ucode_trace;
3312
3313 if (!priv->cfg->use_isr_legacy)
3314 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3315 iwl_irq_tasklet, (unsigned long)priv);
3316 else
3317 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3318 iwl_irq_tasklet_legacy, (unsigned long)priv);
3319 }
3320
3321 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3322 {
3323 if (priv->cfg->ops->lib->cancel_deferred_work)
3324 priv->cfg->ops->lib->cancel_deferred_work(priv);
3325
3326 cancel_delayed_work_sync(&priv->init_alive_start);
3327 cancel_delayed_work(&priv->scan_check);
3328 cancel_delayed_work(&priv->alive_start);
3329 cancel_work_sync(&priv->beacon_update);
3330 del_timer_sync(&priv->statistics_periodic);
3331 del_timer_sync(&priv->ucode_trace);
3332 }
3333
3334 static void iwl_init_hw_rates(struct iwl_priv *priv,
3335 struct ieee80211_rate *rates)
3336 {
3337 int i;
3338
3339 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3340 rates[i].bitrate = iwl_rates[i].ieee * 5;
3341 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3342 rates[i].hw_value_short = i;
3343 rates[i].flags = 0;
3344 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3345 /*
3346 * If CCK != 1M then set short preamble rate flag.
3347 */
3348 rates[i].flags |=
3349 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3350 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3351 }
3352 }
3353 }
3354
3355 static int iwl_init_drv(struct iwl_priv *priv)
3356 {
3357 int ret;
3358
3359 priv->ibss_beacon = NULL;
3360
3361 spin_lock_init(&priv->sta_lock);
3362 spin_lock_init(&priv->hcmd_lock);
3363
3364 INIT_LIST_HEAD(&priv->free_frames);
3365
3366 mutex_init(&priv->mutex);
3367 mutex_init(&priv->sync_cmd_mutex);
3368
3369 /* Clear the driver's (not device's) station table */
3370 iwl_clear_stations_table(priv);
3371
3372 priv->ieee_channels = NULL;
3373 priv->ieee_rates = NULL;
3374 priv->band = IEEE80211_BAND_2GHZ;
3375
3376 priv->iw_mode = NL80211_IFTYPE_STATION;
3377 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3378 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3379 priv->agg_tids_count = 0;
3380
3381 /* initialize force reset */
3382 priv->force_reset[IWL_RF_RESET].reset_duration =
3383 IWL_DELAY_NEXT_FORCE_RF_RESET;
3384 priv->force_reset[IWL_FW_RESET].reset_duration =
3385 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3386
3387 /* Choose which receivers/antennas to use */
3388 if (priv->cfg->ops->hcmd->set_rxon_chain)
3389 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3390
3391 iwl_init_scan_params(priv);
3392
3393 iwl_reset_qos(priv);
3394
3395 priv->qos_data.qos_active = 0;
3396 priv->qos_data.qos_cap.val = 0;
3397
3398 priv->rates_mask = IWL_RATES_MASK;
3399 /* Set the tx_power_user_lmt to the lowest power level
3400 * this value will get overwritten by channel max power avg
3401 * from eeprom */
3402 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3403
3404 ret = iwl_init_channel_map(priv);
3405 if (ret) {
3406 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3407 goto err;
3408 }
3409
3410 ret = iwlcore_init_geos(priv);
3411 if (ret) {
3412 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3413 goto err_free_channel_map;
3414 }
3415 iwl_init_hw_rates(priv, priv->ieee_rates);
3416
3417 return 0;
3418
3419 err_free_channel_map:
3420 iwl_free_channel_map(priv);
3421 err:
3422 return ret;
3423 }
3424
3425 static void iwl_uninit_drv(struct iwl_priv *priv)
3426 {
3427 iwl_calib_free_results(priv);
3428 iwlcore_free_geos(priv);
3429 iwl_free_channel_map(priv);
3430 kfree(priv->scan);
3431 }
3432
3433 static struct attribute *iwl_sysfs_entries[] = {
3434 &dev_attr_flags.attr,
3435 &dev_attr_filter_flags.attr,
3436 &dev_attr_statistics.attr,
3437 &dev_attr_temperature.attr,
3438 &dev_attr_tx_power.attr,
3439 &dev_attr_rts_ht_protection.attr,
3440 #ifdef CONFIG_IWLWIFI_DEBUG
3441 &dev_attr_debug_level.attr,
3442 #endif
3443 NULL
3444 };
3445
3446 static struct attribute_group iwl_attribute_group = {
3447 .name = NULL, /* put in device directory */
3448 .attrs = iwl_sysfs_entries,
3449 };
3450
3451 static struct ieee80211_ops iwl_hw_ops = {
3452 .tx = iwl_mac_tx,
3453 .start = iwl_mac_start,
3454 .stop = iwl_mac_stop,
3455 .add_interface = iwl_mac_add_interface,
3456 .remove_interface = iwl_mac_remove_interface,
3457 .config = iwl_mac_config,
3458 .configure_filter = iwl_configure_filter,
3459 .set_key = iwl_mac_set_key,
3460 .update_tkip_key = iwl_mac_update_tkip_key,
3461 .get_stats = iwl_mac_get_stats,
3462 .conf_tx = iwl_mac_conf_tx,
3463 .reset_tsf = iwl_mac_reset_tsf,
3464 .bss_info_changed = iwl_bss_info_changed,
3465 .ampdu_action = iwl_mac_ampdu_action,
3466 .hw_scan = iwl_mac_hw_scan,
3467 .sta_notify = iwl_mac_sta_notify,
3468 };
3469
3470 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3471 {
3472 int err = 0;
3473 struct iwl_priv *priv;
3474 struct ieee80211_hw *hw;
3475 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3476 unsigned long flags;
3477 u16 pci_cmd;
3478
3479 /************************
3480 * 1. Allocating HW data
3481 ************************/
3482
3483 /* Disabling hardware scan means that mac80211 will perform scans
3484 * "the hard way", rather than using device's scan. */
3485 if (cfg->mod_params->disable_hw_scan) {
3486 if (iwl_debug_level & IWL_DL_INFO)
3487 dev_printk(KERN_DEBUG, &(pdev->dev),
3488 "Disabling hw_scan\n");
3489 iwl_hw_ops.hw_scan = NULL;
3490 }
3491
3492 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3493 if (!hw) {
3494 err = -ENOMEM;
3495 goto out;
3496 }
3497 priv = hw->priv;
3498 /* At this point both hw and priv are allocated. */
3499
3500 SET_IEEE80211_DEV(hw, &pdev->dev);
3501
3502 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3503 priv->cfg = cfg;
3504 priv->pci_dev = pdev;
3505 priv->inta_mask = CSR_INI_SET_MASK;
3506
3507 #ifdef CONFIG_IWLWIFI_DEBUG
3508 atomic_set(&priv->restrict_refcnt, 0);
3509 #endif
3510 if (iwl_alloc_traffic_mem(priv))
3511 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3512
3513 /**************************
3514 * 2. Initializing PCI bus
3515 **************************/
3516 if (pci_enable_device(pdev)) {
3517 err = -ENODEV;
3518 goto out_ieee80211_free_hw;
3519 }
3520
3521 pci_set_master(pdev);
3522
3523 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3524 if (!err)
3525 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3526 if (err) {
3527 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3528 if (!err)
3529 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3530 /* both attempts failed: */
3531 if (err) {
3532 IWL_WARN(priv, "No suitable DMA available.\n");
3533 goto out_pci_disable_device;
3534 }
3535 }
3536
3537 err = pci_request_regions(pdev, DRV_NAME);
3538 if (err)
3539 goto out_pci_disable_device;
3540
3541 pci_set_drvdata(pdev, priv);
3542
3543
3544 /***********************
3545 * 3. Read REV register
3546 ***********************/
3547 priv->hw_base = pci_iomap(pdev, 0, 0);
3548 if (!priv->hw_base) {
3549 err = -ENODEV;
3550 goto out_pci_release_regions;
3551 }
3552
3553 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3554 (unsigned long long) pci_resource_len(pdev, 0));
3555 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3556
3557 /* these spin locks will be used in apm_ops.init and EEPROM access
3558 * we should init now
3559 */
3560 spin_lock_init(&priv->reg_lock);
3561 spin_lock_init(&priv->lock);
3562
3563 /*
3564 * stop and reset the on-board processor just in case it is in a
3565 * strange state ... like being left stranded by a primary kernel
3566 * and this is now the kdump kernel trying to start up
3567 */
3568 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3569
3570 iwl_hw_detect(priv);
3571 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3572 priv->cfg->name, priv->hw_rev);
3573
3574 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3575 * PCI Tx retries from interfering with C3 CPU state */
3576 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3577
3578 iwl_prepare_card_hw(priv);
3579 if (!priv->hw_ready) {
3580 IWL_WARN(priv, "Failed, HW not ready\n");
3581 goto out_iounmap;
3582 }
3583
3584 /*****************
3585 * 4. Read EEPROM
3586 *****************/
3587 /* Read the EEPROM */
3588 err = iwl_eeprom_init(priv);
3589 if (err) {
3590 IWL_ERR(priv, "Unable to init EEPROM\n");
3591 goto out_iounmap;
3592 }
3593 err = iwl_eeprom_check_version(priv);
3594 if (err)
3595 goto out_free_eeprom;
3596
3597 /* extract MAC Address */
3598 iwl_eeprom_get_mac(priv, priv->mac_addr);
3599 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3600 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3601
3602 /************************
3603 * 5. Setup HW constants
3604 ************************/
3605 if (iwl_set_hw_params(priv)) {
3606 IWL_ERR(priv, "failed to set hw parameters\n");
3607 goto out_free_eeprom;
3608 }
3609
3610 /*******************
3611 * 6. Setup priv
3612 *******************/
3613
3614 err = iwl_init_drv(priv);
3615 if (err)
3616 goto out_free_eeprom;
3617 /* At this point both hw and priv are initialized. */
3618
3619 /********************
3620 * 7. Setup services
3621 ********************/
3622 spin_lock_irqsave(&priv->lock, flags);
3623 iwl_disable_interrupts(priv);
3624 spin_unlock_irqrestore(&priv->lock, flags);
3625
3626 pci_enable_msi(priv->pci_dev);
3627
3628 iwl_alloc_isr_ict(priv);
3629 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3630 IRQF_SHARED, DRV_NAME, priv);
3631 if (err) {
3632 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3633 goto out_disable_msi;
3634 }
3635 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3636 if (err) {
3637 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3638 goto out_free_irq;
3639 }
3640
3641 iwl_setup_deferred_work(priv);
3642 iwl_setup_rx_handlers(priv);
3643
3644 /*********************************************
3645 * 8. Enable interrupts and read RFKILL state
3646 *********************************************/
3647
3648 /* enable interrupts if needed: hw bug w/a */
3649 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3650 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3651 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3652 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3653 }
3654
3655 iwl_enable_interrupts(priv);
3656
3657 /* If platform's RF_KILL switch is NOT set to KILL */
3658 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3659 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3660 else
3661 set_bit(STATUS_RF_KILL_HW, &priv->status);
3662
3663 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3664 test_bit(STATUS_RF_KILL_HW, &priv->status));
3665
3666 iwl_power_initialize(priv);
3667 iwl_tt_initialize(priv);
3668
3669 /**************************************************
3670 * 9. Setup and register with mac80211 and debugfs
3671 **************************************************/
3672 err = iwl_mac_setup_register(priv);
3673 if (err)
3674 goto out_remove_sysfs;
3675
3676 err = iwl_dbgfs_register(priv, DRV_NAME);
3677 if (err)
3678 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3679
3680 return 0;
3681
3682 out_remove_sysfs:
3683 destroy_workqueue(priv->workqueue);
3684 priv->workqueue = NULL;
3685 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3686 out_free_irq:
3687 free_irq(priv->pci_dev->irq, priv);
3688 iwl_free_isr_ict(priv);
3689 out_disable_msi:
3690 pci_disable_msi(priv->pci_dev);
3691 iwl_uninit_drv(priv);
3692 out_free_eeprom:
3693 iwl_eeprom_free(priv);
3694 out_iounmap:
3695 pci_iounmap(pdev, priv->hw_base);
3696 out_pci_release_regions:
3697 pci_set_drvdata(pdev, NULL);
3698 pci_release_regions(pdev);
3699 out_pci_disable_device:
3700 pci_disable_device(pdev);
3701 out_ieee80211_free_hw:
3702 iwl_free_traffic_mem(priv);
3703 ieee80211_free_hw(priv->hw);
3704 out:
3705 return err;
3706 }
3707
3708 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3709 {
3710 struct iwl_priv *priv = pci_get_drvdata(pdev);
3711 unsigned long flags;
3712
3713 if (!priv)
3714 return;
3715
3716 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3717
3718 iwl_dbgfs_unregister(priv);
3719 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3720
3721 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3722 * to be called and iwl_down since we are removing the device
3723 * we need to set STATUS_EXIT_PENDING bit.
3724 */
3725 set_bit(STATUS_EXIT_PENDING, &priv->status);
3726 if (priv->mac80211_registered) {
3727 ieee80211_unregister_hw(priv->hw);
3728 priv->mac80211_registered = 0;
3729 } else {
3730 iwl_down(priv);
3731 }
3732
3733 /*
3734 * Make sure device is reset to low power before unloading driver.
3735 * This may be redundant with iwl_down(), but there are paths to
3736 * run iwl_down() without calling apm_ops.stop(), and there are
3737 * paths to avoid running iwl_down() at all before leaving driver.
3738 * This (inexpensive) call *makes sure* device is reset.
3739 */
3740 priv->cfg->ops->lib->apm_ops.stop(priv);
3741
3742 iwl_tt_exit(priv);
3743
3744 /* make sure we flush any pending irq or
3745 * tasklet for the driver
3746 */
3747 spin_lock_irqsave(&priv->lock, flags);
3748 iwl_disable_interrupts(priv);
3749 spin_unlock_irqrestore(&priv->lock, flags);
3750
3751 iwl_synchronize_irq(priv);
3752
3753 iwl_dealloc_ucode_pci(priv);
3754
3755 if (priv->rxq.bd)
3756 iwl_rx_queue_free(priv, &priv->rxq);
3757 iwl_hw_txq_ctx_free(priv);
3758
3759 iwl_clear_stations_table(priv);
3760 iwl_eeprom_free(priv);
3761
3762
3763 /*netif_stop_queue(dev); */
3764 flush_workqueue(priv->workqueue);
3765
3766 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3767 * priv->workqueue... so we can't take down the workqueue
3768 * until now... */
3769 destroy_workqueue(priv->workqueue);
3770 priv->workqueue = NULL;
3771 iwl_free_traffic_mem(priv);
3772
3773 free_irq(priv->pci_dev->irq, priv);
3774 pci_disable_msi(priv->pci_dev);
3775 pci_iounmap(pdev, priv->hw_base);
3776 pci_release_regions(pdev);
3777 pci_disable_device(pdev);
3778 pci_set_drvdata(pdev, NULL);
3779
3780 iwl_uninit_drv(priv);
3781
3782 iwl_free_isr_ict(priv);
3783
3784 if (priv->ibss_beacon)
3785 dev_kfree_skb(priv->ibss_beacon);
3786
3787 ieee80211_free_hw(priv->hw);
3788 }
3789
3790
3791 /*****************************************************************************
3792 *
3793 * driver and module entry point
3794 *
3795 *****************************************************************************/
3796
3797 /* Hardware specific file defines the PCI IDs table for that hardware module */
3798 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3799 #ifdef CONFIG_IWL4965
3800 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3801 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3802 #endif /* CONFIG_IWL4965 */
3803 #ifdef CONFIG_IWL5000
3804 /* 5100 Series WiFi */
3805 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3806 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3807 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3808 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3809 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3810 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3811 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3812 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3813 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3814 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3815 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3816 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3817 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3818 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3819 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3820 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3821 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3822 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3823 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3824 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3825 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3826 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3827 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3828 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3829
3830 /* 5300 Series WiFi */
3831 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3832 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3833 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3834 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3835 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3836 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3837 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3838 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3839 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3840 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3841 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3842 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3843
3844 /* 5350 Series WiFi/WiMax */
3845 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3846 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3847 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3848
3849 /* 5150 Series Wifi/WiMax */
3850 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3851 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3852 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3853 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3854 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3855 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3856
3857 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3858 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3859 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3860 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3861
3862 /* 6x00 Series */
3863 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3864 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3865 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3866 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3867 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3868 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3869 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3870 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3871 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3872 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3873
3874 /* 6x50 WiFi/WiMax Series */
3875 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3876 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3877 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3878 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3879 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3880 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3881
3882 /* 1000 Series WiFi */
3883 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3884 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3885 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3886 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3887 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3888 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3889 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3890 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3891 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3892 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3893 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3894 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3895 #endif /* CONFIG_IWL5000 */
3896
3897 {0}
3898 };
3899 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3900
3901 static struct pci_driver iwl_driver = {
3902 .name = DRV_NAME,
3903 .id_table = iwl_hw_card_ids,
3904 .probe = iwl_pci_probe,
3905 .remove = __devexit_p(iwl_pci_remove),
3906 #ifdef CONFIG_PM
3907 .suspend = iwl_pci_suspend,
3908 .resume = iwl_pci_resume,
3909 #endif
3910 };
3911
3912 static int __init iwl_init(void)
3913 {
3914
3915 int ret;
3916 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3917 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3918
3919 ret = iwlagn_rate_control_register();
3920 if (ret) {
3921 printk(KERN_ERR DRV_NAME
3922 "Unable to register rate control algorithm: %d\n", ret);
3923 return ret;
3924 }
3925
3926 ret = pci_register_driver(&iwl_driver);
3927 if (ret) {
3928 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3929 goto error_register;
3930 }
3931
3932 return ret;
3933
3934 error_register:
3935 iwlagn_rate_control_unregister();
3936 return ret;
3937 }
3938
3939 static void __exit iwl_exit(void)
3940 {
3941 pci_unregister_driver(&iwl_driver);
3942 iwlagn_rate_control_unregister();
3943 }
3944
3945 module_exit(iwl_exit);
3946 module_init(iwl_init);
3947
3948 #ifdef CONFIG_IWLWIFI_DEBUG
3949 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3950 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3951 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3952 MODULE_PARM_DESC(debug, "debug output mask");
3953 #endif
3954
kernel source for telekom puls (alcatel/mediatek)