projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ixgbe: fix possible NULL pointer deference in shutdown path
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/pm_qos_params.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static void ath_update_txpow(struct ath_softc *sc)
23 {
24 struct ath_hw *ah = sc->sc_ah;
25
26 if (sc->curtxpow != sc->config.txpowlimit) {
27 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
28 /* read back in case value is clamped */
29 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
30 }
31 }
32
33 static u8 parse_mpdudensity(u8 mpdudensity)
34 {
35 /*
36 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
37 * 0 for no restriction
38 * 1 for 1/4 us
39 * 2 for 1/2 us
40 * 3 for 1 us
41 * 4 for 2 us
42 * 5 for 4 us
43 * 6 for 8 us
44 * 7 for 16 us
45 */
46 switch (mpdudensity) {
47 case 0:
48 return 0;
49 case 1:
50 case 2:
51 case 3:
52 /* Our lower layer calculations limit our precision to
53 1 microsecond */
54 return 1;
55 case 4:
56 return 2;
57 case 5:
58 return 4;
59 case 6:
60 return 8;
61 case 7:
62 return 16;
63 default:
64 return 0;
65 }
66 }
67
68 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
69 struct ieee80211_hw *hw)
70 {
71 struct ieee80211_channel *curchan = hw->conf.channel;
72 struct ath9k_channel *channel;
73 u8 chan_idx;
74
75 chan_idx = curchan->hw_value;
76 channel = &sc->sc_ah->channels[chan_idx];
77 ath9k_update_ichannel(sc, hw, channel);
78 return channel;
79 }
80
81 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
82 {
83 unsigned long flags;
84 bool ret;
85
86 spin_lock_irqsave(&sc->sc_pm_lock, flags);
87 ret = ath9k_hw_setpower(sc->sc_ah, mode);
88 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
89
90 return ret;
91 }
92
93 void ath9k_ps_wakeup(struct ath_softc *sc)
94 {
95 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
96 unsigned long flags;
97 enum ath9k_power_mode power_mode;
98
99 spin_lock_irqsave(&sc->sc_pm_lock, flags);
100 if (++sc->ps_usecount != 1)
101 goto unlock;
102
103 power_mode = sc->sc_ah->power_mode;
104 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
105
106 /*
107 * While the hardware is asleep, the cycle counters contain no
108 * useful data. Better clear them now so that they don't mess up
109 * survey data results.
110 */
111 if (power_mode != ATH9K_PM_AWAKE) {
112 spin_lock(&common->cc_lock);
113 ath_hw_cycle_counters_update(common);
114 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
115 spin_unlock(&common->cc_lock);
116 }
117
118 unlock:
119 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
120 }
121
122 void ath9k_ps_restore(struct ath_softc *sc)
123 {
124 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
125 unsigned long flags;
126
127 spin_lock_irqsave(&sc->sc_pm_lock, flags);
128 if (--sc->ps_usecount != 0)
129 goto unlock;
130
131 spin_lock(&common->cc_lock);
132 ath_hw_cycle_counters_update(common);
133 spin_unlock(&common->cc_lock);
134
135 if (sc->ps_idle)
136 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
137 else if (sc->ps_enabled &&
138 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
139 PS_WAIT_FOR_CAB |
140 PS_WAIT_FOR_PSPOLL_DATA |
141 PS_WAIT_FOR_TX_ACK)))
142 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
143
144 unlock:
145 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
146 }
147
148 static void ath_start_ani(struct ath_common *common)
149 {
150 struct ath_hw *ah = common->ah;
151 unsigned long timestamp = jiffies_to_msecs(jiffies);
152 struct ath_softc *sc = (struct ath_softc *) common->priv;
153
154 if (!(sc->sc_flags & SC_OP_ANI_RUN))
155 return;
156
157 if (sc->sc_flags & SC_OP_OFFCHANNEL)
158 return;
159
160 common->ani.longcal_timer = timestamp;
161 common->ani.shortcal_timer = timestamp;
162 common->ani.checkani_timer = timestamp;
163
164 mod_timer(&common->ani.timer,
165 jiffies +
166 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
167 }
168
169 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 {
171 struct ath_hw *ah = sc->sc_ah;
172 struct ath9k_channel *chan = &ah->channels[channel];
173 struct survey_info *survey = &sc->survey[channel];
174
175 if (chan->noisefloor) {
176 survey->filled |= SURVEY_INFO_NOISE_DBM;
177 survey->noise = chan->noisefloor;
178 }
179 }
180
181 static void ath_update_survey_stats(struct ath_softc *sc)
182 {
183 struct ath_hw *ah = sc->sc_ah;
184 struct ath_common *common = ath9k_hw_common(ah);
185 int pos = ah->curchan - &ah->channels[0];
186 struct survey_info *survey = &sc->survey[pos];
187 struct ath_cycle_counters *cc = &common->cc_survey;
188 unsigned int div = common->clockrate * 1000;
189
190 if (!ah->curchan)
191 return;
192
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
195
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
205 }
206 memset(cc, 0, sizeof(*cc));
207
208 ath_update_survey_nf(sc, pos);
209 }
210
211 /*
212 * Set/change channels. If the channel is really being changed, it's done
213 * by reseting the chip. To accomplish this we must first cleanup any pending
214 * DMA, then restart stuff.
215 */
216 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
217 struct ath9k_channel *hchan)
218 {
219 struct ath_wiphy *aphy = hw->priv;
220 struct ath_hw *ah = sc->sc_ah;
221 struct ath_common *common = ath9k_hw_common(ah);
222 struct ieee80211_conf *conf = &common->hw->conf;
223 bool fastcc = true, stopped;
224 struct ieee80211_channel *channel = hw->conf.channel;
225 struct ath9k_hw_cal_data *caldata = NULL;
226 int r;
227
228 if (sc->sc_flags & SC_OP_INVALID)
229 return -EIO;
230
231 del_timer_sync(&common->ani.timer);
232 cancel_work_sync(&sc->paprd_work);
233 cancel_work_sync(&sc->hw_check_work);
234 cancel_delayed_work_sync(&sc->tx_complete_work);
235
236 ath9k_ps_wakeup(sc);
237
238 /*
239 * This is only performed if the channel settings have
240 * actually changed.
241 *
242 * To switch channels clear any pending DMA operations;
243 * wait long enough for the RX fifo to drain, reset the
244 * hardware at the new frequency, and then re-enable
245 * the relevant bits of the h/w.
246 */
247 ath9k_hw_set_interrupts(ah, 0);
248 ath_drain_all_txq(sc, false);
249
250 spin_lock_bh(&sc->rx.pcu_lock);
251
252 stopped = ath_stoprecv(sc);
253
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
257
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
259 fastcc = false;
260
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
263
264 ath_print(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
268 fastcc);
269
270 spin_lock_bh(&sc->sc_resetlock);
271
272 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
273 if (r) {
274 ath_print(common, ATH_DBG_FATAL,
275 "Unable to reset channel (%u MHz), "
276 "reset status %d\n",
277 channel->center_freq, r);
278 spin_unlock_bh(&sc->sc_resetlock);
279 spin_unlock_bh(&sc->rx.pcu_lock);
280 goto ps_restore;
281 }
282 spin_unlock_bh(&sc->sc_resetlock);
283
284 if (ath_startrecv(sc) != 0) {
285 ath_print(common, ATH_DBG_FATAL,
286 "Unable to restart recv logic\n");
287 r = -EIO;
288 spin_unlock_bh(&sc->rx.pcu_lock);
289 goto ps_restore;
290 }
291
292 spin_unlock_bh(&sc->rx.pcu_lock);
293
294 ath_update_txpow(sc);
295 ath9k_hw_set_interrupts(ah, ah->imask);
296
297 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
298 ath_beacon_config(sc, NULL);
299 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
300 ath_start_ani(common);
301 }
302
303 ps_restore:
304 ath9k_ps_restore(sc);
305 return r;
306 }
307
308 static void ath_paprd_activate(struct ath_softc *sc)
309 {
310 struct ath_hw *ah = sc->sc_ah;
311 struct ath9k_hw_cal_data *caldata = ah->caldata;
312 struct ath_common *common = ath9k_hw_common(ah);
313 int chain;
314
315 if (!caldata || !caldata->paprd_done)
316 return;
317
318 ath9k_ps_wakeup(sc);
319 ar9003_paprd_enable(ah, false);
320 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
321 if (!(common->tx_chainmask & BIT(chain)))
322 continue;
323
324 ar9003_paprd_populate_single_table(ah, caldata, chain);
325 }
326
327 ar9003_paprd_enable(ah, true);
328 ath9k_ps_restore(sc);
329 }
330
331 void ath_paprd_calibrate(struct work_struct *work)
332 {
333 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
334 struct ieee80211_hw *hw = sc->hw;
335 struct ath_hw *ah = sc->sc_ah;
336 struct ieee80211_hdr *hdr;
337 struct sk_buff *skb = NULL;
338 struct ieee80211_tx_info *tx_info;
339 int band = hw->conf.channel->band;
340 struct ieee80211_supported_band *sband = &sc->sbands[band];
341 struct ath_tx_control txctl;
342 struct ath9k_hw_cal_data *caldata = ah->caldata;
343 struct ath_common *common = ath9k_hw_common(ah);
344 int qnum, ftype;
345 int chain_ok = 0;
346 int chain;
347 int len = 1800;
348 int time_left;
349 int i;
350
351 if (!caldata)
352 return;
353
354 skb = alloc_skb(len, GFP_KERNEL);
355 if (!skb)
356 return;
357
358 tx_info = IEEE80211_SKB_CB(skb);
359
360 skb_put(skb, len);
361 memset(skb->data, 0, len);
362 hdr = (struct ieee80211_hdr *)skb->data;
363 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
364 hdr->frame_control = cpu_to_le16(ftype);
365 hdr->duration_id = cpu_to_le16(10);
366 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
367 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
368 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
369
370 memset(&txctl, 0, sizeof(txctl));
371 qnum = sc->tx.hwq_map[WME_AC_BE];
372 txctl.txq = &sc->tx.txq[qnum];
373
374 ath9k_ps_wakeup(sc);
375 ar9003_paprd_init_table(ah);
376 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
377 if (!(common->tx_chainmask & BIT(chain)))
378 continue;
379
380 chain_ok = 0;
381 memset(tx_info, 0, sizeof(*tx_info));
382 tx_info->band = band;
383
384 for (i = 0; i < 4; i++) {
385 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
386 tx_info->control.rates[i].count = 6;
387 }
388
389 init_completion(&sc->paprd_complete);
390 ar9003_paprd_setup_gain_table(ah, chain);
391 txctl.paprd = BIT(chain);
392 if (ath_tx_start(hw, skb, &txctl) != 0)
393 break;
394
395 time_left = wait_for_completion_timeout(&sc->paprd_complete,
396 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
397 if (!time_left) {
398 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
399 "Timeout waiting for paprd training on "
400 "TX chain %d\n",
401 chain);
402 goto fail_paprd;
403 }
404
405 if (!ar9003_paprd_is_done(ah))
406 break;
407
408 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
409 break;
410
411 chain_ok = 1;
412 }
413 kfree_skb(skb);
414
415 if (chain_ok) {
416 caldata->paprd_done = true;
417 ath_paprd_activate(sc);
418 }
419
420 fail_paprd:
421 ath9k_ps_restore(sc);
422 }
423
424 /*
425 * This routine performs the periodic noise floor calibration function
426 * that is used to adjust and optimize the chip performance. This
427 * takes environmental changes (location, temperature) into account.
428 * When the task is complete, it reschedules itself depending on the
429 * appropriate interval that was calculated.
430 */
431 void ath_ani_calibrate(unsigned long data)
432 {
433 struct ath_softc *sc = (struct ath_softc *)data;
434 struct ath_hw *ah = sc->sc_ah;
435 struct ath_common *common = ath9k_hw_common(ah);
436 bool longcal = false;
437 bool shortcal = false;
438 bool aniflag = false;
439 unsigned int timestamp = jiffies_to_msecs(jiffies);
440 u32 cal_interval, short_cal_interval, long_cal_interval;
441 unsigned long flags;
442
443 if (ah->caldata && ah->caldata->nfcal_interference)
444 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
445 else
446 long_cal_interval = ATH_LONG_CALINTERVAL;
447
448 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
449 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
450
451 /* Only calibrate if awake */
452 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
453 goto set_timer;
454
455 ath9k_ps_wakeup(sc);
456
457 /* Long calibration runs independently of short calibration. */
458 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
459 longcal = true;
460 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
461 common->ani.longcal_timer = timestamp;
462 }
463
464 /* Short calibration applies only while caldone is false */
465 if (!common->ani.caldone) {
466 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
467 shortcal = true;
468 ath_print(common, ATH_DBG_ANI,
469 "shortcal @%lu\n", jiffies);
470 common->ani.shortcal_timer = timestamp;
471 common->ani.resetcal_timer = timestamp;
472 }
473 } else {
474 if ((timestamp - common->ani.resetcal_timer) >=
475 ATH_RESTART_CALINTERVAL) {
476 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
477 if (common->ani.caldone)
478 common->ani.resetcal_timer = timestamp;
479 }
480 }
481
482 /* Verify whether we must check ANI */
483 if ((timestamp - common->ani.checkani_timer) >=
484 ah->config.ani_poll_interval) {
485 aniflag = true;
486 common->ani.checkani_timer = timestamp;
487 }
488
489 /* Skip all processing if there's nothing to do. */
490 if (longcal || shortcal || aniflag) {
491 /* Call ANI routine if necessary */
492 if (aniflag) {
493 spin_lock_irqsave(&common->cc_lock, flags);
494 ath9k_hw_ani_monitor(ah, ah->curchan);
495 ath_update_survey_stats(sc);
496 spin_unlock_irqrestore(&common->cc_lock, flags);
497 }
498
499 /* Perform calibration if necessary */
500 if (longcal || shortcal) {
501 common->ani.caldone =
502 ath9k_hw_calibrate(ah,
503 ah->curchan,
504 common->rx_chainmask,
505 longcal);
506 }
507 }
508
509 ath9k_ps_restore(sc);
510
511 set_timer:
512 /*
513 * Set timer interval based on previous results.
514 * The interval must be the shortest necessary to satisfy ANI,
515 * short calibration and long calibration.
516 */
517 cal_interval = ATH_LONG_CALINTERVAL;
518 if (sc->sc_ah->config.enable_ani)
519 cal_interval = min(cal_interval,
520 (u32)ah->config.ani_poll_interval);
521 if (!common->ani.caldone)
522 cal_interval = min(cal_interval, (u32)short_cal_interval);
523
524 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
525 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
526 if (!ah->caldata->paprd_done)
527 ieee80211_queue_work(sc->hw, &sc->paprd_work);
528 else
529 ath_paprd_activate(sc);
530 }
531 }
532
533 /*
534 * Update tx/rx chainmask. For legacy association,
535 * hard code chainmask to 1x1, for 11n association, use
536 * the chainmask configuration, for bt coexistence, use
537 * the chainmask configuration even in legacy mode.
538 */
539 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
540 {
541 struct ath_hw *ah = sc->sc_ah;
542 struct ath_common *common = ath9k_hw_common(ah);
543
544 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
545 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
546 common->tx_chainmask = ah->caps.tx_chainmask;
547 common->rx_chainmask = ah->caps.rx_chainmask;
548 } else {
549 common->tx_chainmask = 1;
550 common->rx_chainmask = 1;
551 }
552
553 ath_print(common, ATH_DBG_CONFIG,
554 "tx chmask: %d, rx chmask: %d\n",
555 common->tx_chainmask,
556 common->rx_chainmask);
557 }
558
559 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
560 {
561 struct ath_node *an;
562
563 an = (struct ath_node *)sta->drv_priv;
564
565 if (sc->sc_flags & SC_OP_TXAGGR) {
566 ath_tx_node_init(sc, an);
567 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
568 sta->ht_cap.ampdu_factor);
569 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
570 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
571 }
572 }
573
574 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
575 {
576 struct ath_node *an = (struct ath_node *)sta->drv_priv;
577
578 if (sc->sc_flags & SC_OP_TXAGGR)
579 ath_tx_node_cleanup(sc, an);
580 }
581
582 void ath_hw_check(struct work_struct *work)
583 {
584 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
585 int i;
586
587 ath9k_ps_wakeup(sc);
588
589 for (i = 0; i < 3; i++) {
590 if (ath9k_hw_check_alive(sc->sc_ah))
591 goto out;
592
593 msleep(1);
594 }
595 ath_reset(sc, true);
596
597 out:
598 ath9k_ps_restore(sc);
599 }
600
601 void ath9k_tasklet(unsigned long data)
602 {
603 struct ath_softc *sc = (struct ath_softc *)data;
604 struct ath_hw *ah = sc->sc_ah;
605 struct ath_common *common = ath9k_hw_common(ah);
606
607 u32 status = sc->intrstatus;
608 u32 rxmask;
609
610 ath9k_ps_wakeup(sc);
611
612 if (status & ATH9K_INT_FATAL) {
613 ath_reset(sc, true);
614 ath9k_ps_restore(sc);
615 return;
616 }
617
618 if (!ath9k_hw_check_alive(ah))
619 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
620
621 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
622 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
623 ATH9K_INT_RXORN);
624 else
625 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
626
627 if (status & rxmask) {
628 spin_lock_bh(&sc->rx.pcu_lock);
629
630 /* Check for high priority Rx first */
631 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
632 (status & ATH9K_INT_RXHP))
633 ath_rx_tasklet(sc, 0, true);
634
635 ath_rx_tasklet(sc, 0, false);
636 spin_unlock_bh(&sc->rx.pcu_lock);
637 }
638
639 if (status & ATH9K_INT_TX) {
640 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
641 ath_tx_edma_tasklet(sc);
642 else
643 ath_tx_tasklet(sc);
644 }
645
646 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
647 /*
648 * TSF sync does not look correct; remain awake to sync with
649 * the next Beacon.
650 */
651 ath_print(common, ATH_DBG_PS,
652 "TSFOOR - Sync with next Beacon\n");
653 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
654 }
655
656 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
657 if (status & ATH9K_INT_GENTIMER)
658 ath_gen_timer_isr(sc->sc_ah);
659
660 /* re-enable hardware interrupt */
661 ath9k_hw_set_interrupts(ah, ah->imask);
662 ath9k_ps_restore(sc);
663 }
664
665 irqreturn_t ath_isr(int irq, void *dev)
666 {
667 #define SCHED_INTR ( \
668 ATH9K_INT_FATAL | \
669 ATH9K_INT_RXORN | \
670 ATH9K_INT_RXEOL | \
671 ATH9K_INT_RX | \
672 ATH9K_INT_RXLP | \
673 ATH9K_INT_RXHP | \
674 ATH9K_INT_TX | \
675 ATH9K_INT_BMISS | \
676 ATH9K_INT_CST | \
677 ATH9K_INT_TSFOOR | \
678 ATH9K_INT_GENTIMER)
679
680 struct ath_softc *sc = dev;
681 struct ath_hw *ah = sc->sc_ah;
682 struct ath_common *common = ath9k_hw_common(ah);
683 enum ath9k_int status;
684 bool sched = false;
685
686 /*
687 * The hardware is not ready/present, don't
688 * touch anything. Note this can happen early
689 * on if the IRQ is shared.
690 */
691 if (sc->sc_flags & SC_OP_INVALID)
692 return IRQ_NONE;
693
694
695 /* shared irq, not for us */
696
697 if (!ath9k_hw_intrpend(ah))
698 return IRQ_NONE;
699
700 /*
701 * Figure out the reason(s) for the interrupt. Note
702 * that the hal returns a pseudo-ISR that may include
703 * bits we haven't explicitly enabled so we mask the
704 * value to insure we only process bits we requested.
705 */
706 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
707 status &= ah->imask; /* discard unasked-for bits */
708
709 /*
710 * If there are no status bits set, then this interrupt was not
711 * for me (should have been caught above).
712 */
713 if (!status)
714 return IRQ_NONE;
715
716 /* Cache the status */
717 sc->intrstatus = status;
718
719 if (status & SCHED_INTR)
720 sched = true;
721
722 /*
723 * If a FATAL or RXORN interrupt is received, we have to reset the
724 * chip immediately.
725 */
726 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
727 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
728 goto chip_reset;
729
730 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
731 (status & ATH9K_INT_BB_WATCHDOG)) {
732
733 spin_lock(&common->cc_lock);
734 ath_hw_cycle_counters_update(common);
735 ar9003_hw_bb_watchdog_dbg_info(ah);
736 spin_unlock(&common->cc_lock);
737
738 goto chip_reset;
739 }
740
741 if (status & ATH9K_INT_SWBA)
742 tasklet_schedule(&sc->bcon_tasklet);
743
744 if (status & ATH9K_INT_TXURN)
745 ath9k_hw_updatetxtriglevel(ah, true);
746
747 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
748 if (status & ATH9K_INT_RXEOL) {
749 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
750 ath9k_hw_set_interrupts(ah, ah->imask);
751 }
752 }
753
754 if (status & ATH9K_INT_MIB) {
755 /*
756 * Disable interrupts until we service the MIB
757 * interrupt; otherwise it will continue to
758 * fire.
759 */
760 ath9k_hw_set_interrupts(ah, 0);
761 /*
762 * Let the hal handle the event. We assume
763 * it will clear whatever condition caused
764 * the interrupt.
765 */
766 spin_lock(&common->cc_lock);
767 ath9k_hw_proc_mib_event(ah);
768 spin_unlock(&common->cc_lock);
769 ath9k_hw_set_interrupts(ah, ah->imask);
770 }
771
772 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
773 if (status & ATH9K_INT_TIM_TIMER) {
774 /* Clear RxAbort bit so that we can
775 * receive frames */
776 ath9k_setpower(sc, ATH9K_PM_AWAKE);
777 ath9k_hw_setrxabort(sc->sc_ah, 0);
778 sc->ps_flags |= PS_WAIT_FOR_BEACON;
779 }
780
781 chip_reset:
782
783 ath_debug_stat_interrupt(sc, status);
784
785 if (sched) {
786 /* turn off every interrupt except SWBA */
787 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
788 tasklet_schedule(&sc->intr_tq);
789 }
790
791 return IRQ_HANDLED;
792
793 #undef SCHED_INTR
794 }
795
796 static u32 ath_get_extchanmode(struct ath_softc *sc,
797 struct ieee80211_channel *chan,
798 enum nl80211_channel_type channel_type)
799 {
800 u32 chanmode = 0;
801
802 switch (chan->band) {
803 case IEEE80211_BAND_2GHZ:
804 switch(channel_type) {
805 case NL80211_CHAN_NO_HT:
806 case NL80211_CHAN_HT20:
807 chanmode = CHANNEL_G_HT20;
808 break;
809 case NL80211_CHAN_HT40PLUS:
810 chanmode = CHANNEL_G_HT40PLUS;
811 break;
812 case NL80211_CHAN_HT40MINUS:
813 chanmode = CHANNEL_G_HT40MINUS;
814 break;
815 }
816 break;
817 case IEEE80211_BAND_5GHZ:
818 switch(channel_type) {
819 case NL80211_CHAN_NO_HT:
820 case NL80211_CHAN_HT20:
821 chanmode = CHANNEL_A_HT20;
822 break;
823 case NL80211_CHAN_HT40PLUS:
824 chanmode = CHANNEL_A_HT40PLUS;
825 break;
826 case NL80211_CHAN_HT40MINUS:
827 chanmode = CHANNEL_A_HT40MINUS;
828 break;
829 }
830 break;
831 default:
832 break;
833 }
834
835 return chanmode;
836 }
837
838 static void ath9k_bss_assoc_info(struct ath_softc *sc,
839 struct ieee80211_vif *vif,
840 struct ieee80211_bss_conf *bss_conf)
841 {
842 struct ath_hw *ah = sc->sc_ah;
843 struct ath_common *common = ath9k_hw_common(ah);
844
845 if (bss_conf->assoc) {
846 ath_print(common, ATH_DBG_CONFIG,
847 "Bss Info ASSOC %d, bssid: %pM\n",
848 bss_conf->aid, common->curbssid);
849
850 /* New association, store aid */
851 common->curaid = bss_conf->aid;
852 ath9k_hw_write_associd(ah);
853
854 /*
855 * Request a re-configuration of Beacon related timers
856 * on the receipt of the first Beacon frame (i.e.,
857 * after time sync with the AP).
858 */
859 sc->ps_flags |= PS_BEACON_SYNC;
860
861 /* Configure the beacon */
862 ath_beacon_config(sc, vif);
863
864 /* Reset rssi stats */
865 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
866
867 sc->sc_flags |= SC_OP_ANI_RUN;
868 ath_start_ani(common);
869 } else {
870 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
871 common->curaid = 0;
872 /* Stop ANI */
873 sc->sc_flags &= ~SC_OP_ANI_RUN;
874 del_timer_sync(&common->ani.timer);
875 }
876 }
877
878 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
879 {
880 struct ath_hw *ah = sc->sc_ah;
881 struct ath_common *common = ath9k_hw_common(ah);
882 struct ieee80211_channel *channel = hw->conf.channel;
883 int r;
884
885 ath9k_ps_wakeup(sc);
886 ath9k_hw_configpcipowersave(ah, 0, 0);
887
888 if (!ah->curchan)
889 ah->curchan = ath_get_curchannel(sc, sc->hw);
890
891 spin_lock_bh(&sc->rx.pcu_lock);
892 spin_lock_bh(&sc->sc_resetlock);
893 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
894 if (r) {
895 ath_print(common, ATH_DBG_FATAL,
896 "Unable to reset channel (%u MHz), "
897 "reset status %d\n",
898 channel->center_freq, r);
899 }
900 spin_unlock_bh(&sc->sc_resetlock);
901
902 ath_update_txpow(sc);
903 if (ath_startrecv(sc) != 0) {
904 ath_print(common, ATH_DBG_FATAL,
905 "Unable to restart recv logic\n");
906 spin_unlock_bh(&sc->rx.pcu_lock);
907 return;
908 }
909 spin_unlock_bh(&sc->rx.pcu_lock);
910
911 if (sc->sc_flags & SC_OP_BEACONS)
912 ath_beacon_config(sc, NULL); /* restart beacons */
913
914 /* Re-Enable interrupts */
915 ath9k_hw_set_interrupts(ah, ah->imask);
916
917 /* Enable LED */
918 ath9k_hw_cfg_output(ah, ah->led_pin,
919 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
920 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
921
922 ieee80211_wake_queues(hw);
923 ath9k_ps_restore(sc);
924 }
925
926 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
927 {
928 struct ath_hw *ah = sc->sc_ah;
929 struct ieee80211_channel *channel = hw->conf.channel;
930 int r;
931
932 ath9k_ps_wakeup(sc);
933 ieee80211_stop_queues(hw);
934
935 /*
936 * Keep the LED on when the radio is disabled
937 * during idle unassociated state.
938 */
939 if (!sc->ps_idle) {
940 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
941 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
942 }
943
944 /* Disable interrupts */
945 ath9k_hw_set_interrupts(ah, 0);
946
947 ath_drain_all_txq(sc, false); /* clear pending tx frames */
948
949 spin_lock_bh(&sc->rx.pcu_lock);
950
951 ath_stoprecv(sc); /* turn off frame recv */
952 ath_flushrecv(sc); /* flush recv queue */
953
954 if (!ah->curchan)
955 ah->curchan = ath_get_curchannel(sc, hw);
956
957 spin_lock_bh(&sc->sc_resetlock);
958 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
959 if (r) {
960 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
961 "Unable to reset channel (%u MHz), "
962 "reset status %d\n",
963 channel->center_freq, r);
964 }
965 spin_unlock_bh(&sc->sc_resetlock);
966
967 ath9k_hw_phy_disable(ah);
968
969 spin_unlock_bh(&sc->rx.pcu_lock);
970
971 ath9k_hw_configpcipowersave(ah, 1, 1);
972 ath9k_ps_restore(sc);
973 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
974 }
975
976 int ath_reset(struct ath_softc *sc, bool retry_tx)
977 {
978 struct ath_hw *ah = sc->sc_ah;
979 struct ath_common *common = ath9k_hw_common(ah);
980 struct ieee80211_hw *hw = sc->hw;
981 int r;
982
983 /* Stop ANI */
984 del_timer_sync(&common->ani.timer);
985
986 ieee80211_stop_queues(hw);
987
988 ath9k_hw_set_interrupts(ah, 0);
989 ath_drain_all_txq(sc, retry_tx);
990
991 spin_lock_bh(&sc->rx.pcu_lock);
992
993 ath_stoprecv(sc);
994 ath_flushrecv(sc);
995
996 spin_lock_bh(&sc->sc_resetlock);
997 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
998 if (r)
999 ath_print(common, ATH_DBG_FATAL,
1000 "Unable to reset hardware; reset status %d\n", r);
1001 spin_unlock_bh(&sc->sc_resetlock);
1002
1003 if (ath_startrecv(sc) != 0)
1004 ath_print(common, ATH_DBG_FATAL,
1005 "Unable to start recv logic\n");
1006
1007 spin_unlock_bh(&sc->rx.pcu_lock);
1008
1009 /*
1010 * We may be doing a reset in response to a request
1011 * that changes the channel so update any state that
1012 * might change as a result.
1013 */
1014 ath_update_txpow(sc);
1015
1016 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1017 ath_beacon_config(sc, NULL); /* restart beacons */
1018
1019 ath9k_hw_set_interrupts(ah, ah->imask);
1020
1021 if (retry_tx) {
1022 int i;
1023 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1024 if (ATH_TXQ_SETUP(sc, i)) {
1025 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1026 ath_txq_schedule(sc, &sc->tx.txq[i]);
1027 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1028 }
1029 }
1030 }
1031
1032 ieee80211_wake_queues(hw);
1033
1034 /* Start ANI */
1035 ath_start_ani(common);
1036
1037 return r;
1038 }
1039
1040 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1041 {
1042 int qnum;
1043
1044 switch (queue) {
1045 case 0:
1046 qnum = sc->tx.hwq_map[WME_AC_VO];
1047 break;
1048 case 1:
1049 qnum = sc->tx.hwq_map[WME_AC_VI];
1050 break;
1051 case 2:
1052 qnum = sc->tx.hwq_map[WME_AC_BE];
1053 break;
1054 case 3:
1055 qnum = sc->tx.hwq_map[WME_AC_BK];
1056 break;
1057 default:
1058 qnum = sc->tx.hwq_map[WME_AC_BE];
1059 break;
1060 }
1061
1062 return qnum;
1063 }
1064
1065 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1066 {
1067 int qnum;
1068
1069 switch (queue) {
1070 case WME_AC_VO:
1071 qnum = 0;
1072 break;
1073 case WME_AC_VI:
1074 qnum = 1;
1075 break;
1076 case WME_AC_BE:
1077 qnum = 2;
1078 break;
1079 case WME_AC_BK:
1080 qnum = 3;
1081 break;
1082 default:
1083 qnum = -1;
1084 break;
1085 }
1086
1087 return qnum;
1088 }
1089
1090 /* XXX: Remove me once we don't depend on ath9k_channel for all
1091 * this redundant data */
1092 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1093 struct ath9k_channel *ichan)
1094 {
1095 struct ieee80211_channel *chan = hw->conf.channel;
1096 struct ieee80211_conf *conf = &hw->conf;
1097
1098 ichan->channel = chan->center_freq;
1099 ichan->chan = chan;
1100
1101 if (chan->band == IEEE80211_BAND_2GHZ) {
1102 ichan->chanmode = CHANNEL_G;
1103 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1104 } else {
1105 ichan->chanmode = CHANNEL_A;
1106 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1107 }
1108
1109 if (conf_is_ht(conf))
1110 ichan->chanmode = ath_get_extchanmode(sc, chan,
1111 conf->channel_type);
1112 }
1113
1114 /**********************/
1115 /* mac80211 callbacks */
1116 /**********************/
1117
1118 static int ath9k_start(struct ieee80211_hw *hw)
1119 {
1120 struct ath_wiphy *aphy = hw->priv;
1121 struct ath_softc *sc = aphy->sc;
1122 struct ath_hw *ah = sc->sc_ah;
1123 struct ath_common *common = ath9k_hw_common(ah);
1124 struct ieee80211_channel *curchan = hw->conf.channel;
1125 struct ath9k_channel *init_channel;
1126 int r;
1127
1128 ath_print(common, ATH_DBG_CONFIG,
1129 "Starting driver with initial channel: %d MHz\n",
1130 curchan->center_freq);
1131
1132 mutex_lock(&sc->mutex);
1133
1134 if (ath9k_wiphy_started(sc)) {
1135 if (sc->chan_idx == curchan->hw_value) {
1136 /*
1137 * Already on the operational channel, the new wiphy
1138 * can be marked active.
1139 */
1140 aphy->state = ATH_WIPHY_ACTIVE;
1141 ieee80211_wake_queues(hw);
1142 } else {
1143 /*
1144 * Another wiphy is on another channel, start the new
1145 * wiphy in paused state.
1146 */
1147 aphy->state = ATH_WIPHY_PAUSED;
1148 ieee80211_stop_queues(hw);
1149 }
1150 mutex_unlock(&sc->mutex);
1151 return 0;
1152 }
1153 aphy->state = ATH_WIPHY_ACTIVE;
1154
1155 /* setup initial channel */
1156
1157 sc->chan_idx = curchan->hw_value;
1158
1159 init_channel = ath_get_curchannel(sc, hw);
1160
1161 /* Reset SERDES registers */
1162 ath9k_hw_configpcipowersave(ah, 0, 0);
1163
1164 /*
1165 * The basic interface to setting the hardware in a good
1166 * state is ``reset''. On return the hardware is known to
1167 * be powered up and with interrupts disabled. This must
1168 * be followed by initialization of the appropriate bits
1169 * and then setup of the interrupt mask.
1170 */
1171 spin_lock_bh(&sc->rx.pcu_lock);
1172 spin_lock_bh(&sc->sc_resetlock);
1173 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1174 if (r) {
1175 ath_print(common, ATH_DBG_FATAL,
1176 "Unable to reset hardware; reset status %d "
1177 "(freq %u MHz)\n", r,
1178 curchan->center_freq);
1179 spin_unlock_bh(&sc->sc_resetlock);
1180 spin_unlock_bh(&sc->rx.pcu_lock);
1181 goto mutex_unlock;
1182 }
1183 spin_unlock_bh(&sc->sc_resetlock);
1184
1185 /*
1186 * This is needed only to setup initial state
1187 * but it's best done after a reset.
1188 */
1189 ath_update_txpow(sc);
1190
1191 /*
1192 * Setup the hardware after reset:
1193 * The receive engine is set going.
1194 * Frame transmit is handled entirely
1195 * in the frame output path; there's nothing to do
1196 * here except setup the interrupt mask.
1197 */
1198 if (ath_startrecv(sc) != 0) {
1199 ath_print(common, ATH_DBG_FATAL,
1200 "Unable to start recv logic\n");
1201 r = -EIO;
1202 spin_unlock_bh(&sc->rx.pcu_lock);
1203 goto mutex_unlock;
1204 }
1205 spin_unlock_bh(&sc->rx.pcu_lock);
1206
1207 /* Setup our intr mask. */
1208 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1209 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1210 ATH9K_INT_GLOBAL;
1211
1212 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1213 ah->imask |= ATH9K_INT_RXHP |
1214 ATH9K_INT_RXLP |
1215 ATH9K_INT_BB_WATCHDOG;
1216 else
1217 ah->imask |= ATH9K_INT_RX;
1218
1219 ah->imask |= ATH9K_INT_GTT;
1220
1221 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1222 ah->imask |= ATH9K_INT_CST;
1223
1224 sc->sc_flags &= ~SC_OP_INVALID;
1225 sc->sc_ah->is_monitoring = false;
1226
1227 /* Disable BMISS interrupt when we're not associated */
1228 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1229 ath9k_hw_set_interrupts(ah, ah->imask);
1230
1231 ieee80211_wake_queues(hw);
1232
1233 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1234
1235 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1236 !ah->btcoex_hw.enabled) {
1237 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1238 AR_STOMP_LOW_WLAN_WGHT);
1239 ath9k_hw_btcoex_enable(ah);
1240
1241 if (common->bus_ops->bt_coex_prep)
1242 common->bus_ops->bt_coex_prep(common);
1243 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1244 ath9k_btcoex_timer_resume(sc);
1245 }
1246
1247 pm_qos_update_request(&ath9k_pm_qos_req, 55);
1248
1249 mutex_unlock:
1250 mutex_unlock(&sc->mutex);
1251
1252 return r;
1253 }
1254
1255 static int ath9k_tx(struct ieee80211_hw *hw,
1256 struct sk_buff *skb)
1257 {
1258 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1259 struct ath_wiphy *aphy = hw->priv;
1260 struct ath_softc *sc = aphy->sc;
1261 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1262 struct ath_tx_control txctl;
1263 int padpos, padsize;
1264 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1265 int qnum;
1266
1267 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1268 ath_print(common, ATH_DBG_XMIT,
1269 "ath9k: %s: TX in unexpected wiphy state "
1270 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1271 goto exit;
1272 }
1273
1274 if (sc->ps_enabled) {
1275 /*
1276 * mac80211 does not set PM field for normal data frames, so we
1277 * need to update that based on the current PS mode.
1278 */
1279 if (ieee80211_is_data(hdr->frame_control) &&
1280 !ieee80211_is_nullfunc(hdr->frame_control) &&
1281 !ieee80211_has_pm(hdr->frame_control)) {
1282 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1283 "while in PS mode\n");
1284 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1285 }
1286 }
1287
1288 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1289 /*
1290 * We are using PS-Poll and mac80211 can request TX while in
1291 * power save mode. Need to wake up hardware for the TX to be
1292 * completed and if needed, also for RX of buffered frames.
1293 */
1294 ath9k_ps_wakeup(sc);
1295 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1296 ath9k_hw_setrxabort(sc->sc_ah, 0);
1297 if (ieee80211_is_pspoll(hdr->frame_control)) {
1298 ath_print(common, ATH_DBG_PS,
1299 "Sending PS-Poll to pick a buffered frame\n");
1300 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1301 } else {
1302 ath_print(common, ATH_DBG_PS,
1303 "Wake up to complete TX\n");
1304 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1305 }
1306 /*
1307 * The actual restore operation will happen only after
1308 * the sc_flags bit is cleared. We are just dropping
1309 * the ps_usecount here.
1310 */
1311 ath9k_ps_restore(sc);
1312 }
1313
1314 memset(&txctl, 0, sizeof(struct ath_tx_control));
1315
1316 /*
1317 * As a temporary workaround, assign seq# here; this will likely need
1318 * to be cleaned up to work better with Beacon transmission and virtual
1319 * BSSes.
1320 */
1321 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1322 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1323 sc->tx.seq_no += 0x10;
1324 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1325 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1326 }
1327
1328 /* Add the padding after the header if this is not already done */
1329 padpos = ath9k_cmn_padpos(hdr->frame_control);
1330 padsize = padpos & 3;
1331 if (padsize && skb->len>padpos) {
1332 if (skb_headroom(skb) < padsize)
1333 return -1;
1334 skb_push(skb, padsize);
1335 memmove(skb->data, skb->data + padsize, padpos);
1336 }
1337
1338 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1339 txctl.txq = &sc->tx.txq[qnum];
1340
1341 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1342
1343 if (ath_tx_start(hw, skb, &txctl) != 0) {
1344 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1345 goto exit;
1346 }
1347
1348 return 0;
1349 exit:
1350 dev_kfree_skb_any(skb);
1351 return 0;
1352 }
1353
1354 static void ath9k_stop(struct ieee80211_hw *hw)
1355 {
1356 struct ath_wiphy *aphy = hw->priv;
1357 struct ath_softc *sc = aphy->sc;
1358 struct ath_hw *ah = sc->sc_ah;
1359 struct ath_common *common = ath9k_hw_common(ah);
1360 int i;
1361
1362 mutex_lock(&sc->mutex);
1363
1364 aphy->state = ATH_WIPHY_INACTIVE;
1365
1366 if (led_blink)
1367 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1368
1369 cancel_delayed_work_sync(&sc->tx_complete_work);
1370 cancel_work_sync(&sc->paprd_work);
1371 cancel_work_sync(&sc->hw_check_work);
1372
1373 for (i = 0; i < sc->num_sec_wiphy; i++) {
1374 if (sc->sec_wiphy[i])
1375 break;
1376 }
1377
1378 if (i == sc->num_sec_wiphy) {
1379 cancel_delayed_work_sync(&sc->wiphy_work);
1380 cancel_work_sync(&sc->chan_work);
1381 }
1382
1383 if (sc->sc_flags & SC_OP_INVALID) {
1384 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1385 mutex_unlock(&sc->mutex);
1386 return;
1387 }
1388
1389 if (ath9k_wiphy_started(sc)) {
1390 mutex_unlock(&sc->mutex);
1391 return; /* another wiphy still in use */
1392 }
1393
1394 /* Ensure HW is awake when we try to shut it down. */
1395 ath9k_ps_wakeup(sc);
1396
1397 if (ah->btcoex_hw.enabled) {
1398 ath9k_hw_btcoex_disable(ah);
1399 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1400 ath9k_btcoex_timer_pause(sc);
1401 }
1402
1403 /* make sure h/w will not generate any interrupt
1404 * before setting the invalid flag. */
1405 ath9k_hw_set_interrupts(ah, 0);
1406
1407 spin_lock_bh(&sc->rx.pcu_lock);
1408 if (!(sc->sc_flags & SC_OP_INVALID)) {
1409 ath_drain_all_txq(sc, false);
1410 ath_stoprecv(sc);
1411 ath9k_hw_phy_disable(ah);
1412 } else
1413 sc->rx.rxlink = NULL;
1414 spin_unlock_bh(&sc->rx.pcu_lock);
1415
1416 /* disable HAL and put h/w to sleep */
1417 ath9k_hw_disable(ah);
1418 ath9k_hw_configpcipowersave(ah, 1, 1);
1419 ath9k_ps_restore(sc);
1420
1421 /* Finally, put the chip in FULL SLEEP mode */
1422 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1423
1424 sc->sc_flags |= SC_OP_INVALID;
1425
1426 pm_qos_update_request(&ath9k_pm_qos_req, PM_QOS_DEFAULT_VALUE);
1427
1428 mutex_unlock(&sc->mutex);
1429
1430 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1431 }
1432
1433 static int ath9k_add_interface(struct ieee80211_hw *hw,
1434 struct ieee80211_vif *vif)
1435 {
1436 struct ath_wiphy *aphy = hw->priv;
1437 struct ath_softc *sc = aphy->sc;
1438 struct ath_hw *ah = sc->sc_ah;
1439 struct ath_common *common = ath9k_hw_common(ah);
1440 struct ath_vif *avp = (void *)vif->drv_priv;
1441 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1442 int ret = 0;
1443
1444 mutex_lock(&sc->mutex);
1445
1446 switch (vif->type) {
1447 case NL80211_IFTYPE_STATION:
1448 ic_opmode = NL80211_IFTYPE_STATION;
1449 break;
1450 case NL80211_IFTYPE_WDS:
1451 ic_opmode = NL80211_IFTYPE_WDS;
1452 break;
1453 case NL80211_IFTYPE_ADHOC:
1454 case NL80211_IFTYPE_AP:
1455 case NL80211_IFTYPE_MESH_POINT:
1456 if (sc->nbcnvifs >= ATH_BCBUF) {
1457 ret = -ENOBUFS;
1458 goto out;
1459 }
1460 ic_opmode = vif->type;
1461 break;
1462 default:
1463 ath_print(common, ATH_DBG_FATAL,
1464 "Interface type %d not yet supported\n", vif->type);
1465 ret = -EOPNOTSUPP;
1466 goto out;
1467 }
1468
1469 ath_print(common, ATH_DBG_CONFIG,
1470 "Attach a VIF of type: %d\n", ic_opmode);
1471
1472 /* Set the VIF opmode */
1473 avp->av_opmode = ic_opmode;
1474 avp->av_bslot = -1;
1475
1476 sc->nvifs++;
1477
1478 ath9k_set_bssid_mask(hw, vif);
1479
1480 if (sc->nvifs > 1)
1481 goto out; /* skip global settings for secondary vif */
1482
1483 if (ic_opmode == NL80211_IFTYPE_AP) {
1484 ath9k_hw_set_tsfadjust(ah, 1);
1485 sc->sc_flags |= SC_OP_TSF_RESET;
1486 }
1487
1488 /* Set the device opmode */
1489 ah->opmode = ic_opmode;
1490
1491 /*
1492 * Enable MIB interrupts when there are hardware phy counters.
1493 * Note we only do this (at the moment) for station mode.
1494 */
1495 if ((vif->type == NL80211_IFTYPE_STATION) ||
1496 (vif->type == NL80211_IFTYPE_ADHOC) ||
1497 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1498 if (ah->config.enable_ani)
1499 ah->imask |= ATH9K_INT_MIB;
1500 ah->imask |= ATH9K_INT_TSFOOR;
1501 }
1502
1503 ath9k_hw_set_interrupts(ah, ah->imask);
1504
1505 if (vif->type == NL80211_IFTYPE_AP ||
1506 vif->type == NL80211_IFTYPE_ADHOC) {
1507 sc->sc_flags |= SC_OP_ANI_RUN;
1508 ath_start_ani(common);
1509 }
1510
1511 out:
1512 mutex_unlock(&sc->mutex);
1513 return ret;
1514 }
1515
1516 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1517 struct ieee80211_vif *vif)
1518 {
1519 struct ath_wiphy *aphy = hw->priv;
1520 struct ath_softc *sc = aphy->sc;
1521 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1522 struct ath_vif *avp = (void *)vif->drv_priv;
1523 int i;
1524
1525 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1526
1527 mutex_lock(&sc->mutex);
1528
1529 /* Stop ANI */
1530 sc->sc_flags &= ~SC_OP_ANI_RUN;
1531 del_timer_sync(&common->ani.timer);
1532
1533 /* Reclaim beacon resources */
1534 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1535 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1536 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1537 ath9k_ps_wakeup(sc);
1538 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1539 ath9k_ps_restore(sc);
1540 }
1541
1542 ath_beacon_return(sc, avp);
1543 sc->sc_flags &= ~SC_OP_BEACONS;
1544
1545 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1546 if (sc->beacon.bslot[i] == vif) {
1547 printk(KERN_DEBUG "%s: vif had allocated beacon "
1548 "slot\n", __func__);
1549 sc->beacon.bslot[i] = NULL;
1550 sc->beacon.bslot_aphy[i] = NULL;
1551 }
1552 }
1553
1554 sc->nvifs--;
1555
1556 mutex_unlock(&sc->mutex);
1557 }
1558
1559 static void ath9k_enable_ps(struct ath_softc *sc)
1560 {
1561 struct ath_hw *ah = sc->sc_ah;
1562
1563 sc->ps_enabled = true;
1564 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1565 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1566 ah->imask |= ATH9K_INT_TIM_TIMER;
1567 ath9k_hw_set_interrupts(ah, ah->imask);
1568 }
1569 ath9k_hw_setrxabort(ah, 1);
1570 }
1571 }
1572
1573 static void ath9k_disable_ps(struct ath_softc *sc)
1574 {
1575 struct ath_hw *ah = sc->sc_ah;
1576
1577 sc->ps_enabled = false;
1578 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1579 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1580 ath9k_hw_setrxabort(ah, 0);
1581 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1582 PS_WAIT_FOR_CAB |
1583 PS_WAIT_FOR_PSPOLL_DATA |
1584 PS_WAIT_FOR_TX_ACK);
1585 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1586 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1587 ath9k_hw_set_interrupts(ah, ah->imask);
1588 }
1589 }
1590
1591 }
1592
1593 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1594 {
1595 struct ath_wiphy *aphy = hw->priv;
1596 struct ath_softc *sc = aphy->sc;
1597 struct ath_hw *ah = sc->sc_ah;
1598 struct ath_common *common = ath9k_hw_common(ah);
1599 struct ieee80211_conf *conf = &hw->conf;
1600 bool disable_radio;
1601
1602 mutex_lock(&sc->mutex);
1603
1604 /*
1605 * Leave this as the first check because we need to turn on the
1606 * radio if it was disabled before prior to processing the rest
1607 * of the changes. Likewise we must only disable the radio towards
1608 * the end.
1609 */
1610 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1611 bool enable_radio;
1612 bool all_wiphys_idle;
1613 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1614
1615 spin_lock_bh(&sc->wiphy_lock);
1616 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1617 ath9k_set_wiphy_idle(aphy, idle);
1618
1619 enable_radio = (!idle && all_wiphys_idle);
1620
1621 /*
1622 * After we unlock here its possible another wiphy
1623 * can be re-renabled so to account for that we will
1624 * only disable the radio toward the end of this routine
1625 * if by then all wiphys are still idle.
1626 */
1627 spin_unlock_bh(&sc->wiphy_lock);
1628
1629 if (enable_radio) {
1630 sc->ps_idle = false;
1631 ath_radio_enable(sc, hw);
1632 ath_print(common, ATH_DBG_CONFIG,
1633 "not-idle: enabling radio\n");
1634 }
1635 }
1636
1637 /*
1638 * We just prepare to enable PS. We have to wait until our AP has
1639 * ACK'd our null data frame to disable RX otherwise we'll ignore
1640 * those ACKs and end up retransmitting the same null data frames.
1641 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1642 */
1643 if (changed & IEEE80211_CONF_CHANGE_PS) {
1644 unsigned long flags;
1645 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1646 if (conf->flags & IEEE80211_CONF_PS)
1647 ath9k_enable_ps(sc);
1648 else
1649 ath9k_disable_ps(sc);
1650 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1651 }
1652
1653 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1654 if (conf->flags & IEEE80211_CONF_MONITOR) {
1655 ath_print(common, ATH_DBG_CONFIG,
1656 "Monitor mode is enabled\n");
1657 sc->sc_ah->is_monitoring = true;
1658 } else {
1659 ath_print(common, ATH_DBG_CONFIG,
1660 "Monitor mode is disabled\n");
1661 sc->sc_ah->is_monitoring = false;
1662 }
1663 }
1664
1665 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1666 struct ieee80211_channel *curchan = hw->conf.channel;
1667 int pos = curchan->hw_value;
1668 int old_pos = -1;
1669 unsigned long flags;
1670
1671 if (ah->curchan)
1672 old_pos = ah->curchan - &ah->channels[0];
1673
1674 aphy->chan_idx = pos;
1675 aphy->chan_is_ht = conf_is_ht(conf);
1676 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1677 sc->sc_flags |= SC_OP_OFFCHANNEL;
1678 else
1679 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1680
1681 if (aphy->state == ATH_WIPHY_SCAN ||
1682 aphy->state == ATH_WIPHY_ACTIVE)
1683 ath9k_wiphy_pause_all_forced(sc, aphy);
1684 else {
1685 /*
1686 * Do not change operational channel based on a paused
1687 * wiphy changes.
1688 */
1689 goto skip_chan_change;
1690 }
1691
1692 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1693 curchan->center_freq);
1694
1695 /* XXX: remove me eventualy */
1696 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1697
1698 ath_update_chainmask(sc, conf_is_ht(conf));
1699
1700 /* update survey stats for the old channel before switching */
1701 spin_lock_irqsave(&common->cc_lock, flags);
1702 ath_update_survey_stats(sc);
1703 spin_unlock_irqrestore(&common->cc_lock, flags);
1704
1705 /*
1706 * If the operating channel changes, change the survey in-use flags
1707 * along with it.
1708 * Reset the survey data for the new channel, unless we're switching
1709 * back to the operating channel from an off-channel operation.
1710 */
1711 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1712 sc->cur_survey != &sc->survey[pos]) {
1713
1714 if (sc->cur_survey)
1715 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1716
1717 sc->cur_survey = &sc->survey[pos];
1718
1719 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1720 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1721 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1722 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1723 }
1724
1725 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1726 ath_print(common, ATH_DBG_FATAL,
1727 "Unable to set channel\n");
1728 mutex_unlock(&sc->mutex);
1729 return -EINVAL;
1730 }
1731
1732 /*
1733 * The most recent snapshot of channel->noisefloor for the old
1734 * channel is only available after the hardware reset. Copy it to
1735 * the survey stats now.
1736 */
1737 if (old_pos >= 0)
1738 ath_update_survey_nf(sc, old_pos);
1739 }
1740
1741 skip_chan_change:
1742 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1743 sc->config.txpowlimit = 2 * conf->power_level;
1744 ath_update_txpow(sc);
1745 }
1746
1747 spin_lock_bh(&sc->wiphy_lock);
1748 disable_radio = ath9k_all_wiphys_idle(sc);
1749 spin_unlock_bh(&sc->wiphy_lock);
1750
1751 if (disable_radio) {
1752 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1753 sc->ps_idle = true;
1754 ath_radio_disable(sc, hw);
1755 }
1756
1757 mutex_unlock(&sc->mutex);
1758
1759 return 0;
1760 }
1761
1762 #define SUPPORTED_FILTERS \
1763 (FIF_PROMISC_IN_BSS | \
1764 FIF_ALLMULTI | \
1765 FIF_CONTROL | \
1766 FIF_PSPOLL | \
1767 FIF_OTHER_BSS | \
1768 FIF_BCN_PRBRESP_PROMISC | \
1769 FIF_PROBE_REQ | \
1770 FIF_FCSFAIL)
1771
1772 /* FIXME: sc->sc_full_reset ? */
1773 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1774 unsigned int changed_flags,
1775 unsigned int *total_flags,
1776 u64 multicast)
1777 {
1778 struct ath_wiphy *aphy = hw->priv;
1779 struct ath_softc *sc = aphy->sc;
1780 u32 rfilt;
1781
1782 changed_flags &= SUPPORTED_FILTERS;
1783 *total_flags &= SUPPORTED_FILTERS;
1784
1785 sc->rx.rxfilter = *total_flags;
1786 ath9k_ps_wakeup(sc);
1787 rfilt = ath_calcrxfilter(sc);
1788 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1789 ath9k_ps_restore(sc);
1790
1791 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1792 "Set HW RX filter: 0x%x\n", rfilt);
1793 }
1794
1795 static int ath9k_sta_add(struct ieee80211_hw *hw,
1796 struct ieee80211_vif *vif,
1797 struct ieee80211_sta *sta)
1798 {
1799 struct ath_wiphy *aphy = hw->priv;
1800 struct ath_softc *sc = aphy->sc;
1801
1802 ath_node_attach(sc, sta);
1803
1804 return 0;
1805 }
1806
1807 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1808 struct ieee80211_vif *vif,
1809 struct ieee80211_sta *sta)
1810 {
1811 struct ath_wiphy *aphy = hw->priv;
1812 struct ath_softc *sc = aphy->sc;
1813
1814 ath_node_detach(sc, sta);
1815
1816 return 0;
1817 }
1818
1819 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1820 const struct ieee80211_tx_queue_params *params)
1821 {
1822 struct ath_wiphy *aphy = hw->priv;
1823 struct ath_softc *sc = aphy->sc;
1824 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1825 struct ath9k_tx_queue_info qi;
1826 int ret = 0, qnum;
1827
1828 if (queue >= WME_NUM_AC)
1829 return 0;
1830
1831 mutex_lock(&sc->mutex);
1832
1833 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1834
1835 qi.tqi_aifs = params->aifs;
1836 qi.tqi_cwmin = params->cw_min;
1837 qi.tqi_cwmax = params->cw_max;
1838 qi.tqi_burstTime = params->txop;
1839 qnum = ath_get_hal_qnum(queue, sc);
1840
1841 ath_print(common, ATH_DBG_CONFIG,
1842 "Configure tx [queue/halq] [%d/%d], "
1843 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1844 queue, qnum, params->aifs, params->cw_min,
1845 params->cw_max, params->txop);
1846
1847 ret = ath_txq_update(sc, qnum, &qi);
1848 if (ret)
1849 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1850
1851 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1852 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1853 ath_beaconq_config(sc);
1854
1855 mutex_unlock(&sc->mutex);
1856
1857 return ret;
1858 }
1859
1860 static int ath9k_set_key(struct ieee80211_hw *hw,
1861 enum set_key_cmd cmd,
1862 struct ieee80211_vif *vif,
1863 struct ieee80211_sta *sta,
1864 struct ieee80211_key_conf *key)
1865 {
1866 struct ath_wiphy *aphy = hw->priv;
1867 struct ath_softc *sc = aphy->sc;
1868 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1869 int ret = 0;
1870
1871 if (modparam_nohwcrypt)
1872 return -ENOSPC;
1873
1874 mutex_lock(&sc->mutex);
1875 ath9k_ps_wakeup(sc);
1876 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1877
1878 switch (cmd) {
1879 case SET_KEY:
1880 ret = ath_key_config(common, vif, sta, key);
1881 if (ret >= 0) {
1882 key->hw_key_idx = ret;
1883 /* push IV and Michael MIC generation to stack */
1884 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1885 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1886 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1887 if (sc->sc_ah->sw_mgmt_crypto &&
1888 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1889 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1890 ret = 0;
1891 }
1892 break;
1893 case DISABLE_KEY:
1894 ath_key_delete(common, key);
1895 break;
1896 default:
1897 ret = -EINVAL;
1898 }
1899
1900 ath9k_ps_restore(sc);
1901 mutex_unlock(&sc->mutex);
1902
1903 return ret;
1904 }
1905
1906 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1907 struct ieee80211_vif *vif,
1908 struct ieee80211_bss_conf *bss_conf,
1909 u32 changed)
1910 {
1911 struct ath_wiphy *aphy = hw->priv;
1912 struct ath_softc *sc = aphy->sc;
1913 struct ath_hw *ah = sc->sc_ah;
1914 struct ath_common *common = ath9k_hw_common(ah);
1915 struct ath_vif *avp = (void *)vif->drv_priv;
1916 int slottime;
1917 int error;
1918
1919 mutex_lock(&sc->mutex);
1920
1921 if (changed & BSS_CHANGED_BSSID) {
1922 /* Set BSSID */
1923 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1924 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1925 common->curaid = 0;
1926 ath9k_hw_write_associd(ah);
1927
1928 /* Set aggregation protection mode parameters */
1929 sc->config.ath_aggr_prot = 0;
1930
1931 /* Only legacy IBSS for now */
1932 if (vif->type == NL80211_IFTYPE_ADHOC)
1933 ath_update_chainmask(sc, 0);
1934
1935 ath_print(common, ATH_DBG_CONFIG,
1936 "BSSID: %pM aid: 0x%x\n",
1937 common->curbssid, common->curaid);
1938
1939 /* need to reconfigure the beacon */
1940 sc->sc_flags &= ~SC_OP_BEACONS ;
1941 }
1942
1943 /* Enable transmission of beacons (AP, IBSS, MESH) */
1944 if ((changed & BSS_CHANGED_BEACON) ||
1945 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1946 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1947 error = ath_beacon_alloc(aphy, vif);
1948 if (!error)
1949 ath_beacon_config(sc, vif);
1950 }
1951
1952 if (changed & BSS_CHANGED_ERP_SLOT) {
1953 if (bss_conf->use_short_slot)
1954 slottime = 9;
1955 else
1956 slottime = 20;
1957 if (vif->type == NL80211_IFTYPE_AP) {
1958 /*
1959 * Defer update, so that connected stations can adjust
1960 * their settings at the same time.
1961 * See beacon.c for more details
1962 */
1963 sc->beacon.slottime = slottime;
1964 sc->beacon.updateslot = UPDATE;
1965 } else {
1966 ah->slottime = slottime;
1967 ath9k_hw_init_global_settings(ah);
1968 }
1969 }
1970
1971 /* Disable transmission of beacons */
1972 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1973 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1974
1975 if (changed & BSS_CHANGED_BEACON_INT) {
1976 sc->beacon_interval = bss_conf->beacon_int;
1977 /*
1978 * In case of AP mode, the HW TSF has to be reset
1979 * when the beacon interval changes.
1980 */
1981 if (vif->type == NL80211_IFTYPE_AP) {
1982 sc->sc_flags |= SC_OP_TSF_RESET;
1983 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1984 error = ath_beacon_alloc(aphy, vif);
1985 if (!error)
1986 ath_beacon_config(sc, vif);
1987 } else {
1988 ath_beacon_config(sc, vif);
1989 }
1990 }
1991
1992 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1993 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1994 bss_conf->use_short_preamble);
1995 if (bss_conf->use_short_preamble)
1996 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1997 else
1998 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1999 }
2000
2001 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2002 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2003 bss_conf->use_cts_prot);
2004 if (bss_conf->use_cts_prot &&
2005 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2006 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2007 else
2008 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2009 }
2010
2011 if (changed & BSS_CHANGED_ASSOC) {
2012 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2013 bss_conf->assoc);
2014 ath9k_bss_assoc_info(sc, vif, bss_conf);
2015 }
2016
2017 mutex_unlock(&sc->mutex);
2018 }
2019
2020 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2021 {
2022 u64 tsf;
2023 struct ath_wiphy *aphy = hw->priv;
2024 struct ath_softc *sc = aphy->sc;
2025
2026 mutex_lock(&sc->mutex);
2027 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2028 mutex_unlock(&sc->mutex);
2029
2030 return tsf;
2031 }
2032
2033 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2034 {
2035 struct ath_wiphy *aphy = hw->priv;
2036 struct ath_softc *sc = aphy->sc;
2037
2038 mutex_lock(&sc->mutex);
2039 ath9k_hw_settsf64(sc->sc_ah, tsf);
2040 mutex_unlock(&sc->mutex);
2041 }
2042
2043 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2044 {
2045 struct ath_wiphy *aphy = hw->priv;
2046 struct ath_softc *sc = aphy->sc;
2047
2048 mutex_lock(&sc->mutex);
2049
2050 ath9k_ps_wakeup(sc);
2051 ath9k_hw_reset_tsf(sc->sc_ah);
2052 ath9k_ps_restore(sc);
2053
2054 mutex_unlock(&sc->mutex);
2055 }
2056
2057 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2058 struct ieee80211_vif *vif,
2059 enum ieee80211_ampdu_mlme_action action,
2060 struct ieee80211_sta *sta,
2061 u16 tid, u16 *ssn)
2062 {
2063 struct ath_wiphy *aphy = hw->priv;
2064 struct ath_softc *sc = aphy->sc;
2065 int ret = 0;
2066
2067 local_bh_disable();
2068
2069 switch (action) {
2070 case IEEE80211_AMPDU_RX_START:
2071 if (!(sc->sc_flags & SC_OP_RXAGGR))
2072 ret = -ENOTSUPP;
2073 break;
2074 case IEEE80211_AMPDU_RX_STOP:
2075 break;
2076 case IEEE80211_AMPDU_TX_START:
2077 ath9k_ps_wakeup(sc);
2078 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2079 if (!ret)
2080 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2081 ath9k_ps_restore(sc);
2082 break;
2083 case IEEE80211_AMPDU_TX_STOP:
2084 ath9k_ps_wakeup(sc);
2085 ath_tx_aggr_stop(sc, sta, tid);
2086 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2087 ath9k_ps_restore(sc);
2088 break;
2089 case IEEE80211_AMPDU_TX_OPERATIONAL:
2090 ath9k_ps_wakeup(sc);
2091 ath_tx_aggr_resume(sc, sta, tid);
2092 ath9k_ps_restore(sc);
2093 break;
2094 default:
2095 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2096 "Unknown AMPDU action\n");
2097 }
2098
2099 local_bh_enable();
2100
2101 return ret;
2102 }
2103
2104 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2105 struct survey_info *survey)
2106 {
2107 struct ath_wiphy *aphy = hw->priv;
2108 struct ath_softc *sc = aphy->sc;
2109 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2110 struct ieee80211_supported_band *sband;
2111 struct ieee80211_channel *chan;
2112 unsigned long flags;
2113 int pos;
2114
2115 spin_lock_irqsave(&common->cc_lock, flags);
2116 if (idx == 0)
2117 ath_update_survey_stats(sc);
2118
2119 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2120 if (sband && idx >= sband->n_channels) {
2121 idx -= sband->n_channels;
2122 sband = NULL;
2123 }
2124
2125 if (!sband)
2126 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2127
2128 if (!sband || idx >= sband->n_channels) {
2129 spin_unlock_irqrestore(&common->cc_lock, flags);
2130 return -ENOENT;
2131 }
2132
2133 chan = &sband->channels[idx];
2134 pos = chan->hw_value;
2135 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2136 survey->channel = chan;
2137 spin_unlock_irqrestore(&common->cc_lock, flags);
2138
2139 return 0;
2140 }
2141
2142 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2143 {
2144 struct ath_wiphy *aphy = hw->priv;
2145 struct ath_softc *sc = aphy->sc;
2146
2147 mutex_lock(&sc->mutex);
2148 if (ath9k_wiphy_scanning(sc)) {
2149 /*
2150 * There is a race here in mac80211 but fixing it requires
2151 * we revisit how we handle the scan complete callback.
2152 * After mac80211 fixes we will not have configured hardware
2153 * to the home channel nor would we have configured the RX
2154 * filter yet.
2155 */
2156 mutex_unlock(&sc->mutex);
2157 return;
2158 }
2159
2160 aphy->state = ATH_WIPHY_SCAN;
2161 ath9k_wiphy_pause_all_forced(sc, aphy);
2162 mutex_unlock(&sc->mutex);
2163 }
2164
2165 /*
2166 * XXX: this requires a revisit after the driver
2167 * scan_complete gets moved to another place/removed in mac80211.
2168 */
2169 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2170 {
2171 struct ath_wiphy *aphy = hw->priv;
2172 struct ath_softc *sc = aphy->sc;
2173
2174 mutex_lock(&sc->mutex);
2175 aphy->state = ATH_WIPHY_ACTIVE;
2176 mutex_unlock(&sc->mutex);
2177 }
2178
2179 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2180 {
2181 struct ath_wiphy *aphy = hw->priv;
2182 struct ath_softc *sc = aphy->sc;
2183 struct ath_hw *ah = sc->sc_ah;
2184
2185 mutex_lock(&sc->mutex);
2186 ah->coverage_class = coverage_class;
2187 ath9k_hw_init_global_settings(ah);
2188 mutex_unlock(&sc->mutex);
2189 }
2190
2191 struct ieee80211_ops ath9k_ops = {
2192 .tx = ath9k_tx,
2193 .start = ath9k_start,
2194 .stop = ath9k_stop,
2195 .add_interface = ath9k_add_interface,
2196 .remove_interface = ath9k_remove_interface,
2197 .config = ath9k_config,
2198 .configure_filter = ath9k_configure_filter,
2199 .sta_add = ath9k_sta_add,
2200 .sta_remove = ath9k_sta_remove,
2201 .conf_tx = ath9k_conf_tx,
2202 .bss_info_changed = ath9k_bss_info_changed,
2203 .set_key = ath9k_set_key,
2204 .get_tsf = ath9k_get_tsf,
2205 .set_tsf = ath9k_set_tsf,
2206 .reset_tsf = ath9k_reset_tsf,
2207 .ampdu_action = ath9k_ampdu_action,
2208 .get_survey = ath9k_get_survey,
2209 .sw_scan_start = ath9k_sw_scan_start,
2210 .sw_scan_complete = ath9k_sw_scan_complete,
2211 .rfkill_poll = ath9k_rfkill_poll_state,
2212 .set_coverage_class = ath9k_set_coverage_class,
2213 };
kernel source for telekom puls (alcatel/mediatek)