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drivers/net: avoid some skb->ip_summed initializations
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / vmxnet3 / vmxnet3_drv.c
1 /*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
27 #include <net/ip6_checksum.h>
28
29 #include "vmxnet3_int.h"
30
31 char vmxnet3_driver_name[] = "vmxnet3";
32 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
33
34 /*
35 * PCI Device ID Table
36 * Last entry must be all 0s
37 */
38 static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = {
39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
40 {0}
41 };
42
43 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
44
45 static atomic_t devices_found;
46
47
48 /*
49 * Enable/Disable the given intr
50 */
51 static void
52 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
53 {
54 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
55 }
56
57
58 static void
59 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
60 {
61 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
62 }
63
64
65 /*
66 * Enable/Disable all intrs used by the device
67 */
68 static void
69 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
70 {
71 int i;
72
73 for (i = 0; i < adapter->intr.num_intrs; i++)
74 vmxnet3_enable_intr(adapter, i);
75 adapter->shared->devRead.intrConf.intrCtrl &=
76 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
77 }
78
79
80 static void
81 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
82 {
83 int i;
84
85 adapter->shared->devRead.intrConf.intrCtrl |=
86 cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
87 for (i = 0; i < adapter->intr.num_intrs; i++)
88 vmxnet3_disable_intr(adapter, i);
89 }
90
91
92 static void
93 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
94 {
95 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
96 }
97
98
99 static bool
100 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
101 {
102 return netif_queue_stopped(adapter->netdev);
103 }
104
105
106 static void
107 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
108 {
109 tq->stopped = false;
110 netif_start_queue(adapter->netdev);
111 }
112
113
114 static void
115 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
116 {
117 tq->stopped = false;
118 netif_wake_queue(adapter->netdev);
119 }
120
121
122 static void
123 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
124 {
125 tq->stopped = true;
126 tq->num_stop++;
127 netif_stop_queue(adapter->netdev);
128 }
129
130
131 /*
132 * Check the link state. This may start or stop the tx queue.
133 */
134 static void
135 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
136 {
137 u32 ret;
138
139 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
140 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
141 adapter->link_speed = ret >> 16;
142 if (ret & 1) { /* Link is up. */
143 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
144 adapter->netdev->name, adapter->link_speed);
145 if (!netif_carrier_ok(adapter->netdev))
146 netif_carrier_on(adapter->netdev);
147
148 if (affectTxQueue)
149 vmxnet3_tq_start(&adapter->tx_queue, adapter);
150 } else {
151 printk(KERN_INFO "%s: NIC Link is Down\n",
152 adapter->netdev->name);
153 if (netif_carrier_ok(adapter->netdev))
154 netif_carrier_off(adapter->netdev);
155
156 if (affectTxQueue)
157 vmxnet3_tq_stop(&adapter->tx_queue, adapter);
158 }
159 }
160
161 static void
162 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
163 {
164 u32 events = le32_to_cpu(adapter->shared->ecr);
165 if (!events)
166 return;
167
168 vmxnet3_ack_events(adapter, events);
169
170 /* Check if link state has changed */
171 if (events & VMXNET3_ECR_LINK)
172 vmxnet3_check_link(adapter, true);
173
174 /* Check if there is an error on xmit/recv queues */
175 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
176 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
177 VMXNET3_CMD_GET_QUEUE_STATUS);
178
179 if (adapter->tqd_start->status.stopped) {
180 printk(KERN_ERR "%s: tq error 0x%x\n",
181 adapter->netdev->name,
182 le32_to_cpu(adapter->tqd_start->status.error));
183 }
184 if (adapter->rqd_start->status.stopped) {
185 printk(KERN_ERR "%s: rq error 0x%x\n",
186 adapter->netdev->name,
187 adapter->rqd_start->status.error);
188 }
189
190 schedule_work(&adapter->work);
191 }
192 }
193
194 #ifdef __BIG_ENDIAN_BITFIELD
195 /*
196 * The device expects the bitfields in shared structures to be written in
197 * little endian. When CPU is big endian, the following routines are used to
198 * correctly read and write into ABI.
199 * The general technique used here is : double word bitfields are defined in
200 * opposite order for big endian architecture. Then before reading them in
201 * driver the complete double word is translated using le32_to_cpu. Similarly
202 * After the driver writes into bitfields, cpu_to_le32 is used to translate the
203 * double words into required format.
204 * In order to avoid touching bits in shared structure more than once, temporary
205 * descriptors are used. These are passed as srcDesc to following functions.
206 */
207 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
208 struct Vmxnet3_RxDesc *dstDesc)
209 {
210 u32 *src = (u32 *)srcDesc + 2;
211 u32 *dst = (u32 *)dstDesc + 2;
212 dstDesc->addr = le64_to_cpu(srcDesc->addr);
213 *dst = le32_to_cpu(*src);
214 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
215 }
216
217 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
218 struct Vmxnet3_TxDesc *dstDesc)
219 {
220 int i;
221 u32 *src = (u32 *)(srcDesc + 1);
222 u32 *dst = (u32 *)(dstDesc + 1);
223
224 /* Working backwards so that the gen bit is set at the end. */
225 for (i = 2; i > 0; i--) {
226 src--;
227 dst--;
228 *dst = cpu_to_le32(*src);
229 }
230 }
231
232
233 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
234 struct Vmxnet3_RxCompDesc *dstDesc)
235 {
236 int i = 0;
237 u32 *src = (u32 *)srcDesc;
238 u32 *dst = (u32 *)dstDesc;
239 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
240 *dst = le32_to_cpu(*src);
241 src++;
242 dst++;
243 }
244 }
245
246
247 /* Used to read bitfield values from double words. */
248 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
249 {
250 u32 temp = le32_to_cpu(*bitfield);
251 u32 mask = ((1 << size) - 1) << pos;
252 temp &= mask;
253 temp >>= pos;
254 return temp;
255 }
256
257
258
259 #endif /* __BIG_ENDIAN_BITFIELD */
260
261 #ifdef __BIG_ENDIAN_BITFIELD
262
263 # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
264 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
265 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
266 # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
267 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
268 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
269 # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
270 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
271 VMXNET3_TCD_GEN_SIZE)
272 # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
273 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
274 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
275 (dstrcd) = (tmp); \
276 vmxnet3_RxCompToCPU((rcd), (tmp)); \
277 } while (0)
278 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
279 (dstrxd) = (tmp); \
280 vmxnet3_RxDescToCPU((rxd), (tmp)); \
281 } while (0)
282
283 #else
284
285 # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
286 # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
287 # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
288 # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
289 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
290 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
291
292 #endif /* __BIG_ENDIAN_BITFIELD */
293
294
295 static void
296 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
297 struct pci_dev *pdev)
298 {
299 if (tbi->map_type == VMXNET3_MAP_SINGLE)
300 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
301 PCI_DMA_TODEVICE);
302 else if (tbi->map_type == VMXNET3_MAP_PAGE)
303 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
304 PCI_DMA_TODEVICE);
305 else
306 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
307
308 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
309 }
310
311
312 static int
313 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
314 struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
315 {
316 struct sk_buff *skb;
317 int entries = 0;
318
319 /* no out of order completion */
320 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
321 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
322
323 skb = tq->buf_info[eop_idx].skb;
324 BUG_ON(skb == NULL);
325 tq->buf_info[eop_idx].skb = NULL;
326
327 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
328
329 while (tq->tx_ring.next2comp != eop_idx) {
330 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
331 pdev);
332
333 /* update next2comp w/o tx_lock. Since we are marking more,
334 * instead of less, tx ring entries avail, the worst case is
335 * that the tx routine incorrectly re-queues a pkt due to
336 * insufficient tx ring entries.
337 */
338 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
339 entries++;
340 }
341
342 dev_kfree_skb_any(skb);
343 return entries;
344 }
345
346
347 static int
348 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
349 struct vmxnet3_adapter *adapter)
350 {
351 int completed = 0;
352 union Vmxnet3_GenericDesc *gdesc;
353
354 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
355 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
356 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
357 &gdesc->tcd), tq, adapter->pdev,
358 adapter);
359
360 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
361 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
362 }
363
364 if (completed) {
365 spin_lock(&tq->tx_lock);
366 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
367 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
368 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
369 netif_carrier_ok(adapter->netdev))) {
370 vmxnet3_tq_wake(tq, adapter);
371 }
372 spin_unlock(&tq->tx_lock);
373 }
374 return completed;
375 }
376
377
378 static void
379 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
380 struct vmxnet3_adapter *adapter)
381 {
382 int i;
383
384 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
385 struct vmxnet3_tx_buf_info *tbi;
386 union Vmxnet3_GenericDesc *gdesc;
387
388 tbi = tq->buf_info + tq->tx_ring.next2comp;
389 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp;
390
391 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
392 if (tbi->skb) {
393 dev_kfree_skb_any(tbi->skb);
394 tbi->skb = NULL;
395 }
396 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
397 }
398
399 /* sanity check, verify all buffers are indeed unmapped and freed */
400 for (i = 0; i < tq->tx_ring.size; i++) {
401 BUG_ON(tq->buf_info[i].skb != NULL ||
402 tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
403 }
404
405 tq->tx_ring.gen = VMXNET3_INIT_GEN;
406 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
407
408 tq->comp_ring.gen = VMXNET3_INIT_GEN;
409 tq->comp_ring.next2proc = 0;
410 }
411
412
413 void
414 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
415 struct vmxnet3_adapter *adapter)
416 {
417 if (tq->tx_ring.base) {
418 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
419 sizeof(struct Vmxnet3_TxDesc),
420 tq->tx_ring.base, tq->tx_ring.basePA);
421 tq->tx_ring.base = NULL;
422 }
423 if (tq->data_ring.base) {
424 pci_free_consistent(adapter->pdev, tq->data_ring.size *
425 sizeof(struct Vmxnet3_TxDataDesc),
426 tq->data_ring.base, tq->data_ring.basePA);
427 tq->data_ring.base = NULL;
428 }
429 if (tq->comp_ring.base) {
430 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
431 sizeof(struct Vmxnet3_TxCompDesc),
432 tq->comp_ring.base, tq->comp_ring.basePA);
433 tq->comp_ring.base = NULL;
434 }
435 kfree(tq->buf_info);
436 tq->buf_info = NULL;
437 }
438
439
440 static void
441 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
442 struct vmxnet3_adapter *adapter)
443 {
444 int i;
445
446 /* reset the tx ring contents to 0 and reset the tx ring states */
447 memset(tq->tx_ring.base, 0, tq->tx_ring.size *
448 sizeof(struct Vmxnet3_TxDesc));
449 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
450 tq->tx_ring.gen = VMXNET3_INIT_GEN;
451
452 memset(tq->data_ring.base, 0, tq->data_ring.size *
453 sizeof(struct Vmxnet3_TxDataDesc));
454
455 /* reset the tx comp ring contents to 0 and reset comp ring states */
456 memset(tq->comp_ring.base, 0, tq->comp_ring.size *
457 sizeof(struct Vmxnet3_TxCompDesc));
458 tq->comp_ring.next2proc = 0;
459 tq->comp_ring.gen = VMXNET3_INIT_GEN;
460
461 /* reset the bookkeeping data */
462 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
463 for (i = 0; i < tq->tx_ring.size; i++)
464 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
465
466 /* stats are not reset */
467 }
468
469
470 static int
471 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
472 struct vmxnet3_adapter *adapter)
473 {
474 BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
475 tq->comp_ring.base || tq->buf_info);
476
477 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
478 * sizeof(struct Vmxnet3_TxDesc),
479 &tq->tx_ring.basePA);
480 if (!tq->tx_ring.base) {
481 printk(KERN_ERR "%s: failed to allocate tx ring\n",
482 adapter->netdev->name);
483 goto err;
484 }
485
486 tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
487 tq->data_ring.size *
488 sizeof(struct Vmxnet3_TxDataDesc),
489 &tq->data_ring.basePA);
490 if (!tq->data_ring.base) {
491 printk(KERN_ERR "%s: failed to allocate data ring\n",
492 adapter->netdev->name);
493 goto err;
494 }
495
496 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
497 tq->comp_ring.size *
498 sizeof(struct Vmxnet3_TxCompDesc),
499 &tq->comp_ring.basePA);
500 if (!tq->comp_ring.base) {
501 printk(KERN_ERR "%s: failed to allocate tx comp ring\n",
502 adapter->netdev->name);
503 goto err;
504 }
505
506 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
507 GFP_KERNEL);
508 if (!tq->buf_info) {
509 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n",
510 adapter->netdev->name);
511 goto err;
512 }
513
514 return 0;
515
516 err:
517 vmxnet3_tq_destroy(tq, adapter);
518 return -ENOMEM;
519 }
520
521
522 /*
523 * starting from ring->next2fill, allocate rx buffers for the given ring
524 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
525 * are allocated or allocation fails
526 */
527
528 static int
529 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
530 int num_to_alloc, struct vmxnet3_adapter *adapter)
531 {
532 int num_allocated = 0;
533 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
534 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
535 u32 val;
536
537 while (num_allocated < num_to_alloc) {
538 struct vmxnet3_rx_buf_info *rbi;
539 union Vmxnet3_GenericDesc *gd;
540
541 rbi = rbi_base + ring->next2fill;
542 gd = ring->base + ring->next2fill;
543
544 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
545 if (rbi->skb == NULL) {
546 rbi->skb = dev_alloc_skb(rbi->len +
547 NET_IP_ALIGN);
548 if (unlikely(rbi->skb == NULL)) {
549 rq->stats.rx_buf_alloc_failure++;
550 break;
551 }
552 rbi->skb->dev = adapter->netdev;
553
554 skb_reserve(rbi->skb, NET_IP_ALIGN);
555 rbi->dma_addr = pci_map_single(adapter->pdev,
556 rbi->skb->data, rbi->len,
557 PCI_DMA_FROMDEVICE);
558 } else {
559 /* rx buffer skipped by the device */
560 }
561 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
562 } else {
563 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
564 rbi->len != PAGE_SIZE);
565
566 if (rbi->page == NULL) {
567 rbi->page = alloc_page(GFP_ATOMIC);
568 if (unlikely(rbi->page == NULL)) {
569 rq->stats.rx_buf_alloc_failure++;
570 break;
571 }
572 rbi->dma_addr = pci_map_page(adapter->pdev,
573 rbi->page, 0, PAGE_SIZE,
574 PCI_DMA_FROMDEVICE);
575 } else {
576 /* rx buffers skipped by the device */
577 }
578 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
579 }
580
581 BUG_ON(rbi->dma_addr == 0);
582 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
583 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT)
584 | val | rbi->len);
585
586 num_allocated++;
587 vmxnet3_cmd_ring_adv_next2fill(ring);
588 }
589 rq->uncommitted[ring_idx] += num_allocated;
590
591 dev_dbg(&adapter->netdev->dev,
592 "alloc_rx_buf: %d allocated, next2fill %u, next2comp "
593 "%u, uncommited %u\n", num_allocated, ring->next2fill,
594 ring->next2comp, rq->uncommitted[ring_idx]);
595
596 /* so that the device can distinguish a full ring and an empty ring */
597 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
598
599 return num_allocated;
600 }
601
602
603 static void
604 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
605 struct vmxnet3_rx_buf_info *rbi)
606 {
607 struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
608 skb_shinfo(skb)->nr_frags;
609
610 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
611
612 frag->page = rbi->page;
613 frag->page_offset = 0;
614 frag->size = rcd->len;
615 skb->data_len += frag->size;
616 skb_shinfo(skb)->nr_frags++;
617 }
618
619
620 static void
621 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
622 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
623 struct vmxnet3_adapter *adapter)
624 {
625 u32 dw2, len;
626 unsigned long buf_offset;
627 int i;
628 union Vmxnet3_GenericDesc *gdesc;
629 struct vmxnet3_tx_buf_info *tbi = NULL;
630
631 BUG_ON(ctx->copy_size > skb_headlen(skb));
632
633 /* use the previous gen bit for the SOP desc */
634 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
635
636 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
637 gdesc = ctx->sop_txd; /* both loops below can be skipped */
638
639 /* no need to map the buffer if headers are copied */
640 if (ctx->copy_size) {
641 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
642 tq->tx_ring.next2fill *
643 sizeof(struct Vmxnet3_TxDataDesc));
644 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
645 ctx->sop_txd->dword[3] = 0;
646
647 tbi = tq->buf_info + tq->tx_ring.next2fill;
648 tbi->map_type = VMXNET3_MAP_NONE;
649
650 dev_dbg(&adapter->netdev->dev,
651 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
652 tq->tx_ring.next2fill,
653 le64_to_cpu(ctx->sop_txd->txd.addr),
654 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
655 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
656
657 /* use the right gen for non-SOP desc */
658 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
659 }
660
661 /* linear part can use multiple tx desc if it's big */
662 len = skb_headlen(skb) - ctx->copy_size;
663 buf_offset = ctx->copy_size;
664 while (len) {
665 u32 buf_size;
666
667 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
668 buf_size = len;
669 dw2 |= len;
670 } else {
671 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
672 /* spec says that for TxDesc.len, 0 == 2^14 */
673 }
674
675 tbi = tq->buf_info + tq->tx_ring.next2fill;
676 tbi->map_type = VMXNET3_MAP_SINGLE;
677 tbi->dma_addr = pci_map_single(adapter->pdev,
678 skb->data + buf_offset, buf_size,
679 PCI_DMA_TODEVICE);
680
681 tbi->len = buf_size;
682
683 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
684 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
685
686 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
687 gdesc->dword[2] = cpu_to_le32(dw2);
688 gdesc->dword[3] = 0;
689
690 dev_dbg(&adapter->netdev->dev,
691 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
692 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
693 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
694 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
695 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
696
697 len -= buf_size;
698 buf_offset += buf_size;
699 }
700
701 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
702 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
703
704 tbi = tq->buf_info + tq->tx_ring.next2fill;
705 tbi->map_type = VMXNET3_MAP_PAGE;
706 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page,
707 frag->page_offset, frag->size,
708 PCI_DMA_TODEVICE);
709
710 tbi->len = frag->size;
711
712 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
713 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
714
715 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
716 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size);
717 gdesc->dword[3] = 0;
718
719 dev_dbg(&adapter->netdev->dev,
720 "txd[%u]: 0x%llu %u %u\n",
721 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
722 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
723 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
724 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
725 }
726
727 ctx->eop_txd = gdesc;
728
729 /* set the last buf_info for the pkt */
730 tbi->skb = skb;
731 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
732 }
733
734
735 /*
736 * parse and copy relevant protocol headers:
737 * For a tso pkt, relevant headers are L2/3/4 including options
738 * For a pkt requesting csum offloading, they are L2/3 and may include L4
739 * if it's a TCP/UDP pkt
740 *
741 * Returns:
742 * -1: error happens during parsing
743 * 0: protocol headers parsed, but too big to be copied
744 * 1: protocol headers parsed and copied
745 *
746 * Other effects:
747 * 1. related *ctx fields are updated.
748 * 2. ctx->copy_size is # of bytes copied
749 * 3. the portion copied is guaranteed to be in the linear part
750 *
751 */
752 static int
753 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
754 struct vmxnet3_tx_ctx *ctx,
755 struct vmxnet3_adapter *adapter)
756 {
757 struct Vmxnet3_TxDataDesc *tdd;
758
759 if (ctx->mss) {
760 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
761 ctx->l4_hdr_size = ((struct tcphdr *)
762 skb_transport_header(skb))->doff * 4;
763 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
764 } else {
765 unsigned int pull_size;
766
767 if (skb->ip_summed == CHECKSUM_PARTIAL) {
768 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
769
770 if (ctx->ipv4) {
771 struct iphdr *iph = (struct iphdr *)
772 skb_network_header(skb);
773 if (iph->protocol == IPPROTO_TCP) {
774 pull_size = ctx->eth_ip_hdr_size +
775 sizeof(struct tcphdr);
776
777 if (unlikely(!pskb_may_pull(skb,
778 pull_size))) {
779 goto err;
780 }
781 ctx->l4_hdr_size = ((struct tcphdr *)
782 skb_transport_header(skb))->doff * 4;
783 } else if (iph->protocol == IPPROTO_UDP) {
784 ctx->l4_hdr_size =
785 sizeof(struct udphdr);
786 } else {
787 ctx->l4_hdr_size = 0;
788 }
789 } else {
790 /* for simplicity, don't copy L4 headers */
791 ctx->l4_hdr_size = 0;
792 }
793 ctx->copy_size = ctx->eth_ip_hdr_size +
794 ctx->l4_hdr_size;
795 } else {
796 ctx->eth_ip_hdr_size = 0;
797 ctx->l4_hdr_size = 0;
798 /* copy as much as allowed */
799 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
800 , skb_headlen(skb));
801 }
802
803 /* make sure headers are accessible directly */
804 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
805 goto err;
806 }
807
808 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
809 tq->stats.oversized_hdr++;
810 ctx->copy_size = 0;
811 return 0;
812 }
813
814 tdd = tq->data_ring.base + tq->tx_ring.next2fill;
815
816 memcpy(tdd->data, skb->data, ctx->copy_size);
817 dev_dbg(&adapter->netdev->dev,
818 "copy %u bytes to dataRing[%u]\n",
819 ctx->copy_size, tq->tx_ring.next2fill);
820 return 1;
821
822 err:
823 return -1;
824 }
825
826
827 static void
828 vmxnet3_prepare_tso(struct sk_buff *skb,
829 struct vmxnet3_tx_ctx *ctx)
830 {
831 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb);
832 if (ctx->ipv4) {
833 struct iphdr *iph = (struct iphdr *)skb_network_header(skb);
834 iph->check = 0;
835 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
836 IPPROTO_TCP, 0);
837 } else {
838 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb);
839 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
840 IPPROTO_TCP, 0);
841 }
842 }
843
844
845 /*
846 * Transmits a pkt thru a given tq
847 * Returns:
848 * NETDEV_TX_OK: descriptors are setup successfully
849 * NETDEV_TX_OK: error occured, the pkt is dropped
850 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
851 *
852 * Side-effects:
853 * 1. tx ring may be changed
854 * 2. tq stats may be updated accordingly
855 * 3. shared->txNumDeferred may be updated
856 */
857
858 static int
859 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
860 struct vmxnet3_adapter *adapter, struct net_device *netdev)
861 {
862 int ret;
863 u32 count;
864 unsigned long flags;
865 struct vmxnet3_tx_ctx ctx;
866 union Vmxnet3_GenericDesc *gdesc;
867 #ifdef __BIG_ENDIAN_BITFIELD
868 /* Use temporary descriptor to avoid touching bits multiple times */
869 union Vmxnet3_GenericDesc tempTxDesc;
870 #endif
871
872 /* conservatively estimate # of descriptors to use */
873 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) +
874 skb_shinfo(skb)->nr_frags + 1;
875
876 ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP));
877
878 ctx.mss = skb_shinfo(skb)->gso_size;
879 if (ctx.mss) {
880 if (skb_header_cloned(skb)) {
881 if (unlikely(pskb_expand_head(skb, 0, 0,
882 GFP_ATOMIC) != 0)) {
883 tq->stats.drop_tso++;
884 goto drop_pkt;
885 }
886 tq->stats.copy_skb_header++;
887 }
888 vmxnet3_prepare_tso(skb, &ctx);
889 } else {
890 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
891
892 /* non-tso pkts must not use more than
893 * VMXNET3_MAX_TXD_PER_PKT entries
894 */
895 if (skb_linearize(skb) != 0) {
896 tq->stats.drop_too_many_frags++;
897 goto drop_pkt;
898 }
899 tq->stats.linearized++;
900
901 /* recalculate the # of descriptors to use */
902 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
903 }
904 }
905
906 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
907 if (ret >= 0) {
908 BUG_ON(ret <= 0 && ctx.copy_size != 0);
909 /* hdrs parsed, check against other limits */
910 if (ctx.mss) {
911 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
912 VMXNET3_MAX_TX_BUF_SIZE)) {
913 goto hdr_too_big;
914 }
915 } else {
916 if (skb->ip_summed == CHECKSUM_PARTIAL) {
917 if (unlikely(ctx.eth_ip_hdr_size +
918 skb->csum_offset >
919 VMXNET3_MAX_CSUM_OFFSET)) {
920 goto hdr_too_big;
921 }
922 }
923 }
924 } else {
925 tq->stats.drop_hdr_inspect_err++;
926 goto drop_pkt;
927 }
928
929 spin_lock_irqsave(&tq->tx_lock, flags);
930
931 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
932 tq->stats.tx_ring_full++;
933 dev_dbg(&adapter->netdev->dev,
934 "tx queue stopped on %s, next2comp %u"
935 " next2fill %u\n", adapter->netdev->name,
936 tq->tx_ring.next2comp, tq->tx_ring.next2fill);
937
938 vmxnet3_tq_stop(tq, adapter);
939 spin_unlock_irqrestore(&tq->tx_lock, flags);
940 return NETDEV_TX_BUSY;
941 }
942
943 /* fill tx descs related to addr & len */
944 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
945
946 /* setup the EOP desc */
947 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
948
949 /* setup the SOP desc */
950 #ifdef __BIG_ENDIAN_BITFIELD
951 gdesc = &tempTxDesc;
952 gdesc->dword[2] = ctx.sop_txd->dword[2];
953 gdesc->dword[3] = ctx.sop_txd->dword[3];
954 #else
955 gdesc = ctx.sop_txd;
956 #endif
957 if (ctx.mss) {
958 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
959 gdesc->txd.om = VMXNET3_OM_TSO;
960 gdesc->txd.msscof = ctx.mss;
961 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
962 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
963 } else {
964 if (skb->ip_summed == CHECKSUM_PARTIAL) {
965 gdesc->txd.hlen = ctx.eth_ip_hdr_size;
966 gdesc->txd.om = VMXNET3_OM_CSUM;
967 gdesc->txd.msscof = ctx.eth_ip_hdr_size +
968 skb->csum_offset;
969 } else {
970 gdesc->txd.om = 0;
971 gdesc->txd.msscof = 0;
972 }
973 le32_add_cpu(&tq->shared->txNumDeferred, 1);
974 }
975
976 if (vlan_tx_tag_present(skb)) {
977 gdesc->txd.ti = 1;
978 gdesc->txd.tci = vlan_tx_tag_get(skb);
979 }
980
981 /* finally flips the GEN bit of the SOP desc. */
982 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
983 VMXNET3_TXD_GEN);
984 #ifdef __BIG_ENDIAN_BITFIELD
985 /* Finished updating in bitfields of Tx Desc, so write them in original
986 * place.
987 */
988 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
989 (struct Vmxnet3_TxDesc *)ctx.sop_txd);
990 gdesc = ctx.sop_txd;
991 #endif
992 dev_dbg(&adapter->netdev->dev,
993 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
994 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd -
995 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
996 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
997
998 spin_unlock_irqrestore(&tq->tx_lock, flags);
999
1000 if (le32_to_cpu(tq->shared->txNumDeferred) >=
1001 le32_to_cpu(tq->shared->txThreshold)) {
1002 tq->shared->txNumDeferred = 0;
1003 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD,
1004 tq->tx_ring.next2fill);
1005 }
1006
1007 return NETDEV_TX_OK;
1008
1009 hdr_too_big:
1010 tq->stats.drop_oversized_hdr++;
1011 drop_pkt:
1012 tq->stats.drop_total++;
1013 dev_kfree_skb(skb);
1014 return NETDEV_TX_OK;
1015 }
1016
1017
1018 static netdev_tx_t
1019 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1020 {
1021 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1022
1023 return vmxnet3_tq_xmit(skb, &adapter->tx_queue, adapter, netdev);
1024 }
1025
1026
1027 static void
1028 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1029 struct sk_buff *skb,
1030 union Vmxnet3_GenericDesc *gdesc)
1031 {
1032 if (!gdesc->rcd.cnc && adapter->rxcsum) {
1033 /* typical case: TCP/UDP over IP and both csums are correct */
1034 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1035 VMXNET3_RCD_CSUM_OK) {
1036 skb->ip_summed = CHECKSUM_UNNECESSARY;
1037 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1038 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6));
1039 BUG_ON(gdesc->rcd.frg);
1040 } else {
1041 if (gdesc->rcd.csum) {
1042 skb->csum = htons(gdesc->rcd.csum);
1043 skb->ip_summed = CHECKSUM_PARTIAL;
1044 } else {
1045 skb_checksum_none_assert(skb);
1046 }
1047 }
1048 } else {
1049 skb_checksum_none_assert(skb);
1050 }
1051 }
1052
1053
1054 static void
1055 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1056 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter)
1057 {
1058 rq->stats.drop_err++;
1059 if (!rcd->fcs)
1060 rq->stats.drop_fcs++;
1061
1062 rq->stats.drop_total++;
1063
1064 /*
1065 * We do not unmap and chain the rx buffer to the skb.
1066 * We basically pretend this buffer is not used and will be recycled
1067 * by vmxnet3_rq_alloc_rx_buf()
1068 */
1069
1070 /*
1071 * ctx->skb may be NULL if this is the first and the only one
1072 * desc for the pkt
1073 */
1074 if (ctx->skb)
1075 dev_kfree_skb_irq(ctx->skb);
1076
1077 ctx->skb = NULL;
1078 }
1079
1080
1081 static int
1082 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1083 struct vmxnet3_adapter *adapter, int quota)
1084 {
1085 static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
1086 u32 num_rxd = 0;
1087 struct Vmxnet3_RxCompDesc *rcd;
1088 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1089 #ifdef __BIG_ENDIAN_BITFIELD
1090 struct Vmxnet3_RxDesc rxCmdDesc;
1091 struct Vmxnet3_RxCompDesc rxComp;
1092 #endif
1093 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1094 &rxComp);
1095 while (rcd->gen == rq->comp_ring.gen) {
1096 struct vmxnet3_rx_buf_info *rbi;
1097 struct sk_buff *skb;
1098 int num_to_alloc;
1099 struct Vmxnet3_RxDesc *rxd;
1100 u32 idx, ring_idx;
1101
1102 if (num_rxd >= quota) {
1103 /* we may stop even before we see the EOP desc of
1104 * the current pkt
1105 */
1106 break;
1107 }
1108 num_rxd++;
1109
1110 idx = rcd->rxdIdx;
1111 ring_idx = rcd->rqID == rq->qid ? 0 : 1;
1112 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1113 &rxCmdDesc);
1114 rbi = rq->buf_info[ring_idx] + idx;
1115
1116 BUG_ON(rxd->addr != rbi->dma_addr ||
1117 rxd->len != rbi->len);
1118
1119 if (unlikely(rcd->eop && rcd->err)) {
1120 vmxnet3_rx_error(rq, rcd, ctx, adapter);
1121 goto rcd_done;
1122 }
1123
1124 if (rcd->sop) { /* first buf of the pkt */
1125 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1126 rcd->rqID != rq->qid);
1127
1128 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1129 BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1130
1131 if (unlikely(rcd->len == 0)) {
1132 /* Pretend the rx buffer is skipped. */
1133 BUG_ON(!(rcd->sop && rcd->eop));
1134 dev_dbg(&adapter->netdev->dev,
1135 "rxRing[%u][%u] 0 length\n",
1136 ring_idx, idx);
1137 goto rcd_done;
1138 }
1139
1140 ctx->skb = rbi->skb;
1141 rbi->skb = NULL;
1142
1143 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1144 PCI_DMA_FROMDEVICE);
1145
1146 skb_put(ctx->skb, rcd->len);
1147 } else {
1148 BUG_ON(ctx->skb == NULL);
1149 /* non SOP buffer must be type 1 in most cases */
1150 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) {
1151 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1152
1153 if (rcd->len) {
1154 pci_unmap_page(adapter->pdev,
1155 rbi->dma_addr, rbi->len,
1156 PCI_DMA_FROMDEVICE);
1157
1158 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1159 rbi->page = NULL;
1160 }
1161 } else {
1162 /*
1163 * The only time a non-SOP buffer is type 0 is
1164 * when it's EOP and error flag is raised, which
1165 * has already been handled.
1166 */
1167 BUG_ON(true);
1168 }
1169 }
1170
1171 skb = ctx->skb;
1172 if (rcd->eop) {
1173 skb->len += skb->data_len;
1174 skb->truesize += skb->data_len;
1175
1176 vmxnet3_rx_csum(adapter, skb,
1177 (union Vmxnet3_GenericDesc *)rcd);
1178 skb->protocol = eth_type_trans(skb, adapter->netdev);
1179
1180 if (unlikely(adapter->vlan_grp && rcd->ts)) {
1181 vlan_hwaccel_receive_skb(skb,
1182 adapter->vlan_grp, rcd->tci);
1183 } else {
1184 netif_receive_skb(skb);
1185 }
1186
1187 ctx->skb = NULL;
1188 }
1189
1190 rcd_done:
1191 /* device may skip some rx descs */
1192 rq->rx_ring[ring_idx].next2comp = idx;
1193 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp,
1194 rq->rx_ring[ring_idx].size);
1195
1196 /* refill rx buffers frequently to avoid starving the h/w */
1197 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring +
1198 ring_idx);
1199 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq,
1200 ring_idx, adapter))) {
1201 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc,
1202 adapter);
1203
1204 /* if needed, update the register */
1205 if (unlikely(rq->shared->updateRxProd)) {
1206 VMXNET3_WRITE_BAR0_REG(adapter,
1207 rxprod_reg[ring_idx] + rq->qid * 8,
1208 rq->rx_ring[ring_idx].next2fill);
1209 rq->uncommitted[ring_idx] = 0;
1210 }
1211 }
1212
1213 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1214 vmxnet3_getRxComp(rcd,
1215 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1216 }
1217
1218 return num_rxd;
1219 }
1220
1221
1222 static void
1223 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1224 struct vmxnet3_adapter *adapter)
1225 {
1226 u32 i, ring_idx;
1227 struct Vmxnet3_RxDesc *rxd;
1228
1229 for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1230 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1231 #ifdef __BIG_ENDIAN_BITFIELD
1232 struct Vmxnet3_RxDesc rxDesc;
1233 #endif
1234 vmxnet3_getRxDesc(rxd,
1235 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1236
1237 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1238 rq->buf_info[ring_idx][i].skb) {
1239 pci_unmap_single(adapter->pdev, rxd->addr,
1240 rxd->len, PCI_DMA_FROMDEVICE);
1241 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1242 rq->buf_info[ring_idx][i].skb = NULL;
1243 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1244 rq->buf_info[ring_idx][i].page) {
1245 pci_unmap_page(adapter->pdev, rxd->addr,
1246 rxd->len, PCI_DMA_FROMDEVICE);
1247 put_page(rq->buf_info[ring_idx][i].page);
1248 rq->buf_info[ring_idx][i].page = NULL;
1249 }
1250 }
1251
1252 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1253 rq->rx_ring[ring_idx].next2fill =
1254 rq->rx_ring[ring_idx].next2comp = 0;
1255 rq->uncommitted[ring_idx] = 0;
1256 }
1257
1258 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1259 rq->comp_ring.next2proc = 0;
1260 }
1261
1262
1263 void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1264 struct vmxnet3_adapter *adapter)
1265 {
1266 int i;
1267 int j;
1268
1269 /* all rx buffers must have already been freed */
1270 for (i = 0; i < 2; i++) {
1271 if (rq->buf_info[i]) {
1272 for (j = 0; j < rq->rx_ring[i].size; j++)
1273 BUG_ON(rq->buf_info[i][j].page != NULL);
1274 }
1275 }
1276
1277
1278 kfree(rq->buf_info[0]);
1279
1280 for (i = 0; i < 2; i++) {
1281 if (rq->rx_ring[i].base) {
1282 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1283 * sizeof(struct Vmxnet3_RxDesc),
1284 rq->rx_ring[i].base,
1285 rq->rx_ring[i].basePA);
1286 rq->rx_ring[i].base = NULL;
1287 }
1288 rq->buf_info[i] = NULL;
1289 }
1290
1291 if (rq->comp_ring.base) {
1292 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1293 sizeof(struct Vmxnet3_RxCompDesc),
1294 rq->comp_ring.base, rq->comp_ring.basePA);
1295 rq->comp_ring.base = NULL;
1296 }
1297 }
1298
1299
1300 static int
1301 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1302 struct vmxnet3_adapter *adapter)
1303 {
1304 int i;
1305
1306 /* initialize buf_info */
1307 for (i = 0; i < rq->rx_ring[0].size; i++) {
1308
1309 /* 1st buf for a pkt is skbuff */
1310 if (i % adapter->rx_buf_per_pkt == 0) {
1311 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1312 rq->buf_info[0][i].len = adapter->skb_buf_size;
1313 } else { /* subsequent bufs for a pkt is frag */
1314 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1315 rq->buf_info[0][i].len = PAGE_SIZE;
1316 }
1317 }
1318 for (i = 0; i < rq->rx_ring[1].size; i++) {
1319 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1320 rq->buf_info[1][i].len = PAGE_SIZE;
1321 }
1322
1323 /* reset internal state and allocate buffers for both rings */
1324 for (i = 0; i < 2; i++) {
1325 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1326 rq->uncommitted[i] = 0;
1327
1328 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1329 sizeof(struct Vmxnet3_RxDesc));
1330 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1331 }
1332 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1333 adapter) == 0) {
1334 /* at least has 1 rx buffer for the 1st ring */
1335 return -ENOMEM;
1336 }
1337 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1338
1339 /* reset the comp ring */
1340 rq->comp_ring.next2proc = 0;
1341 memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1342 sizeof(struct Vmxnet3_RxCompDesc));
1343 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1344
1345 /* reset rxctx */
1346 rq->rx_ctx.skb = NULL;
1347
1348 /* stats are not reset */
1349 return 0;
1350 }
1351
1352
1353 static int
1354 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1355 {
1356 int i;
1357 size_t sz;
1358 struct vmxnet3_rx_buf_info *bi;
1359
1360 for (i = 0; i < 2; i++) {
1361
1362 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1363 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1364 &rq->rx_ring[i].basePA);
1365 if (!rq->rx_ring[i].base) {
1366 printk(KERN_ERR "%s: failed to allocate rx ring %d\n",
1367 adapter->netdev->name, i);
1368 goto err;
1369 }
1370 }
1371
1372 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1373 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1374 &rq->comp_ring.basePA);
1375 if (!rq->comp_ring.base) {
1376 printk(KERN_ERR "%s: failed to allocate rx comp ring\n",
1377 adapter->netdev->name);
1378 goto err;
1379 }
1380
1381 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1382 rq->rx_ring[1].size);
1383 bi = kzalloc(sz, GFP_KERNEL);
1384 if (!bi) {
1385 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n",
1386 adapter->netdev->name);
1387 goto err;
1388 }
1389 rq->buf_info[0] = bi;
1390 rq->buf_info[1] = bi + rq->rx_ring[0].size;
1391
1392 return 0;
1393
1394 err:
1395 vmxnet3_rq_destroy(rq, adapter);
1396 return -ENOMEM;
1397 }
1398
1399
1400 static int
1401 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1402 {
1403 if (unlikely(adapter->shared->ecr))
1404 vmxnet3_process_events(adapter);
1405
1406 vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter);
1407 return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget);
1408 }
1409
1410
1411 static int
1412 vmxnet3_poll(struct napi_struct *napi, int budget)
1413 {
1414 struct vmxnet3_adapter *adapter = container_of(napi,
1415 struct vmxnet3_adapter, napi);
1416 int rxd_done;
1417
1418 rxd_done = vmxnet3_do_poll(adapter, budget);
1419
1420 if (rxd_done < budget) {
1421 napi_complete(napi);
1422 vmxnet3_enable_intr(adapter, 0);
1423 }
1424 return rxd_done;
1425 }
1426
1427
1428 /* Interrupt handler for vmxnet3 */
1429 static irqreturn_t
1430 vmxnet3_intr(int irq, void *dev_id)
1431 {
1432 struct net_device *dev = dev_id;
1433 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1434
1435 if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) {
1436 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1437 if (unlikely(icr == 0))
1438 /* not ours */
1439 return IRQ_NONE;
1440 }
1441
1442
1443 /* disable intr if needed */
1444 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1445 vmxnet3_disable_intr(adapter, 0);
1446
1447 napi_schedule(&adapter->napi);
1448
1449 return IRQ_HANDLED;
1450 }
1451
1452 #ifdef CONFIG_NET_POLL_CONTROLLER
1453
1454
1455 /* netpoll callback. */
1456 static void
1457 vmxnet3_netpoll(struct net_device *netdev)
1458 {
1459 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1460 int irq;
1461
1462 #ifdef CONFIG_PCI_MSI
1463 if (adapter->intr.type == VMXNET3_IT_MSIX)
1464 irq = adapter->intr.msix_entries[0].vector;
1465 else
1466 #endif
1467 irq = adapter->pdev->irq;
1468
1469 disable_irq(irq);
1470 vmxnet3_intr(irq, netdev);
1471 enable_irq(irq);
1472 }
1473 #endif
1474
1475 static int
1476 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1477 {
1478 int err;
1479
1480 #ifdef CONFIG_PCI_MSI
1481 if (adapter->intr.type == VMXNET3_IT_MSIX) {
1482 /* we only use 1 MSI-X vector */
1483 err = request_irq(adapter->intr.msix_entries[0].vector,
1484 vmxnet3_intr, 0, adapter->netdev->name,
1485 adapter->netdev);
1486 } else if (adapter->intr.type == VMXNET3_IT_MSI) {
1487 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1488 adapter->netdev->name, adapter->netdev);
1489 } else
1490 #endif
1491 {
1492 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1493 IRQF_SHARED, adapter->netdev->name,
1494 adapter->netdev);
1495 }
1496
1497 if (err)
1498 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error"
1499 ":%d\n", adapter->netdev->name, adapter->intr.type, err);
1500
1501
1502 if (!err) {
1503 int i;
1504 /* init our intr settings */
1505 for (i = 0; i < adapter->intr.num_intrs; i++)
1506 adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE;
1507
1508 /* next setup intr index for all intr sources */
1509 adapter->tx_queue.comp_ring.intr_idx = 0;
1510 adapter->rx_queue.comp_ring.intr_idx = 0;
1511 adapter->intr.event_intr_idx = 0;
1512
1513 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors "
1514 "allocated\n", adapter->netdev->name, adapter->intr.type,
1515 adapter->intr.mask_mode, adapter->intr.num_intrs);
1516 }
1517
1518 return err;
1519 }
1520
1521
1522 static void
1523 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1524 {
1525 BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO ||
1526 adapter->intr.num_intrs <= 0);
1527
1528 switch (adapter->intr.type) {
1529 #ifdef CONFIG_PCI_MSI
1530 case VMXNET3_IT_MSIX:
1531 {
1532 int i;
1533
1534 for (i = 0; i < adapter->intr.num_intrs; i++)
1535 free_irq(adapter->intr.msix_entries[i].vector,
1536 adapter->netdev);
1537 break;
1538 }
1539 #endif
1540 case VMXNET3_IT_MSI:
1541 free_irq(adapter->pdev->irq, adapter->netdev);
1542 break;
1543 case VMXNET3_IT_INTX:
1544 free_irq(adapter->pdev->irq, adapter->netdev);
1545 break;
1546 default:
1547 BUG_ON(true);
1548 }
1549 }
1550
1551
1552 inline void set_flag_le16(__le16 *data, u16 flag)
1553 {
1554 *data = cpu_to_le16(le16_to_cpu(*data) | flag);
1555 }
1556
1557 inline void set_flag_le64(__le64 *data, u64 flag)
1558 {
1559 *data = cpu_to_le64(le64_to_cpu(*data) | flag);
1560 }
1561
1562 inline void reset_flag_le64(__le64 *data, u64 flag)
1563 {
1564 *data = cpu_to_le64(le64_to_cpu(*data) & ~flag);
1565 }
1566
1567
1568 static void
1569 vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1570 {
1571 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1572 struct Vmxnet3_DriverShared *shared = adapter->shared;
1573 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1574
1575 if (grp) {
1576 /* add vlan rx stripping. */
1577 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1578 int i;
1579 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1580 adapter->vlan_grp = grp;
1581
1582 /* update FEATURES to device */
1583 set_flag_le64(&devRead->misc.uptFeatures,
1584 UPT1_F_RXVLAN);
1585 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1586 VMXNET3_CMD_UPDATE_FEATURE);
1587 /*
1588 * Clear entire vfTable; then enable untagged pkts.
1589 * Note: setting one entry in vfTable to non-zero turns
1590 * on VLAN rx filtering.
1591 */
1592 for (i = 0; i < VMXNET3_VFT_SIZE; i++)
1593 vfTable[i] = 0;
1594
1595 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1596 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1597 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1598 } else {
1599 printk(KERN_ERR "%s: vlan_rx_register when device has "
1600 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
1601 }
1602 } else {
1603 /* remove vlan rx stripping. */
1604 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1605 adapter->vlan_grp = NULL;
1606
1607 if (le64_to_cpu(devRead->misc.uptFeatures) & UPT1_F_RXVLAN) {
1608 int i;
1609
1610 for (i = 0; i < VMXNET3_VFT_SIZE; i++) {
1611 /* clear entire vfTable; this also disables
1612 * VLAN rx filtering
1613 */
1614 vfTable[i] = 0;
1615 }
1616 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1617 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1618
1619 /* update FEATURES to device */
1620 reset_flag_le64(&devRead->misc.uptFeatures,
1621 UPT1_F_RXVLAN);
1622 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1623 VMXNET3_CMD_UPDATE_FEATURE);
1624 }
1625 }
1626 }
1627
1628
1629 static void
1630 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1631 {
1632 if (adapter->vlan_grp) {
1633 u16 vid;
1634 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1635 bool activeVlan = false;
1636
1637 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1638 if (vlan_group_get_device(adapter->vlan_grp, vid)) {
1639 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1640 activeVlan = true;
1641 }
1642 }
1643 if (activeVlan) {
1644 /* continue to allow untagged pkts */
1645 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1646 }
1647 }
1648 }
1649
1650
1651 static void
1652 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1653 {
1654 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1655 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1656
1657 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1658 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1659 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1660 }
1661
1662
1663 static void
1664 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1665 {
1666 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1667 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1668
1669 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1670 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1671 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1672 }
1673
1674
1675 static u8 *
1676 vmxnet3_copy_mc(struct net_device *netdev)
1677 {
1678 u8 *buf = NULL;
1679 u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
1680
1681 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1682 if (sz <= 0xffff) {
1683 /* We may be called with BH disabled */
1684 buf = kmalloc(sz, GFP_ATOMIC);
1685 if (buf) {
1686 struct netdev_hw_addr *ha;
1687 int i = 0;
1688
1689 netdev_for_each_mc_addr(ha, netdev)
1690 memcpy(buf + i++ * ETH_ALEN, ha->addr,
1691 ETH_ALEN);
1692 }
1693 }
1694 return buf;
1695 }
1696
1697
1698 static void
1699 vmxnet3_set_mc(struct net_device *netdev)
1700 {
1701 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1702 struct Vmxnet3_RxFilterConf *rxConf =
1703 &adapter->shared->devRead.rxFilterConf;
1704 u8 *new_table = NULL;
1705 u32 new_mode = VMXNET3_RXM_UCAST;
1706
1707 if (netdev->flags & IFF_PROMISC)
1708 new_mode |= VMXNET3_RXM_PROMISC;
1709
1710 if (netdev->flags & IFF_BROADCAST)
1711 new_mode |= VMXNET3_RXM_BCAST;
1712
1713 if (netdev->flags & IFF_ALLMULTI)
1714 new_mode |= VMXNET3_RXM_ALL_MULTI;
1715 else
1716 if (!netdev_mc_empty(netdev)) {
1717 new_table = vmxnet3_copy_mc(netdev);
1718 if (new_table) {
1719 new_mode |= VMXNET3_RXM_MCAST;
1720 rxConf->mfTableLen = cpu_to_le16(
1721 netdev_mc_count(netdev) * ETH_ALEN);
1722 rxConf->mfTablePA = cpu_to_le64(virt_to_phys(
1723 new_table));
1724 } else {
1725 printk(KERN_INFO "%s: failed to copy mcast list"
1726 ", setting ALL_MULTI\n", netdev->name);
1727 new_mode |= VMXNET3_RXM_ALL_MULTI;
1728 }
1729 }
1730
1731
1732 if (!(new_mode & VMXNET3_RXM_MCAST)) {
1733 rxConf->mfTableLen = 0;
1734 rxConf->mfTablePA = 0;
1735 }
1736
1737 if (new_mode != rxConf->rxMode) {
1738 rxConf->rxMode = cpu_to_le32(new_mode);
1739 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1740 VMXNET3_CMD_UPDATE_RX_MODE);
1741 }
1742
1743 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1744 VMXNET3_CMD_UPDATE_MAC_FILTERS);
1745
1746 kfree(new_table);
1747 }
1748
1749
1750 /*
1751 * Set up driver_shared based on settings in adapter.
1752 */
1753
1754 static void
1755 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
1756 {
1757 struct Vmxnet3_DriverShared *shared = adapter->shared;
1758 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1759 struct Vmxnet3_TxQueueConf *tqc;
1760 struct Vmxnet3_RxQueueConf *rqc;
1761 int i;
1762
1763 memset(shared, 0, sizeof(*shared));
1764
1765 /* driver settings */
1766 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
1767 devRead->misc.driverInfo.version = cpu_to_le32(
1768 VMXNET3_DRIVER_VERSION_NUM);
1769 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
1770 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
1771 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
1772 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
1773 *((u32 *)&devRead->misc.driverInfo.gos));
1774 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
1775 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
1776
1777 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter));
1778 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
1779
1780 /* set up feature flags */
1781 if (adapter->rxcsum)
1782 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXCSUM);
1783
1784 if (adapter->lro) {
1785 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_LRO);
1786 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
1787 }
1788 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) &&
1789 adapter->vlan_grp) {
1790 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXVLAN);
1791 }
1792
1793 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
1794 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
1795 devRead->misc.queueDescLen = cpu_to_le32(
1796 sizeof(struct Vmxnet3_TxQueueDesc) +
1797 sizeof(struct Vmxnet3_RxQueueDesc));
1798
1799 /* tx queue settings */
1800 BUG_ON(adapter->tx_queue.tx_ring.base == NULL);
1801
1802 devRead->misc.numTxQueues = 1;
1803 tqc = &adapter->tqd_start->conf;
1804 tqc->txRingBasePA = cpu_to_le64(adapter->tx_queue.tx_ring.basePA);
1805 tqc->dataRingBasePA = cpu_to_le64(adapter->tx_queue.data_ring.basePA);
1806 tqc->compRingBasePA = cpu_to_le64(adapter->tx_queue.comp_ring.basePA);
1807 tqc->ddPA = cpu_to_le64(virt_to_phys(
1808 adapter->tx_queue.buf_info));
1809 tqc->txRingSize = cpu_to_le32(adapter->tx_queue.tx_ring.size);
1810 tqc->dataRingSize = cpu_to_le32(adapter->tx_queue.data_ring.size);
1811 tqc->compRingSize = cpu_to_le32(adapter->tx_queue.comp_ring.size);
1812 tqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_tx_buf_info) *
1813 tqc->txRingSize);
1814 tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx;
1815
1816 /* rx queue settings */
1817 devRead->misc.numRxQueues = 1;
1818 rqc = &adapter->rqd_start->conf;
1819 rqc->rxRingBasePA[0] = cpu_to_le64(adapter->rx_queue.rx_ring[0].basePA);
1820 rqc->rxRingBasePA[1] = cpu_to_le64(adapter->rx_queue.rx_ring[1].basePA);
1821 rqc->compRingBasePA = cpu_to_le64(adapter->rx_queue.comp_ring.basePA);
1822 rqc->ddPA = cpu_to_le64(virt_to_phys(
1823 adapter->rx_queue.buf_info));
1824 rqc->rxRingSize[0] = cpu_to_le32(adapter->rx_queue.rx_ring[0].size);
1825 rqc->rxRingSize[1] = cpu_to_le32(adapter->rx_queue.rx_ring[1].size);
1826 rqc->compRingSize = cpu_to_le32(adapter->rx_queue.comp_ring.size);
1827 rqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_rx_buf_info) *
1828 (rqc->rxRingSize[0] + rqc->rxRingSize[1]));
1829 rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx;
1830
1831 /* intr settings */
1832 devRead->intrConf.autoMask = adapter->intr.mask_mode ==
1833 VMXNET3_IMM_AUTO;
1834 devRead->intrConf.numIntrs = adapter->intr.num_intrs;
1835 for (i = 0; i < adapter->intr.num_intrs; i++)
1836 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
1837
1838 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
1839 devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
1840
1841 /* rx filter settings */
1842 devRead->rxFilterConf.rxMode = 0;
1843 vmxnet3_restore_vlan(adapter);
1844 /* the rest are already zeroed */
1845 }
1846
1847
1848 int
1849 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
1850 {
1851 int err;
1852 u32 ret;
1853
1854 dev_dbg(&adapter->netdev->dev,
1855 "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes"
1856 " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size,
1857 adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size,
1858 adapter->rx_queue.rx_ring[0].size,
1859 adapter->rx_queue.rx_ring[1].size);
1860
1861 vmxnet3_tq_init(&adapter->tx_queue, adapter);
1862 err = vmxnet3_rq_init(&adapter->rx_queue, adapter);
1863 if (err) {
1864 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n",
1865 adapter->netdev->name, err);
1866 goto rq_err;
1867 }
1868
1869 err = vmxnet3_request_irqs(adapter);
1870 if (err) {
1871 printk(KERN_ERR "Failed to setup irq for %s: error %d\n",
1872 adapter->netdev->name, err);
1873 goto irq_err;
1874 }
1875
1876 vmxnet3_setup_driver_shared(adapter);
1877
1878 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
1879 adapter->shared_pa));
1880 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
1881 adapter->shared_pa));
1882 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1883 VMXNET3_CMD_ACTIVATE_DEV);
1884 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
1885
1886 if (ret != 0) {
1887 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
1888 adapter->netdev->name, ret);
1889 err = -EINVAL;
1890 goto activate_err;
1891 }
1892 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD,
1893 adapter->rx_queue.rx_ring[0].next2fill);
1894 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2,
1895 adapter->rx_queue.rx_ring[1].next2fill);
1896
1897 /* Apply the rx filter settins last. */
1898 vmxnet3_set_mc(adapter->netdev);
1899
1900 /*
1901 * Check link state when first activating device. It will start the
1902 * tx queue if the link is up.
1903 */
1904 vmxnet3_check_link(adapter, true);
1905
1906 napi_enable(&adapter->napi);
1907 vmxnet3_enable_all_intrs(adapter);
1908 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
1909 return 0;
1910
1911 activate_err:
1912 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
1913 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
1914 vmxnet3_free_irqs(adapter);
1915 irq_err:
1916 rq_err:
1917 /* free up buffers we allocated */
1918 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1919 return err;
1920 }
1921
1922
1923 void
1924 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
1925 {
1926 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
1927 }
1928
1929
1930 int
1931 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
1932 {
1933 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
1934 return 0;
1935
1936
1937 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1938 VMXNET3_CMD_QUIESCE_DEV);
1939 vmxnet3_disable_all_intrs(adapter);
1940
1941 napi_disable(&adapter->napi);
1942 netif_tx_disable(adapter->netdev);
1943 adapter->link_speed = 0;
1944 netif_carrier_off(adapter->netdev);
1945
1946 vmxnet3_tq_cleanup(&adapter->tx_queue, adapter);
1947 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1948 vmxnet3_free_irqs(adapter);
1949 return 0;
1950 }
1951
1952
1953 static void
1954 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
1955 {
1956 u32 tmp;
1957
1958 tmp = *(u32 *)mac;
1959 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
1960
1961 tmp = (mac[5] << 8) | mac[4];
1962 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
1963 }
1964
1965
1966 static int
1967 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
1968 {
1969 struct sockaddr *addr = p;
1970 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1971
1972 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1973 vmxnet3_write_mac_addr(adapter, addr->sa_data);
1974
1975 return 0;
1976 }
1977
1978
1979 /* ==================== initialization and cleanup routines ============ */
1980
1981 static int
1982 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
1983 {
1984 int err;
1985 unsigned long mmio_start, mmio_len;
1986 struct pci_dev *pdev = adapter->pdev;
1987
1988 err = pci_enable_device(pdev);
1989 if (err) {
1990 printk(KERN_ERR "Failed to enable adapter %s: error %d\n",
1991 pci_name(pdev), err);
1992 return err;
1993 }
1994
1995 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
1996 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
1997 printk(KERN_ERR "pci_set_consistent_dma_mask failed "
1998 "for adapter %s\n", pci_name(pdev));
1999 err = -EIO;
2000 goto err_set_mask;
2001 }
2002 *dma64 = true;
2003 } else {
2004 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2005 printk(KERN_ERR "pci_set_dma_mask failed for adapter "
2006 "%s\n", pci_name(pdev));
2007 err = -EIO;
2008 goto err_set_mask;
2009 }
2010 *dma64 = false;
2011 }
2012
2013 err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2014 vmxnet3_driver_name);
2015 if (err) {
2016 printk(KERN_ERR "Failed to request region for adapter %s: "
2017 "error %d\n", pci_name(pdev), err);
2018 goto err_set_mask;
2019 }
2020
2021 pci_set_master(pdev);
2022
2023 mmio_start = pci_resource_start(pdev, 0);
2024 mmio_len = pci_resource_len(pdev, 0);
2025 adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2026 if (!adapter->hw_addr0) {
2027 printk(KERN_ERR "Failed to map bar0 for adapter %s\n",
2028 pci_name(pdev));
2029 err = -EIO;
2030 goto err_ioremap;
2031 }
2032
2033 mmio_start = pci_resource_start(pdev, 1);
2034 mmio_len = pci_resource_len(pdev, 1);
2035 adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2036 if (!adapter->hw_addr1) {
2037 printk(KERN_ERR "Failed to map bar1 for adapter %s\n",
2038 pci_name(pdev));
2039 err = -EIO;
2040 goto err_bar1;
2041 }
2042 return 0;
2043
2044 err_bar1:
2045 iounmap(adapter->hw_addr0);
2046 err_ioremap:
2047 pci_release_selected_regions(pdev, (1 << 2) - 1);
2048 err_set_mask:
2049 pci_disable_device(pdev);
2050 return err;
2051 }
2052
2053
2054 static void
2055 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2056 {
2057 BUG_ON(!adapter->pdev);
2058
2059 iounmap(adapter->hw_addr0);
2060 iounmap(adapter->hw_addr1);
2061 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2062 pci_disable_device(adapter->pdev);
2063 }
2064
2065
2066 static void
2067 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2068 {
2069 size_t sz;
2070
2071 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2072 VMXNET3_MAX_ETH_HDR_SIZE) {
2073 adapter->skb_buf_size = adapter->netdev->mtu +
2074 VMXNET3_MAX_ETH_HDR_SIZE;
2075 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2076 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2077
2078 adapter->rx_buf_per_pkt = 1;
2079 } else {
2080 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2081 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2082 VMXNET3_MAX_ETH_HDR_SIZE;
2083 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2084 }
2085
2086 /*
2087 * for simplicity, force the ring0 size to be a multiple of
2088 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2089 */
2090 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2091 adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size +
2092 sz - 1) / sz * sz;
2093 adapter->rx_queue.rx_ring[0].size = min_t(u32,
2094 adapter->rx_queue.rx_ring[0].size,
2095 VMXNET3_RX_RING_MAX_SIZE / sz * sz);
2096 }
2097
2098
2099 int
2100 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2101 u32 rx_ring_size, u32 rx_ring2_size)
2102 {
2103 int err;
2104
2105 adapter->tx_queue.tx_ring.size = tx_ring_size;
2106 adapter->tx_queue.data_ring.size = tx_ring_size;
2107 adapter->tx_queue.comp_ring.size = tx_ring_size;
2108 adapter->tx_queue.shared = &adapter->tqd_start->ctrl;
2109 adapter->tx_queue.stopped = true;
2110 err = vmxnet3_tq_create(&adapter->tx_queue, adapter);
2111 if (err)
2112 return err;
2113
2114 adapter->rx_queue.rx_ring[0].size = rx_ring_size;
2115 adapter->rx_queue.rx_ring[1].size = rx_ring2_size;
2116 vmxnet3_adjust_rx_ring_size(adapter);
2117 adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size +
2118 adapter->rx_queue.rx_ring[1].size;
2119 adapter->rx_queue.qid = 0;
2120 adapter->rx_queue.qid2 = 1;
2121 adapter->rx_queue.shared = &adapter->rqd_start->ctrl;
2122 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2123 if (err)
2124 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2125
2126 return err;
2127 }
2128
2129 static int
2130 vmxnet3_open(struct net_device *netdev)
2131 {
2132 struct vmxnet3_adapter *adapter;
2133 int err;
2134
2135 adapter = netdev_priv(netdev);
2136
2137 spin_lock_init(&adapter->tx_queue.tx_lock);
2138
2139 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
2140 VMXNET3_DEF_RX_RING_SIZE,
2141 VMXNET3_DEF_RX_RING_SIZE);
2142 if (err)
2143 goto queue_err;
2144
2145 err = vmxnet3_activate_dev(adapter);
2146 if (err)
2147 goto activate_err;
2148
2149 return 0;
2150
2151 activate_err:
2152 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2153 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2154 queue_err:
2155 return err;
2156 }
2157
2158
2159 static int
2160 vmxnet3_close(struct net_device *netdev)
2161 {
2162 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2163
2164 /*
2165 * Reset_work may be in the middle of resetting the device, wait for its
2166 * completion.
2167 */
2168 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2169 msleep(1);
2170
2171 vmxnet3_quiesce_dev(adapter);
2172
2173 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2174 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2175
2176 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2177
2178
2179 return 0;
2180 }
2181
2182
2183 void
2184 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2185 {
2186 /*
2187 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2188 * vmxnet3_close() will deadlock.
2189 */
2190 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2191
2192 /* we need to enable NAPI, otherwise dev_close will deadlock */
2193 napi_enable(&adapter->napi);
2194 dev_close(adapter->netdev);
2195 }
2196
2197
2198 static int
2199 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2200 {
2201 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2202 int err = 0;
2203
2204 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2205 return -EINVAL;
2206
2207 if (new_mtu > 1500 && !adapter->jumbo_frame)
2208 return -EINVAL;
2209
2210 netdev->mtu = new_mtu;
2211
2212 /*
2213 * Reset_work may be in the middle of resetting the device, wait for its
2214 * completion.
2215 */
2216 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2217 msleep(1);
2218
2219 if (netif_running(netdev)) {
2220 vmxnet3_quiesce_dev(adapter);
2221 vmxnet3_reset_dev(adapter);
2222
2223 /* we need to re-create the rx queue based on the new mtu */
2224 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2225 vmxnet3_adjust_rx_ring_size(adapter);
2226 adapter->rx_queue.comp_ring.size =
2227 adapter->rx_queue.rx_ring[0].size +
2228 adapter->rx_queue.rx_ring[1].size;
2229 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2230 if (err) {
2231 printk(KERN_ERR "%s: failed to re-create rx queue,"
2232 " error %d. Closing it.\n", netdev->name, err);
2233 goto out;
2234 }
2235
2236 err = vmxnet3_activate_dev(adapter);
2237 if (err) {
2238 printk(KERN_ERR "%s: failed to re-activate, error %d. "
2239 "Closing it\n", netdev->name, err);
2240 goto out;
2241 }
2242 }
2243
2244 out:
2245 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2246 if (err)
2247 vmxnet3_force_close(adapter);
2248
2249 return err;
2250 }
2251
2252
2253 static void
2254 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2255 {
2256 struct net_device *netdev = adapter->netdev;
2257
2258 netdev->features = NETIF_F_SG |
2259 NETIF_F_HW_CSUM |
2260 NETIF_F_HW_VLAN_TX |
2261 NETIF_F_HW_VLAN_RX |
2262 NETIF_F_HW_VLAN_FILTER |
2263 NETIF_F_TSO |
2264 NETIF_F_TSO6 |
2265 NETIF_F_LRO;
2266
2267 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro");
2268
2269 adapter->rxcsum = true;
2270 adapter->jumbo_frame = true;
2271 adapter->lro = true;
2272
2273 if (dma64) {
2274 netdev->features |= NETIF_F_HIGHDMA;
2275 printk(" highDMA");
2276 }
2277
2278 netdev->vlan_features = netdev->features;
2279 printk("\n");
2280 }
2281
2282
2283 static void
2284 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2285 {
2286 u32 tmp;
2287
2288 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2289 *(u32 *)mac = tmp;
2290
2291 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2292 mac[4] = tmp & 0xff;
2293 mac[5] = (tmp >> 8) & 0xff;
2294 }
2295
2296
2297 static void
2298 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2299 {
2300 u32 cfg;
2301
2302 /* intr settings */
2303 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2304 VMXNET3_CMD_GET_CONF_INTR);
2305 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2306 adapter->intr.type = cfg & 0x3;
2307 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2308
2309 if (adapter->intr.type == VMXNET3_IT_AUTO) {
2310 adapter->intr.type = VMXNET3_IT_MSIX;
2311 }
2312
2313 #ifdef CONFIG_PCI_MSI
2314 if (adapter->intr.type == VMXNET3_IT_MSIX) {
2315 int err;
2316
2317 adapter->intr.msix_entries[0].entry = 0;
2318 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2319 VMXNET3_LINUX_MAX_MSIX_VECT);
2320 if (!err) {
2321 adapter->intr.num_intrs = 1;
2322 adapter->intr.type = VMXNET3_IT_MSIX;
2323 return;
2324 }
2325 adapter->intr.type = VMXNET3_IT_MSI;
2326 }
2327
2328 if (adapter->intr.type == VMXNET3_IT_MSI) {
2329 int err;
2330 err = pci_enable_msi(adapter->pdev);
2331 if (!err) {
2332 adapter->intr.num_intrs = 1;
2333 return;
2334 }
2335 }
2336 #endif /* CONFIG_PCI_MSI */
2337
2338 adapter->intr.type = VMXNET3_IT_INTX;
2339
2340 /* INT-X related setting */
2341 adapter->intr.num_intrs = 1;
2342 }
2343
2344
2345 static void
2346 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2347 {
2348 if (adapter->intr.type == VMXNET3_IT_MSIX)
2349 pci_disable_msix(adapter->pdev);
2350 else if (adapter->intr.type == VMXNET3_IT_MSI)
2351 pci_disable_msi(adapter->pdev);
2352 else
2353 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2354 }
2355
2356
2357 static void
2358 vmxnet3_tx_timeout(struct net_device *netdev)
2359 {
2360 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2361 adapter->tx_timeout_count++;
2362
2363 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name);
2364 schedule_work(&adapter->work);
2365 }
2366
2367
2368 static void
2369 vmxnet3_reset_work(struct work_struct *data)
2370 {
2371 struct vmxnet3_adapter *adapter;
2372
2373 adapter = container_of(data, struct vmxnet3_adapter, work);
2374
2375 /* if another thread is resetting the device, no need to proceed */
2376 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2377 return;
2378
2379 /* if the device is closed, we must leave it alone */
2380 rtnl_lock();
2381 if (netif_running(adapter->netdev)) {
2382 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name);
2383 vmxnet3_quiesce_dev(adapter);
2384 vmxnet3_reset_dev(adapter);
2385 vmxnet3_activate_dev(adapter);
2386 } else {
2387 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name);
2388 }
2389 rtnl_unlock();
2390
2391 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2392 }
2393
2394
2395 static int __devinit
2396 vmxnet3_probe_device(struct pci_dev *pdev,
2397 const struct pci_device_id *id)
2398 {
2399 static const struct net_device_ops vmxnet3_netdev_ops = {
2400 .ndo_open = vmxnet3_open,
2401 .ndo_stop = vmxnet3_close,
2402 .ndo_start_xmit = vmxnet3_xmit_frame,
2403 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2404 .ndo_change_mtu = vmxnet3_change_mtu,
2405 .ndo_get_stats = vmxnet3_get_stats,
2406 .ndo_tx_timeout = vmxnet3_tx_timeout,
2407 .ndo_set_multicast_list = vmxnet3_set_mc,
2408 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register,
2409 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2410 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2411 #ifdef CONFIG_NET_POLL_CONTROLLER
2412 .ndo_poll_controller = vmxnet3_netpoll,
2413 #endif
2414 };
2415 int err;
2416 bool dma64 = false; /* stupid gcc */
2417 u32 ver;
2418 struct net_device *netdev;
2419 struct vmxnet3_adapter *adapter;
2420 u8 mac[ETH_ALEN];
2421
2422 netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter));
2423 if (!netdev) {
2424 printk(KERN_ERR "Failed to alloc ethernet device for adapter "
2425 "%s\n", pci_name(pdev));
2426 return -ENOMEM;
2427 }
2428
2429 pci_set_drvdata(pdev, netdev);
2430 adapter = netdev_priv(netdev);
2431 adapter->netdev = netdev;
2432 adapter->pdev = pdev;
2433
2434 adapter->shared = pci_alloc_consistent(adapter->pdev,
2435 sizeof(struct Vmxnet3_DriverShared),
2436 &adapter->shared_pa);
2437 if (!adapter->shared) {
2438 printk(KERN_ERR "Failed to allocate memory for %s\n",
2439 pci_name(pdev));
2440 err = -ENOMEM;
2441 goto err_alloc_shared;
2442 }
2443
2444 adapter->tqd_start = pci_alloc_consistent(adapter->pdev,
2445 sizeof(struct Vmxnet3_TxQueueDesc) +
2446 sizeof(struct Vmxnet3_RxQueueDesc),
2447 &adapter->queue_desc_pa);
2448
2449 if (!adapter->tqd_start) {
2450 printk(KERN_ERR "Failed to allocate memory for %s\n",
2451 pci_name(pdev));
2452 err = -ENOMEM;
2453 goto err_alloc_queue_desc;
2454 }
2455 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start
2456 + 1);
2457
2458 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2459 if (adapter->pm_conf == NULL) {
2460 printk(KERN_ERR "Failed to allocate memory for %s\n",
2461 pci_name(pdev));
2462 err = -ENOMEM;
2463 goto err_alloc_pm;
2464 }
2465
2466 err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2467 if (err < 0)
2468 goto err_alloc_pci;
2469
2470 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2471 if (ver & 1) {
2472 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2473 } else {
2474 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter"
2475 " %s\n", ver, pci_name(pdev));
2476 err = -EBUSY;
2477 goto err_ver;
2478 }
2479
2480 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2481 if (ver & 1) {
2482 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2483 } else {
2484 printk(KERN_ERR "Incompatible upt version (0x%x) for "
2485 "adapter %s\n", ver, pci_name(pdev));
2486 err = -EBUSY;
2487 goto err_ver;
2488 }
2489
2490 vmxnet3_declare_features(adapter, dma64);
2491
2492 adapter->dev_number = atomic_read(&devices_found);
2493 vmxnet3_alloc_intr_resources(adapter);
2494
2495 vmxnet3_read_mac_addr(adapter, mac);
2496 memcpy(netdev->dev_addr, mac, netdev->addr_len);
2497
2498 netdev->netdev_ops = &vmxnet3_netdev_ops;
2499 netdev->watchdog_timeo = 5 * HZ;
2500 vmxnet3_set_ethtool_ops(netdev);
2501
2502 INIT_WORK(&adapter->work, vmxnet3_reset_work);
2503
2504 netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64);
2505 SET_NETDEV_DEV(netdev, &pdev->dev);
2506 err = register_netdev(netdev);
2507
2508 if (err) {
2509 printk(KERN_ERR "Failed to register adapter %s\n",
2510 pci_name(pdev));
2511 goto err_register;
2512 }
2513
2514 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2515 vmxnet3_check_link(adapter, false);
2516 atomic_inc(&devices_found);
2517 return 0;
2518
2519 err_register:
2520 vmxnet3_free_intr_resources(adapter);
2521 err_ver:
2522 vmxnet3_free_pci_resources(adapter);
2523 err_alloc_pci:
2524 kfree(adapter->pm_conf);
2525 err_alloc_pm:
2526 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2527 sizeof(struct Vmxnet3_RxQueueDesc),
2528 adapter->tqd_start, adapter->queue_desc_pa);
2529 err_alloc_queue_desc:
2530 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2531 adapter->shared, adapter->shared_pa);
2532 err_alloc_shared:
2533 pci_set_drvdata(pdev, NULL);
2534 free_netdev(netdev);
2535 return err;
2536 }
2537
2538
2539 static void __devexit
2540 vmxnet3_remove_device(struct pci_dev *pdev)
2541 {
2542 struct net_device *netdev = pci_get_drvdata(pdev);
2543 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2544
2545 flush_scheduled_work();
2546
2547 unregister_netdev(netdev);
2548
2549 vmxnet3_free_intr_resources(adapter);
2550 vmxnet3_free_pci_resources(adapter);
2551 kfree(adapter->pm_conf);
2552 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2553 sizeof(struct Vmxnet3_RxQueueDesc),
2554 adapter->tqd_start, adapter->queue_desc_pa);
2555 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2556 adapter->shared, adapter->shared_pa);
2557 free_netdev(netdev);
2558 }
2559
2560
2561 #ifdef CONFIG_PM
2562
2563 static int
2564 vmxnet3_suspend(struct device *device)
2565 {
2566 struct pci_dev *pdev = to_pci_dev(device);
2567 struct net_device *netdev = pci_get_drvdata(pdev);
2568 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2569 struct Vmxnet3_PMConf *pmConf;
2570 struct ethhdr *ehdr;
2571 struct arphdr *ahdr;
2572 u8 *arpreq;
2573 struct in_device *in_dev;
2574 struct in_ifaddr *ifa;
2575 int i = 0;
2576
2577 if (!netif_running(netdev))
2578 return 0;
2579
2580 vmxnet3_disable_all_intrs(adapter);
2581 vmxnet3_free_irqs(adapter);
2582 vmxnet3_free_intr_resources(adapter);
2583
2584 netif_device_detach(netdev);
2585 netif_stop_queue(netdev);
2586
2587 /* Create wake-up filters. */
2588 pmConf = adapter->pm_conf;
2589 memset(pmConf, 0, sizeof(*pmConf));
2590
2591 if (adapter->wol & WAKE_UCAST) {
2592 pmConf->filters[i].patternSize = ETH_ALEN;
2593 pmConf->filters[i].maskSize = 1;
2594 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
2595 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
2596
2597 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
2598 i++;
2599 }
2600
2601 if (adapter->wol & WAKE_ARP) {
2602 in_dev = in_dev_get(netdev);
2603 if (!in_dev)
2604 goto skip_arp;
2605
2606 ifa = (struct in_ifaddr *)in_dev->ifa_list;
2607 if (!ifa)
2608 goto skip_arp;
2609
2610 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
2611 sizeof(struct arphdr) + /* ARP header */
2612 2 * ETH_ALEN + /* 2 Ethernet addresses*/
2613 2 * sizeof(u32); /*2 IPv4 addresses */
2614 pmConf->filters[i].maskSize =
2615 (pmConf->filters[i].patternSize - 1) / 8 + 1;
2616
2617 /* ETH_P_ARP in Ethernet header. */
2618 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
2619 ehdr->h_proto = htons(ETH_P_ARP);
2620
2621 /* ARPOP_REQUEST in ARP header. */
2622 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
2623 ahdr->ar_op = htons(ARPOP_REQUEST);
2624 arpreq = (u8 *)(ahdr + 1);
2625
2626 /* The Unicast IPv4 address in 'tip' field. */
2627 arpreq += 2 * ETH_ALEN + sizeof(u32);
2628 *(u32 *)arpreq = ifa->ifa_address;
2629
2630 /* The mask for the relevant bits. */
2631 pmConf->filters[i].mask[0] = 0x00;
2632 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
2633 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
2634 pmConf->filters[i].mask[3] = 0x00;
2635 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
2636 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
2637 in_dev_put(in_dev);
2638
2639 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
2640 i++;
2641 }
2642
2643 skip_arp:
2644 if (adapter->wol & WAKE_MAGIC)
2645 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_MAGIC);
2646
2647 pmConf->numFilters = i;
2648
2649 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2650 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2651 *pmConf));
2652 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
2653 pmConf));
2654
2655 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2656 VMXNET3_CMD_UPDATE_PMCFG);
2657
2658 pci_save_state(pdev);
2659 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
2660 adapter->wol);
2661 pci_disable_device(pdev);
2662 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
2663
2664 return 0;
2665 }
2666
2667
2668 static int
2669 vmxnet3_resume(struct device *device)
2670 {
2671 int err;
2672 struct pci_dev *pdev = to_pci_dev(device);
2673 struct net_device *netdev = pci_get_drvdata(pdev);
2674 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2675 struct Vmxnet3_PMConf *pmConf;
2676
2677 if (!netif_running(netdev))
2678 return 0;
2679
2680 /* Destroy wake-up filters. */
2681 pmConf = adapter->pm_conf;
2682 memset(pmConf, 0, sizeof(*pmConf));
2683
2684 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2685 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2686 *pmConf));
2687 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le32(virt_to_phys(
2688 pmConf));
2689
2690 netif_device_attach(netdev);
2691 pci_set_power_state(pdev, PCI_D0);
2692 pci_restore_state(pdev);
2693 err = pci_enable_device_mem(pdev);
2694 if (err != 0)
2695 return err;
2696
2697 pci_enable_wake(pdev, PCI_D0, 0);
2698
2699 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2700 VMXNET3_CMD_UPDATE_PMCFG);
2701 vmxnet3_alloc_intr_resources(adapter);
2702 vmxnet3_request_irqs(adapter);
2703 vmxnet3_enable_all_intrs(adapter);
2704
2705 return 0;
2706 }
2707
2708 static const struct dev_pm_ops vmxnet3_pm_ops = {
2709 .suspend = vmxnet3_suspend,
2710 .resume = vmxnet3_resume,
2711 };
2712 #endif
2713
2714 static struct pci_driver vmxnet3_driver = {
2715 .name = vmxnet3_driver_name,
2716 .id_table = vmxnet3_pciid_table,
2717 .probe = vmxnet3_probe_device,
2718 .remove = __devexit_p(vmxnet3_remove_device),
2719 #ifdef CONFIG_PM
2720 .driver.pm = &vmxnet3_pm_ops,
2721 #endif
2722 };
2723
2724
2725 static int __init
2726 vmxnet3_init_module(void)
2727 {
2728 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC,
2729 VMXNET3_DRIVER_VERSION_REPORT);
2730 return pci_register_driver(&vmxnet3_driver);
2731 }
2732
2733 module_init(vmxnet3_init_module);
2734
2735
2736 static void
2737 vmxnet3_exit_module(void)
2738 {
2739 pci_unregister_driver(&vmxnet3_driver);
2740 }
2741
2742 module_exit(vmxnet3_exit_module);
2743
2744 MODULE_AUTHOR("VMware, Inc.");
2745 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
2746 MODULE_LICENSE("GPL v2");
2747 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);
kernel source for telekom puls (alcatel/mediatek)