1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
34 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
35 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
36 #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
37 #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
38 #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
44 #define PCI_SDHCI_IFPIO 0x00
45 #define PCI_SDHCI_IFDMA 0x01
46 #define PCI_SDHCI_IFVENDOR 0x02
48 #define PCI_SLOT_INFO 0x40 /* 8 bits */
49 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
50 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
54 struct sdhci_pci_chip
;
55 struct sdhci_pci_slot
;
57 struct sdhci_pci_fixes
{
60 bool allow_runtime_pm
;
62 int (*probe
) (struct sdhci_pci_chip
*);
64 int (*probe_slot
) (struct sdhci_pci_slot
*);
65 void (*remove_slot
) (struct sdhci_pci_slot
*, int);
67 int (*suspend
) (struct sdhci_pci_chip
*);
68 int (*resume
) (struct sdhci_pci_chip
*);
71 struct sdhci_pci_slot
{
72 struct sdhci_pci_chip
*chip
;
73 struct sdhci_host
*host
;
74 struct sdhci_pci_data
*data
;
82 struct sdhci_pci_chip
{
87 bool allow_runtime_pm
;
88 const struct sdhci_pci_fixes
*fixes
;
90 int num_slots
; /* Slots on controller */
91 struct sdhci_pci_slot
*slots
[MAX_SLOTS
]; /* Pointers to host slots */
95 /*****************************************************************************\
97 * Hardware specific quirk handling *
99 \*****************************************************************************/
101 static int ricoh_probe(struct sdhci_pci_chip
*chip
)
103 if (chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SAMSUNG
||
104 chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SONY
)
105 chip
->quirks
|= SDHCI_QUIRK_NO_CARD_NO_RESET
;
109 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
112 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT
)
113 & SDHCI_TIMEOUT_CLK_MASK
) |
115 ((0x21 << SDHCI_CLOCK_BASE_SHIFT
)
116 & SDHCI_CLOCK_BASE_MASK
) |
118 SDHCI_TIMEOUT_CLK_UNIT
|
125 static int ricoh_mmc_resume(struct sdhci_pci_chip
*chip
)
127 /* Apply a delay to allow controller to settle */
128 /* Otherwise it becomes confused if card state changed
134 static const struct sdhci_pci_fixes sdhci_ricoh
= {
135 .probe
= ricoh_probe
,
136 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
137 SDHCI_QUIRK_FORCE_DMA
|
138 SDHCI_QUIRK_CLOCK_BEFORE_RESET
,
141 static const struct sdhci_pci_fixes sdhci_ricoh_mmc
= {
142 .probe_slot
= ricoh_mmc_probe_slot
,
143 .resume
= ricoh_mmc_resume
,
144 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
145 SDHCI_QUIRK_CLOCK_BEFORE_RESET
|
146 SDHCI_QUIRK_NO_CARD_NO_RESET
|
147 SDHCI_QUIRK_MISSING_CAPS
150 static const struct sdhci_pci_fixes sdhci_ene_712
= {
151 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
152 SDHCI_QUIRK_BROKEN_DMA
,
155 static const struct sdhci_pci_fixes sdhci_ene_714
= {
156 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
157 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
|
158 SDHCI_QUIRK_BROKEN_DMA
,
161 static const struct sdhci_pci_fixes sdhci_cafe
= {
162 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
|
163 SDHCI_QUIRK_NO_BUSY_IRQ
|
164 SDHCI_QUIRK_BROKEN_CARD_DETECTION
|
165 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
,
168 static int mrst_hc_probe_slot(struct sdhci_pci_slot
*slot
)
170 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
175 * ADMA operation is disabled for Moorestown platform due to
178 static int mrst_hc_probe(struct sdhci_pci_chip
*chip
)
181 * slots number is fixed here for MRST as SDIO3/5 are never used and
182 * have hardware bugs.
188 static int pch_hc_probe_slot(struct sdhci_pci_slot
*slot
)
190 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
194 #ifdef CONFIG_PM_RUNTIME
196 static irqreturn_t
sdhci_pci_sd_cd(int irq
, void *dev_id
)
198 struct sdhci_pci_slot
*slot
= dev_id
;
199 struct sdhci_host
*host
= slot
->host
;
201 mmc_detect_change(host
->mmc
, msecs_to_jiffies(200));
205 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
207 int err
, irq
, gpio
= slot
->cd_gpio
;
209 slot
->cd_gpio
= -EINVAL
;
210 slot
->cd_irq
= -EINVAL
;
212 if (!gpio_is_valid(gpio
))
215 err
= gpio_request(gpio
, "sd_cd");
219 err
= gpio_direction_input(gpio
);
223 irq
= gpio_to_irq(gpio
);
227 err
= request_irq(irq
, sdhci_pci_sd_cd
, IRQF_TRIGGER_RISING
|
228 IRQF_TRIGGER_FALLING
, "sd_cd", slot
);
232 slot
->cd_gpio
= gpio
;
240 dev_warn(&slot
->chip
->pdev
->dev
, "failed to setup card detect wake up\n");
243 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
245 if (slot
->cd_irq
>= 0)
246 free_irq(slot
->cd_irq
, slot
);
247 if (gpio_is_valid(slot
->cd_gpio
))
248 gpio_free(slot
->cd_gpio
);
253 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
257 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
263 static int mfd_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
265 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
;
266 slot
->host
->mmc
->caps2
|= MMC_CAP2_BOOTPART_NOACC
|
267 MMC_CAP2_HC_ERASE_SZ
;
271 static int mfd_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
273 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
;
277 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0
= {
278 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
279 .probe_slot
= mrst_hc_probe_slot
,
282 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2
= {
283 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
284 .probe
= mrst_hc_probe
,
287 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd
= {
288 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
289 .allow_runtime_pm
= true,
292 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio
= {
293 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
294 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
,
295 .allow_runtime_pm
= true,
296 .probe_slot
= mfd_sdio_probe_slot
,
299 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc
= {
300 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
301 .allow_runtime_pm
= true,
302 .probe_slot
= mfd_emmc_probe_slot
,
305 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio
= {
306 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
,
307 .probe_slot
= pch_hc_probe_slot
,
310 static int byt_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
312 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
;
313 slot
->host
->mmc
->caps2
|= MMC_CAP2_HC_ERASE_SZ
;
317 static int byt_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
319 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
;
323 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc
= {
324 .allow_runtime_pm
= true,
325 .probe_slot
= byt_emmc_probe_slot
,
328 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio
= {
329 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
,
330 .allow_runtime_pm
= true,
331 .probe_slot
= byt_sdio_probe_slot
,
334 static const struct sdhci_pci_fixes sdhci_intel_byt_sd
= {
337 /* O2Micro extra registers */
338 #define O2_SD_LOCK_WP 0xD3
339 #define O2_SD_MULTI_VCC3V 0xEE
340 #define O2_SD_CLKREQ 0xEC
341 #define O2_SD_CAPS 0xE0
342 #define O2_SD_ADMA1 0xE2
343 #define O2_SD_ADMA2 0xE7
344 #define O2_SD_INF_MOD 0xF1
346 static int o2_probe(struct sdhci_pci_chip
*chip
)
351 switch (chip
->pdev
->device
) {
352 case PCI_DEVICE_ID_O2_8220
:
353 case PCI_DEVICE_ID_O2_8221
:
354 case PCI_DEVICE_ID_O2_8320
:
355 case PCI_DEVICE_ID_O2_8321
:
356 /* This extra setup is required due to broken ADMA. */
357 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, &scratch
);
361 pci_write_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, scratch
);
363 /* Set Multi 3 to VCC3V# */
364 pci_write_config_byte(chip
->pdev
, O2_SD_MULTI_VCC3V
, 0x08);
366 /* Disable CLK_REQ# support after media DET */
367 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_CLKREQ
, &scratch
);
371 pci_write_config_byte(chip
->pdev
, O2_SD_CLKREQ
, scratch
);
373 /* Choose capabilities, enable SDMA. We have to write 0x01
374 * to the capabilities register first to unlock it.
376 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_CAPS
, &scratch
);
380 pci_write_config_byte(chip
->pdev
, O2_SD_CAPS
, scratch
);
381 pci_write_config_byte(chip
->pdev
, O2_SD_CAPS
, 0x73);
383 /* Disable ADMA1/2 */
384 pci_write_config_byte(chip
->pdev
, O2_SD_ADMA1
, 0x39);
385 pci_write_config_byte(chip
->pdev
, O2_SD_ADMA2
, 0x08);
387 /* Disable the infinite transfer mode */
388 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_INF_MOD
, &scratch
);
392 pci_write_config_byte(chip
->pdev
, O2_SD_INF_MOD
, scratch
);
395 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, &scratch
);
399 pci_write_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, scratch
);
405 static int jmicron_pmos(struct sdhci_pci_chip
*chip
, int on
)
410 ret
= pci_read_config_byte(chip
->pdev
, 0xAE, &scratch
);
415 * Turn PMOS on [bit 0], set over current detection to 2.4 V
416 * [bit 1:2] and enable over current debouncing [bit 6].
423 ret
= pci_write_config_byte(chip
->pdev
, 0xAE, scratch
);
430 static int jmicron_probe(struct sdhci_pci_chip
*chip
)
435 if (chip
->pdev
->revision
== 0) {
436 chip
->quirks
|= SDHCI_QUIRK_32BIT_DMA_ADDR
|
437 SDHCI_QUIRK_32BIT_DMA_SIZE
|
438 SDHCI_QUIRK_32BIT_ADMA_SIZE
|
439 SDHCI_QUIRK_RESET_AFTER_REQUEST
|
440 SDHCI_QUIRK_BROKEN_SMALL_PIO
;
444 * JMicron chips can have two interfaces to the same hardware
445 * in order to work around limitations in Microsoft's driver.
446 * We need to make sure we only bind to one of them.
448 * This code assumes two things:
450 * 1. The PCI code adds subfunctions in order.
452 * 2. The MMC interface has a lower subfunction number
453 * than the SD interface.
455 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_SD
)
456 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
;
457 else if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
)
458 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
;
461 struct pci_dev
*sd_dev
;
464 while ((sd_dev
= pci_get_device(PCI_VENDOR_ID_JMICRON
,
465 mmcdev
, sd_dev
)) != NULL
) {
466 if ((PCI_SLOT(chip
->pdev
->devfn
) ==
467 PCI_SLOT(sd_dev
->devfn
)) &&
468 (chip
->pdev
->bus
== sd_dev
->bus
))
474 dev_info(&chip
->pdev
->dev
, "Refusing to bind to "
475 "secondary interface.\n");
481 * JMicron chips need a bit of a nudge to enable the power
484 ret
= jmicron_pmos(chip
, 1);
486 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
490 /* quirk for unsable RO-detection on JM388 chips */
491 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
||
492 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
493 chip
->quirks
|= SDHCI_QUIRK_UNSTABLE_RO_DETECT
;
498 static void jmicron_enable_mmc(struct sdhci_host
*host
, int on
)
502 scratch
= readb(host
->ioaddr
+ 0xC0);
509 writeb(scratch
, host
->ioaddr
+ 0xC0);
512 static int jmicron_probe_slot(struct sdhci_pci_slot
*slot
)
514 if (slot
->chip
->pdev
->revision
== 0) {
517 version
= readl(slot
->host
->ioaddr
+ SDHCI_HOST_VERSION
);
518 version
= (version
& SDHCI_VENDOR_VER_MASK
) >>
519 SDHCI_VENDOR_VER_SHIFT
;
522 * Older versions of the chip have lots of nasty glitches
523 * in the ADMA engine. It's best just to avoid it
527 slot
->host
->quirks
|= SDHCI_QUIRK_BROKEN_ADMA
;
530 /* JM388 MMC doesn't support 1.8V while SD supports it */
531 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
532 slot
->host
->ocr_avail_sd
= MMC_VDD_32_33
| MMC_VDD_33_34
|
533 MMC_VDD_29_30
| MMC_VDD_30_31
|
534 MMC_VDD_165_195
; /* allow 1.8V */
535 slot
->host
->ocr_avail_mmc
= MMC_VDD_32_33
| MMC_VDD_33_34
|
536 MMC_VDD_29_30
| MMC_VDD_30_31
; /* no 1.8V for MMC */
540 * The secondary interface requires a bit set to get the
543 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
544 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
545 jmicron_enable_mmc(slot
->host
, 1);
547 slot
->host
->mmc
->caps
|= MMC_CAP_BUS_WIDTH_TEST
;
552 static void jmicron_remove_slot(struct sdhci_pci_slot
*slot
, int dead
)
557 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
558 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
559 jmicron_enable_mmc(slot
->host
, 0);
562 static int jmicron_suspend(struct sdhci_pci_chip
*chip
)
566 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
567 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
568 for (i
= 0; i
< chip
->num_slots
; i
++)
569 jmicron_enable_mmc(chip
->slots
[i
]->host
, 0);
575 static int jmicron_resume(struct sdhci_pci_chip
*chip
)
579 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
580 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
581 for (i
= 0; i
< chip
->num_slots
; i
++)
582 jmicron_enable_mmc(chip
->slots
[i
]->host
, 1);
585 ret
= jmicron_pmos(chip
, 1);
587 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
594 static const struct sdhci_pci_fixes sdhci_o2
= {
598 static const struct sdhci_pci_fixes sdhci_jmicron
= {
599 .probe
= jmicron_probe
,
601 .probe_slot
= jmicron_probe_slot
,
602 .remove_slot
= jmicron_remove_slot
,
604 .suspend
= jmicron_suspend
,
605 .resume
= jmicron_resume
,
608 /* SysKonnect CardBus2SDIO extra registers */
609 #define SYSKT_CTRL 0x200
610 #define SYSKT_RDFIFO_STAT 0x204
611 #define SYSKT_WRFIFO_STAT 0x208
612 #define SYSKT_POWER_DATA 0x20c
613 #define SYSKT_POWER_330 0xef
614 #define SYSKT_POWER_300 0xf8
615 #define SYSKT_POWER_184 0xcc
616 #define SYSKT_POWER_CMD 0x20d
617 #define SYSKT_POWER_START (1 << 7)
618 #define SYSKT_POWER_STATUS 0x20e
619 #define SYSKT_POWER_STATUS_OK (1 << 0)
620 #define SYSKT_BOARD_REV 0x210
621 #define SYSKT_CHIP_REV 0x211
622 #define SYSKT_CONF_DATA 0x212
623 #define SYSKT_CONF_DATA_1V8 (1 << 2)
624 #define SYSKT_CONF_DATA_2V5 (1 << 1)
625 #define SYSKT_CONF_DATA_3V3 (1 << 0)
627 static int syskt_probe(struct sdhci_pci_chip
*chip
)
629 if ((chip
->pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
630 chip
->pdev
->class &= ~0x0000FF;
631 chip
->pdev
->class |= PCI_SDHCI_IFDMA
;
636 static int syskt_probe_slot(struct sdhci_pci_slot
*slot
)
640 u8 board_rev
= readb(slot
->host
->ioaddr
+ SYSKT_BOARD_REV
);
641 u8 chip_rev
= readb(slot
->host
->ioaddr
+ SYSKT_CHIP_REV
);
642 dev_info(&slot
->chip
->pdev
->dev
, "SysKonnect CardBus2SDIO, "
643 "board rev %d.%d, chip rev %d.%d\n",
644 board_rev
>> 4, board_rev
& 0xf,
645 chip_rev
>> 4, chip_rev
& 0xf);
646 if (chip_rev
>= 0x20)
647 slot
->host
->quirks
|= SDHCI_QUIRK_FORCE_DMA
;
649 writeb(SYSKT_POWER_330
, slot
->host
->ioaddr
+ SYSKT_POWER_DATA
);
650 writeb(SYSKT_POWER_START
, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
652 tm
= 10; /* Wait max 1 ms */
654 ps
= readw(slot
->host
->ioaddr
+ SYSKT_POWER_STATUS
);
655 if (ps
& SYSKT_POWER_STATUS_OK
)
660 dev_err(&slot
->chip
->pdev
->dev
,
661 "power regulator never stabilized");
662 writeb(0, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
669 static const struct sdhci_pci_fixes sdhci_syskt
= {
670 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
,
671 .probe
= syskt_probe
,
672 .probe_slot
= syskt_probe_slot
,
675 static int via_probe(struct sdhci_pci_chip
*chip
)
677 if (chip
->pdev
->revision
== 0x10)
678 chip
->quirks
|= SDHCI_QUIRK_DELAY_AFTER_POWER
;
683 static const struct sdhci_pci_fixes sdhci_via
= {
687 static const struct pci_device_id pci_ids
[] = {
689 .vendor
= PCI_VENDOR_ID_RICOH
,
690 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
691 .subvendor
= PCI_ANY_ID
,
692 .subdevice
= PCI_ANY_ID
,
693 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh
,
697 .vendor
= PCI_VENDOR_ID_RICOH
,
699 .subvendor
= PCI_ANY_ID
,
700 .subdevice
= PCI_ANY_ID
,
701 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
705 .vendor
= PCI_VENDOR_ID_RICOH
,
707 .subvendor
= PCI_ANY_ID
,
708 .subdevice
= PCI_ANY_ID
,
709 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
713 .vendor
= PCI_VENDOR_ID_RICOH
,
715 .subvendor
= PCI_ANY_ID
,
716 .subdevice
= PCI_ANY_ID
,
717 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
721 .vendor
= PCI_VENDOR_ID_ENE
,
722 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
723 .subvendor
= PCI_ANY_ID
,
724 .subdevice
= PCI_ANY_ID
,
725 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
729 .vendor
= PCI_VENDOR_ID_ENE
,
730 .device
= PCI_DEVICE_ID_ENE_CB712_SD_2
,
731 .subvendor
= PCI_ANY_ID
,
732 .subdevice
= PCI_ANY_ID
,
733 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
737 .vendor
= PCI_VENDOR_ID_ENE
,
738 .device
= PCI_DEVICE_ID_ENE_CB714_SD
,
739 .subvendor
= PCI_ANY_ID
,
740 .subdevice
= PCI_ANY_ID
,
741 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
745 .vendor
= PCI_VENDOR_ID_ENE
,
746 .device
= PCI_DEVICE_ID_ENE_CB714_SD_2
,
747 .subvendor
= PCI_ANY_ID
,
748 .subdevice
= PCI_ANY_ID
,
749 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
753 .vendor
= PCI_VENDOR_ID_MARVELL
,
754 .device
= PCI_DEVICE_ID_MARVELL_88ALP01_SD
,
755 .subvendor
= PCI_ANY_ID
,
756 .subdevice
= PCI_ANY_ID
,
757 .driver_data
= (kernel_ulong_t
)&sdhci_cafe
,
761 .vendor
= PCI_VENDOR_ID_JMICRON
,
762 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_SD
,
763 .subvendor
= PCI_ANY_ID
,
764 .subdevice
= PCI_ANY_ID
,
765 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
769 .vendor
= PCI_VENDOR_ID_JMICRON
,
770 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
,
771 .subvendor
= PCI_ANY_ID
,
772 .subdevice
= PCI_ANY_ID
,
773 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
777 .vendor
= PCI_VENDOR_ID_JMICRON
,
778 .device
= PCI_DEVICE_ID_JMICRON_JMB388_SD
,
779 .subvendor
= PCI_ANY_ID
,
780 .subdevice
= PCI_ANY_ID
,
781 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
785 .vendor
= PCI_VENDOR_ID_JMICRON
,
786 .device
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
,
787 .subvendor
= PCI_ANY_ID
,
788 .subdevice
= PCI_ANY_ID
,
789 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
793 .vendor
= PCI_VENDOR_ID_SYSKONNECT
,
795 .subvendor
= PCI_ANY_ID
,
796 .subdevice
= PCI_ANY_ID
,
797 .driver_data
= (kernel_ulong_t
)&sdhci_syskt
,
801 .vendor
= PCI_VENDOR_ID_VIA
,
803 .subvendor
= PCI_ANY_ID
,
804 .subdevice
= PCI_ANY_ID
,
805 .driver_data
= (kernel_ulong_t
)&sdhci_via
,
809 .vendor
= PCI_VENDOR_ID_INTEL
,
810 .device
= PCI_DEVICE_ID_INTEL_MRST_SD0
,
811 .subvendor
= PCI_ANY_ID
,
812 .subdevice
= PCI_ANY_ID
,
813 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc0
,
817 .vendor
= PCI_VENDOR_ID_INTEL
,
818 .device
= PCI_DEVICE_ID_INTEL_MRST_SD1
,
819 .subvendor
= PCI_ANY_ID
,
820 .subdevice
= PCI_ANY_ID
,
821 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
825 .vendor
= PCI_VENDOR_ID_INTEL
,
826 .device
= PCI_DEVICE_ID_INTEL_MRST_SD2
,
827 .subvendor
= PCI_ANY_ID
,
828 .subdevice
= PCI_ANY_ID
,
829 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
833 .vendor
= PCI_VENDOR_ID_INTEL
,
834 .device
= PCI_DEVICE_ID_INTEL_MFD_SD
,
835 .subvendor
= PCI_ANY_ID
,
836 .subdevice
= PCI_ANY_ID
,
837 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
841 .vendor
= PCI_VENDOR_ID_INTEL
,
842 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO1
,
843 .subvendor
= PCI_ANY_ID
,
844 .subdevice
= PCI_ANY_ID
,
845 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
849 .vendor
= PCI_VENDOR_ID_INTEL
,
850 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO2
,
851 .subvendor
= PCI_ANY_ID
,
852 .subdevice
= PCI_ANY_ID
,
853 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
857 .vendor
= PCI_VENDOR_ID_INTEL
,
858 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC0
,
859 .subvendor
= PCI_ANY_ID
,
860 .subdevice
= PCI_ANY_ID
,
861 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
865 .vendor
= PCI_VENDOR_ID_INTEL
,
866 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC1
,
867 .subvendor
= PCI_ANY_ID
,
868 .subdevice
= PCI_ANY_ID
,
869 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
873 .vendor
= PCI_VENDOR_ID_INTEL
,
874 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO0
,
875 .subvendor
= PCI_ANY_ID
,
876 .subdevice
= PCI_ANY_ID
,
877 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
881 .vendor
= PCI_VENDOR_ID_INTEL
,
882 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO1
,
883 .subvendor
= PCI_ANY_ID
,
884 .subdevice
= PCI_ANY_ID
,
885 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
889 .vendor
= PCI_VENDOR_ID_INTEL
,
890 .device
= PCI_DEVICE_ID_INTEL_BYT_EMMC
,
891 .subvendor
= PCI_ANY_ID
,
892 .subdevice
= PCI_ANY_ID
,
893 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
897 .vendor
= PCI_VENDOR_ID_INTEL
,
898 .device
= PCI_DEVICE_ID_INTEL_BYT_SDIO
,
899 .subvendor
= PCI_ANY_ID
,
900 .subdevice
= PCI_ANY_ID
,
901 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
905 .vendor
= PCI_VENDOR_ID_INTEL
,
906 .device
= PCI_DEVICE_ID_INTEL_BYT_SD
,
907 .subvendor
= PCI_ANY_ID
,
908 .subdevice
= PCI_ANY_ID
,
909 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
913 .vendor
= PCI_VENDOR_ID_O2
,
914 .device
= PCI_DEVICE_ID_O2_8120
,
915 .subvendor
= PCI_ANY_ID
,
916 .subdevice
= PCI_ANY_ID
,
917 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
921 .vendor
= PCI_VENDOR_ID_O2
,
922 .device
= PCI_DEVICE_ID_O2_8220
,
923 .subvendor
= PCI_ANY_ID
,
924 .subdevice
= PCI_ANY_ID
,
925 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
929 .vendor
= PCI_VENDOR_ID_O2
,
930 .device
= PCI_DEVICE_ID_O2_8221
,
931 .subvendor
= PCI_ANY_ID
,
932 .subdevice
= PCI_ANY_ID
,
933 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
937 .vendor
= PCI_VENDOR_ID_O2
,
938 .device
= PCI_DEVICE_ID_O2_8320
,
939 .subvendor
= PCI_ANY_ID
,
940 .subdevice
= PCI_ANY_ID
,
941 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
945 .vendor
= PCI_VENDOR_ID_O2
,
946 .device
= PCI_DEVICE_ID_O2_8321
,
947 .subvendor
= PCI_ANY_ID
,
948 .subdevice
= PCI_ANY_ID
,
949 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
952 { /* Generic SD host controller */
953 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
956 { /* end: all zeroes */ },
959 MODULE_DEVICE_TABLE(pci
, pci_ids
);
961 /*****************************************************************************\
963 * SDHCI core callbacks *
965 \*****************************************************************************/
967 static int sdhci_pci_enable_dma(struct sdhci_host
*host
)
969 struct sdhci_pci_slot
*slot
;
970 struct pci_dev
*pdev
;
973 slot
= sdhci_priv(host
);
974 pdev
= slot
->chip
->pdev
;
976 if (((pdev
->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI
<< 8)) &&
977 ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
) &&
978 (host
->flags
& SDHCI_USE_SDMA
)) {
979 dev_warn(&pdev
->dev
, "Will use DMA mode even though HW "
980 "doesn't fully claim to support it.\n");
983 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
987 pci_set_master(pdev
);
992 static int sdhci_pci_bus_width(struct sdhci_host
*host
, int width
)
996 ctrl
= sdhci_readb(host
, SDHCI_HOST_CONTROL
);
999 case MMC_BUS_WIDTH_8
:
1000 ctrl
|= SDHCI_CTRL_8BITBUS
;
1001 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
1003 case MMC_BUS_WIDTH_4
:
1004 ctrl
|= SDHCI_CTRL_4BITBUS
;
1005 ctrl
&= ~SDHCI_CTRL_8BITBUS
;
1008 ctrl
&= ~(SDHCI_CTRL_8BITBUS
| SDHCI_CTRL_4BITBUS
);
1012 sdhci_writeb(host
, ctrl
, SDHCI_HOST_CONTROL
);
1017 static void sdhci_pci_hw_reset(struct sdhci_host
*host
)
1019 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1020 int rst_n_gpio
= slot
->rst_n_gpio
;
1022 if (!gpio_is_valid(rst_n_gpio
))
1024 gpio_set_value_cansleep(rst_n_gpio
, 0);
1025 /* For eMMC, minimum is 1us but give it 10us for good measure */
1027 gpio_set_value_cansleep(rst_n_gpio
, 1);
1028 /* For eMMC, minimum is 200us but give it 300us for good measure */
1029 usleep_range(300, 1000);
1032 static const struct sdhci_ops sdhci_pci_ops
= {
1033 .enable_dma
= sdhci_pci_enable_dma
,
1034 .platform_bus_width
= sdhci_pci_bus_width
,
1035 .hw_reset
= sdhci_pci_hw_reset
,
1038 /*****************************************************************************\
1042 \*****************************************************************************/
1046 static int sdhci_pci_suspend(struct device
*dev
)
1048 struct pci_dev
*pdev
= to_pci_dev(dev
);
1049 struct sdhci_pci_chip
*chip
;
1050 struct sdhci_pci_slot
*slot
;
1051 mmc_pm_flag_t slot_pm_flags
;
1052 mmc_pm_flag_t pm_flags
= 0;
1055 chip
= pci_get_drvdata(pdev
);
1059 for (i
= 0; i
< chip
->num_slots
; i
++) {
1060 slot
= chip
->slots
[i
];
1064 ret
= sdhci_suspend_host(slot
->host
);
1067 goto err_pci_suspend
;
1069 slot_pm_flags
= slot
->host
->mmc
->pm_flags
;
1070 if (slot_pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
1071 sdhci_enable_irq_wakeups(slot
->host
);
1073 pm_flags
|= slot_pm_flags
;
1076 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1077 ret
= chip
->fixes
->suspend(chip
);
1079 goto err_pci_suspend
;
1082 pci_save_state(pdev
);
1083 if (pm_flags
& MMC_PM_KEEP_POWER
) {
1084 if (pm_flags
& MMC_PM_WAKE_SDIO_IRQ
) {
1085 pci_pme_active(pdev
, true);
1086 pci_enable_wake(pdev
, PCI_D3hot
, 1);
1088 pci_set_power_state(pdev
, PCI_D3hot
);
1090 pci_enable_wake(pdev
, PCI_D3hot
, 0);
1091 pci_disable_device(pdev
);
1092 pci_set_power_state(pdev
, PCI_D3hot
);
1099 sdhci_resume_host(chip
->slots
[i
]->host
);
1103 static int sdhci_pci_resume(struct device
*dev
)
1105 struct pci_dev
*pdev
= to_pci_dev(dev
);
1106 struct sdhci_pci_chip
*chip
;
1107 struct sdhci_pci_slot
*slot
;
1110 chip
= pci_get_drvdata(pdev
);
1114 pci_set_power_state(pdev
, PCI_D0
);
1115 pci_restore_state(pdev
);
1116 ret
= pci_enable_device(pdev
);
1120 if (chip
->fixes
&& chip
->fixes
->resume
) {
1121 ret
= chip
->fixes
->resume(chip
);
1126 for (i
= 0; i
< chip
->num_slots
; i
++) {
1127 slot
= chip
->slots
[i
];
1131 ret
= sdhci_resume_host(slot
->host
);
1139 #else /* CONFIG_PM */
1141 #define sdhci_pci_suspend NULL
1142 #define sdhci_pci_resume NULL
1144 #endif /* CONFIG_PM */
1146 #ifdef CONFIG_PM_RUNTIME
1148 static int sdhci_pci_runtime_suspend(struct device
*dev
)
1150 struct pci_dev
*pdev
= container_of(dev
, struct pci_dev
, dev
);
1151 struct sdhci_pci_chip
*chip
;
1152 struct sdhci_pci_slot
*slot
;
1155 chip
= pci_get_drvdata(pdev
);
1159 for (i
= 0; i
< chip
->num_slots
; i
++) {
1160 slot
= chip
->slots
[i
];
1164 ret
= sdhci_runtime_suspend_host(slot
->host
);
1167 goto err_pci_runtime_suspend
;
1170 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1171 ret
= chip
->fixes
->suspend(chip
);
1173 goto err_pci_runtime_suspend
;
1178 err_pci_runtime_suspend
:
1180 sdhci_runtime_resume_host(chip
->slots
[i
]->host
);
1184 static int sdhci_pci_runtime_resume(struct device
*dev
)
1186 struct pci_dev
*pdev
= container_of(dev
, struct pci_dev
, dev
);
1187 struct sdhci_pci_chip
*chip
;
1188 struct sdhci_pci_slot
*slot
;
1191 chip
= pci_get_drvdata(pdev
);
1195 if (chip
->fixes
&& chip
->fixes
->resume
) {
1196 ret
= chip
->fixes
->resume(chip
);
1201 for (i
= 0; i
< chip
->num_slots
; i
++) {
1202 slot
= chip
->slots
[i
];
1206 ret
= sdhci_runtime_resume_host(slot
->host
);
1214 static int sdhci_pci_runtime_idle(struct device
*dev
)
1221 #define sdhci_pci_runtime_suspend NULL
1222 #define sdhci_pci_runtime_resume NULL
1223 #define sdhci_pci_runtime_idle NULL
1227 static const struct dev_pm_ops sdhci_pci_pm_ops
= {
1228 .suspend
= sdhci_pci_suspend
,
1229 .resume
= sdhci_pci_resume
,
1230 .runtime_suspend
= sdhci_pci_runtime_suspend
,
1231 .runtime_resume
= sdhci_pci_runtime_resume
,
1232 .runtime_idle
= sdhci_pci_runtime_idle
,
1235 /*****************************************************************************\
1237 * Device probing/removal *
1239 \*****************************************************************************/
1241 static struct sdhci_pci_slot
*sdhci_pci_probe_slot(
1242 struct pci_dev
*pdev
, struct sdhci_pci_chip
*chip
, int first_bar
,
1245 struct sdhci_pci_slot
*slot
;
1246 struct sdhci_host
*host
;
1247 int ret
, bar
= first_bar
+ slotno
;
1249 if (!(pci_resource_flags(pdev
, bar
) & IORESOURCE_MEM
)) {
1250 dev_err(&pdev
->dev
, "BAR %d is not iomem. Aborting.\n", bar
);
1251 return ERR_PTR(-ENODEV
);
1254 if (pci_resource_len(pdev
, bar
) < 0x100) {
1255 dev_err(&pdev
->dev
, "Invalid iomem size. You may "
1256 "experience problems.\n");
1259 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
1260 dev_err(&pdev
->dev
, "Vendor specific interface. Aborting.\n");
1261 return ERR_PTR(-ENODEV
);
1264 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
1265 dev_err(&pdev
->dev
, "Unknown interface. Aborting.\n");
1266 return ERR_PTR(-ENODEV
);
1269 host
= sdhci_alloc_host(&pdev
->dev
, sizeof(struct sdhci_pci_slot
));
1271 dev_err(&pdev
->dev
, "cannot allocate host\n");
1272 return ERR_CAST(host
);
1275 slot
= sdhci_priv(host
);
1279 slot
->pci_bar
= bar
;
1280 slot
->rst_n_gpio
= -EINVAL
;
1281 slot
->cd_gpio
= -EINVAL
;
1283 /* Retrieve platform data if there is any */
1284 if (*sdhci_pci_get_data
)
1285 slot
->data
= sdhci_pci_get_data(pdev
, slotno
);
1288 if (slot
->data
->setup
) {
1289 ret
= slot
->data
->setup(slot
->data
);
1291 dev_err(&pdev
->dev
, "platform setup failed\n");
1295 slot
->rst_n_gpio
= slot
->data
->rst_n_gpio
;
1296 slot
->cd_gpio
= slot
->data
->cd_gpio
;
1299 host
->hw_name
= "PCI";
1300 host
->ops
= &sdhci_pci_ops
;
1301 host
->quirks
= chip
->quirks
;
1302 host
->quirks2
= chip
->quirks2
;
1304 host
->irq
= pdev
->irq
;
1306 ret
= pci_request_region(pdev
, bar
, mmc_hostname(host
->mmc
));
1308 dev_err(&pdev
->dev
, "cannot request region\n");
1312 host
->ioaddr
= pci_ioremap_bar(pdev
, bar
);
1313 if (!host
->ioaddr
) {
1314 dev_err(&pdev
->dev
, "failed to remap registers\n");
1319 if (chip
->fixes
&& chip
->fixes
->probe_slot
) {
1320 ret
= chip
->fixes
->probe_slot(slot
);
1325 if (gpio_is_valid(slot
->rst_n_gpio
)) {
1326 if (!gpio_request(slot
->rst_n_gpio
, "eMMC_reset")) {
1327 gpio_direction_output(slot
->rst_n_gpio
, 1);
1328 slot
->host
->mmc
->caps
|= MMC_CAP_HW_RESET
;
1330 dev_warn(&pdev
->dev
, "failed to request rst_n_gpio\n");
1331 slot
->rst_n_gpio
= -EINVAL
;
1335 host
->mmc
->pm_caps
= MMC_PM_KEEP_POWER
| MMC_PM_WAKE_SDIO_IRQ
;
1336 host
->mmc
->slotno
= slotno
;
1337 host
->mmc
->caps2
|= MMC_CAP2_NO_PRESCAN_POWERUP
;
1339 ret
= sdhci_add_host(host
);
1343 sdhci_pci_add_own_cd(slot
);
1348 if (gpio_is_valid(slot
->rst_n_gpio
))
1349 gpio_free(slot
->rst_n_gpio
);
1351 if (chip
->fixes
&& chip
->fixes
->remove_slot
)
1352 chip
->fixes
->remove_slot(slot
, 0);
1355 iounmap(host
->ioaddr
);
1358 pci_release_region(pdev
, bar
);
1361 if (slot
->data
&& slot
->data
->cleanup
)
1362 slot
->data
->cleanup(slot
->data
);
1365 sdhci_free_host(host
);
1367 return ERR_PTR(ret
);
1370 static void sdhci_pci_remove_slot(struct sdhci_pci_slot
*slot
)
1375 sdhci_pci_remove_own_cd(slot
);
1378 scratch
= readl(slot
->host
->ioaddr
+ SDHCI_INT_STATUS
);
1379 if (scratch
== (u32
)-1)
1382 sdhci_remove_host(slot
->host
, dead
);
1384 if (gpio_is_valid(slot
->rst_n_gpio
))
1385 gpio_free(slot
->rst_n_gpio
);
1387 if (slot
->chip
->fixes
&& slot
->chip
->fixes
->remove_slot
)
1388 slot
->chip
->fixes
->remove_slot(slot
, dead
);
1390 if (slot
->data
&& slot
->data
->cleanup
)
1391 slot
->data
->cleanup(slot
->data
);
1393 pci_release_region(slot
->chip
->pdev
, slot
->pci_bar
);
1395 sdhci_free_host(slot
->host
);
1398 static void sdhci_pci_runtime_pm_allow(struct device
*dev
)
1400 pm_runtime_put_noidle(dev
);
1401 pm_runtime_allow(dev
);
1402 pm_runtime_set_autosuspend_delay(dev
, 50);
1403 pm_runtime_use_autosuspend(dev
);
1404 pm_suspend_ignore_children(dev
, 1);
1407 static void sdhci_pci_runtime_pm_forbid(struct device
*dev
)
1409 pm_runtime_forbid(dev
);
1410 pm_runtime_get_noresume(dev
);
1413 static int sdhci_pci_probe(struct pci_dev
*pdev
,
1414 const struct pci_device_id
*ent
)
1416 struct sdhci_pci_chip
*chip
;
1417 struct sdhci_pci_slot
*slot
;
1419 u8 slots
, first_bar
;
1422 BUG_ON(pdev
== NULL
);
1423 BUG_ON(ent
== NULL
);
1425 dev_info(&pdev
->dev
, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1426 (int)pdev
->vendor
, (int)pdev
->device
, (int)pdev
->revision
);
1428 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
1432 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
1433 dev_dbg(&pdev
->dev
, "found %d slot(s)\n", slots
);
1437 BUG_ON(slots
> MAX_SLOTS
);
1439 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
1443 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
1445 if (first_bar
> 5) {
1446 dev_err(&pdev
->dev
, "Invalid first BAR. Aborting.\n");
1450 ret
= pci_enable_device(pdev
);
1454 chip
= kzalloc(sizeof(struct sdhci_pci_chip
), GFP_KERNEL
);
1461 chip
->fixes
= (const struct sdhci_pci_fixes
*)ent
->driver_data
;
1463 chip
->quirks
= chip
->fixes
->quirks
;
1464 chip
->quirks2
= chip
->fixes
->quirks2
;
1465 chip
->allow_runtime_pm
= chip
->fixes
->allow_runtime_pm
;
1467 chip
->num_slots
= slots
;
1469 pci_set_drvdata(pdev
, chip
);
1471 if (chip
->fixes
&& chip
->fixes
->probe
) {
1472 ret
= chip
->fixes
->probe(chip
);
1477 slots
= chip
->num_slots
; /* Quirk may have changed this */
1479 for (i
= 0; i
< slots
; i
++) {
1480 slot
= sdhci_pci_probe_slot(pdev
, chip
, first_bar
, i
);
1482 for (i
--; i
>= 0; i
--)
1483 sdhci_pci_remove_slot(chip
->slots
[i
]);
1484 ret
= PTR_ERR(slot
);
1488 chip
->slots
[i
] = slot
;
1491 if (chip
->allow_runtime_pm
)
1492 sdhci_pci_runtime_pm_allow(&pdev
->dev
);
1497 pci_set_drvdata(pdev
, NULL
);
1501 pci_disable_device(pdev
);
1505 static void sdhci_pci_remove(struct pci_dev
*pdev
)
1508 struct sdhci_pci_chip
*chip
;
1510 chip
= pci_get_drvdata(pdev
);
1513 if (chip
->allow_runtime_pm
)
1514 sdhci_pci_runtime_pm_forbid(&pdev
->dev
);
1516 for (i
= 0; i
< chip
->num_slots
; i
++)
1517 sdhci_pci_remove_slot(chip
->slots
[i
]);
1519 pci_set_drvdata(pdev
, NULL
);
1523 pci_disable_device(pdev
);
1526 static struct pci_driver sdhci_driver
= {
1527 .name
= "sdhci-pci",
1528 .id_table
= pci_ids
,
1529 .probe
= sdhci_pci_probe
,
1530 .remove
= sdhci_pci_remove
,
1532 .pm
= &sdhci_pci_pm_ops
1536 module_pci_driver(sdhci_driver
);
1538 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1539 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1540 MODULE_LICENSE("GPL");