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import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / mmc-host / mt8127 / mt_dump.c
1
2 #include <linux/init.h>
3 #include <linux/module.h>
4 #include <linux/delay.h> /* for mdely */
5 #include <linux/irqflags.h> /* for mdely */
6 //#include <linux/ioport.h> /* for */
7 //#include <linux/types.h>
8 //#include <linux/kernel.h> /* for __raw_readl ... */
9 //#include <mach/board.h>
10 #include <asm/io.h> /* __raw_readl */
11
12 #include <linux/mmc/host.h>
13 #include <linux/mmc/mmc.h>
14 #include <mach/mt_pm_ldo.h> /* hwPowerOn */
15 #include <mach/mt_reg_base.h>
16 #include "mt_sd.h"
17 #include "mt_dump.h"
18 #include <mach/board.h>
19 #include <linux/mmc/sd_misc.h>
20
21 #ifdef CONFIG_MTK_EMMC_SUPPORT
22 #include "partition_define.h"
23 #endif
24
25 #ifndef FPGA_PLATFORM
26 #include <mach/mt_clkmgr.h>
27 #endif
28
29
30 MODULE_LICENSE("GPL");
31 /*--------------------------------------------------------------------------*/
32 /* head file define */
33 /*--------------------------------------------------------------------------*/
34 /* some marco will be reuse with mmc subsystem */
35
36 #ifdef CONFIG_MTK_EMMC_SUPPORT
37 #include "partition_define.h"
38 #endif
39 char test_kdump[]={6,5,8,2,'k','d','u','m','p','t','e','s','t'};
40 //==============
41 #define TEST_SIZE (128*1024)
42 unsigned char g_tst_buf_w[TEST_SIZE] = {0};
43 unsigned char g_tst_buf_r[TEST_SIZE] = {0};
44 //==============
45
46 //==============
47 //#define printk( printk(KERN_EMERG
48 //maybe use pr_debug
49 //==============
50
51 #define SIMP_SUCCESS (1)
52 #define SIMP_FAILED (0)
53
54 /* the base address of sd card slot */
55 #define BOOT_STORAGE_ID (0)
56 #define EXTEND_STORAGE_ID (1)
57 #define MSDC_CLKSRC (MSDC_CLKSRC_200M)
58 static unsigned int clks[] = {200000000};
59
60 #define BLK_LEN (512)
61 #define MAX_SCLK (52000000)
62 #define NORMAL_SCLK (25000000)
63 #define MIN_SCLK (260000)
64
65 #if (5 == HOST_MAX_NUM)
66 static u32 u_msdc_base[HOST_MAX_NUM] = {MSDC_0_BASE, MSDC_1_BASE, MSDC_2_BASE, MSDC_3_BASE, MSDC_4_BASE};
67 static struct msdc_hw *p_msdc_hw[HOST_MAX_NUM] = {NULL, NULL, NULL, NULL, NULL};
68 #elif (4 == HOST_MAX_NUM)
69 static u32 u_msdc_base[HOST_MAX_NUM] = {MSDC_0_BASE, MSDC_1_BASE, MSDC_2_BASE, MSDC_3_BASE};
70 static struct msdc_hw *p_msdc_hw[HOST_MAX_NUM] = {NULL, NULL, NULL, NULL};
71 #elif (3 == HOST_MAX_NUM)
72 static u32 u_msdc_base[HOST_MAX_NUM] = {MSDC_0_BASE, MSDC_1_BASE, MSDC_2_BASE};
73 static struct msdc_hw *p_msdc_hw[HOST_MAX_NUM] = {NULL, NULL, NULL};
74 #endif
75
76 static struct simp_msdc_host g_msdc_host[2];
77 static struct simp_msdc_card g_msdc_card[2];
78 static struct simp_msdc_host *pmsdc_boot_host = &g_msdc_host[BOOT_STORAGE_ID];
79 static struct simp_msdc_host *pmsdc_extend_host = &g_msdc_host[EXTEND_STORAGE_ID];
80 static struct simp_mmc_host g_mmc_host[2];
81 static struct simp_mmc_card g_mmc_card[2];
82 static struct simp_mmc_host *pmmc_boot_host = &g_mmc_host[BOOT_STORAGE_ID];
83 static struct simp_mmc_host *pmmc_extend_host = &g_mmc_host[EXTEND_STORAGE_ID];
84
85 static void simp_msdc_dump_register(struct simp_msdc_host *host)
86 {
87 unsigned int base = host->base;
88
89 printk(KERN_EMERG "Reg[00] MSDC_CFG = 0x%.8x", sdr_read32(base + 0x00));
90 printk(KERN_EMERG "Reg[04] MSDC_IOCON = 0x%.8x", sdr_read32(base + 0x04));
91 printk(KERN_EMERG "Reg[08] MSDC_PS = 0x%.8x", sdr_read32(base + 0x08));
92 printk(KERN_EMERG "Reg[0C] MSDC_INT = 0x%.8x", sdr_read32(base + 0x0C));
93 printk(KERN_EMERG "Reg[10] MSDC_INTEN = 0x%.8x", sdr_read32(base + 0x10));
94 printk(KERN_EMERG "Reg[14] MSDC_FIFOCS = 0x%.8x", sdr_read32(base + 0x14));
95 printk(KERN_EMERG "Reg[18] MSDC_TXDATA = not read");
96 printk(KERN_EMERG "Reg[1C] MSDC_RXDATA = not read");
97 printk(KERN_EMERG "Reg[30] SDC_CFG = 0x%.8x", sdr_read32(base + 0x30));
98 printk(KERN_EMERG "Reg[34] SDC_CMD = 0x%.8x", sdr_read32(base + 0x34));
99 printk(KERN_EMERG "Reg[38] SDC_ARG = 0x%.8x", sdr_read32(base + 0x38));
100 printk(KERN_EMERG "Reg[3C] SDC_STS = 0x%.8x", sdr_read32(base + 0x3C));
101 printk(KERN_EMERG "Reg[40] SDC_RESP0 = 0x%.8x", sdr_read32(base + 0x40));
102 printk(KERN_EMERG "Reg[44] SDC_RESP1 = 0x%.8x", sdr_read32(base + 0x44));
103 printk(KERN_EMERG "Reg[48] SDC_RESP2 = 0x%.8x", sdr_read32(base + 0x48));
104 printk(KERN_EMERG "Reg[4C] SDC_RESP3 = 0x%.8x", sdr_read32(base + 0x4C));
105 printk(KERN_EMERG "Reg[50] SDC_BLK_NUM = 0x%.8x", sdr_read32(base + 0x50));
106 printk(KERN_EMERG "Reg[58] SDC_CSTS = 0x%.8x", sdr_read32(base + 0x58));
107 printk(KERN_EMERG "Reg[5C] SDC_CSTS_EN = 0x%.8x", sdr_read32(base + 0x5C));
108 printk(KERN_EMERG "Reg[60] SDC_DATCRC_STS = 0x%.8x", sdr_read32(base + 0x60));
109 printk(KERN_EMERG "Reg[70] EMMC_CFG0 = 0x%.8x", sdr_read32(base + 0x70));
110 printk(KERN_EMERG "Reg[74] EMMC_CFG1 = 0x%.8x", sdr_read32(base + 0x74));
111 printk(KERN_EMERG "Reg[78] EMMC_STS = 0x%.8x", sdr_read32(base + 0x78));
112 printk(KERN_EMERG "Reg[7C] EMMC_IOCON = 0x%.8x", sdr_read32(base + 0x7C));
113 printk(KERN_EMERG "Reg[80] SD_ACMD_RESP = 0x%.8x", sdr_read32(base + 0x80));
114 printk(KERN_EMERG "Reg[84] SD_ACMD19_TRG = 0x%.8x", sdr_read32(base + 0x84));
115 printk(KERN_EMERG "Reg[88] SD_ACMD19_STS = 0x%.8x", sdr_read32(base + 0x88));
116 printk(KERN_EMERG "Reg[90] DMA_SA = 0x%.8x", sdr_read32(base + 0x90));
117 printk(KERN_EMERG "Reg[94] DMA_CA = 0x%.8x", sdr_read32(base + 0x94));
118 printk(KERN_EMERG "Reg[98] DMA_CTRL = 0x%.8x", sdr_read32(base + 0x98));
119 printk(KERN_EMERG "Reg[9C] DMA_CFG = 0x%.8x", sdr_read32(base + 0x9C));
120 printk(KERN_EMERG "Reg[A0] SW_DBG_SEL = 0x%.8x", sdr_read32(base + 0xA0));
121 printk(KERN_EMERG "Reg[A4] SW_DBG_OUT = 0x%.8x", sdr_read32(base + 0xA4));
122 printk(KERN_EMERG "Reg[B0] PATCH_BIT0 = 0x%.8x", sdr_read32(base + 0xB0));
123 printk(KERN_EMERG "Reg[B4] PATCH_BIT1 = 0x%.8x", sdr_read32(base + 0xB4));
124 printk(KERN_EMERG "Reg[E0] SD20_PAD_CTL0 = 0x%.8x", sdr_read32(base + 0xE0));
125 printk(KERN_EMERG "Reg[E4] SD20_PAD_CTL1 = 0x%.8x", sdr_read32(base + 0xE4));
126 printk(KERN_EMERG "Reg[E8] SD20_PAD_CTL2 = 0x%.8x", sdr_read32(base + 0xE8));
127 printk(KERN_EMERG "Reg[EC] PAD_TUNE = 0x%.8x", sdr_read32(base + 0xEC));
128 printk(KERN_EMERG "Reg[F0] DAT_RD_DLY0 = 0x%.8x", sdr_read32(base + 0xF0));
129 printk(KERN_EMERG "Reg[F4] DAT_RD_DLY1 = 0x%.8x", sdr_read32(base + 0xF4));
130 printk(KERN_EMERG "Reg[F8] HW_DBG_SEL = 0x%.8x", sdr_read32(base + 0xF8));
131 printk(KERN_EMERG "Rg[100] MAIN_VER = 0x%.8x", sdr_read32(base + 0x100));
132 printk(KERN_EMERG "Rg[104] ECO_VER = 0x%.8x", sdr_read32(base + 0x104));
133 }
134 static void msdc_dump_info(unsigned int id)
135 {
136 if(id == pmsdc_boot_host->id)
137 simp_msdc_dump_register(pmsdc_boot_host);
138 if(id == pmsdc_extend_host->id)
139 simp_msdc_dump_register(pmsdc_extend_host);
140 }
141
142 //#define PERI_MSDC_SRCSEL (0xF100000c)
143 //#define PDN_REG (0xF1000010)
144 static void simp_msdc_config_clksrc(struct simp_msdc_host *host, CLK_SOURCE_T clksrc)
145 {
146 host->clksrc = clksrc;
147 host->clk = clks[clksrc];
148 }
149
150 static void simp_msdc_config_clock(struct simp_msdc_host *host, unsigned int hz) /* no ddr */
151 {
152 // struct msdc_hw *hw = host->priv;
153 u32 base = host->base;
154 u32 mode; /* use divisor or not */
155 u32 div = 0;
156 u32 sclk;
157 u32 hclk = host->clk;
158 u32 orig_clksrc = host->clksrc;
159
160 if (hz >= hclk) {
161 mode = 0x1; /* no divisor */
162 sclk = hclk;
163 } else {
164 mode = 0x0; /* use divisor */
165 if (hz >= (hclk >> 1)) {
166 div = 0; /* mean div = 1/2 */
167 sclk = hclk >> 1; /* sclk = clk / 2 */
168 } else {
169 div = (hclk + ((hz << 2) - 1)) / (hz << 2);
170 sclk = (hclk >> 2) / div;
171 }
172 }
173 host->sclk = sclk;
174 printk(KERN_EMERG "clock<%d>\n",sclk);
175
176 /* set clock mode and divisor */
177 //simp_msdc_config_clksrc(host, MSDC_CLKSRC_NONE);
178
179 /* designer said: best way is wait clk stable while modify clk config bit */
180 sdr_set_field(MSDC_CFG, MSDC_CFG_CKMOD|MSDC_CFG_CKDIV,(mode << 8)|(div % 0xff));
181
182 simp_msdc_config_clksrc(host, orig_clksrc);
183
184 /* wait clock stable */
185 while (!(sdr_read32(MSDC_CFG) & MSDC_CFG_CKSTB));
186 }
187
188 static void msdc_set_timeout(struct simp_msdc_host *host, u32 ns, u32 clks)
189 {
190 u32 base = host->base;
191 u32 timeout, clk_ns;
192
193 clk_ns = 1000000000UL / host->sclk;
194 timeout = ns / clk_ns + clks;
195 timeout = timeout >> 20; /* in 2^20 sclk cycle unit */
196 timeout = timeout > 1 ? timeout - 1 : 0;
197 timeout = timeout > 255 ? 255 : timeout;
198
199 sdr_set_field(SDC_CFG, SDC_CFG_DTOC, timeout);
200 }
201
202 static unsigned int simp_msdc_ldo_power(unsigned int on, MT65XX_POWER powerId, MT65XX_POWER_VOLTAGE powerVolt)
203 {
204 /* Fixme: must realize access register directly */
205 if(on)
206 hwPowerOn(powerId, powerVolt, "msdc");
207 else
208 hwPowerDown(powerId, "msdc");
209 return SIMP_SUCCESS;
210 }
211
212 static unsigned int simp_mmc_power_up(struct simp_mmc_host *host,bool on)
213 {
214 switch(host->mtk_host->id){
215 case 0:
216 /* for emmc, host0 and host4 are mutually exclusive for emmc card */
217 simp_msdc_ldo_power(on, MT6323_POWER_LDO_VEMC_3V3, VOL_3300);
218 break;
219 case 1:
220 /* for sd, makesure msdc host volt is the same as mt6589 IP internal LDO volt */
221 simp_msdc_ldo_power(on, MT6323_POWER_LDO_VMC, VOL_3300);
222 simp_msdc_ldo_power(on, MT6323_POWER_LDO_VMCH, VOL_3300);
223 break;
224 default:
225 break;
226 }
227
228 return SIMP_SUCCESS;
229 }
230
231 /* do not change to 1.8v, so cmd11 not used */
232 static unsigned int simp_mmc_set_signal_voltage(struct simp_mmc_host *host, int volt, bool cmd11)
233 {
234 /* set mmc card voltage */
235
236 return SIMP_SUCCESS;
237 }
238
239 #define clk_readl(addr) \
240 DRV_Reg32(addr)
241
242 #define clk_setl(addr, val) \
243 mt65xx_reg_sync_writel(clk_readl(addr) | (val), addr)
244
245 #define clk_clrl(addr, val) \
246 mt65xx_reg_sync_writel(clk_readl(addr) & ~(val), addr)
247
248 static unsigned int simp_mmc_enable_clk(struct simp_mmc_host *host)
249 {
250 /* step1: open pll */
251 clk_setl(0xF020924C, 0x1);
252 mdelay(1);
253
254 clk_clrl(0xF020924C, 0x2);
255 clk_setl(0xF0209240, 0x1);
256 mdelay(1);
257 printk(KERN_EMERG "[pll]0xF020924C = 0x%x\n", sdr_read32(0xF020924C));
258 printk(KERN_EMERG "[pll]0xF0209240 = 0x%x\n", sdr_read32(0xF0209240));
259
260 /* step2: enable mux */
261 clk_clrl(0xF0000060, 0x80000000);
262 clk_clrl(0xF0000070, 0x80);
263 printk(KERN_EMERG "[mux] 0xF0000060 = 0x%x\n", sdr_read32(0xF0000060));
264 printk(KERN_EMERG "[mux] 0xF0000070 = 0x%x\n", sdr_read32(0xF0000070));
265
266 /* step3: enable clock */
267 clk_setl(0xF0003010, 0x3000);
268 printk(KERN_EMERG "[clk] 0xF0003010 = 0x%x\n", sdr_read32(0xF0003010));
269 printk(KERN_EMERG "[clk] 0xF0003018 = 0x%x\n", sdr_read32(0xF0003018));
270
271 return SIMP_SUCCESS;
272 }
273
274
275 static unsigned int simp_mmc_hw_reset_for_init(struct simp_mmc_host *host)
276 {
277 unsigned int base;
278
279 base = host->mtk_host->base;
280 if (0 == host->mtk_host->id){
281 /* check emmc card support HW Rst_n yes or not is the good way.
282 * but if the card not support it , here just failed.
283 * if the card support it, Rst_n function enable under DA driver,
284 * pls see SDMMC_Download_BL_PostProcess_Internal() */
285 /* 1ms pluse to trigger emmc enter pre-idle state */
286 sdr_set_bits(EMMC_IOCON, EMMC_IOCON_BOOTRST);
287 mdelay(1);
288 sdr_clr_bits(EMMC_IOCON, EMMC_IOCON_BOOTRST);
289
290 /* clock is need after Rst_n pull high, and the card need
291 * clock to calculate time for tRSCA, tRSTH */
292 sdr_set_bits(MSDC_CFG, MSDC_CFG_CKPDN);
293 mdelay(1);
294
295 /* not to close, enable clock free run under mt_dump */
296 //sdr_clr_bits(MSDC_CFG, MSDC_CFG_CKPDNT);
297 }
298
299 return SIMP_SUCCESS;
300 }
301
302 #if 0
303 enum {
304 RESP_NONE = 0,
305 RESP_R1 = 1,
306 RESP_R2 = 2,
307 RESP_R3 = 3,
308 RESP_R4 = 4,
309 RESP_R5 = 5,
310 RESP_R6 = 6,
311 RESP_R7 = 7,
312 RESP_R1B = 8
313 };
314 #endif
315
316 static int msdc_rsp[] = {
317 0, /* RESP_NONE */
318 1, /* RESP_R1 */
319 2, /* RESP_R2 */
320 3, /* RESP_R3 */
321 4, /* RESP_R4 */
322 1, /* RESP_R5 */
323 1, /* RESP_R6 */
324 1, /* RESP_R7 */
325 7, /* RESP_R1b */
326 };
327
328 #define msdc_retry(expr, retry, cnt,id) \
329 do { \
330 int backup = cnt; \
331 while (retry) { \
332 if (!(expr)) break; \
333 if (cnt-- == 0) { \
334 retry--; mdelay(1); cnt = backup; \
335 } \
336 } \
337 if (retry == 0) { \
338 msdc_dump_info(id); \
339 } \
340 WARN_ON(retry == 0); \
341 } while(0)
342
343 #define msdc_reset(id) \
344 do { \
345 int retry = 3, cnt = 1000; \
346 sdr_set_bits(MSDC_CFG, MSDC_CFG_RST); \
347 mb(); \
348 msdc_retry(sdr_read32(MSDC_CFG) & MSDC_CFG_RST, retry, cnt, id); \
349 } while(0)
350
351 #define msdc_clr_int() \
352 do { \
353 volatile u32 val = sdr_read32(MSDC_INT); \
354 sdr_write32(MSDC_INT, val); \
355 } while(0)
356
357 #define msdc_clr_fifo(id) \
358 do { \
359 int retry = 3, cnt = 1000; \
360 sdr_set_bits(MSDC_FIFOCS, MSDC_FIFOCS_CLR); \
361 msdc_retry(sdr_read32(MSDC_FIFOCS) & MSDC_FIFOCS_CLR, retry, cnt, id); \
362 } while(0)
363
364 #define msdc_reset_hw(id) \
365 msdc_reset(id); \
366 msdc_clr_fifo(id); \
367 msdc_clr_int();
368
369 static unsigned int simp_msdc_init(struct simp_mmc_host *mmc_host)
370 {
371 unsigned int ret = 0;
372 unsigned int base;
373 struct simp_msdc_host *host = mmc_host->mtk_host;
374
375 //struct msdc_hw *hw;
376 /* Todo1: struct msdc_hw in board.c */
377
378 base = host->base;
379
380 /* set to SD/MMC mode, the first step while operation msdc */
381 sdr_set_field(MSDC_CFG, MSDC_CFG_MODE, 1); // MSDC_SDMMC
382
383 /* reset controller */
384 msdc_reset(host->id);
385
386 /* clear FIFO */
387 msdc_clr_fifo(host->id);
388
389 /* Disable & Clear all interrupts */
390 msdc_clr_int();
391 sdr_write32(MSDC_INTEN, 0);
392
393 /* reset tuning parameter */
394 //sdr_write32(MSDC_PAD_CTL0, 0x0090000);
395 //sdr_write32(MSDC_PAD_CTL1, 0x00A0000);
396 //sdr_write32(MSDC_PAD_CTL2, 0x00A0000);
397 sdr_write32(MSDC_PAD_TUNE, 0x00000000);
398 sdr_write32(MSDC_DAT_RDDLY0, 0x00000000);
399 sdr_write32(MSDC_DAT_RDDLY1, 0x00000000);
400 sdr_write32(MSDC_IOCON, 0x00000000);
401 sdr_write32(MSDC_PATCH_BIT, 0x003C000F);
402
403 /* PIO mode */
404 sdr_set_bits(MSDC_CFG, MSDC_CFG_PIO);
405
406 /* sdio + inswkup*/
407 sdr_set_bits(SDC_CFG, SDC_CFG_SDIO);
408 sdr_set_bits(SDC_CFG, SDC_CFG_INSWKUP);
409
410 switch (host->id) {
411 case 0:
412 sdr_set_field(MSDC0_GPIO_CLK_BASE, GPIO_SMT_MASK, 1);
413 sdr_set_field(MSDC0_GPIO_CMD_BASE, GPIO_SMT_MASK, 1);
414 sdr_set_field(MSDC0_GPIO_DAT_BASE, GPIO_SMT_MASK, 1);
415 break;
416 case 1:
417 sdr_set_field(MSDC1_GPIO_CLK_BASE, GPIO_SMT_MASK, 1);
418 sdr_set_field(MSDC1_GPIO_CMD_BASE, GPIO_SMT_MASK, 1);
419 sdr_set_field(MSDC1_GPIO_DAT_BASE, GPIO_SMT_MASK, 1);
420 break;
421 default:
422 break;
423 }
424
425 switch (host->id) {
426 case 0:
427 sdr_set_field(MSDC0_GPIO_CLK_BASE, GPIO_MSDC0_DRVN, 5); /* feifei.wang -- not use hardcode here */
428 sdr_set_field(MSDC0_GPIO_CMD_BASE, GPIO_MSDC0_DRVN, 5);
429 sdr_set_field(MSDC0_GPIO_DAT_BASE, GPIO_MSDC0_DRVN, 5);
430 break;
431 case 1:
432 sdr_set_field(MSDC1_GPIO_CLK_BASE, GPIO_MSDC1_MSDC2_DRVN, 5); /* feifei.wang -- not use hardcode here */
433 sdr_set_field(MSDC1_GPIO_CMD_BASE, GPIO_MSDC1_MSDC2_DRVN, 5);
434 sdr_set_field(MSDC1_GPIO_DAT_BASE, GPIO_MSDC1_MSDC2_DRVN, 5);
435 break;
436 default:
437 break;
438 }
439
440 /* set sampling edge */
441 sdr_set_field(MSDC_IOCON, MSDC_IOCON_RSPL, 0); // rising: 0
442 sdr_set_field(MSDC_IOCON, MSDC_IOCON_DSPL, 0);
443
444 /* write crc timeout detection */
445 sdr_set_field(MSDC_PATCH_BIT, 1 << 30, 1);
446
447 /* Clock source select*/
448 simp_msdc_config_clksrc(host, host->clksrc);
449
450 /* Bus width to 1 bit*/
451 sdr_set_field(SDC_CFG, SDC_CFG_BUSWIDTH, 0);
452
453 /* make sure the clock is 260K */
454 simp_msdc_config_clock(host, MIN_SCLK);
455
456 /* Set Timeout 100ms*/
457 msdc_set_timeout(host, 100000000, 0);
458
459 sdr_clr_bits(MSDC_PS, MSDC_PS_CDEN);
460
461 /* detect card */
462 /* need to check card is insert [Fix me] */
463
464 /* check write protection [Fix me] */
465
466 #if 0
467 /* simple test for clk output */
468 sdr_write32(MSDC_PATCH_BIT, 0xF3F);
469 sdr_write32(MSDC_CFG, 0x10001013);
470 sdr_write32(SDC_CFG, 0x0);
471 sdr_write32(SDC_CMD, 0x0);
472 sdr_write32(SDC_ARG, 0x0);
473
474 /* dump register for debug */
475 simp_msdc_dump_register(host);
476 #endif
477
478
479 return ret;
480 }
481
482
483 static void simp_mmc_set_bus_mode(struct simp_mmc_host *host, unsigned int mode)
484 {
485 /* mtk: msdc not support to modify bus mode */
486
487 }
488
489 //=======================something for msdc cmd/data
490 #define CMD_WAIT_RETRY (0x8FFFFFFF)
491 #define sdc_is_busy() (sdr_read32(SDC_STS) & SDC_STS_SDCBUSY)
492 #define sdc_is_cmd_busy() (sdr_read32(SDC_STS) & SDC_STS_CMDBUSY)
493
494 #define sdc_send_cmd(cmd,arg) \
495 do { \
496 sdr_write32(SDC_ARG, (arg)); \
497 sdr_write32(SDC_CMD, (cmd)); \
498 } while(0)
499
500 int simp_offset = 0;
501 u8 simp_ext_csd[512];
502 static int simp_msdc_cmd(struct simp_msdc_host *host, unsigned int cmd, unsigned int raw,
503 unsigned int arg, int rsptyp, unsigned int *resp)
504 {
505 int retry = CMD_WAIT_RETRY;
506 unsigned int base = host->base;
507 unsigned int error = 0 ;
508 unsigned int intsts = 0;
509 unsigned int cmdsts = MSDC_INT_CMDRDY | MSDC_INT_CMDTMO | MSDC_INT_RSPCRCERR;
510
511 /* wait before send command */
512 if (cmd == CMD13) {
513 while (retry--) {
514 if (!sdc_is_cmd_busy())
515 break;
516 }
517 if (retry == 0) {
518 error = 1;
519 goto end;
520 }
521 } else {
522 while (retry--) {
523 if (!sdc_is_busy())
524 break;
525 }
526 if (retry == 0) {
527 error = 1;
528 goto end;
529 }
530 }
531
532 if ((CMD17 == cmd || CMD18 == cmd ||
533 CMD24 == cmd || CMD25 == cmd) && (host->card->type == MMC_TYPE_MMC))
534 arg += simp_offset;
535
536 sdc_send_cmd(raw, arg);
537
538 /* polling to check the interrupt */
539 retry = CMD_WAIT_RETRY;
540 while( (intsts & cmdsts) == 0) {
541 intsts = sdr_read32(MSDC_INT);
542 retry--;
543 if (retry == 0) {
544 error = 1;
545 goto end;
546 }
547 }
548
549 intsts &= cmdsts ;
550 sdr_write32(MSDC_INT, intsts); /* clear interrupts */
551
552 if (intsts & MSDC_INT_CMDRDY) {
553 #if MTK_MMC_DUMP_DBG
554 printk(KERN_EMERG "msdc cmd<%d> arg<0x%x> Ready \r\n", cmd,arg);
555 #endif
556 /* get the response */
557 switch (rsptyp) {
558 case RESP_NONE:
559 break;
560 case RESP_R2:
561 *resp++ = sdr_read32(SDC_RESP3);
562 *resp++ = sdr_read32(SDC_RESP2);
563 *resp++ = sdr_read32(SDC_RESP1);
564 *resp = sdr_read32(SDC_RESP0);
565 break;
566 default: /* Response types 1, 3, 4, 5, 6, 7(1b) */
567 *resp = sdr_read32(SDC_RESP0);
568 }
569 } else {
570 printk(KERN_EMERG "msdc cmd<%d> arg<0x%x> error(0x%x)\n", cmd,arg,intsts);
571 error = 1;
572 goto end;
573 }
574
575 if (rsptyp == RESP_R1B) {
576 while ((sdr_read32(MSDC_PS) & MSDC_PS_DAT0) != MSDC_PS_DAT0);
577 #if MTK_MMC_DUMP_DBG
578 printk(KERN_EMERG "msdc cmd<%d> done \r\n", cmd);
579 #endif
580 }
581
582 end:
583 return error;
584 }
585
586 //=======================
587
588 static int simp_mmc_go_idle(struct simp_mmc_host *host)
589 {
590 int err = 0;
591 unsigned int resp = 0;
592 struct simp_msdc_host *phost = host->mtk_host;
593
594 printk(KERN_EMERG "send cmd0========\n");
595 err = simp_msdc_cmd(phost, CMD0, CMD0_RAW, CMD0_ARG, RESP_NONE, &resp);
596 if (err){
597 printk(KERN_EMERG "cmd0: error(0x%d)\n", err);
598 }
599
600 return err;
601 }
602
603 static int simp_mmc_send_op_cond(struct simp_mmc_host *host, unsigned int ocr, unsigned int *rocr)
604 {
605 int err = 0, i;
606 unsigned int resp = 0;
607 struct simp_msdc_host *phost = host->mtk_host;
608
609 for (i = 100; i; i--) {
610 err = simp_msdc_cmd(phost, CMD1, CMD1_RAW, ocr, RESP_R3, &resp);
611 if (err){
612 printk(KERN_EMERG "cmd1: error(0x%d)\n", err);
613 break;
614 }
615
616 /* if we're just probing, do a single pass */
617 if (ocr == 0)
618 break;
619
620 /* otherwise wait until reset completes */
621 if (resp & MMC_CARD_BUSY)
622 break;
623
624 err = -ETIMEDOUT;
625
626 mdelay(10);
627 }
628
629 if (rocr)
630 *rocr = resp;
631
632 printk(KERN_EMERG "cmd1: resp(0x%x)\n", resp);
633
634 return err;
635 }
636
637 static int simp_mmc_all_send_cid(struct simp_mmc_host *host, unsigned int *cid)
638 {
639 int err = 0;
640 unsigned int resp[4] = {0};
641 struct simp_msdc_host *phost = host->mtk_host;
642
643 err = simp_msdc_cmd(phost, CMD2, CMD2_RAW, 0, RESP_R2, resp);
644 if (err){
645 printk(KERN_EMERG "cmd2: error(0x%d)\n", err);
646 }
647
648 printk(KERN_EMERG "resp: 0x%x 0x%x 0x%x 0x%x\n", resp[0], resp[1], resp[2], resp[3]);
649
650 memcpy(cid, resp, sizeof(u32) * 4);
651
652 return 0;
653 }
654
655 static int simp_mmc_set_relative_addr(struct simp_mmc_card *card)
656 {
657 int err;
658 unsigned int resp;
659 struct simp_msdc_host *phost = card->host->mtk_host;
660
661 err = simp_msdc_cmd(phost, CMD3, CMD3_RAW, card->rca << 16, RESP_R1, &resp);
662 if (err){
663 printk(KERN_EMERG "cmd3: error(0x%d)\n", err);
664 }
665
666 return err;
667 }
668
669 static int simp_mmc_send_csd(struct simp_mmc_card *card, unsigned int *csd)
670 {
671 int err;
672 unsigned int resp[4] = {0};
673 struct simp_msdc_host *phost = card->host->mtk_host;
674
675 err = simp_msdc_cmd(phost, CMD9, CMD9_RAW, card->rca << 16, RESP_R2, resp);
676 if (err){
677 printk(KERN_EMERG "cmd9: error(0x%d)\n", err);
678 }
679
680 memcpy(csd, resp, sizeof(u32) * 4);
681
682 return err;
683 }
684 static const unsigned int tran_exp[] = {
685 10000, 100000, 1000000, 10000000,
686 0, 0, 0, 0
687 };
688
689 static const unsigned char tran_mant[] = {
690 0, 10, 12, 13, 15, 20, 25, 30,
691 35, 40, 45, 50, 55, 60, 70, 80,
692 };
693
694 static const unsigned int tacc_exp[] = {
695 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000,
696 };
697
698 static const unsigned int tacc_mant[] = {
699 0, 10, 12, 13, 15, 20, 25, 30,
700 35, 40, 45, 50, 55, 60, 70, 80,
701 };
702
703 #define UNSTUFF_BITS(resp,start,size) \
704 ({ \
705 const int __size = size; \
706 const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \
707 const int __off = 3 - ((start) / 32); \
708 const int __shft = (start) & 31; \
709 u32 __res; \
710 \
711 __res = resp[__off] >> __shft; \
712 if (__size + __shft > 32) \
713 __res |= resp[__off-1] << ((32 - __shft) % 32); \
714 __res & __mask; \
715 })
716
717
718 static int simp_mmc_decode_csd(struct simp_mmc_card *card)
719 {
720 struct mmc_csd *csd = &card->csd;
721 unsigned int e, m, a, b;
722 u32 *resp = card->raw_csd;
723
724 /*
725 * We only understand CSD structure v1.1 and v1.2.
726 * v1.2 has extra information in bits 15, 11 and 10.
727 * We also support eMMC v4.4 & v4.41.
728 */
729 csd->structure = UNSTUFF_BITS(resp, 126, 2);
730 if (csd->structure == 0) {
731 printk(KERN_EMERG "unrecognised CSD structure version %d\n",
732 csd->structure);
733 return -EINVAL;
734 }
735
736 csd->mmca_vsn = UNSTUFF_BITS(resp, 122, 4);
737 m = UNSTUFF_BITS(resp, 115, 4);
738 e = UNSTUFF_BITS(resp, 112, 3);
739 csd->tacc_ns = (tacc_exp[e] * tacc_mant[m] + 9) / 10;
740 csd->tacc_clks = UNSTUFF_BITS(resp, 104, 8) * 100;
741
742 m = UNSTUFF_BITS(resp, 99, 4);
743 e = UNSTUFF_BITS(resp, 96, 3);
744 csd->max_dtr = tran_exp[e] * tran_mant[m];
745 csd->cmdclass = UNSTUFF_BITS(resp, 84, 12);
746
747 e = UNSTUFF_BITS(resp, 47, 3);
748 m = UNSTUFF_BITS(resp, 62, 12);
749 csd->capacity = (1 + m) << (e + 2);
750
751 csd->read_blkbits = UNSTUFF_BITS(resp, 80, 4);
752 csd->read_partial = UNSTUFF_BITS(resp, 79, 1);
753 csd->write_misalign = UNSTUFF_BITS(resp, 78, 1);
754 csd->read_misalign = UNSTUFF_BITS(resp, 77, 1);
755 csd->r2w_factor = UNSTUFF_BITS(resp, 26, 3);
756 csd->write_blkbits = UNSTUFF_BITS(resp, 22, 4);
757 csd->write_partial = UNSTUFF_BITS(resp, 21, 1);
758
759 if (csd->write_blkbits >= 9) {
760 a = UNSTUFF_BITS(resp, 42, 5);
761 b = UNSTUFF_BITS(resp, 37, 5);
762 csd->erase_size = (a + 1) * (b + 1);
763 csd->erase_size <<= csd->write_blkbits - 9;
764 }
765
766 return 0;
767 }
768
769 static int simp_mmc_select_card(struct simp_mmc_host *host, struct simp_mmc_card *card)
770 {
771 int err;
772 unsigned int resp;
773 struct simp_msdc_host *phost = host->mtk_host;
774
775 err = simp_msdc_cmd(phost, CMD7, CMD7_RAW, card->rca << 16, RESP_R1, &resp);
776 if (err){
777 printk(KERN_EMERG "cmd7: select card error(0x%d)\n", err);
778 }
779
780 return 0;
781 }
782
783 /*
784 * Mask off any voltages we don't support and select
785 * the lowest voltage
786 */
787 static unsigned int simp_mmc_select_voltage(struct simp_mmc_host *host, unsigned int ocr)
788 {
789 #if 0
790
791 int bit;
792
793
794 ocr &= host->ocr_avail;
795
796 bit = ffs(ocr);
797 if (bit) {
798 bit -= 1;
799
800 ocr &= 3 << bit;
801
802 mmc_host_clk_hold(host);
803 host->ios.vdd = bit;
804 mmc_set_ios(host);
805 mmc_host_clk_release(host);
806 } else {
807 pr_warning("%s: host doesn't support card's voltages\n",
808 mmc_hostname(host));
809 ocr = 0;
810 }
811 #endif
812
813 return ocr;
814 }
815 #define EXT_CSD_BOOT_SIZE_MULT 226 /* R */
816 #define EXT_CSD_RPMB_SIZE_MULT 168 /* R */
817 #define EXT_CSD_GP1_SIZE_MULT 143 /* R/W 3 bytes */
818 #define EXT_CSD_GP2_SIZE_MULT 146 /* R/W 3 bytes */
819 #define EXT_CSD_GP3_SIZE_MULT 149 /* R/W 3 bytes */
820 #define EXT_CSD_GP4_SIZE_MULT 152 /* R/W 3 bytes */
821 #define EXT_CSD_PART_CFG 179 /* R/W/E & R/W/E_P */
822 #define EXT_CSD_SEC_CNT 212
823 #define CAPACITY_2G (2 * 1024 * 1024 * 1024ULL)
824 #ifdef CONFIG_MTK_EMMC_SUPPORT
825 /*
826 static u64 simp_msdc_get_user_capacity(struct simp_mmc_card *card)
827 {
828 u64 device_capacity = 0;
829 u32 device_legacy_capacity = 0;
830 if(card->csd.read_blkbits)
831 device_legacy_capacity = card->csd.capacity * (2 << (card->csd.read_blkbits - 1));
832 else{
833 device_legacy_capacity = card->csd.capacity;
834 printk(KERN_EMERG "XXX read_blkbits = 0 XXX\n");
835 }
836 device_capacity = (u64)(card->ext_csd.sectors)* 512 > device_legacy_capacity ? (u64)(card->ext_csd.sectors)* 512 : device_legacy_capacity;
837
838
839 return device_capacity;
840 }
841 */
842 #endif
843
844 static void simp_emmc_cal_offset(struct simp_mmc_card *card)
845 {
846 #ifdef CONFIG_MTK_EMMC_SUPPORT
847 /* u64 device_capacity = 0;
848 simp_offset = MBR_START_ADDRESS_BYTE - (simp_ext_csd[EXT_CSD_BOOT_SIZE_MULT]* 128 * 1024
849 + simp_ext_csd[EXT_CSD_BOOT_SIZE_MULT] * 128 * 1024
850 + simp_ext_csd[EXT_CSD_RPMB_SIZE_MULT] * 128 * 1024
851 + simp_ext_csd[EXT_CSD_GP1_SIZE_MULT + 2] * 256 * 256
852 + simp_ext_csd[EXT_CSD_GP1_SIZE_MULT + 1] * 256
853 + simp_ext_csd[EXT_CSD_GP1_SIZE_MULT + 0]
854 + simp_ext_csd[EXT_CSD_GP2_SIZE_MULT + 2] * 256 * 256
855 + simp_ext_csd[EXT_CSD_GP2_SIZE_MULT + 1] * 256
856 + simp_ext_csd[EXT_CSD_GP2_SIZE_MULT + 0]
857 + simp_ext_csd[EXT_CSD_GP3_SIZE_MULT + 2] * 256 * 256
858 + simp_ext_csd[EXT_CSD_GP3_SIZE_MULT + 1] * 256
859 + simp_ext_csd[EXT_CSD_GP3_SIZE_MULT + 0]
860 + simp_ext_csd[EXT_CSD_GP4_SIZE_MULT + 2] * 256 * 256
861 + simp_ext_csd[EXT_CSD_GP4_SIZE_MULT + 1] * 256
862 + simp_ext_csd[EXT_CSD_GP4_SIZE_MULT + 0]);
863 if(simp_offset < 0){
864 printk(KERN_EMERG "cal offset error(0x%d)\n", simp_offset);
865 }
866 device_capacity = simp_msdc_get_user_capacity(card);
867 if(device_capacity > CAPACITY_2G)
868 simp_offset /= 512;
869 */
870 simp_offset = 0;
871 printk(KERN_EMERG "emmc offset (0x%x)\n", simp_offset);
872
873 #endif /* end of CONFIG_MTK_EMMC_SUPPORT */
874 }
875 static int simp_msdc_pio_read(struct simp_msdc_host *host, unsigned int *ptr, unsigned int size);
876 static void simp_msdc_set_blknum(struct simp_msdc_host *host, unsigned int blknum);
877
878 static int simp_mmc_read_ext_csd(struct simp_mmc_host *host, struct simp_mmc_card *card)
879 {
880 int err = 0;
881 unsigned int resp;
882 struct simp_msdc_host *phost = host->mtk_host;
883 u32 base = phost->base;
884 memset(simp_ext_csd, 0, 512);
885 if (card->csd.mmca_vsn < CSD_SPEC_VER_4) {
886 printk(KERN_EMERG "MSDC MMCA_VSN: %d. Skip EXT_CSD\n", card->csd.mmca_vsn);
887 return 0;
888 }
889 msdc_clr_fifo(host->mtk_host->id);
890 simp_msdc_set_blknum(phost, 1);
891 msdc_set_timeout(phost, 100000000, 0);
892
893 err = simp_msdc_cmd(phost, CMD8, CMD8_RAW_EMMC, 0, RESP_R1, &resp);
894 if (err){
895 printk(KERN_EMERG "cmd8: send cmd to read ext csd error(0x%d)\n", err);
896 goto out;
897 }
898
899 err = simp_msdc_pio_read(phost, (unsigned int *)(simp_ext_csd), 512);
900 if (err){
901 printk(KERN_EMERG "pio read ext csd error(0x%d)\n", err);
902 goto out;
903 }
904
905 out:
906 return err;
907 }
908 static void simp_mmc_decode_ext_csd(struct simp_mmc_card *card)
909 {
910 card->ext_csd.sectors =
911 simp_ext_csd[EXT_CSD_SEC_CNT + 0] << 0 |
912 simp_ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
913 simp_ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
914 simp_ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
915 return;
916 }
917
918 static int simp_emmc_switch_bus(struct simp_mmc_host *host,struct simp_mmc_card *card)
919 {
920 struct simp_msdc_host *phost = host->mtk_host;
921 unsigned int resp;
922 return simp_msdc_cmd(phost, ACMD6, ACMD6_RAW_EMMC, ACMD6_ARG_EMMC, RESP_R1B, &resp);
923 }
924 static int simp_mmc_init_card(struct simp_mmc_host *host, unsigned int ocr,
925 struct simp_mmc_card *oldcard)
926 {
927 int err = 0;
928 unsigned int rocr;
929 unsigned int cid[4];
930 u32 base;
931 struct simp_mmc_card* card = host->card;
932 base = host->mtk_host->base;
933
934 /* Set correct bus mode for MMC before attempting init */
935 simp_mmc_set_bus_mode(host, MMC_BUSMODE_OPENDRAIN); // NULL func now
936
937 /* Initialization should be done at 3.3 V I/O voltage. */
938 simp_mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0); // NULL func now
939
940 /*
941 * Since we're changing the OCR value, we seem to
942 * need to tell some cards to go back to the idle
943 * state. We wait 1ms to give cards time to
944 * respond.
945 * mmc_go_idle is needed for eMMC that are asleep
946 */
947 simp_mmc_go_idle(host);
948
949 /* The extra bit indicates that we support high capacity */
950 err = simp_mmc_send_op_cond(host, ocr | (1 << 30), &rocr);
951 if (err)
952 goto err;
953
954 err = simp_mmc_all_send_cid(host, cid);
955 if (err)
956 goto err;
957
958 card->type = MMC_TYPE_MMC;
959 card->rca = 1;
960 host->mtk_host->card->rca = 1;
961 memcpy(card->raw_cid, cid, sizeof(card->raw_cid));
962
963 /*
964 * For native busses: set card RCA and quit open drain mode.
965 */
966 err = simp_mmc_set_relative_addr(card);
967 if (err)
968 goto err;
969
970 simp_mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
971
972 /*
973 * Fetch CSD from card.
974 */
975 err = simp_mmc_send_csd(card, card->raw_csd);
976 if (err)
977 goto err;
978
979 err = simp_mmc_decode_csd(card);
980 if (err)
981 goto err;
982
983 #if 0
984 err = mmc_decode_csd(card);
985 if (err)
986 goto err;
987 err = mmc_decode_cid(card);
988 if (err)
989 goto err;
990 #endif
991
992 err = simp_mmc_select_card(host, card);
993 if (err)
994 goto err;
995 err = simp_mmc_read_ext_csd(host,card);
996 if (err)
997 goto err;
998 simp_mmc_decode_ext_csd(card);
999 simp_emmc_cal_offset(card);
1000 if(simp_offset < 0)
1001 goto err;
1002 err = simp_emmc_switch_bus(host,card);
1003 sdr_set_field(SDC_CFG, SDC_CFG_BUSWIDTH, 1); /* 1: 4 bits mode */
1004 simp_msdc_config_clock(host->mtk_host, NORMAL_SCLK);
1005 return SIMP_SUCCESS;
1006
1007 err:
1008 return SIMP_FAILED;
1009 }
1010
1011 #define ACMD41_RETRY (20)
1012 static int simp_mmc_sd_init(struct simp_mmc_host *host)
1013 {
1014 struct simp_msdc_host *phost = host->mtk_host;
1015 u32 ACMD41_ARG = 0;
1016 u8 retry;
1017 u32 base;
1018 unsigned int resp = 0;
1019 int bRet = 0;
1020
1021 base = phost->base;
1022 if (simp_msdc_cmd(phost, CMD0, CMD0_RAW, CMD0_ARG, RESP_NONE, &resp)) goto EXIT;
1023
1024 if (simp_msdc_cmd(phost, CMD8, CMD8_RAW, CMD8_ARG, RESP_R7, &resp)){
1025 // SD v1.0 will not repsonse to CMD8, then clr HCS bit
1026 printk("SD v1.0, clr HCS bit\n");
1027 ACMD41_ARG = ACMD41_ARG_10;
1028 } else if (resp == CMD8_ARG) {
1029 printk("SD v2.0, set HCS bit\n");
1030 ACMD41_ARG = ACMD41_ARG_20;
1031 }
1032
1033
1034 retry = ACMD41_RETRY;
1035 while (retry--) {
1036 if (simp_msdc_cmd(phost, CMD55, CMD55_RAW, CMD55_ARG << 16, RESP_R1, &resp)) goto EXIT;
1037 if (simp_msdc_cmd(phost, ACMD41, ACMD41_RAW, ACMD41_ARG, RESP_R3, &resp)) goto EXIT;
1038 if (resp & R3_OCR_POWER_UP_BIT) {
1039 phost->card->card_cap = ((resp & R3_OCR_CARD_CAPACITY_BIT) ? high_capacity : standard_capacity);
1040 if(phost->card->card_cap == standard_capacity){
1041 printk("just standard_capacity card!!\r\n");
1042 }
1043 break;
1044 }
1045 mdelay(1000 / ACMD41_RETRY);
1046 }
1047
1048 if (simp_msdc_cmd(phost, CMD2, CMD2_RAW, CMD2_ARG, RESP_R2, &resp)) goto EXIT;
1049
1050 if (simp_msdc_cmd(phost, CMD3, CMD3_RAW, CMD3_ARG, RESP_R6, &resp)) goto EXIT;
1051
1052 /* save the rca */
1053 phost->card->rca = (resp & 0xffff0000) >> 16; /* RCA[31:16]*/
1054
1055 if (simp_msdc_cmd(phost, CMD9, CMD9_RAW, CMD9_ARG << 16, RESP_R2, &resp)) goto EXIT;
1056
1057 if (simp_msdc_cmd(phost, CMD13, CMD13_RAW, CMD13_ARG << 16, RESP_R1, &resp)) goto EXIT;
1058
1059 //printk(KERN_EMERG "cmd7 raw: 0x%x, cmd 7 arg: 0x%x, reps type: 0x%x\n", CMD7_RAW, CMD7_ARG, RESP_R1);
1060 if (simp_msdc_cmd(phost, CMD7, CMD7_RAW, CMD7_ARG << 16, RESP_R1, &resp)) goto EXIT;
1061
1062 /* dump register for debug */
1063 //simp_msdc_dump_register(phost);
1064
1065 mdelay(10);
1066
1067 if (simp_msdc_cmd(phost, CMD55, CMD55_RAW, CMD55_ARG << 16, RESP_R1, &resp)) goto EXIT;
1068
1069 if (simp_msdc_cmd(phost, ACMD42, ACMD42_RAW, ACMD42_ARG, RESP_R1, &resp)) goto EXIT;
1070
1071 if (simp_msdc_cmd(phost, CMD55, CMD55_RAW, CMD55_ARG << 16, RESP_R1, &resp)) goto EXIT;
1072
1073 if (simp_msdc_cmd(phost, ACMD6, ACMD6_RAW, ACMD6_ARG, RESP_R1, &resp)) goto EXIT;
1074
1075 /* set host bus width to 4 */
1076 sdr_set_field(SDC_CFG, SDC_CFG_BUSWIDTH, 1); /* 1: 4 bits mode */
1077 simp_msdc_config_clock(phost, NORMAL_SCLK);
1078
1079 printk(KERN_EMERG "sd card inited\n");
1080
1081 bRet = 1;
1082
1083 EXIT:
1084 return bRet;
1085 }
1086
1087
1088 static unsigned int simple_mmc_attach_sd(struct simp_mmc_host *host)
1089 {
1090 //int err = SIMP_FAILED;
1091
1092 /* power up host */
1093 simp_mmc_power_up(host,0);
1094 mdelay(20);
1095 simp_mmc_power_up(host,1);
1096
1097 /* enable clock */
1098 simp_mmc_enable_clk(host);
1099
1100 /*
1101 * Some eMMCs (with VCCQ always on) may not be reset after power up, so
1102 * do a hardware reset if possible.
1103 */
1104 simp_mmc_hw_reset_for_init(host);
1105
1106 /* power up card: Initialization should be done at 3.3 V I/O voltage. */
1107 simp_mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0);
1108
1109 /* init msdc host */
1110 simp_msdc_init(host);
1111
1112 simp_mmc_sd_init(host);
1113
1114 return SIMP_SUCCESS;
1115 }
1116
1117 /* make clk & power always on */
1118 static unsigned int simple_mmc_attach_mmc(struct simp_mmc_host *host)
1119 {
1120 int err = 0;
1121 unsigned int ocr;
1122
1123 /* power up host */
1124 simp_mmc_power_up(host,0);
1125 mdelay(20);
1126 simp_mmc_power_up(host,1);
1127
1128 /*
1129 * Some eMMCs (with VCCQ always on) may not be reset after power up, so
1130 * do a hardware reset if possible.
1131 */
1132 simp_mmc_hw_reset_for_init(host);
1133
1134 /* power up card: Initialization should be done at 3.3 V I/O voltage. */
1135 simp_mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0);
1136
1137 /* enable clock */
1138 simp_mmc_enable_clk(host);
1139
1140 /* init msdc host */
1141 simp_msdc_init(host);
1142
1143 /*=================== begin to init emmc card =======================*/
1144
1145 /* Set correct bus mode for MMC before attempting attach */
1146 simp_mmc_set_bus_mode(host, MMC_BUSMODE_OPENDRAIN);
1147
1148 simp_mmc_go_idle(host);
1149
1150 err = simp_mmc_send_op_cond(host, 0, &ocr);
1151
1152 //=========ok
1153
1154 /*
1155 * Sanity check the voltages that the card claims to
1156 * support.
1157 */
1158 if (ocr & 0x7F) {
1159 printk(KERN_EMERG "msdc0: card claims to support voltages "
1160 "below the defined range. These will be ignored.\n");
1161 ocr &= ~0x7F;
1162 }
1163
1164 host->ocr = simp_mmc_select_voltage(host, ocr);
1165
1166 /*
1167 * Can we support the voltage of the card?
1168 */
1169 if (!host->ocr) {
1170 printk(KERN_EMERG "msdc0: card voltage not support\n");
1171 err = -EINVAL;
1172 goto err;
1173 }
1174
1175 /*
1176 * Detect and init the card.
1177 */
1178 err = simp_mmc_init_card(host, host->ocr, NULL);
1179 if (err == SIMP_FAILED){
1180 printk(KERN_EMERG "init eMMC failed\n");
1181 goto err;
1182 }
1183 printk(KERN_EMERG "init eMMC success\n");
1184
1185 /*=================== end mmc card init =============================*/
1186 return SIMP_SUCCESS;
1187 err:
1188 return SIMP_FAILED;
1189 }
1190
1191 static const unsigned g_freqs[] = {300000, 260000, 200000, 100000};
1192 #define HOST_MIN_MCLK (260000)
1193
1194 static int emmc_init = 0;
1195 static int sd_init = 0;
1196 /* not use freq para */
1197 static unsigned int simp_mmc_rescan_try_freq(struct simp_mmc_host *host, unsigned freq)
1198 {
1199 int err = SIMP_FAILED;
1200
1201 /* sd/emmc will support */
1202 if (host->mtk_host->card->type == MMC_TYPE_MMC){
1203 #if MTK_MMC_DUMP_DBG
1204 printk(KERN_EMERG "init emmc for ipanic dump\n");
1205 #endif
1206 err = simple_mmc_attach_mmc(host);
1207 } else if(host->mtk_host->card->type == MMC_TYPE_SD){
1208 #if MTK_MMC_DUMP_DBG
1209 printk(KERN_EMERG "init sd card\n");
1210 #endif
1211 err = simple_mmc_attach_sd(host);
1212 }
1213
1214 return err;
1215 }
1216
1217 static unsigned int simp_init_emmc(void){
1218 int i = 0;
1219 int ret = 0;
1220
1221 for (i = 0; i < ARRAY_SIZE(g_freqs); i++) {
1222 if (SIMP_SUCCESS == simp_mmc_rescan_try_freq(pmmc_boot_host, (unsigned)max(g_freqs[i], (unsigned)HOST_MIN_MCLK))) {
1223 break;
1224 }
1225 if (g_freqs[i] <= HOST_MIN_MCLK){
1226 printk(KERN_EMERG "failed to init eMMC, line:%d\n", __LINE__);
1227 ret = 1;
1228 }
1229 }
1230
1231 if(0 == ret)
1232 emmc_init = 1;
1233 return ret;
1234 }
1235
1236 static unsigned int simp_init_sd(void){
1237 int i = 0;
1238 int ret = 0;
1239
1240 for (i = 0; i < ARRAY_SIZE(g_freqs); i++) {
1241 if (SIMP_SUCCESS == simp_mmc_rescan_try_freq(pmmc_extend_host, (unsigned)max(g_freqs[i], (unsigned)HOST_MIN_MCLK))) {
1242 break;
1243 }
1244 if (g_freqs[i] <= HOST_MIN_MCLK){
1245 printk(KERN_EMERG "failed to init eMMC, line:%d\n", __LINE__);
1246 ret = 1;
1247 }
1248 }
1249
1250 if(0 == ret)
1251 sd_init = 1;
1252 return ret;
1253 }
1254 unsigned int reset_boot_up_device(int type){
1255 int ret = 0;
1256
1257 if(type == MMC_TYPE_MMC)
1258 ret = simp_init_emmc();
1259 else if(type == MMC_TYPE_SD)
1260 ret = simp_init_sd();
1261 else{
1262 printk(KERN_EMERG "invalide card type: %d\n", type);
1263 ret = 1;
1264 }
1265
1266 return ret;
1267 }
1268 EXPORT_SYMBOL(reset_boot_up_device);
1269 #define MSDC_FIFO_SZ (128)
1270 #define MSDC_FIFO_THD (64) // (128)
1271 #define msdc_txfifocnt() ((sdr_read32(MSDC_FIFOCS) & MSDC_FIFOCS_TXCNT) >> 16)
1272 #define msdc_rxfifocnt() ((sdr_read32(MSDC_FIFOCS) & MSDC_FIFOCS_RXCNT) >> 0)
1273 #define msdc_fifo_write32(v) sdr_write32(MSDC_TXDATA, (v))
1274 #define msdc_fifo_read32() sdr_read32(MSDC_RXDATA)
1275 static int simp_msdc_pio_write(struct simp_msdc_host *host, unsigned int *ptr, unsigned int size)
1276 {
1277 unsigned int base = host->base;
1278 unsigned int left = size;
1279 unsigned int status = 0;
1280 int err = 0;
1281 while(1){
1282 status = sdr_read32(MSDC_INT);
1283 sdr_write32(MSDC_INT,status);
1284 if (status & MSDC_INT_DATCRCERR) {
1285 printk(KERN_ERR "[MSDC%d] DAT CRC error (0x%x), Left DAT: %d bytes\n",
1286 host->id, status, left);
1287 err = -5;
1288 simp_msdc_dump_register(host);
1289 break;
1290 } else if (status & MSDC_INT_DATTMO) {
1291 printk("[MSDC%d] DAT TMO error (0x%x), Left DAT: %d bytes\n",
1292 host->id, status, left);
1293 err = -110;
1294 simp_msdc_dump_register(host);
1295 break;
1296 }
1297 else if(status & MSDC_INT_XFER_COMPL){
1298 break;
1299 }
1300 if(left == 0)
1301 continue;
1302 if ((left >= MSDC_FIFO_SZ) && (msdc_txfifocnt() == 0)) {
1303 int count = MSDC_FIFO_SZ >> 2;
1304 do {
1305 msdc_fifo_write32(*ptr); ptr++;
1306 } while (--count);
1307 left -= MSDC_FIFO_SZ;
1308 } else if (left < MSDC_FIFO_SZ && msdc_txfifocnt() == 0) {
1309 while (left) {
1310 msdc_fifo_write32(*ptr); ptr++;
1311 left -= 4;
1312 }
1313 }
1314 }
1315 return 0;
1316 }
1317
1318 static int simp_msdc_pio_read(struct simp_msdc_host *host, unsigned int *ptr, unsigned int size)
1319 {
1320 unsigned int base = host->base;
1321 unsigned int left = size;
1322 unsigned int status = 0;
1323 int err = 0;
1324 while(1){
1325 status = sdr_read32(MSDC_INT);
1326 sdr_write32(MSDC_INT,status);
1327 if (status & MSDC_INT_DATCRCERR) {
1328 printk(KERN_ERR "[MSDC%d] DAT CRC error (0x%x), Left DAT: %d bytes\n",
1329 host->id, status, left);
1330 err = -5;
1331 simp_msdc_dump_register(host);
1332 break;
1333 } else if (status & MSDC_INT_DATTMO) {
1334 printk("[MSDC%d] DAT TMO error (0x%x), Left DAT: %d bytes\n",
1335 host->id, status, left);
1336 simp_msdc_dump_register(host);
1337 err = -110;
1338 break;
1339 }
1340 else if(status & MSDC_INT_XFER_COMPL){
1341 break;
1342 }
1343 if(left == 0)
1344 continue;
1345 while (left) {
1346 //printk(KERN_EMERG "left(%d)/FIFO(%d)\n", left,msdc_rxfifocnt());
1347 if ((left >= MSDC_FIFO_THD) && (msdc_rxfifocnt() >= MSDC_FIFO_THD)) {
1348 int count = MSDC_FIFO_THD >> 2;
1349 do {
1350 *ptr++ = msdc_fifo_read32();
1351 } while (--count);
1352 left -= MSDC_FIFO_THD;
1353 } else if ((left < MSDC_FIFO_THD) && msdc_rxfifocnt() >= left) {
1354 while (left) {
1355 *ptr++ = msdc_fifo_read32();
1356 left -= 4;
1357 }
1358 }
1359 }
1360 }
1361 return 0;
1362 }
1363
1364 static void simp_msdc_set_blknum(struct simp_msdc_host *host, unsigned int blknum)
1365 {
1366 unsigned int base = host->base;
1367 sdr_write32(SDC_BLK_NUM, blknum);
1368 }
1369 static unsigned int simp_mmc_get_status(struct simp_mmc_host *host, unsigned int* status)
1370 {
1371 unsigned int resp = 0;
1372 unsigned int err = 0;
1373 struct simp_msdc_host *phost = host->mtk_host;
1374
1375 err = simp_msdc_cmd(phost, CMD13, CMD13_RAW, phost->card->rca << 16, RESP_R1, &resp);
1376 if (err){
1377 printk(KERN_EMERG "cmd13: error(0x%d)\n", err);
1378 }
1379
1380 *status = resp;
1381
1382 return err;
1383 }
1384
1385 static int simp_mmc_single_write(struct simp_mmc_host *host, unsigned int addr, void* buf, unsigned int size)
1386 {
1387 unsigned int resp = 0;
1388 unsigned int err = 0;
1389 //unsigned int intsts = 0;
1390 struct simp_msdc_host *phost = host->mtk_host;
1391 unsigned int base = phost->base;
1392
1393 if (size != 512){
1394 printk(KERN_EMERG "emmc: write para error!\n");
1395 return -1;
1396 }
1397
1398 simp_msdc_set_blknum(phost, 1);
1399
1400 /* send command */
1401 err = simp_msdc_cmd(phost, CMD24, CMD24_RAW, addr, RESP_R1, &resp);
1402 if (err){
1403 printk(KERN_EMERG "cmd24: error(%d)\n", err);
1404 }
1405
1406 /* write the data to FIFO */
1407 err = simp_msdc_pio_write(phost, (unsigned int *)buf, 512);
1408 if (err){
1409 printk(KERN_EMERG "write data: error(%d)\n", err);
1410 }
1411
1412 /* make sure contents in fifo flushed to device */
1413 BUG_ON(msdc_txfifocnt());
1414
1415 /* check and clear interrupt */
1416 //while( (intsts & MSDC_INT_XFER_COMPL) == 0 ){
1417 // intsts = sdr_read32(MSDC_INT);
1418 //}
1419 //sdr_set_bits(MSDC_INT, MSDC_INT_XFER_COMPL);
1420
1421 return err;
1422 }
1423
1424 static int simp_mmc_single_read(struct simp_mmc_host *host, unsigned int addr, void* buf, unsigned int size)
1425 {
1426 unsigned int resp = 0;
1427 unsigned int err = 0;
1428 //unsigned int intsts = 0;
1429 struct simp_msdc_host *phost = host->mtk_host;
1430 //unsigned int base = phost->base;
1431
1432 if (size != 512){
1433 printk(KERN_EMERG "emmc: read para error!\n");
1434 return -1;
1435 }
1436
1437 simp_msdc_set_blknum(phost, 1);
1438
1439 /* send command */
1440 err = simp_msdc_cmd(phost, CMD17, CMD17_RAW, addr, RESP_R1, &resp);
1441 if (err){
1442 printk(KERN_EMERG "cmd17: error(0x%d)\n", err);
1443 }
1444
1445 /* read the data out*/
1446 err = simp_msdc_pio_read(phost, (unsigned int *)buf, 512);
1447 if (err){
1448 printk(KERN_EMERG "read data: error(%d)\n", err);
1449 }
1450 /* check and clear interrupt */
1451 // while( (intsts & MSDC_INT_XFER_COMPL) == 0 ){
1452 // intsts = sdr_read32(MSDC_INT);
1453 // }
1454 //sdr_set_bits(MSDC_INT, MSDC_INT_XFER_COMPL);
1455
1456 return err;
1457 }
1458 static unsigned int simp_mmc_send_stop(struct simp_mmc_host *host)
1459 {
1460 unsigned int resp = 0;
1461 unsigned int err = 0;
1462 struct simp_msdc_host *phost = host->mtk_host;
1463
1464 /* send command */
1465 err = simp_msdc_cmd(phost, CMD12, CMD12_RAW, 0, RESP_R1B, &resp);
1466 if (err){
1467 printk(KERN_EMERG "cmd12: error(0x%d)\n", err);
1468 }
1469
1470 return err;
1471 }
1472
1473 static int simp_mmc_multi_write(struct simp_mmc_host *host, unsigned int addr, void* buf, unsigned int nblk)
1474 {
1475 unsigned int resp = 0;
1476 unsigned int err = 0;
1477 //unsigned int intsts = 0;
1478 struct simp_msdc_host *phost = host->mtk_host;
1479 unsigned int base = phost->base;
1480
1481 simp_msdc_set_blknum(phost, nblk);
1482
1483 /* send command */
1484 err = simp_msdc_cmd(phost, CMD25, CMD25_RAW, addr, RESP_R1, &resp);
1485 if (err){
1486 printk(KERN_EMERG "cmd25: error(0x%d)\n", err);
1487 }
1488
1489 /* write the data to FIFO */
1490 err = simp_msdc_pio_write(phost, (unsigned int *)buf, 512*nblk);
1491 if (err){
1492 printk(KERN_EMERG "write data: error(%d)\n", err);
1493 }
1494
1495 /* make sure contents in fifo flushed to device */
1496 BUG_ON(msdc_txfifocnt());
1497
1498 /* check and clear interrupt */
1499
1500 simp_mmc_send_stop(host);
1501
1502 return err;
1503 }
1504 static int simp_mmc_multi_read(struct simp_mmc_host *host, unsigned int addr, void* buf, unsigned int nblk)
1505 {
1506 unsigned int resp = 0;
1507 unsigned int err = 0;
1508 //unsigned int intsts = 0;
1509 struct simp_msdc_host *phost = host->mtk_host;
1510 //unsigned int base = phost->base;
1511
1512
1513 simp_msdc_set_blknum(phost, nblk);
1514
1515 /* send command */
1516 err = simp_msdc_cmd(phost, CMD18, CMD18_RAW, addr, RESP_R1, &resp);
1517 if (err){
1518 printk(KERN_EMERG "cmd18: error(0x%d)\n", err);
1519 }
1520
1521 /* read the data out*/
1522 err = simp_msdc_pio_read(phost, (unsigned int *)buf, 512*nblk);
1523 if (err){
1524 printk(KERN_EMERG "read data: error(%d)\n", err);
1525 }
1526
1527 simp_mmc_send_stop(host);
1528 return err;
1529 }
1530
1531
1532 /* card_type tell to use which host, will support PANIC dump info to emmc card
1533 * and KDUMP info to sd card */
1534 int msdc_init_panic(int dev)
1535 {
1536 return 1;
1537 }
1538 static int simp_mmc_get_host(int card_type,bool boot)
1539 {
1540 int index = 0;
1541 for(;index < HOST_MAX_NUM;++index){
1542 if(p_msdc_hw[index]){
1543 if((card_type == p_msdc_hw[index]->host_function) && (boot == p_msdc_hw[index]->boot))
1544 return index;
1545 }
1546 }
1547 return HOST_MAX_NUM;
1548
1549 }
1550 static int simp_mmc_init(int card_type,bool boot)
1551 {
1552 struct simp_mmc_host *host;
1553 if(boot){
1554 /* init some struct */
1555 pmmc_boot_host->mtk_host = pmsdc_boot_host;
1556 pmmc_boot_host->card = &g_mmc_card[BOOT_STORAGE_ID];
1557 pmmc_boot_host->card->host = pmmc_boot_host;
1558
1559 host = pmmc_boot_host;
1560
1561 memset(pmmc_boot_host->mtk_host, 0, sizeof(struct simp_msdc_host));
1562 pmmc_boot_host->mtk_host->id = simp_mmc_get_host(card_type,boot);
1563 if(pmmc_boot_host->mtk_host->id >= HOST_MAX_NUM)
1564 return -1;
1565 pmmc_boot_host->mtk_host->base = u_msdc_base[pmmc_boot_host->mtk_host->id];
1566 pmmc_boot_host->mtk_host->clksrc = MSDC_CLKSRC;
1567 pmmc_boot_host->mtk_host->clk = clks[MSDC_CLKSRC];
1568 pmmc_boot_host->mtk_host->card = &g_msdc_card[BOOT_STORAGE_ID];
1569
1570 /* not use now, may be delete */
1571 memset(&g_msdc_card[BOOT_STORAGE_ID], 0, sizeof(struct simp_msdc_card));
1572 g_msdc_card[BOOT_STORAGE_ID].type = MMC_TYPE_MMC;
1573 g_msdc_card[BOOT_STORAGE_ID].file_system = _RAW_;
1574
1575 /* init host & card */
1576
1577 }
1578 else {
1579 pmmc_extend_host->mtk_host = pmsdc_extend_host;
1580 pmmc_extend_host->card = &g_mmc_card[EXTEND_STORAGE_ID];
1581 pmmc_extend_host->card->host = pmmc_extend_host;
1582
1583 host = pmmc_extend_host;
1584
1585 memset(pmmc_extend_host->mtk_host, 0, sizeof(struct simp_msdc_host));
1586 pmmc_extend_host->mtk_host->id = simp_mmc_get_host(card_type,boot);
1587 if(pmmc_extend_host->mtk_host->id >= HOST_MAX_NUM)
1588 return -1;
1589 pmmc_extend_host->mtk_host->base = u_msdc_base[pmmc_extend_host->mtk_host->id];
1590 pmmc_extend_host->mtk_host->clksrc = MSDC_CLKSRC;
1591 pmmc_extend_host->mtk_host->clk = clks[MSDC_CLKSRC];
1592 pmmc_extend_host->mtk_host->card = &g_msdc_card[EXTEND_STORAGE_ID];
1593
1594 /* not use now, may be delete */
1595 memset(&g_msdc_card[EXTEND_STORAGE_ID], 0, sizeof(struct simp_msdc_card));
1596 g_msdc_card[EXTEND_STORAGE_ID].type = MMC_TYPE_SD;
1597 g_msdc_card[EXTEND_STORAGE_ID].file_system = FAT32;
1598
1599 //printk(KERN_EMERG "g_msdc_card[SD_MSDC_ID] addr is 0x%x\n", &g_msdc_card[EXTEND_STORAGE_ID]);
1600 //printk(KERN_EMERG "g_msdc_card +1 addr is 0x%x\n", g_msdc_card + 1);
1601 //printk(KERN_EMERG "pmsdc_sd_host->card addr is 0x%x\n", pmsdc_extend_host->card);
1602 pmsdc_extend_host->card->card_cap = 1;
1603 }
1604 return 0;
1605 }
1606
1607
1608
1609 #define MAX_POLLING_STATUS (50000)
1610 /*--------------------------------------------------------------------------*/
1611 /* porting for panic dump interface */
1612 /*--------------------------------------------------------------------------*/
1613 #ifdef CONFIG_MTK_EMMC_SUPPORT
1614 static int simp_emmc_dump_write(unsigned char* buf, unsigned int len, unsigned int offset,unsigned int dev)
1615 {
1616
1617 /* maybe delete in furture */
1618 unsigned int i;
1619 unsigned int status = 0;
1620 int polling = MAX_POLLING_STATUS;
1621 unsigned int l_user_begin_num = 0;
1622 unsigned int l_dest_num = 0;
1623 unsigned long long l_start_offset;
1624 unsigned int l_addr;
1625 unsigned char *l_buf;
1626 unsigned int ret = 1;
1627 int err = 0;
1628
1629 if (0 != len % 512) {
1630 /* emmc always in slot0 */
1631 printk("debug: parameter error!\n");
1632 return ret;
1633 }
1634
1635 #if 0
1636 printk("write data:");
1637 for (i = 0; i < 32; i++) {
1638 printk("0x%x", buf[i]);
1639 if (0 == (i+1)%32)
1640 printk("\n");
1641 }
1642 #endif
1643
1644 /* find the offset in emmc */
1645 for (i = 0; i < PART_NUM; i++) {
1646 if ('m' == *(PartInfo[i].name) && 'b' == *(PartInfo[i].name + 1) &&
1647 'r' == *(PartInfo[i].name + 2)){
1648 l_user_begin_num = i;
1649 }
1650
1651 if ('e' == *(PartInfo[i].name) && 'x' == *(PartInfo[i].name + 1) &&
1652 'p' == *(PartInfo[i].name + 2) && 'd' == *(PartInfo[i].name + 3) &&
1653 'b' == *(PartInfo[i].name + 4)){
1654 l_dest_num = i;
1655 }
1656 }
1657
1658 if (l_user_begin_num >= PART_NUM && l_dest_num >= PART_NUM) {
1659 printk("not find in scatter file error!\n");
1660 return ret;
1661 }
1662
1663 if (PartInfo[l_dest_num].size < (len + offset)) {
1664 printk("write operation oversize!\n");
1665 return ret;
1666 }
1667
1668 #if MTK_MMC_DUMP_DBG
1669 printk(KERN_EMERG "write start address=%llu\n",
1670 PartInfo[l_dest_num].start_address - PartInfo[l_user_begin_num].start_address);
1671 #endif
1672
1673 l_start_offset = (u64)offset + PartInfo[l_dest_num].start_address - PartInfo[l_user_begin_num].start_address;
1674
1675 if (emmc_init == 0) {
1676 if(simp_init_emmc() != 0)
1677 return ret;
1678 }
1679 printk("-");
1680 for (i = 0; i < (len/512); i++) {
1681 /* code */
1682 l_addr = (l_start_offset >> 9) + i; //blk address
1683 l_buf = (buf + i * 512);
1684
1685 #if MTK_MMC_DUMP_DBG
1686 printk("l_start_offset = 0x%x\n", l_addr);
1687 #endif
1688
1689 err = simp_mmc_single_write(pmmc_boot_host, l_addr, l_buf, 512);
1690 do{
1691 simp_mmc_get_status(pmmc_boot_host, &status);
1692 }while(R1_CURRENT_STATE(status) == 7 && polling--);
1693 }
1694 if(err == 0){
1695 printk("=");
1696 return 0;}
1697 else
1698 return ret;
1699 }
1700 #endif /* end of CONFIG_MTK_EMMC_SUPPORT */
1701
1702 static int simp_sd_dump_write(unsigned char* buf, unsigned int len, unsigned int offset,unsigned int dev)
1703 {
1704 //unsigned int i;
1705 unsigned int l_addr;
1706 unsigned char *l_buf;
1707 int polling = MAX_POLLING_STATUS;
1708 unsigned int status = 0;
1709 //unsigned int l_start_offset;
1710 unsigned int ret = SIMP_FAILED;
1711 int err = 0;
1712
1713 if (0 != len % 512) {
1714 /* emmc always in slot0 */
1715 printk("debug: parameter error!\n");
1716 return ret;
1717 }
1718 #if 0
1719 printk("write data:");
1720 for (i = 0; i < 32; i++) {
1721 printk("0x%x", buf[i]);
1722 if (0 == (i+1)%32)
1723 printk("\n");
1724 }
1725 #endif
1726 //l_start_offset = offset;
1727 l_buf = buf;
1728 if(pmsdc_extend_host->card->card_cap == standard_capacity) {
1729 l_addr = offset << 9;
1730 } else {
1731 l_addr = offset;
1732 }
1733
1734 #if MTK_MMC_DUMP_DBG
1735 printk("l_start_offset = 0x%x len = %d buf<0x%x>\n", l_addr,len,l_buf);
1736 #endif
1737
1738 if(len == 512)
1739 err = simp_mmc_single_write(pmmc_extend_host, l_addr, l_buf, 512);
1740 else
1741 err = simp_mmc_multi_write(pmmc_extend_host, l_addr, l_buf, len/512);
1742 do{
1743 simp_mmc_get_status(pmmc_extend_host, &status);
1744 }while(R1_CURRENT_STATE(status) == 7 && polling--);
1745 if(err == 0)
1746 ret = SIMP_SUCCESS;
1747 return ret;
1748 }
1749
1750 static int sd_dump_read(unsigned char* buf, unsigned int len, unsigned int offset)
1751 {
1752 // unsigned int i;
1753 unsigned int l_addr;
1754 unsigned char *l_buf;
1755 //unsigned int l_start_offset;
1756 unsigned int ret = SIMP_FAILED;
1757 int err = 0;
1758 #if MTK_MMC_DUMP_DBG
1759 printk("1 l_start_offset = 0x%x len =0x \n", l_addr,len);
1760 #endif
1761 if (0 != len % 512) {
1762 printk("debug: parameter error!\n");
1763 return ret;
1764 }
1765
1766 if (sd_init == 0) {
1767 if(simp_init_sd() != 0)
1768 return ret;
1769 }
1770 //l_start_offset = offset;
1771 l_buf = buf;
1772
1773 #if MTK_MMC_DUMP_DBG
1774 printk("l_start_offset = 0x%x len = %d\n", offset,len);
1775 #endif
1776 if(pmsdc_extend_host->card->card_cap == standard_capacity) {
1777 l_addr = offset << 9;
1778 } else {
1779 l_addr = offset;
1780 }
1781 if(len == 512)
1782 err = simp_mmc_single_read(pmmc_extend_host, l_addr, l_buf, 512);
1783 else
1784 err = simp_mmc_multi_read(pmmc_extend_host, l_addr, l_buf, len/512);
1785 #if 0
1786 printk("read data:");
1787 for (i = 0; i < 32; i++) {
1788 printk("0x%x", buf[i]);
1789 if (0 == (i+1)%32)
1790 printk("\n");
1791 }
1792 #endif
1793 if(err == 0)
1794 ret = SIMP_SUCCESS;
1795 return ret;
1796 }
1797
1798 int card_dump_func_write(unsigned char* buf, unsigned int len, unsigned long long offset, int dev)
1799 {
1800 int ret = SIMP_FAILED;
1801
1802 //local_irq_disable();
1803 //preempt_disable();
1804 unsigned int sec_offset = 0;
1805 #if MTK_MMC_DUMP_DBG
1806 printk(KERN_EMERG "card_dump_func_write len<%d> addr<%lld> type<%d>\n",len,offset,dev);
1807 #endif
1808 if(offset % 512){
1809 printk("Address isn't 512 alignment!\n");
1810 return SIMP_FAILED;
1811 }
1812 sec_offset = offset/512;
1813 switch (dev){
1814 case DUMP_INTO_BOOT_CARD_IPANIC:
1815 #ifdef CONFIG_MTK_EMMC_SUPPORT
1816 ret = simp_emmc_dump_write(buf, len, (unsigned int)offset, dev);
1817 #endif
1818 break;
1819 case DUMP_INTO_BOOT_CARD_KDUMP:
1820 break;
1821 case DUMP_INTO_EXTERN_CARD:
1822 ret = simp_sd_dump_write(buf, len, sec_offset, dev);
1823 break;
1824 default:
1825 printk("unknown card type, error!\n");
1826 break;
1827 }
1828
1829 return ret;
1830 }
1831 EXPORT_SYMBOL(card_dump_func_write);
1832
1833 extern int simple_sd_ioctl_rw(struct msdc_ioctl* msdc_ctl);
1834 #ifdef CONFIG_MTK_EMMC_SUPPORT
1835
1836 #define SD_FALSE -1
1837 #define SD_TRUE 0
1838 #define DEBUG_MMC_IOCTL 0
1839 static int emmc_dump_read(unsigned char* buf, unsigned int len, unsigned int offset,unsigned int slot)
1840 {
1841 /* maybe delete in furture */
1842 struct msdc_ioctl msdc_ctl;
1843 unsigned int i;
1844 unsigned int l_user_begin_num = 0;
1845 unsigned int l_dest_num = 0;
1846 unsigned long long l_start_offset = 0;
1847 unsigned int ret = SD_FALSE;
1848
1849 if ((0 != slot) || (0 != offset % 512) || (0 != len % 512)) {
1850 /* emmc always in slot0 */
1851 printk("debug: slot is not use for emmc!\n");
1852 return ret;
1853 }
1854
1855 /* find the offset in emmc */
1856 for (i = 0; i < PART_NUM; i++) {
1857 //for (i = 0; i < 1; i++) {
1858 if ('m' == *(PartInfo[i].name) && 'b' == *(PartInfo[i].name + 1) &&
1859 'r' == *(PartInfo[i].name + 2)){
1860 l_user_begin_num = i;
1861 }
1862
1863 if ('e' == *(PartInfo[i].name) && 'x' == *(PartInfo[i].name + 1) &&
1864 'p' == *(PartInfo[i].name + 2) && 'd' == *(PartInfo[i].name + 3) &&
1865 'b' == *(PartInfo[i].name + 4)){
1866 l_dest_num = i;
1867 }
1868 }
1869
1870 #if DEBUG_MMC_IOCTL
1871 printk("l_user_begin_num = %d l_dest_num = %d\n",l_user_begin_num,l_dest_num);
1872 #endif
1873
1874 if (l_user_begin_num >= PART_NUM && l_dest_num >= PART_NUM) {
1875 printk("not find in scatter file error!\n");
1876 return ret;
1877 }
1878
1879 if (PartInfo[l_dest_num].size < (len + offset)) {
1880 printk("read operation oversize!\n");
1881 return ret;
1882 }
1883
1884 #if DEBUG_MMC_IOCTL
1885 printk("read start address=0x%llx\n", PartInfo[l_dest_num].start_address - PartInfo[l_user_begin_num].start_address);
1886 #endif
1887 l_start_offset = offset + PartInfo[l_dest_num].start_address - PartInfo[l_user_begin_num].start_address;
1888
1889 msdc_ctl.partition = 0;
1890 msdc_ctl.iswrite = 0;
1891 msdc_ctl.host_num = slot;
1892 msdc_ctl.opcode = MSDC_CARD_DUNM_FUNC;
1893 msdc_ctl.total_size = 512;
1894 msdc_ctl.trans_type = 0;
1895 for (i = 0; i < (len/512); i++) {
1896 /* code */
1897 msdc_ctl.address = (l_start_offset >> 9) + i; //blk address
1898 msdc_ctl.buffer =(u32*)(buf + i * 512);
1899
1900 #if DEBUG_MMC_IOCTL
1901 printk("l_start_offset = 0x%x\n", msdc_ctl.address);
1902 #endif
1903 msdc_ctl.result = simple_sd_ioctl_rw(&msdc_ctl);
1904 }
1905
1906 #if DEBUG_MMC_IOCTL
1907 printk("read data:");
1908 for (i = 0; i < 32; i++) {
1909 printk("0x%x", buf[i]);
1910 if (0 == (i+1)%32)
1911 printk("\n");
1912 }
1913 #endif
1914 return SD_TRUE;
1915 }
1916 #endif
1917
1918 int card_dump_func_read(unsigned char* buf, unsigned int len, unsigned long long offset, int dev)
1919 {
1920
1921 // unsigned int l_slot;
1922 unsigned int ret = SIMP_FAILED;
1923 unsigned int sec_offset = 0;
1924 #if MTK_MMC_DUMP_DBG
1925 printk(KERN_EMERG "card_dump_func_read len<%d> addr<%lld> type<%d>\n",len,offset,dev);
1926 #endif
1927 if(offset % 512){
1928 printk("Address isn't 512 alignment!\n");
1929 return SIMP_FAILED;
1930 }
1931 sec_offset = offset/512;
1932 switch (dev){
1933 case DUMP_INTO_BOOT_CARD_IPANIC:
1934 #ifdef CONFIG_MTK_EMMC_SUPPORT
1935 ret = emmc_dump_read(buf, len, (unsigned int)offset, dev);
1936 #endif
1937 break;
1938 case DUMP_INTO_BOOT_CARD_KDUMP:
1939 break;
1940 case DUMP_INTO_EXTERN_CARD:
1941 ret = sd_dump_read(buf, len, sec_offset);
1942 break;
1943 default:
1944 printk("unknown card type, error!\n");
1945 break;
1946 }
1947 return ret;
1948
1949 }
1950 EXPORT_SYMBOL(card_dump_func_read);
1951
1952
1953 /*--------------------------------------------------------------------------*/
1954 /* porting for kdump interface */
1955 /*--------------------------------------------------------------------------*/
1956
1957
1958 /*--------------------------------------------------------------------------*/
1959 /* module init/exit */
1960 /*--------------------------------------------------------------------------*/
1961
1962 static void simp_msdc_hw_init(void)
1963 {
1964 #ifdef CFG_DEV_MSDC0
1965 p_msdc_hw[0] = &msdc0_hw;
1966 #endif
1967 #ifdef CFG_DEV_MSDC1
1968 p_msdc_hw[1] = &msdc1_hw;
1969 #endif
1970 #ifdef CFG_DEV_MSDC2
1971 p_msdc_hw[2] = &msdc2_hw;
1972 #endif
1973 #ifdef CFG_DEV_MSDC3
1974 p_msdc_hw[3] = &msdc3_hw;
1975 #endif
1976 #ifdef CFG_DEV_MSDC4
1977 p_msdc_hw[4] = &msdc4_hw;
1978 #endif
1979 }
1980 static int __init emmc_dump_init(void)
1981 {
1982 simp_msdc_hw_init();
1983 #ifdef CONFIG_MTK_EMMC_SUPPORT
1984 simp_mmc_init(MSDC_EMMC,1);
1985 #endif
1986 simp_mmc_init(MSDC_SD,0);
1987 printk(KERN_EMERG "EMMC/SD dump init\n");
1988 return 0;
1989 }
1990
1991 static void __exit emmc_dump_exit(void)
1992 {
1993 }
1994 module_init(emmc_dump_init);
1995 module_exit(emmc_dump_exit);
kernel source for telekom puls (alcatel/mediatek)