import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / hdmi / mt8193 / hdmi_drv.c
1 /*----------------------------------------------------------------------------*/
2 #ifdef CONFIG_MTK_MT8193_HDMI_SUPPORT
3
4 #include <linux/interrupt.h>
5 #include <linux/i2c.h>
6 #include <linux/slab.h>
7 #include <linux/irq.h>
8 #include <linux/miscdevice.h>
9 #include <asm/uaccess.h>
10 #include <linux/delay.h>
11 #include <linux/input.h>
12 #include <linux/workqueue.h>
13 #include <linux/kobject.h>
14 #include <linux/earlysuspend.h>
15 #include <linux/platform_device.h>
16 #include <asm/atomic.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/sched.h>
20 #include <linux/kthread.h>
21 #include <linux/bitops.h>
22 #include <linux/kernel.h>
23 #include <linux/byteorder/generic.h>
24 #include <linux/interrupt.h>
25 #include <linux/time.h>
26 #include <linux/rtpm_prio.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/syscalls.h>
29 #include <linux/reboot.h>
30 #include <linux/vmalloc.h>
31 #include <linux/fs.h>
32 #include <linux/string.h>
33 #include <linux/completion.h>
34
35 #include "mt8193_ctrl.h"
36
37 #include "mt8193ddc.h"
38 #include "mt8193hdcp.h"
39
40 #include "hdmi_drv.h"
41 #include <cust_eint.h>
42 #include "cust_gpio_usage.h"
43 #include "mach/eint.h"
44 #include "mach/irqs.h"
45 #include "mach/mt_boot.h"
46
47 #include <mach/devs.h>
48 #include <mach/mt_typedefs.h>
49 #include <mach/mt_gpio.h>
50 #include <mach/mt_pm_ldo.h>
51
52
53 #include "mt8193_iic.h"
54 #include "mt8193avd.h"
55 #include "mt8193hdmicmd.h"
56
57
58 /*----------------------------------------------------------------------------*/
59 /* Debug message defination */
60 /*----------------------------------------------------------------------------*/
61
62
63 /*----------------------------------------------------------------------------*/
64 /* HDMI Timer */
65 /*----------------------------------------------------------------------------*/
66
67 static struct timer_list r_hdmi_timer;
68 static struct timer_list r_cec_timer;
69
70 static uint32_t gHDMI_CHK_INTERVAL = 10;
71 static uint32_t gCEC_CHK_INTERVAL = 20;
72
73 size_t mt8193_log_on = 0;
74 size_t mt8193_cec_on = 0;
75 size_t mt8193_cec_interrupt = 0;
76 size_t mt8193_cecinit = 0;
77 size_t mt8193_hdmiinit = 0;
78 size_t mt8193_hotinit = 0;
79
80 size_t mt8193_hdmipoweroninit = 0;
81 size_t mt8193_TmrValue[MAX_HDMI_TMR_NUMBER] = { 0 };
82
83 size_t mt8193_hdmiCmd = 0xff;
84 size_t mt8193_rxcecmode = CEC_NORMAL_MODE;
85 HDMI_CTRL_STATE_T e_hdmi_ctrl_state = HDMI_STATE_IDLE;
86 HDCP_CTRL_STATE_T e_hdcp_ctrl_state = HDCP_RECEIVER_NOT_READY;
87 size_t mt8193_hotplugstate = HDMI_STATE_HOT_PLUG_OUT;
88
89 #if defined(CONFIG_HAS_EARLYSUSPEND)
90 size_t mt8193_hdmiearlysuspend = 1;
91 #endif
92
93 static struct task_struct *hdmi_timer_task;
94 wait_queue_head_t hdmi_timer_wq;
95 atomic_t hdmi_timer_event = ATOMIC_INIT(0);
96
97 static struct task_struct *cec_timer_task;
98 wait_queue_head_t cec_timer_wq;
99 atomic_t cec_timer_event = ATOMIC_INIT(0);
100
101 static struct task_struct *mt8193_nlh_task;
102 wait_queue_head_t mt8193_nlh_wq; /* NFI, LVDS, HDMI */
103 atomic_t mt8193_nlh_event = ATOMIC_INIT(0);
104
105 static HDMI_UTIL_FUNCS hdmi_util = { 0 };
106
107 void hdmi_poll_isr(unsigned long n);
108 void cec_poll_isr(unsigned long n);
109
110 static int hdmi_timer_kthread(void *data);
111 static int cec_timer_kthread(void *data);
112 static int mt8193_nlh_kthread(void *data);
113
114 static void vInitAvInfoVar(void)
115 {
116 _stAvdAVInfo.e_resolution = HDMI_VIDEO_1280x720p_50Hz;
117 _stAvdAVInfo.fgHdmiOutEnable = TRUE;
118 _stAvdAVInfo.fgHdmiTmdsEnable = TRUE;
119
120 _stAvdAVInfo.bMuteHdmiAudio = FALSE;
121 _stAvdAVInfo.e_video_color_space = HDMI_YCBCR_444;
122 _stAvdAVInfo.e_deep_color_bit = HDMI_NO_DEEP_COLOR;
123 _stAvdAVInfo.ui1_aud_out_ch_number = 2;
124 _stAvdAVInfo.e_hdmi_fs = HDMI_FS_44K;
125
126 _stAvdAVInfo.bhdmiRChstatus[0] = 0x00;
127 _stAvdAVInfo.bhdmiRChstatus[1] = 0x00;
128 _stAvdAVInfo.bhdmiRChstatus[2] = 0x02;
129 _stAvdAVInfo.bhdmiRChstatus[3] = 0x00;
130 _stAvdAVInfo.bhdmiRChstatus[4] = 0x00;
131 _stAvdAVInfo.bhdmiRChstatus[5] = 0x00;
132 _stAvdAVInfo.bhdmiLChstatus[0] = 0x00;
133 _stAvdAVInfo.bhdmiLChstatus[1] = 0x00;
134 _stAvdAVInfo.bhdmiLChstatus[2] = 0x02;
135 _stAvdAVInfo.bhdmiLChstatus[3] = 0x00;
136 _stAvdAVInfo.bhdmiLChstatus[4] = 0x00;
137 _stAvdAVInfo.bhdmiLChstatus[5] = 0x00;
138
139 vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_OUT);
140
141 }
142
143 void vSetHDMIMdiTimeOut(u32 i4_count)
144 {
145 MT8193_DRV_FUNC();
146 mt8193_TmrValue[HDMI_PLUG_DETECT_CMD] = i4_count;
147
148 }
149
150 /*----------------------------------------------------------------------------*/
151
152 static void mt8193_set_util_funcs(const HDMI_UTIL_FUNCS *util)
153 {
154 memcpy(&hdmi_util, util, sizeof(HDMI_UTIL_FUNCS));
155 }
156
157 /*----------------------------------------------------------------------------*/
158
159 static void mt8193_get_params(HDMI_PARAMS *params)
160 {
161 memset(params, 0, sizeof(HDMI_PARAMS));
162
163 MT8193_DRV_LOG("720p\n");
164 params->init_config.vformat = HDMI_VIDEO_1280x720p_50Hz;
165 params->init_config.aformat = HDMI_AUDIO_PCM_16bit_48000;
166
167 params->clk_pol = HDMI_POLARITY_FALLING;
168 params->de_pol = HDMI_POLARITY_RISING;
169 params->vsync_pol = HDMI_POLARITY_FALLING;
170 params->hsync_pol = HDMI_POLARITY_FALLING;
171
172 params->hsync_pulse_width = 40;
173 params->hsync_back_porch = 220;
174 params->hsync_front_porch = 440;
175 params->vsync_pulse_width = 5;
176 params->vsync_back_porch = 20;
177 params->vsync_front_porch = 5;
178
179 params->rgb_order = HDMI_COLOR_ORDER_RGB;
180
181 params->io_driving_current = IO_DRIVING_CURRENT_2MA;
182 params->intermediat_buffer_num = 4;
183 params->output_mode = HDMI_OUTPUT_MODE_LCD_MIRROR;
184 params->is_force_awake = 1;
185 params->is_force_landscape = 1;
186
187 params->scaling_factor = 0;
188 }
189
190 static int mt8193_enter(void)
191 {
192 MT8193_DRV_FUNC();
193 return 0;
194
195 }
196
197 static int mt8193_exit(void)
198 {
199 MT8193_DRV_FUNC();
200 return 0;
201 }
202
203 /*----------------------------------------------------------------------------*/
204
205 static void mt8193_suspend(void)
206 {
207 MT8193_DRV_FUNC();
208
209 _stAvdAVInfo.fgHdmiTmdsEnable = 0;
210 av_hdmiset(HDMI_SET_TURN_OFF_TMDS, &_stAvdAVInfo, 1);
211 }
212
213 /*----------------------------------------------------------------------------*/
214
215 static void mt8193_resume(void)
216 {
217 MT8193_DRV_FUNC();
218
219
220 }
221
222 /*----------------------------------------------------------------------------*/
223
224 static int mt8193_video_config(HDMI_VIDEO_RESOLUTION vformat, HDMI_VIDEO_INPUT_FORMAT vin,
225 HDMI_VIDEO_OUTPUT_FORMAT vout)
226 {
227 MT8193_DRV_FUNC();
228 if (r_hdmi_timer.function) {
229 del_timer_sync(&r_hdmi_timer);
230 }
231 memset((void *)&r_hdmi_timer, 0, sizeof(r_hdmi_timer));
232
233 _stAvdAVInfo.e_resolution = vformat;
234
235 vSetHDMITxPLLTrigger();
236 vResetHDMIPLL();
237
238 _stAvdAVInfo.fgHdmiTmdsEnable = 0;
239 av_hdmiset(HDMI_SET_TURN_OFF_TMDS, &_stAvdAVInfo, 1);
240 av_hdmiset(HDMI_SET_VPLL, &_stAvdAVInfo, 1);
241 av_hdmiset(HDMI_SET_SOFT_NCTS, &_stAvdAVInfo, 1);
242 av_hdmiset(HDMI_SET_VIDEO_RES_CHG, &_stAvdAVInfo, 1);
243
244 if (get_boot_mode() != FACTORY_BOOT)
245 av_hdmiset(HDMI_SET_HDCP_INITIAL_AUTH, &_stAvdAVInfo, 1);
246
247 memset((void *)&r_hdmi_timer, 0, sizeof(r_hdmi_timer));
248 r_hdmi_timer.expires = jiffies + 1 / (1000 / HZ); /* wait 1s to stable */
249 r_hdmi_timer.function = hdmi_poll_isr;
250 r_hdmi_timer.data = 0;
251 init_timer(&r_hdmi_timer);
252 add_timer(&r_hdmi_timer);
253 mt8193_hdmiinit = 1;
254
255 return 0;
256 }
257
258 /*----------------------------------------------------------------------------*/
259
260 static int mt8193_audio_config(HDMI_AUDIO_FORMAT aformat)
261 {
262 MT8193_DRV_FUNC();
263
264 return 0;
265 }
266
267 /*----------------------------------------------------------------------------*/
268
269 static int mt8193_video_enable(bool enable)
270 {
271 MT8193_DRV_FUNC();
272
273 return 0;
274 }
275
276 /*----------------------------------------------------------------------------*/
277
278 static int mt8193_audio_enable(bool enable)
279 {
280 MT8193_DRV_FUNC();
281
282 return 0;
283 }
284
285 /*----------------------------------------------------------------------------*/
286 /*----------------------------------------------------------------------------*/
287
288 void mt8193_set_mode(unsigned char ucMode)
289 {
290 MT8193_DRV_FUNC();
291 vSetClk();
292
293 }
294
295 /*----------------------------------------------------------------------------*/
296
297 int mt8193_power_on(void)
298 {
299 MT8193_DRV_FUNC();
300 #if defined(CONFIG_HAS_EARLYSUSPEND)
301 if (mt8193_hdmiearlysuspend == 0)
302 return 0;
303 #endif
304 mt8193_hotinit = 0;
305 mt8193_hotplugstate = HDMI_STATE_HOT_PLUG_OUT;
306 mt_set_gpio_mode(GPIO_HDMI_POWER_CONTROL, GPIO_MODE_00);
307 mt_set_gpio_dir(GPIO_HDMI_POWER_CONTROL, GPIO_DIR_OUT);
308 mt_set_gpio_out(GPIO_HDMI_POWER_CONTROL, GPIO_OUT_ONE);
309
310 vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_power_turnon, hdmi_power_turnon);
311 vWriteHdmiSYSMsk(HDMI_SYS_PWR_RST_B, hdmi_pwr_sys_sw_unreset, hdmi_pwr_sys_sw_unreset);
312 vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_iso_dis, hdmi_iso_en);
313 vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_clock_on, hdmi_clock_off);
314
315 vWriteHdmiSYSMsk(HDMI_SYS_CFG1C, ANLG_ON | HDMI_ON, ANLG_ON | HDMI_ON);
316
317 mt8193_i2c_write(0x1500, 0x20);
318 vHotPlugPinInit();
319 vInitHdcpKeyGetMethod(NON_HOST_ACCESS_FROM_EEPROM);
320
321
322 vWriteHdmiIntMask(0xFF);
323
324 memset((void *)&r_hdmi_timer, 0, sizeof(r_hdmi_timer));
325 r_hdmi_timer.expires = jiffies + 100 / (1000 / HZ); /* wait 1s to stable */
326 r_hdmi_timer.function = hdmi_poll_isr;
327 r_hdmi_timer.data = 0;
328 init_timer(&r_hdmi_timer);
329 add_timer(&r_hdmi_timer);
330
331 memset((void *)&r_cec_timer, 0, sizeof(r_cec_timer));
332 r_cec_timer.expires = jiffies + 100 / (1000 / HZ); /* wait 1s to stable */
333 r_cec_timer.function = cec_poll_isr;
334 r_cec_timer.data = 0;
335 init_timer(&r_cec_timer);
336 add_timer(&r_cec_timer);
337
338 return 0;
339 }
340
341 /*----------------------------------------------------------------------------*/
342
343 void mt8193_power_off(void)
344 {
345 MT8193_DRV_FUNC();
346
347 mt8193_hotinit = 1;
348 mt8193_hotplugstate = HDMI_STATE_HOT_PLUG_OUT;
349 vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_OUT);
350 vWriteHdmiIntMask(0xFF);
351 vWriteHdmiSYSMsk(HDMI_SYS_CFG1C, 0, ANLG_ON | HDMI_ON);
352
353 mt_set_gpio_mode(GPIO_HDMI_POWER_CONTROL, GPIO_MODE_00);
354 mt_set_gpio_dir(GPIO_HDMI_POWER_CONTROL, GPIO_DIR_OUT);
355 mt_set_gpio_out(GPIO_HDMI_POWER_CONTROL, GPIO_OUT_ZERO);
356
357 vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_clock_off, hdmi_clock_off);
358 vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_iso_en, hdmi_iso_en);
359 vWriteHdmiSYSMsk(HDMI_SYS_PWR_RST_B, hdmi_pwr_sys_sw_reset, hdmi_pwr_sys_sw_unreset);
360 vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_power_turnoff, hdmi_power_turnon);
361 if (r_hdmi_timer.function) {
362 del_timer_sync(&r_hdmi_timer);
363 }
364 memset((void *)&r_hdmi_timer, 0, sizeof(r_hdmi_timer));
365 if (r_cec_timer.function) {
366 del_timer_sync(&r_cec_timer);
367 }
368 memset((void *)&r_cec_timer, 0, sizeof(r_cec_timer));
369 }
370
371 /*----------------------------------------------------------------------------*/
372
373 void mt8193_dump(void)
374 {
375 MT8193_DRV_FUNC();
376 /* mt8193_dump_reg(); */
377 }
378
379 /*----------------------------------------------------------------------------*/
380 /*----------------------------------------------------------------------------*/
381
382 HDMI_STATE mt8193_get_state(void)
383 {
384 MT8193_DRV_FUNC();
385
386 if (bCheckPordHotPlug(PORD_MODE | HOTPLUG_MODE) == TRUE) {
387 return HDMI_STATE_ACTIVE;
388 } else {
389 return HDMI_STATE_NO_DEVICE;
390 }
391 }
392
393 /*----------------------------------------------------------------------------*/
394
395
396 void mt8193_log_enable(u16 enable)
397 {
398 MT8193_DRV_FUNC();
399
400 if (enable == 0) {
401 pr_debug("hdmi_pll_log = 0x1\n");
402 pr_debug("hdmi_dgi_log = 0x2\n");
403 pr_debug("hdmi_plug_log = 0x4\n");
404 pr_debug("hdmi_video_log = 0x8\n");
405 pr_debug("hdmi_audio_log = 0x10\n");
406 pr_debug("hdmi_hdcp_log = 0x20\n");
407 pr_debug("hdmi_cec_log = 0x40\n");
408 pr_debug("hdmi_ddc_log = 0x80\n");
409 pr_debug("hdmi_edid_log = 0x100\n");
410 pr_debug("hdmi_drv_log = 0x200\n");
411
412 pr_debug("hdmi_all_log = 0xffff\n");
413
414 }
415
416 mt8193_log_on = enable;
417
418 }
419
420 /*----------------------------------------------------------------------------*/
421
422 void mt8193_enablehdcp(u8 u1hdcponoff)
423 {
424 MT8193_DRV_FUNC();
425 _stAvdAVInfo.u1hdcponoff = u1hdcponoff;
426 av_hdmiset(HDMI_SET_HDCP_OFF, &_stAvdAVInfo, 1);
427 }
428
429 void mt8193_setcecrxmode(u8 u1cecrxmode)
430 {
431 MT8193_DRV_FUNC();
432 mt8193_rxcecmode = u1cecrxmode;
433 }
434
435 void mt8193_colordeep(u8 u1colorspace, u8 u1deepcolor)
436 {
437 MT8193_DRV_FUNC();
438 if ((u1colorspace == 0xff) && (u1deepcolor == 0xff)) {
439 pr_debug("color_space:HDMI_YCBCR_444 = 2\n");
440 pr_debug("color_space:HDMI_YCBCR_422 = 3\n");
441
442 pr_debug("deep_color:HDMI_NO_DEEP_COLOR = 1\n");
443 pr_debug("deep_color:HDMI_DEEP_COLOR_10_BIT = 2\n");
444 pr_debug("deep_color:HDMI_DEEP_COLOR_12_BIT = 3\n");
445 pr_debug("deep_color:HDMI_DEEP_COLOR_16_BIT = 4\n");
446
447 return;
448 }
449 if (dReadHdmiSYS(0x2cc) == 0x8193)
450 _stAvdAVInfo.e_video_color_space = HDMI_YCBCR_444;
451 else
452 _stAvdAVInfo.e_video_color_space = HDMI_RGB;
453
454 _stAvdAVInfo.e_deep_color_bit = (HDMI_DEEP_COLOR_T) u1deepcolor;
455 }
456
457 void mt8193_read(u16 u2Reg, u32 *p4Data)
458 {
459 if (u2Reg & 0x8000) {
460 if ((u2Reg & 0xf000) == 0x8000)
461 u2Reg -= 0x8000;
462 *p4Data = (*(unsigned int *)(0xf4000000 + u2Reg));
463 } else
464 mt8193_i2c_read(u2Reg, p4Data);
465
466 pr_debug("Reg read= 0x%04x, data = 0x%08x\n", u2Reg, *p4Data);
467 }
468
469 void mt8193_write(u16 u2Reg, u32 u4Data)
470 {
471 if (u2Reg & 0x8000) {
472 if ((u2Reg & 0xf000) == 0x8000)
473 u2Reg -= 0x8000;
474 *(unsigned int *)(0xf4000000 + u2Reg) = u4Data;
475 } else {
476 pr_debug("Reg write= 0x%04x, data = 0x%08x\n", u2Reg, u4Data);
477 mt8193_i2c_write(u2Reg, u4Data);
478 }
479 }
480
481 static void _mt8193_irq_handler(void)
482 {
483 MT8193_DRV_FUNC();
484 atomic_set(&mt8193_nlh_event, 1);
485 wake_up_interruptible(&mt8193_nlh_wq);
486
487 mt65xx_eint_mask(CUST_EINT_EINT_HDMI_HPD_NUM);
488 }
489
490 #if defined(CONFIG_HAS_EARLYSUSPEND)
491 static void mt8193_hdmi_early_suspend(struct early_suspend *h)
492 {
493 MT8193_PLUG_FUNC();
494 mt8193_hdmiearlysuspend = 0;
495 }
496
497 static void mt8193_hdmi_late_resume(struct early_suspend *h)
498 {
499 MT8193_PLUG_FUNC();
500 mt8193_hdmiearlysuspend = 1;
501 }
502
503 static struct early_suspend mt8193_hdmi_early_suspend_desc = {
504 .level = 0xFE,
505 .suspend = mt8193_hdmi_early_suspend,
506 .resume = mt8193_hdmi_late_resume,
507 };
508 #endif
509
510 static int mt8193_init(void)
511 {
512 MT8193_DRV_FUNC();
513
514 init_waitqueue_head(&hdmi_timer_wq);
515 hdmi_timer_task = kthread_create(hdmi_timer_kthread, NULL, "hdmi_timer_kthread");
516 wake_up_process(hdmi_timer_task);
517
518 init_waitqueue_head(&cec_timer_wq);
519 cec_timer_task = kthread_create(cec_timer_kthread, NULL, "cec_timer_kthread");
520 wake_up_process(cec_timer_task);
521
522 init_waitqueue_head(&mt8193_nlh_wq);
523 mt8193_nlh_task = kthread_create(mt8193_nlh_kthread, NULL, "mt8193_nlh_kthread");
524 wake_up_process(mt8193_nlh_task);
525
526 #if defined(CONFIG_HAS_EARLYSUSPEND)
527 register_early_suspend(&mt8193_hdmi_early_suspend_desc);
528 #endif
529
530
531 return 0;
532 }
533
534 static void vSetHDMICtrlState(HDMI_CTRL_STATE_T e_state)
535 {
536 MT8193_PLUG_FUNC();
537 e_hdmi_ctrl_state = e_state;
538 }
539
540 static void vNotifyAppHdmiState(u8 u1hdmistate)
541 {
542 HDMI_EDID_INFO_T get_info;
543
544 MT8193_PLUG_LOG("u1hdmistate = %d\n", u1hdmistate);
545
546 mt8193_AppGetEdidInfo(&get_info);
547
548 switch (u1hdmistate) {
549 case HDMI_PLUG_OUT:
550 hdmi_util.state_callback(HDMI_STATE_NO_DEVICE);
551 mt8193_SetPhysicCECAddress(0xffff, 0x0);
552 break;
553
554 case HDMI_PLUG_IN_AND_SINK_POWER_ON:
555 hdmi_util.state_callback(HDMI_STATE_ACTIVE);
556 mt8193_SetPhysicCECAddress(get_info.ui2_sink_cec_address, 0x4);
557 break;
558
559 case HDMI_PLUG_IN_ONLY:
560 hdmi_util.state_callback(HDMI_STATE_PLUGIN_ONLY);
561 mt8193_SetPhysicCECAddress(get_info.ui2_sink_cec_address, 0xf);
562 break;
563
564 case HDMI_PLUG_IN_CEC:
565 hdmi_util.state_callback(HDMI_STATE_CEC_UPDATE);
566 break;
567
568 default:
569 break;
570
571 }
572 }
573
574 void vcheckhdmiplugstate(void)
575 {
576 u32 bMask;
577 MT8193_PLUG_FUNC();
578
579 bMask = bReadHdmiIntMask();
580 vWriteHdmiIntMask((bMask & 0xfe));
581 if (bCheckPordHotPlug(PORD_MODE | HOTPLUG_MODE) == FALSE) {
582
583 {
584 if ((i4SharedInfo(SI_HDMI_RECEIVER_STATUS) ==
585 HDMI_PLUG_IN_AND_SINK_POWER_ON)
586 || (i4SharedInfo(SI_HDMI_RECEIVER_STATUS) == HDMI_PLUG_IN_ONLY)) {
587 bMask = bReadHdmiIntMask();
588 vWriteHdmiIntMask((bMask | 0xfE));
589
590 vHDCPReset();
591 vTxSignalOnOff(0);
592
593 vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_OUT);
594 vSetHDMICtrlState(HDMI_STATE_HOT_PLUG_OUT);
595 } else {
596 MT8193_PLUG_LOG("plug out, no action\n");
597 }
598 }
599 } else {
600 if ((i4SharedInfo(SI_HDMI_RECEIVER_STATUS) == HDMI_PLUG_OUT)
601 || (i4SharedInfo(SI_HDMI_RECEIVER_STATUS) == HDMI_PLUG_IN_ONLY)) {
602 vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_IN_AND_SINK_POWER_ON);
603 vSetHDMICtrlState(HDMI_STATE_HOT_PLUGIN_AND_POWER_ON);
604 } else {
605 MT8193_PLUG_LOG("plug in ok, no action\n");
606 }
607 }
608 }
609
610 static void vPlugDetectService(HDMI_CTRL_STATE_T e_state)
611 {
612 u8 bData = 0xff;
613
614 MT8193_PLUG_FUNC();
615
616 e_hdmi_ctrl_state = HDMI_STATE_IDLE;
617
618 switch (e_state) {
619 case HDMI_STATE_HOT_PLUG_OUT:
620 vClearEdidInfo();
621 vHDCPReset();
622 bData = HDMI_PLUG_OUT;
623
624 break;
625
626 case HDMI_STATE_HOT_PLUGIN_AND_POWER_ON:
627 mt8193_checkedid(0);
628 bData = HDMI_PLUG_IN_AND_SINK_POWER_ON;
629
630 break;
631
632 case HDMI_STATE_HOT_PLUG_IN_ONLY:
633 vClearEdidInfo();
634 vHDCPReset();
635 mt8193_checkedid(0);
636 bData = HDMI_PLUG_IN_ONLY;
637
638 break;
639
640 case HDMI_STATE_IDLE:
641
642 break;
643 default:
644 break;
645
646 }
647
648 if (bData != 0xff)
649 vNotifyAppHdmiState(bData);
650 }
651
652 void hdmi_timer_impl(void)
653 {
654 if (mt8193_hdmiinit == 0) {
655 mt8193_hdmiinit = 1;
656 /* mt8193_power_off(); */
657 vInitAvInfoVar();
658 return;
659 }
660
661 if (mt8193_hotinit != 1)
662 mt8193_hdmiinit++;
663
664 #if defined(CONFIG_HAS_EARLYSUSPEND)
665 if (mt8193_hdmiearlysuspend == 1)
666 #endif
667 {
668 if (((mt8193_hdmiinit > 5) || (mt8193_hotinit == 0)) && (mt8193_hotinit != 1)) {
669 if (bCheckPordHotPlug(PORD_MODE | HOTPLUG_MODE) == FALSE) {
670 if ((mt8193_hotplugstate == HDMI_STATE_HOT_PLUGIN_AND_POWER_ON)
671 && (mt8193_hotinit == 2)) {
672 vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_OUT);
673 mt8193_hotplugstate = HDMI_STATE_HOT_PLUG_OUT;
674 vPlugDetectService(HDMI_STATE_HOT_PLUG_OUT);
675 MT8193_PLUG_LOG
676 ("[detectcable1] mt8193_hotinit = %d,mt8193_hdmiinit=%d\n",
677 mt8193_hotinit, mt8193_hdmiinit);
678 }
679
680 if ((mt8193_hotinit == 0)
681 && (bCheckPordHotPlug(HOTPLUG_MODE) == TRUE)) {
682 vSetSharedInfo(SI_HDMI_RECEIVER_STATUS,
683 HDMI_PLUG_IN_AND_SINK_POWER_ON);
684 mt8193_hotinit = 2;
685 mt8193_hotplugstate = HDMI_STATE_HOT_PLUGIN_AND_POWER_ON;
686 vPlugDetectService(HDMI_STATE_HOT_PLUGIN_AND_POWER_ON);
687 vWriteHdmiIntMask(0xff); /* INT mask MDI */
688 MT8193_PLUG_LOG
689 ("[detectcable2] mt8193_hotinit = %d,mt8193_hdmiinit=%d\n",
690 mt8193_hotinit, mt8193_hdmiinit);
691 }
692
693 } else if ((mt8193_hotplugstate == HDMI_STATE_HOT_PLUG_OUT)
694 && (bCheckPordHotPlug(PORD_MODE | HOTPLUG_MODE) == TRUE)) {
695 vSetSharedInfo(SI_HDMI_RECEIVER_STATUS,
696 HDMI_PLUG_IN_AND_SINK_POWER_ON);
697 mt8193_hotplugstate = HDMI_STATE_HOT_PLUGIN_AND_POWER_ON;
698 mt8193_hotinit = 2;
699 vPlugDetectService(HDMI_STATE_HOT_PLUGIN_AND_POWER_ON);
700 vWriteHdmiIntMask(0xff); /* INT mask MDI */
701 MT8193_PLUG_LOG
702 ("[detectcable3] mt8193_hotinit = %d,mt8193_hdmiinit=%d\n",
703 mt8193_hotinit, mt8193_hdmiinit);
704 } else if ((mt8193_hotplugstate == HDMI_STATE_HOT_PLUGIN_AND_POWER_ON)
705 && ((e_hdcp_ctrl_state == HDCP_WAIT_RI)
706 || (e_hdcp_ctrl_state == HDCP_CHECK_LINK_INTEGRITY))) {
707 if (bCheckHDCPStatus(HDCP_STA_RI_RDY)) {
708 vSetHDCPState(HDCP_CHECK_LINK_INTEGRITY);
709 vSendHdmiCmd(HDMI_HDCP_PROTOCAL_CMD);
710 }
711 }
712 mt8193_hdmiinit = 1;
713 }
714 }
715
716 if (mt8193_hdmiCmd == HDMI_PLUG_DETECT_CMD) {
717 vClearHdmiCmd();
718 /* vcheckhdmiplugstate(); */
719 /* vPlugDetectService(e_hdmi_ctrl_state); */
720 } else if (mt8193_hdmiCmd == HDMI_HDCP_PROTOCAL_CMD) {
721 vClearHdmiCmd();
722 HdcpService(e_hdcp_ctrl_state);
723 }
724 }
725
726 void cec_timer_impl(void)
727 {
728 if (mt8193_cecinit == 0) {
729 mt8193_cecinit = 1;
730 mt8193_cec_init();
731 return;
732 }
733
734 if (mt8193_cec_on == 1) {
735 mt8193_cec_mainloop(mt8193_rxcecmode);
736 }
737 }
738
739 void mt8193_nlh_impl(void)
740 {
741 u32 u4Data;
742 u8 bData, bData1;
743 u8 bMask;
744
745 /* read register and then assert which interrupt occured */
746 mt8193_i2c_read(0x1508, &u4Data);
747 mt8193_i2c_write(0x1504, 0xffffffff);
748
749 MT8193_DRV_LOG("0x1508 = 0x%08x\n", u4Data);
750
751 if (u4Data & 0x20) {
752 MT8193_CEC_LOG("cec interrupt\n");
753
754 if (mt8193_cec_on == 1) {
755 if (mt8193_cec_isrprocess(mt8193_rxcecmode)) {
756 vNotifyAppHdmiState(HDMI_PLUG_IN_CEC);
757 }
758 }
759 }
760
761 if (u4Data & 0x4) {
762 bCheckHDCPStatus(0xfb);
763 bData = bReadGRLInt();
764
765 if (bData & INT_HDCP) {
766 MT8193_HDCP_LOG("hdcp interrupt\n");
767 bClearGRLInt(INT_HDCP);
768
769
770 } else if (bData & INT_MDI) {
771 MT8193_PLUG_LOG("hdmi interrupt\n");
772 bClearGRLInt(INT_MDI);
773 bMask = bReadHdmiIntMask();
774 /* vWriteHdmiIntMask((0xfd));//INT mask MDI */
775 }
776 }
777 mt65xx_eint_unmask(CUST_EINT_EINT_HDMI_HPD_NUM);
778 }
779
780 static int hdmi_timer_kthread(void *data)
781 {
782 struct sched_param param = {.sched_priority = RTPM_PRIO_CAMERA_PREVIEW };
783 sched_setscheduler(current, SCHED_RR, &param);
784
785 for (;;) {
786 wait_event_interruptible(hdmi_timer_wq, atomic_read(&hdmi_timer_event));
787 atomic_set(&hdmi_timer_event, 0);
788 hdmi_timer_impl();
789 if (kthread_should_stop())
790 break;
791 }
792
793 return 0;
794 }
795
796 static int cec_timer_kthread(void *data)
797 {
798 struct sched_param param = {.sched_priority = RTPM_PRIO_CAMERA_PREVIEW };
799 sched_setscheduler(current, SCHED_RR, &param);
800
801 for (;;) {
802 wait_event_interruptible(cec_timer_wq, atomic_read(&cec_timer_event));
803 atomic_set(&cec_timer_event, 0);
804 cec_timer_impl();
805 if (kthread_should_stop())
806 break;
807 }
808
809 return 0;
810 }
811
812 static int mt8193_nlh_kthread(void *data)
813 {
814 struct sched_param param = {.sched_priority = RTPM_PRIO_SCRN_UPDATE };
815 sched_setscheduler(current, SCHED_RR, &param);
816
817 for (;;) {
818 wait_event_interruptible(mt8193_nlh_wq, atomic_read(&mt8193_nlh_event));
819 atomic_set(&mt8193_nlh_event, 0);
820 mt8193_nlh_impl();
821 if (kthread_should_stop())
822 break;
823 }
824
825 return 0;
826 }
827
828 void hdmi_poll_isr(unsigned long n)
829 {
830 u32 i;
831
832 for (i = 0; i < MAX_HDMI_TMR_NUMBER; i++) {
833 if (mt8193_TmrValue[i] >= AVD_TMR_ISR_TICKS) {
834 mt8193_TmrValue[i] -= AVD_TMR_ISR_TICKS;
835
836 if ((i == HDMI_PLUG_DETECT_CMD)
837 && (mt8193_TmrValue[HDMI_PLUG_DETECT_CMD] == 0))
838 vSendHdmiCmd(HDMI_PLUG_DETECT_CMD);
839 else if ((i == HDMI_HDCP_PROTOCAL_CMD)
840 && (mt8193_TmrValue[HDMI_HDCP_PROTOCAL_CMD] == 0))
841 vSendHdmiCmd(HDMI_HDCP_PROTOCAL_CMD);
842 } else if (mt8193_TmrValue[i] > 0) {
843 mt8193_TmrValue[i] = 0;
844
845 if ((i == HDMI_PLUG_DETECT_CMD)
846 && (mt8193_TmrValue[HDMI_PLUG_DETECT_CMD] == 0))
847 vSendHdmiCmd(HDMI_PLUG_DETECT_CMD);
848 else if ((i == HDMI_HDCP_PROTOCAL_CMD)
849 && (mt8193_TmrValue[HDMI_HDCP_PROTOCAL_CMD] == 0))
850 vSendHdmiCmd(HDMI_HDCP_PROTOCAL_CMD);
851 }
852 }
853
854 atomic_set(&hdmi_timer_event, 1);
855 wake_up_interruptible(&hdmi_timer_wq);
856 mod_timer(&r_hdmi_timer, jiffies + gHDMI_CHK_INTERVAL / (1000 / HZ));
857
858 }
859
860 void cec_poll_isr(unsigned long n)
861 {
862 atomic_set(&cec_timer_event, 1);
863 wake_up_interruptible(&cec_timer_wq);
864 mod_timer(&r_cec_timer, jiffies + gCEC_CHK_INTERVAL / (1000 / HZ));
865
866 }
867
868 const HDMI_DRIVER *HDMI_GetDriver(void)
869 {
870 static const HDMI_DRIVER HDMI_DRV = {
871 .set_util_funcs = mt8193_set_util_funcs,
872 .get_params = mt8193_get_params,
873 .init = mt8193_init,
874 .enter = mt8193_enter,
875 .exit = mt8193_exit,
876 .suspend = mt8193_suspend,
877 .resume = mt8193_resume,
878 .video_config = mt8193_video_config,
879 .audio_config = mt8193_audio_config,
880 .video_enable = mt8193_video_enable,
881 .audio_enable = mt8193_audio_enable,
882 .power_on = mt8193_power_on,
883 .power_off = mt8193_power_off,
884 .set_mode = mt8193_set_mode,
885 .dump = mt8193_dump,
886 .read = mt8193_read,
887 .write = mt8193_write,
888 .get_state = mt8193_get_state,
889 .log_enable = mt8193_log_enable,
890 .InfoframeSetting = mt8193_InfoframeSetting,
891 .checkedid = mt8193_checkedid,
892 .colordeep = mt8193_colordeep,
893 .enablehdcp = mt8193_enablehdcp,
894 .setcecrxmode = mt8193_setcecrxmode,
895 .hdmistatus = mt8193_hdmistatus,
896 .hdcpkey = mt8193_hdcpkey,
897 .getedid = mt8193_AppGetEdidInfo,
898 .setcecla = mt8193_CECMWSetLA,
899 .sendsltdata = mt8193_u4CecSendSLTData,
900 .getceccmd = mt8193_CECMWGet,
901 .getsltdata = mt8193_GetSLTData,
902 .setceccmd = mt8193_CECMWSend,
903 .cecenable = mt8193_CECMWSetEnableCEC,
904 .getcecaddr = mt8193_NotifyApiCECAddress,
905 .mutehdmi = mt8193_mutehdmi,
906 .checkedidheader = mt8193_Check_EdidHeader,
907 };
908
909 return &HDMI_DRV;
910 }
911 EXPORT_SYMBOL(HDMI_GetDriver);
912 #endif