import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / hdmi / Sii8348 / si_edid.h
1 /*
2
3 SiI8348 Linux Driver
4
5 Copyright (C) 2013 Silicon Image, Inc.
6
7 This program is free software; you can redistribute it and/or
8 modify it under the terms of the GNU General Public License as
9 published by the Free Software Foundation version 2.
10 This program is distributed AS-IS WITHOUT ANY WARRANTY of any
11 kind, whether express or implied; INCLUDING without the implied warranty
12 of MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE or NON-INFRINGEMENT. See
13 the GNU General Public License for more details at http://www.gnu.org/licenses/gpl-2.0.html.
14
15 */
16
17 #if !defined(SI_EDID_H)
18 #define SI_EDID_H
19
20
21 SI_PUSH_STRUCT_PACKING //(
22
23 typedef struct SI_PACK_THIS_STRUCT _TwoBytes_t
24 {
25 unsigned char low;
26 unsigned char high;
27 }TwoBytes_t,*PTwoBytes_t;
28
29
30 #define EDID_EXTENSION_TAG 0x02
31 #define EDID_EXTENSION_BLOCK_MAP 0xF0
32 #define EDID_REV_THREE 0x03
33 //#define LONG_DESCR_LEN 18
34 #define EDID_BLOCK_0 0x00
35 #define EDID_BLOCK_2_3 0x01
36 //#define EDID_BLOCK_0_OFFSET 0x0000
37
38 typedef enum
39 {
40 DBTC_TERMINATOR = 0
41 ,DBTC_AUDIO_DATA_BLOCK = 1
42 ,DBTC_VIDEO_DATA_BLOCK = 2
43 ,DBTC_VENDOR_SPECIFIC_DATA_BLOCK = 3
44 ,DBTC_SPEAKER_ALLOCATION_DATA_BLOCK = 4
45 ,DBTC_VESA_DTC_DATA_BLOCK = 5
46 //reserved = 6
47 ,DBTC_USE_EXTENDED_TAG = 7
48 }data_block_tag_code_e;
49 typedef struct SI_PACK_THIS_STRUCT _data_block_header_fields_t
50 {
51 uint8_t length_following_header:5;
52 data_block_tag_code_e tag_code:3;
53 }data_block_header_fields_t,*Pdata_block_header_fields_t;
54
55 typedef union SI_PACK_THIS_STRUCT _data_block_header_byte_t
56 {
57 data_block_header_fields_t fields;
58 uint8_t as_byte;
59 }data_block_header_byte_t,*Pdata_block_header_byte_t;
60
61 typedef enum
62 {
63 ETC_VIDEO_CAPABILITY_DATA_BLOCK = 0
64 ,ETC_VENDOR_SPECIFIC_VIDEO_DATA_BLOCK = 1
65 ,ETC_VESA_VIDEO_DISPLAY_DEVICE_INFORMATION_DATA_BLOCK = 2
66 ,ETC_VESA_VIDEO_DATA_BLOCK = 3
67 ,ETC_HDMI_VIDEO_DATA_BLOCK = 4
68 ,ETC_COLORIMETRY_DATA_BLOCK = 5
69 ,ETC_VIDEO_RELATED = 6
70
71 ,ETC_CEA_MISC_AUDIO_FIELDS = 16
72 ,ETC_VENDOR_SPECIFIC_AUDIO_DATA_BLOCK = 17
73 ,ETC_HDMI_AUDIO_DATA_BLOCK = 18
74 ,ETC_AUDIO_RELATED = 19
75
76 ,ETC_GENERAL = 32
77 }extended_tag_code_e;
78
79 typedef struct SI_PACK_THIS_STRUCT _extended_tag_code_t
80 {
81 extended_tag_code_e etc:8;
82 }extended_tag_code_t,*Pextended_tag_code_t;
83
84 typedef struct SI_PACK_THIS_STRUCT _cea_short_descriptor_t
85 {
86 unsigned char VIC:7;
87 unsigned char native:1;
88
89 }cea_short_descriptor_t,*Pcea_short_descriptor_t;
90
91 typedef struct SI_PACK_THIS_STRUCT _MHL_short_desc_t
92 {
93 cea_short_descriptor_t cea_short_desc;
94 MHL2_video_descriptor_t mhl_vid_desc;
95 }MHL_short_desc_t,*PMHL_short_desc_t;
96
97 typedef struct SI_PACK_THIS_STRUCT _video_data_block_t
98 {
99 data_block_header_byte_t header;
100 cea_short_descriptor_t short_descriptors[1];//open ended
101 }video_data_block_t,*p_video_data_block_t;
102
103 typedef enum
104 {
105 // reserved = 0
106 afd_linear_PCM_IEC60958 = 1
107 ,afd_AC3 = 2
108 ,afd_MPEG1_layers_1_2 = 3
109 ,afd_MPEG1_layer_3 = 4
110 ,afdMPEG2_MultiChannel = 5
111 ,afd_AAC = 6
112 ,afd_DTS = 7
113 ,afd_ATRAC = 8
114 ,afd_one_bit_audio = 9
115 ,afd_dolby_digital = 10
116 ,afd_DTS_HD = 11
117 ,afd_MAT_MLP = 12
118 ,afd_DST = 13
119 ,afd_WMA_Pro = 14
120 //reserved = 15
121 }AudioFormatCodes_e;
122
123 typedef struct SI_PACK_THIS_STRUCT _CEA_short_audio_descriptor_t
124 {
125 unsigned char max_channels_minus_one :3;
126 AudioFormatCodes_e audio_format_code :4;
127 unsigned char F17 :1;
128
129 unsigned char freq_32_Khz :1;
130 unsigned char freq_44_1_KHz :1;
131 unsigned char freq_48_KHz :1;
132 unsigned char freq_88_2_KHz :1;
133 unsigned char freq_96_KHz :1;
134 unsigned char freq_176_4_KHz:1;
135 unsigned char freq_192_KHz :1;
136 unsigned char F27 :1;
137
138 union
139 {
140 struct SI_PACK_THIS_STRUCT
141 {
142 unsigned res_16_bit:1;
143 unsigned res_20_bit:1;
144 unsigned res_24_bit:1;
145 unsigned F33_37:5;
146 }audio_code_1_LPCM;
147 struct SI_PACK_THIS_STRUCT
148 {
149 uint8_t max_bit_rate_div_by_8_KHz;
150 }audio_codes_2_8;
151 struct SI_PACK_THIS_STRUCT
152 {
153 uint8_t default_zero;
154 }audio_codes_9_15;
155 }byte3;
156 }CEA_short_audio_descriptor_t,*PCEA_short_audio_descriptor_t;
157
158 typedef struct SI_PACK_THIS_STRUCT _audio_data_block_t
159 {
160 data_block_header_byte_t header;
161 CEA_short_audio_descriptor_t short_audio_descriptors[1]; // open ended
162 }audio_data_block_t,*Paudio_data_block_t;
163
164 typedef struct SI_PACK_THIS_STRUCT _speaker_allocation_flags_t
165 {
166 unsigned char spk_front_left_front_right:1;
167 unsigned char spk_LFE:1;
168 unsigned char spk_front_center:1;
169 unsigned char spk_rear_left_rear_right:1;
170 unsigned char spk_rear_center:1;
171 unsigned char spk_front_left_center_front_right_center:1;
172 unsigned char spk_rear_left_center_rear_right_center:1;
173 unsigned char spk_reserved:1;
174 }speaker_allocation_flags_t,*Pspeaker_allocation_flags_t;
175 typedef struct SI_PACK_THIS_STRUCT _speaker_allocation_data_block_payload_t
176 {
177 speaker_allocation_flags_t speaker_alloc_flags;
178
179 uint8_t reserved[2];
180 }speaker_allocation_data_block_payload_t,*Pspeaker_allocation_data_block_payload_t;
181
182 typedef struct SI_PACK_THIS_STRUCT _speaker_allocation_data_block_t
183 {
184 data_block_header_byte_t header;
185 speaker_allocation_data_block_payload_t payload;
186
187 }speaker_allocation_data_block_t,*Pspeaker_allocation_data_block_t;
188
189 typedef struct SI_PACK_THIS_STRUCT _HDMI_LLC_BA_t
190 {
191 unsigned char B:4;
192 unsigned char A:4;
193 }HDMI_LLC_BA_t,*PHDMI_LLC_BA_t;
194
195 typedef struct SI_PACK_THIS_STRUCT _HDMI_LLC_DC_t
196 {
197 unsigned char D:4;
198 unsigned char C:4;
199 }HDMI_LLC_DC_t,*PHDMI_LLC_DC_t;
200
201 typedef struct SI_PACK_THIS_STRUCT _HDMI_LLC_Byte6_t
202 {
203 unsigned char DVI_dual :1;
204 unsigned char reserved :2;
205 unsigned char DC_Y444 :1;
206 unsigned char DC_30bit :1;
207 unsigned char DC_36bit :1;
208 unsigned char DC_48bit :1;
209 unsigned char supports_AI :1;
210 }HDMI_LLC_Byte6_t,*PHDMI_LLC_Byte6_t;
211
212 typedef struct SI_PACK_THIS_STRUCT _HDMI_LLC_byte8_t
213 {
214 unsigned char CNC0_adjacent_pixels_independent :1;
215 unsigned char CNC1_specific_processing_still_pictures :1;
216 unsigned char CNC2_specific_processing_cinema_content :1;
217 unsigned char CNC3_specific_processing_low_AV_latency :1;
218 unsigned char reserved :1;
219 unsigned char HDMI_video_present :1;
220 unsigned char I_latency_fields_present :1;
221 unsigned char latency_fields_present :1;
222 }HDMI_LLC_byte8_t,*PHDMI_LLC_byte8_t;
223
224 typedef enum
225 {
226 imsz_NO_ADDITIONAL = 0
227 ,imsz_ASPECT_RATIO_CORRECT_BUT_NO_GUARRANTEE_OF_CORRECT_SIZE = 1
228 ,imsz_CORRECT_SIZES_ROUNDED_TO_NEAREST_1_CM = 2
229 ,imsz_CORRECT_SIZES_DIVIDED_BY_5_ROUNDED_TO_NEAREST_5_CM = 3
230 }image_size_e;
231
232 typedef struct SI_PACK_THIS_STRUCT _HDMI_LLC_Byte13_t
233 {
234 unsigned char reserved :3;
235 image_size_e image_size :2;
236 unsigned char _3D_multi_present :2;
237 unsigned char _3D_present :1;
238 }HDMI_LLC_Byte13_t,*PHDMI_LLC_Byte13_t;
239
240 typedef struct SI_PACK_THIS_STRUCT _HDMI_LLC_Byte14_t
241 {
242 unsigned char HDMI_3D_len :5;
243 unsigned char HDMI_VIC_len:3;
244 }HDMI_LLC_Byte14_t,*PHDMI_LLC_Byte14_t;
245
246 typedef struct SI_PACK_THIS_STRUCT _VSDB_byte_13_through_byte_15_t
247 {
248 HDMI_LLC_Byte13_t byte13;
249 HDMI_LLC_Byte14_t byte14;
250 uint8_t vicList[1]; // variable length list base on HDMI_VIC_len
251 }VSDB_byte_13_through_byte_15_t,*PVSDB_byte_13_through_byte_15_t;
252
253 typedef struct SI_PACK_THIS_STRUCT _VSDB_all_fields_byte_9_through_byte15_t
254 {
255 uint8_t video_latency;
256 uint8_t audio_latency;
257 uint8_t interlaced_video_latency;
258 uint8_t interlaced_audio_latency;
259 VSDB_byte_13_through_byte_15_t byte_13_through_byte_15;
260 // There must be no fields after here
261 }VSDB_all_fields_byte_9_through_byte15_t,*PVSDB_all_fields_byte_9_through_byte15_t;
262
263 typedef struct SI_PACK_THIS_STRUCT _VSDB_all_fields_byte_9_through_byte_15_sans_progressive_latency_t
264 {
265 uint8_t interlaced_video_latency;
266 uint8_t interlaced_audio_latency;
267 VSDB_byte_13_through_byte_15_t byte_13_through_byte_15;
268 // There must be no fields after here
269 }VSDB_all_fields_byte_9_through_byte_15_sans_progressive_latency_t,*PVSDB_all_fields_byte_9_through_byte_15_sans_progressive_latency_t;
270
271 typedef struct SI_PACK_THIS_STRUCT _VSDB_all_fields_byte_9_through_byte_15_sans_interlaced_latency_t
272 {
273 uint8_t video_latency;
274 uint8_t audio_latency;
275 VSDB_byte_13_through_byte_15_t byte_13_through_byte_15;
276 // There must be no fields after here
277 }VSDB_all_fields_byte_9_through_byte_15_sans_interlaced_latency_t,*PVSDB_all_fields_byte_9_through_byte_15_sans_interlaced_latency_t;
278
279 typedef struct SI_PACK_THIS_STRUCT _VSDB_all_fields_byte_9_through_byte_15_sans_all_latency_t
280 {
281 VSDB_byte_13_through_byte_15_t byte_13_through_byte_15;
282 // There must be no fields after here
283 }VSDB_all_fields_byte_9_through_byte_15_sans_all_latency_t,*PVSDB_all_fields_byte_9_through_byte_15_sans_all_latency_t;
284
285 typedef struct SI_PACK_THIS_STRUCT _HDMI_LLC_vsdb_payload_t
286 {
287 HDMI_LLC_BA_t B_A;
288 HDMI_LLC_DC_t D_C;
289 HDMI_LLC_Byte6_t byte6;
290 uint8_t maxTMDSclock;
291 HDMI_LLC_byte8_t byte8;
292 union
293 {
294 VSDB_all_fields_byte_9_through_byte_15_sans_all_latency_t vsdb_all_fields_byte_9_through_byte_15_sans_all_latency;
295 VSDB_all_fields_byte_9_through_byte_15_sans_progressive_latency_t vsdb_all_fields_byte_9_through_byte_15_sans_progressive_latency;
296 VSDB_all_fields_byte_9_through_byte_15_sans_interlaced_latency_t vsdb_all_fields_byte_9_through_byte_15_sans_interlaced_latency;
297 VSDB_all_fields_byte_9_through_byte15_t vsdb_all_fields_byte_9_through_byte_15;
298 }vsdb_fields_byte_9_through_byte_15;
299 // There must be no fields after here
300 }HDMI_LLC_vsdb_payload_t,*PHDMI_LLC_vsdb_payload_t;
301
302 typedef struct SI_PACK_THIS_STRUCT st_3D_structure_all_15_8_t
303 {
304 uint8_t frame_packing : 1;
305 uint8_t reserved1 : 5;
306 uint8_t top_bottom : 1;
307 uint8_t reserved2 : 1;
308 }_3D_structure_all_15_8_t,*P_3D_structure_all_15_8_t;
309
310 typedef struct SI_PACK_THIS_STRUCT st_3D_structure_all_7_0_t
311 {
312 uint8_t side_by_side : 1;
313 uint8_t reserved : 7;
314 }_3D_structure_all_7_0_t,*P_3D_structure_all_7_0_t;
315
316
317 typedef struct SI_PACK_THIS_STRUCT tag_3D_structure_all_t
318 {
319 _3D_structure_all_15_8_t _3D_structure_all_15_8;
320 _3D_structure_all_7_0_t _3D_structure_all_7_0;
321 }_3D_structure_all_t,*P_3D_structure_all_t;
322
323
324 typedef struct SI_PACK_THIS_STRUCT tag_3D_mask_t
325 {
326 uint8_t _3D_mask_15_8;
327 uint8_t _3D_mask_7_0;
328 }_3D_mask_t,*P_3D_mask_t;
329
330
331
332 typedef struct SI_PACK_THIS_STRUCT tag_2D_VIC_order_3D_structure_t
333 {
334 _3D_structure_e _3D_structure:4; // definition from info frame
335 unsigned _2D_VIC_order:4;
336 }_2D_VIC_order_3D_structure_t,*P_2D_VIC_order_3D_structure_t;
337
338 typedef struct SI_PACK_THIS_STRUCT tag_3D_detail_t
339 {
340 unsigned char reserved :4;
341 unsigned char _3D_detail :4;
342 }_3D_detail_t,*P_3D_detail_t;
343
344 typedef struct SI_PACK_THIS_STRUCT tag_3D_structure_and_detail_entry_sans_byte1_t
345 {
346 _2D_VIC_order_3D_structure_t byte0;
347 /*see HDMI 1.4 spec w.r.t. contents of 3D_structure_X */
348 }_3D_structure_and_detail_entry_sans_byte1_t,*P_3D_structure_and_detail_entry_sans_byte1_t;
349
350 typedef struct SI_PACK_THIS_STRUCT tag_3D_structure_and_detail_entry_with_byte1_t
351 {
352 _2D_VIC_order_3D_structure_t byte0;
353 _3D_detail_t byte1;
354 }_3D_structure_and_detail_entry_with_byte1_t,*P_3D_structure_and_detail_entry_with_byte1_t;
355
356 typedef union tag_3D_structure_and_detail_entry_u
357 {
358 _3D_structure_and_detail_entry_sans_byte1_t sans_byte1;
359 _3D_structure_and_detail_entry_with_byte1_t with_byte1;
360 }_3D_structure_and_detail_entry_u,*P_3D_structure_and_detail_entry_u;
361
362 typedef struct SI_PACK_THIS_STRUCT _HDMI_3D_sub_block_sans_all_AND_mask_t
363 {
364 _3D_structure_and_detail_entry_u _3D_structure_and_detail_list[1];
365 }HDMI_3D_sub_block_sans_all_AND_mask_t,*PHDMI_3D_sub_block_sans_all_AND_mask_t;
366
367 typedef struct SI_PACK_THIS_STRUCT _HDMI_3D_sub_block_sans_mask_t
368 {
369 _3D_structure_all_t _3D_structure_all;
370 _3D_structure_and_detail_entry_u _3D_structure_and_detail_list[1];
371 }HDMI_3D_sub_block_sans_mask_t,*PHDMI_3D_sub_block_sans_mask_t;
372
373 typedef struct SI_PACK_THIS_STRUCT _HDMI_3D_sub_block_with_all_AND_mask_t
374 {
375 _3D_structure_all_t _3D_structure_all;
376 _3D_mask_t _3D_mask;
377 _3D_structure_and_detail_entry_u _3D_structure_and_detail_list[1];
378 }HDMI_3D_sub_block_with_all_AND_mask_t,*PHDMI_3D_sub_block_with_all_AND_mask_t;
379
380 typedef union
381 {
382 HDMI_3D_sub_block_sans_all_AND_mask_t hDMI_3D_sub_block_sans_all_AND_mask;
383 HDMI_3D_sub_block_sans_mask_t HDMI_3D_sub_block_sans_mask;
384 HDMI_3D_sub_block_with_all_AND_mask_t HDMI_3D_sub_block_with_all_AND_mask;
385 }HDMI_3D_sub_block_t,*PHDMI_3D_sub_block_t;
386
387 typedef struct SI_PACK_THIS_STRUCT _vsdb_t
388 {
389 data_block_header_byte_t header;
390 uint8_t IEEE_OUI[3];
391 union
392 {
393 HDMI_LLC_vsdb_payload_t HDMI_LLC;
394 uint8_t payload[1]; // open ended
395 }payload_u;
396 }vsdb_t,*P_vsdb_t;
397
398 typedef enum
399 {
400 xvYCC_601 = 1
401 ,xvYCC_709 = 2
402 }colorimetry_xvYCC_e;
403
404 typedef struct SI_PACK_THIS_STRUCT _colorimetry_xvYCC_t
405 {
406 colorimetry_xvYCC_e xvYCC :2;
407 unsigned char reserved1 :6;
408 }colorimetry_xvYCC_t,*Pcolorimetry_xvYCC_t;
409
410 typedef struct SI_PACK_THIS_STRUCT _colorimetry_meta_data_t
411 {
412 unsigned char meta_data :3;
413 unsigned char reserved2 :5;
414 }colorimetry_meta_data_t,*Pcolorimetry_meta_data_t;
415
416 typedef struct SI_PACK_THIS_STRUCT _colorimetry_data_payload_t
417 {
418 colorimetry_xvYCC_t ci_data;
419 colorimetry_meta_data_t cm_meta_data;
420 }colorimetry_data_payload_t,*Pcolorimetry_data_payload_t;
421 typedef struct SI_PACK_THIS_STRUCT _colorimetry_data_block_t
422 {
423 data_block_header_byte_t header;
424 extended_tag_code_t extended_tag;
425 colorimetry_data_payload_t payload;
426
427 }colorimetry_data_block_t,*Pcolorimetry_data_block_t;
428
429 typedef enum
430 {
431 ceou_NEITHER = 0
432 ,ceou_ALWAYS_OVERSCANNED = 1
433 ,ceou_ALWAYS_UNDERSCANNED = 2
434 ,ceou_BOTH = 3
435 }CE_overscan_underscan_behavior_e;
436
437 typedef enum
438 {
439 itou_NEITHER = 0
440 ,itou_ALWAYS_OVERSCANNED = 1
441 ,itou_ALWAYS_UNDERSCANNED = 2
442 ,itou_BOTH = 3
443 }IT_overscan_underscan_behavior_e;
444
445 typedef enum
446 {
447 ptou_NEITHER = 0
448 ,ptou_ALWAYS_OVERSCANNED = 1
449 ,ptou_ALWAYS_UNDERSCANNED = 2
450 ,ptou_BOTH = 3
451 }PT_overscan_underscan_behavior_e;
452
453 typedef struct SI_PACK_THIS_STRUCT _video_capability_data_payload_t
454 {
455 CE_overscan_underscan_behavior_e S_CE :2;
456 IT_overscan_underscan_behavior_e S_IT :2;
457 PT_overscan_underscan_behavior_e S_PT :2;
458 unsigned QS :1;
459 unsigned quantization_range_selectable:1;
460 }video_capability_data_payload_t,*Pvideo_capability_data_payload_t;
461
462 typedef struct SI_PACK_THIS_STRUCT _video_capability_data_block_t
463 {
464 data_block_header_byte_t header;
465 extended_tag_code_t extended_tag;
466 video_capability_data_payload_t payload;
467
468 }video_capability_data_block_t,*Pvideo_capability_data_block_t;
469
470 typedef struct SI_PACK_THIS_STRUCT _CEA_data_block_collection_t
471 {
472 data_block_header_byte_t header;
473
474 union
475 {
476 extended_tag_code_t extended_tag;
477 cea_short_descriptor_t short_descriptor;
478 }payload_u;
479 // open ended array of cea_short_descriptor_t starts here
480 }CEA_data_block_collection_t,*PCEA_data_block_collection_t;
481
482 typedef struct SI_PACK_THIS_STRUCT _CEA_extension_version_1_t
483 {
484 uint8_t reservedMustBeZero;
485 uint8_t reserved[123];
486 }CEA_extension_version_1_t,*PCEA_extension_version_1_t;
487
488 typedef struct SI_PACK_THIS_STRUCT _CEA_extension_2_3_misc_support_t
489 {
490 uint8_t total_number_detailed_timing_descriptors_in_entire_EDID:4;
491 uint8_t YCrCb422_support:1;
492 uint8_t YCrCb444_support:1;
493 uint8_t basic_audio_support:1;
494 uint8_t underscan_IT_formats_by_default:1;
495 }CEA_extension_2_3_misc_support_t,*PCEA_extension_2_3_misc_support_t;
496 typedef struct SI_PACK_THIS_STRUCT _CEA_extension_version_2_t
497 {
498 CEA_extension_2_3_misc_support_t misc_support;
499
500 uint8_t reserved[123];
501 }CEA_extension_version_2_t,*PCEA_extension_version_2_t;
502
503 typedef struct SI_PACK_THIS_STRUCT _CEA_extension_version_3_t
504 {
505 CEA_extension_2_3_misc_support_t misc_support;
506 union
507 {
508 uint8_t data_block_collection[123];
509 uint8_t reserved[123];
510 }Offset4_u;
511 }CEA_extension_version_3_t,*PCEA_extension_version_3_t;
512
513 typedef struct SI_PACK_THIS_STRUCT _block_map_t
514 {
515 uint8_t tag;
516 uint8_t block_tags[126];
517 uint8_t checksum;
518 }block_map_t, *Pblock_map_t;
519
520 typedef struct SI_PACK_THIS_STRUCT _CEA_extension_t
521 {
522 uint8_t tag;
523 uint8_t revision;
524 uint8_t byte_offset_to_18_byte_descriptors;
525 union
526 {
527 CEA_extension_version_1_t version1;
528 CEA_extension_version_2_t version2;
529 CEA_extension_version_3_t version3;
530 }version_u;
531 uint8_t checksum;
532 }CEA_extension_t,*PCEA_extension_t;
533
534 typedef struct SI_PACK_THIS_STRUCT _detailed_timing_descriptor_t
535 {
536 uint8_t pixel_clock_low;
537 uint8_t pixel_clock_high;
538 uint8_t horz_active_7_0;
539 uint8_t horz_blanking_7_0;
540 struct SI_PACK_THIS_STRUCT
541 {
542 unsigned char horz_blanking_11_8 :4;
543 unsigned char horz_active_11_8 :4;
544 }horz_active_blanking_high;
545 uint8_t vert_active_7_0;
546 uint8_t vert_blanking_7_0;
547 struct SI_PACK_THIS_STRUCT
548 {
549 unsigned char vert_blanking_11_8 :4;
550 unsigned char vert_active_11_8 :4;
551 }vert_active_blanking_high;
552 uint8_t horz_sync_offset_7_0;
553 uint8_t horz_sync_pulse_width7_0;
554 struct SI_PACK_THIS_STRUCT
555 {
556 unsigned char vert_sync_pulse_width_3_0 :4;
557 unsigned char vert_sync_offset_3_0 :4;
558 }vert_sync_offset_width;
559 struct SI_PACK_THIS_STRUCT
560 {
561 unsigned char vert_sync_pulse_width_5_4 :2;
562 unsigned char vert_sync_offset_5_4 :2;
563 unsigned char horz_sync_pulse_width_9_8 :2;
564 unsigned char horzSyncOffset9_8 :2;
565 }hs_offset_hs_pulse_width_vs_offset_vs_pulse_width;
566 uint8_t horz_image_size_in_mm_7_0;
567 uint8_t vert_image_size_in_mm_7_0;
568 struct SI_PACK_THIS_STRUCT
569 {
570 unsigned char vert_image_size_in_mm_11_8 :4;
571 unsigned char horz_image_size_in_mm_11_8 :4;
572 }image_size_high;
573 uint8_t horz_border_in_lines;
574 uint8_t vert_border_in_pixels;
575 struct SI_PACK_THIS_STRUCT
576 {
577 unsigned char stereo_bit_0 :1;
578 unsigned char sync_signal_options :2;
579 unsigned char sync_signal_type :2;
580 unsigned char stereo_bits_2_1 :2;
581 unsigned char interlaced :1;
582 }flags;
583 }detailed_timing_descriptor_t,*Pdetailed_timing_descriptor_t;
584
585 typedef struct SI_PACK_THIS_STRUCT _red_green_bits_1_0_t
586 {
587 unsigned char green_y :2;
588 unsigned char green_x :2;
589 unsigned char red_y :2;
590 unsigned char red_x :2;
591 }red_green_bits_1_0_t,*Pred_green_bits_1_0_t;
592
593 typedef struct SI_PACK_THIS_STRUCT _blue_white_bits_1_0_t
594 {
595 unsigned char white_y :2;
596 unsigned char white_x :2;
597 unsigned char blue_y :2;
598 unsigned char blue_x :2;
599
600 }blue_white_bits_1_0_t,*Pblue_white_bits_1_0_t;
601
602
603 typedef struct SI_PACK_THIS_STRUCT _established_timings_I_t
604 {
605 unsigned char et800x600_60Hz :1;
606 unsigned char et800x600_56Hz :1;
607 unsigned char et640x480_75Hz :1;
608 unsigned char et640x480_72Hz :1;
609 unsigned char et640x480_67Hz :1;
610 unsigned char et640x480_60Hz :1;
611 unsigned char et720x400_88Hz :1;
612 unsigned char et720x400_70Hz :1;
613 }established_timings_I_t,*Pestablished_timings_I_t;
614
615 typedef struct SI_PACK_THIS_STRUCT _established_timings_II_t
616 {
617 unsigned char et1280x1024_75Hz:1;
618 unsigned char et1024x768_75Hz :1;
619 unsigned char et1024x768_70Hz :1;
620 unsigned char et1024x768_60Hz :1;
621 unsigned char et1024x768_87HzI:1;
622 unsigned char et832x624_75Hz :1;
623 unsigned char et800x600_75Hz :1;
624 unsigned char et800x600_72Hz :1;
625 }established_timings_II_t,*Pestablished_timings_II_t;
626
627 typedef struct SI_PACK_THIS_STRUCT _manufacturers_timings_t
628 {
629 unsigned char reserved :7;
630 unsigned char et1152x870_75Hz :1;
631 }manufacturers_timings_t,*Pmanufacturers_timings_t;
632
633 typedef enum
634 {
635 iar_16_to_10 = 0
636 ,iar_4_to_3 = 1
637 ,iar_5_to_4 = 2
638 ,iar_16_to_9 = 3
639 }image_aspect_ratio_e;
640
641 typedef struct SI_PACK_THIS_STRUCT _standard_timing_t
642 {
643 unsigned char horz_pix_div_8_minus_31;
644 unsigned char field_refresh_rate_minus_60:6;
645 image_aspect_ratio_e image_aspect_ratio :2;
646 }standard_timing_t,*Pstandard_timing_t;
647
648 typedef struct SI_PACK_THIS_STRUCT _EDID_block0_t
649 {
650 unsigned char header_data[8];
651 TwoBytes_t id_manufacturer_name;
652 TwoBytes_t id_product_code;
653 unsigned char serial_number[4];
654 unsigned char week_of_manufacture;
655 unsigned char year_of_manufacture;
656 unsigned char EDID_version;
657 unsigned char EDID_revision;
658 unsigned char video_input_definition;
659 unsigned char horz_screen_size_or_aspect_ratio;
660 unsigned char vert_screen_size_or_aspect_ratio;
661 unsigned char display_transfer_characteristic;
662 unsigned char feature_support;
663 red_green_bits_1_0_t red_green_bits_1_0;
664 blue_white_bits_1_0_t blue_white_bits_1_0;
665 unsigned char red_x;
666 unsigned char red_y;
667 unsigned char green_x;
668 unsigned char green_y;
669 unsigned char blue_x;
670 unsigned char blue_y;
671 unsigned char white_x;
672 unsigned char white_y;
673 established_timings_I_t established_timings_I;
674 established_timings_II_t established_timings_II;
675 manufacturers_timings_t manufacturers_timings;
676 standard_timing_t standard_timings[8];
677 detailed_timing_descriptor_t detailed_timing_descriptors[4];
678 unsigned char extension_flag;
679 unsigned char checksum;
680
681 }EDID_block0_t,*PEDID_block0_t;
682
683 typedef struct SI_PACK_THIS_STRUCT _monitor_name_t
684 {
685 uint8_t flag_required[2];
686 uint8_t flag_reserved;
687 uint8_t data_type_tag;
688 uint8_t flag;
689 uint8_t ascii_name[13];
690
691
692 }monitor_name_t,*Pmonitor_name_t;
693
694 typedef struct SI_PACK_THIS_STRUCT _monitor_range_limits_t
695 {
696
697 uint8_t flag_required[2];
698 uint8_t flag_reserved;
699 uint8_t data_type_tag;
700 uint8_t flag;
701 uint8_t min_vertical_rate_in_Hz;
702 uint8_t max_vertical_rate_in_Hz;
703 uint8_t min_horizontal_rate_in_KHz;
704 uint8_t max_horizontal_rate_in_KHz;
705 uint8_t max_pixel_clock_in_MHz_div_10;
706 uint8_t tag_secondary_formula;
707 uint8_t filler[7];
708 }monitor_range_limits_t,*Pmonitor_range_limits_t;
709
710
711 typedef union tag_18_byte_descriptor_u
712 {
713 detailed_timing_descriptor_t dtd;
714 monitor_name_t name;
715 monitor_range_limits_t range_limits;
716 }_18_byte_descriptor_u,*P_18_byte_descriptor_u;
717
718
719 typedef struct SI_PACK_THIS_STRUCT _display_mode_3D_info_t
720 {
721 unsigned char dmi_3D_supported:1;
722 unsigned char dmi_sufficient_bandwidth:1;
723 }display_mode_3D_info_t,*Pdisplay_mode_3D_info_t;
724
725 typedef enum
726 {
727 vif_single_frame_rate = 0x00
728 ,vif_dual_frame_rate = 0x01
729
730 }VIC_info_flags_e;
731
732 typedef enum
733 {
734 vsm_progressive = 0
735 ,vsm_interlaced = 1
736 }VIC_scan_mode_e;
737
738 typedef enum
739 {
740 par_1_to_1
741 ,par_16_to_15
742 ,par_16_to_27
743 ,par_16_to_45
744 ,par_16_to_45_160_to_45
745 ,par_1_to_15_10_to_15
746 ,par_1_to_9_10_to_9
747 ,par_2_to_15_20_to_15
748 ,par_2_to_9
749 ,par_2_to_9_20_to_9
750 ,par_32_to_27
751 ,par_32_to_45
752 ,par_4_to_27_40_to_27
753 ,par_4_to_9
754 ,par_4_to_15
755 ,par_64_to_45
756 ,par_8_to_15
757 ,par_8_to_27
758 ,par_8_to_27_80_to_27
759 ,par_8_to_45_80_to_45
760 ,par_8_to_9
761 }pixel_aspect_ratio_e;
762
763
764
765 typedef struct SI_PACK_THIS_STRUCT _VIC_info_fields_t
766 {
767 image_aspect_ratio_e image_aspect_ratio :2;
768 VIC_scan_mode_e interlaced :1;
769 pixel_aspect_ratio_e pixel_aspect_ratio :5;
770
771 VIC_info_flags_e frame_rate_info :1;
772 uint8_t clocks_per_pixel_shift_count:2;
773 uint8_t field2_v_blank :2;
774 uint8_t reserved :3;
775 }VIC_info_fields_t,*PVIC_info_fields_t;
776
777
778
779 typedef struct SI_PACK_THIS_STRUCT _VIC_info_t
780 {
781 uint16_t columns;
782 uint16_t rows;
783 uint16_t h_blank_in_pixels;
784 uint16_t v_blank_in_pixels;
785 uint32_t field_rate_in_milliHz;
786 VIC_info_fields_t fields;
787 // uint16_t pixClockDiv10000;
788 }VIC_info_t,*PVIC_info_t;
789
790 typedef struct SI_PACK_THIS_STRUCT _HDMI_VIC_info_t
791 {
792 uint16_t columns;
793 uint16_t rows;
794 uint32_t field_rate_0_in_milliHz,field_rate_1_in_milliHz;
795 uint32_t pixel_clock_0,pixel_clock_1;
796 }HDMI_VIC_info_t,*PHDMI_VIC_info_t;
797
798
799 #if 1//def ENABLE_EDID_DEBUG_PRINT //(
800 void dump_EDID_block_impl(const char *pszFunction, int iLineNum,uint8_t override,uint8_t *pData,uint16_t length);
801 void clear_EDID_block_impl(uint8_t *pData);
802 #define DUMP_EDID_BLOCK(override,pData,length) dump_EDID_block_impl(__FUNCTION__,__LINE__,override,(uint8_t *)pData,length);
803 #define CLEAR_EDID_BLOCK(pData) clear_EDID_block_impl(pData);
804 #else //)(
805 #define DUMP_EDID_BLOCK(override,pData,length) /* nothing to do */
806 #define CLEAR_EDID_BLOCK(pData) /* nothing to do */
807 #endif //)
808
809 enum EDID_error_codes
810 {
811 EDID_OK,
812 EDID_INCORRECT_HEADER,
813 EDID_CHECKSUM_ERROR,
814 EDID_NO_861_EXTENSIONS,
815 EDID_SHORT_DESCRIPTORS_OK,
816 EDID_LONG_DESCRIPTORS_OK,
817 EDID_EXT_TAG_ERROR,
818 EDID_REV_ADDR_ERROR,
819 EDID_V_DESCR_OVERFLOW,
820 EDID_UNKNOWN_TAG_CODE,
821 EDID_NO_DETAILED_DESCRIPTORS,
822 EDID_DDC_BUS_REQ_FAILURE,
823 EDID_DDC_BUS_RELEASE_FAILURE,
824 EDID_READ_TIMEOUT
825 };
826 SI_POP_STRUCT_PACKING //)
827
828 #endif /* #if !defined(SI_EDID_H) */